May 2023 - U-Boot

[PATCH] board: freescale: imx93_evk: Fix MMC environment offset boot conflict.
by Ken Sloat 30 Jun '23

30 Jun '23

>From 734bfa4e4556976fe85c741f13ae94161cae97e6 Mon Sep 17 00:00:00 2001 From: Ken Sloat <ken.s(a)variscite.com> Date: Tue, 11 Apr 2023 16:05:31 -0400 Currently, the imx93_evk is configured with CONFIG_ENV_IS_IN_MMC and the chosen environment offset in the config is 0x400000. Unless the user programs the associated fuses, this offset is the default secondary boot image offset used by the i.MX 93 ROM bootloader. With certain combinations of environmental variables, the CRC and beginning of the environment can potentially falsely appear as a valid boot image container header. If the expected "sw_version" offset within this mistaken boot image container is greater than the primary's, the ROM bootloader can skip booting of the primary image altogether and attempt to boot with the content of the environment data. This will then hang the system. To fix this, move the environment from 0x400000 to 0x700000 reserving up to 3 MB at 0x400000 for any actual secondary user image container. Signed-off-by: Ken Sloat <ken.s(a)variscite.com> --- configs/imx93_11x11_evk_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/imx93_11x11_evk_defconfig b/configs/imx93_11x11_evk_defconfig index 4f8777161e..db94bbfdd1 100644 --- a/configs/imx93_11x11_evk_defconfig +++ b/configs/imx93_11x11_evk_defconfig @@ -7,7 +7,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x4000 -CONFIG_ENV_OFFSET=0x400000 +CONFIG_ENV_OFFSET=0x700000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="imx93-11x11-evk" CONFIG_SPL_TEXT_BASE=0x2049A000 -- 2.34.1

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[PATCH] phy: rockchip: inno-usb2: fix phy reg=0 case
by Eugen Hristev 29 Jun '23

29 Jun '23

The support for #address-cells=2 has a loophole: if the reg is actually 0, but the #address-cells is actually 1, like in such case below: syscon { #address-cells = <1>; phy { reg = <0 0x10>; }; }; then the second u32 of the 'reg' is the size, not the address. The code should check for the parent's #address-cells value, and not assume that if the first u32 is 0, then the #address-cells is 2, and the reg property is something like reg = <0 0xff00 0x10>; Fixed this by looking for the #address-cells value and retrieving the reg address only if this is ==2. To avoid breaking anything I also kept the check `if reg==0` as some DT's may have a wrong #address-cells as parent and even if this commit is correct, it might break the existing wrong device-trees. Fixes: d538efb9adcf ("phy: rockchip: inno-usb2: Add support #address_cells = 2") Signed-off-by: Eugen Hristev <eugen.hristev(a)collabora.com> --- drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c index 22e2797eea28..e5e02b6765b1 100644 --- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c +++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c @@ -186,7 +186,7 @@ static int rockchip_usb2phy_probe(struct udevice *dev) } /* support address_cells=2 */ - if (reg == 0) { + if (dev_read_addr_cells(dev) == 2 && reg == 0) { if (ofnode_read_u32_index(dev_ofnode(dev), "reg", 1, &reg)) { dev_err(dev, "%s must have reg[1]\n", ofnode_get_name(dev_ofnode(dev))); -- 2.34.1

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U-Boot OMAP GPMC ECC change
by Colin Foster 27 Jun '23

27 Jun '23

Hi Roger, I was looking to test my system against U-Boot 2023.04. I'm running an OMAP 4460 SOM (I've been waiting to get kernel acceptance before U-Boot, but that has slipped) and it boots from NAND. When I jumped from 2023.01 to 2023.04, I noticed I get spammed in the SPL by "omap-elm: uncorrectable ECC errors". I bisected, and this seems to be the result of commit 04fcd25873 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction"). Is the multi-sector ECC generation something that should work in a backward-compatible way? Do you know of anything that might be going wrong here? Any advice would be greatly appreciated, as I find it is usually something simple I'm doing wrong that is causing most of my issues. Thanks, Colin Foster.

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[PATCH v2 0/1] Add Radxa ROCK Pi S support in U-boot
by Akash Gajjar 26 Jun '23

26 Jun '23

ROCK Pi S is rk3308 soc based board from Radxa. Add board support in u-boot. Booting logs is accessible at https://paste.ubuntu.com/p/cJDRzBRdXq/ Akash Gajjar (1): arm64: dts: rockchip: rk3308: Add Radxa ROCK Pi S support arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi | 17 ++ arch/arm/dts/rk3308-rock-pi-s.dts | 228 ++++++++++++++++++++++ board/rockchip/evb_rk3308/MAINTAINERS | 7 + configs/rock-pi-s-rk3308_defconfig | 89 +++++++++ 4 files changed, 341 insertions(+) create mode 100644 arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi create mode 100644 arch/arm/dts/rk3308-rock-pi-s.dts create mode 100644 configs/rock-pi-s-rk3308_defconfig -- 2.25.1

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[PATCH] clk: sifive: only build sifive-prci.o for CONFIG_CLK_SIFIVE_PRCI
by Ben Dooks 26 Jun '23

26 Jun '23

If we're building non FU540/FU740 SoC drivers, then the sifive-prci.o is not needed. Only build this when CONFIG_CLK_SIFIVE_PRCI is selected. Signed-off-by: Ben Dooks <ben.dooks(a)sifive.com> --- drivers/clk/sifive/Makefile | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/clk/sifive/Makefile b/drivers/clk/sifive/Makefile index 51348b1ddc..84859d92ab 100644 --- a/drivers/clk/sifive/Makefile +++ b/drivers/clk/sifive/Makefile @@ -1,5 +1,3 @@ # SPDX-License-Identifier: GPL-2.0+ -obj-y += sifive-prci.o - -obj-$(CONFIG_CLK_SIFIVE_PRCI) += fu540-prci.o fu740-prci.o +obj-$(CONFIG_CLK_SIFIVE_PRCI) += sifive-prci.o fu540-prci.o fu740-prci.o -- 2.39.2

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[PATCH v2 0/4] NFSv1 support
by Christian Gmeiner 25 Jun '23

25 Jun '23

This patch series adds support for NFSv1 and is more or less a rebased version of an older series. During V1 there was a discussion if it really makes sense to bring more features into the network stack of U-Boot as it is just a bootloader. As TCP support landed I thought I might give this patch series another try. Thomas RIENOESSL (4): nfs: convert supported_nfs_versions bitfield to an enum nfs: factor out generic reply error handling nfs: handle rpc errors for mount calls net: add NFSv1 support net/nfs.c | 192 ++++++++++++++++++++++++++++++++++-------------------- 1 file changed, 120 insertions(+), 72 deletions(-) -- 2.39.2

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Please pull u-boot-marvell/master
by Stefan Roese 24 Jun '23

24 Jun '23

Hi Tom, please pull this next batch of mostly Marvell related patches: ---------------------------------------------------------------- - kwboot/mmc: Misc fixes for eMMC booting (Pali) - mvebu: avoid buffer overflow in hws_serdes_topology_verify (Heinrich) ---------------------------------------------------------------- Here the Azure build, without any issues: https://dev.azure.com/sr0718/u-boot/_build/results?buildId=300&view=results Thanks, Stefan The following changes since commit 30f6305e0cdcf59b0247b057f04374818d7c76e6: Merge branch '2023-05-01-assorted-powerpc-updates' (2023-05-02 12:50:42 -0400) are available in the Git repository at: git@source.denx.de:u-boot/custodians/u-boot-marvell.git for you to fetch changes up to a61a56a4a50d73ff747ee3fff3c680886ce76d07: arm: mvebu: avoid buffer overflow in hws_serdes_topology_verify (2023-05-03 08:39:23 +0200) ---------------------------------------------------------------- Heinrich Schuchardt (1): arm: mvebu: avoid buffer overflow in hws_serdes_topology_verify Pali Rohár (4): tools: kwboot: Fix MMC partitions documentation mmc: Read eMMC partition access bits before card reset arm: mvebu: spl: Load proper U-Boot from correct eMMC partition arm: mvebu: clearfog: Update eMMC/SD/SATA instructions .../mach-mvebu/serdes/a38x/high_speed_env_spec.c | 4 +-- arch/arm/mach-mvebu/spl.c | 10 +++++-- board/solidrun/clearfog/README | 20 +++++++------- drivers/mmc/mmc.c | 31 +++++++++++++++++++--- tools/kwboot.c | 9 ++++--- 5 files changed, 54 insertions(+), 20 deletions(-)

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riscv: asm update for building ubifs
by Ben Dooks 23 Jun '23

23 Jun '23

Fix misisng atomic and test_and_{set,clear}_bit macros to allow the ubi/ubifs code to be built for riscv. These are fairly simple but are not being used outside of ubifs on our builds. Ben Dooks (3): riscv: add generic link for <asm/atomic.h> riscv: implement local_irq_{save,restore} macros riscv: define test_and_{set,clear}_bit in asm/bitops.h arch/riscv/include/asm/atomic.h | 14 ++++++++++++++ arch/riscv/include/asm/bitops.h | 3 +++ arch/riscv/include/asm/system.h | 15 +++++++++++---- 3 files changed, 28 insertions(+), 4 deletions(-) create mode 100644 arch/riscv/include/asm/atomic.h -- 2.39.2

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[UBOOT PATCH 0/3] Port the usb reset patches from linux
by Venkatesh Yadav Abbarapu 22 Jun '23

22 Jun '23

Port the usb reset patches from linux kernel. Venkatesh Yadav Abbarapu (3): usb: dwc3: core: improve reset sequence usb: dwc3: gadget: Don't send unintended link state change usb: dwc3: core: Only handle soft-reset in DCTL drivers/usb/dwc3/core.c | 51 +++++++++++++++------------------------ drivers/usb/dwc3/gadget.c | 16 ++++++------ drivers/usb/dwc3/gadget.h | 14 +++++++++++ 3 files changed, 40 insertions(+), 41 deletions(-) -- 2.17.1

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[PATCH v2 0/2] common/memsize.c: Fix get_ram_size() when cache is enabled
by Francesco Dolcini 22 Jun '23

22 Jun '23

From: Francesco Dolcini <francesco.dolcini(a)toradex.com> Ensure that every write is flushed to memory and afterward reads are from memory. Since the algorithm rely on the fact that accessing to not existent memory lead to write at addr / 2 without this modification accesses to aliased (not physically present) addresses are cached and wrong size is returned. This was discovered while working on a TI AM625 based board where cache is normally enabled, see commit c02712a74849 ("arm: mach-k3: Enable dcache in SPL"). Test results here: https://github.com/u-boot/u-boot/pull/293 v2: * added additional patch to fix sandbox build * ensure that the changes are fine with every arch/build, check if cache is enabled and check for cache line size define Emanuele Ghidoli (2): sandbox: Add a dummy dcache_status() function common/memsize.c: Fix get_ram_size() when cache is enabled arch/sandbox/cpu/cpu.c | 5 +++++ common/memsize.c | 24 ++++++++++++++++++++++++ 2 files changed, 29 insertions(+) -- 2.25.1

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