April 2023 - U-Boot

[PATCH] arm: dts: iot2050: Include u-boot specific bits implicitly
by Jan Kiszka 05 May '23

05 May '23

From: Jan Kiszka <jan.kiszka(a)siemens.com> Create *-u-boot.dtsi files for each target dtb of the IOT2050 series so that we can drop the #include deviations from upstream dts[i] files here. Signed-off-by: Jan Kiszka <jan.kiszka(a)siemens.com> --- This was tested against most of our boards with the DTS synced from kernel 6.3. arch/arm/dts/k3-am65-iot2050-common-pg2.dtsi | 2 -- arch/arm/dts/k3-am6528-iot2050-basic-common.dtsi | 3 --- arch/arm/dts/k3-am6528-iot2050-basic-pg2-u-boot.dtsi | 11 +++++++++++ arch/arm/dts/k3-am6528-iot2050-basic-u-boot.dtsi | 10 ++++++++++ arch/arm/dts/k3-am6548-iot2050-advanced-common.dtsi | 3 --- .../arm/dts/k3-am6548-iot2050-advanced-m2-u-boot.dtsi | 1 + .../dts/k3-am6548-iot2050-advanced-pg2-u-boot.dtsi | 1 + arch/arm/dts/k3-am6548-iot2050-advanced-u-boot.dtsi | 1 + 8 files changed, 24 insertions(+), 8 deletions(-) create mode 100644 arch/arm/dts/k3-am6528-iot2050-basic-pg2-u-boot.dtsi create mode 100644 arch/arm/dts/k3-am6528-iot2050-basic-u-boot.dtsi create mode 120000 arch/arm/dts/k3-am6548-iot2050-advanced-m2-u-boot.dtsi create mode 120000 arch/arm/dts/k3-am6548-iot2050-advanced-pg2-u-boot.dtsi create mode 120000 arch/arm/dts/k3-am6548-iot2050-advanced-u-boot.dtsi diff --git a/arch/arm/dts/k3-am65-iot2050-common-pg2.dtsi b/arch/arm/dts/k3-am65-iot2050-common-pg2.dtsi index e7e0ca41597..e73458ca690 100644 --- a/arch/arm/dts/k3-am65-iot2050-common-pg2.dtsi +++ b/arch/arm/dts/k3-am65-iot2050-common-pg2.dtsi @@ -49,5 +49,3 @@ snps,dis-u1-entry-quirk; snps,dis-u2-entry-quirk; }; - -#include "k3-am65-iot2050-common-pg2-u-boot.dtsi" diff --git a/arch/arm/dts/k3-am6528-iot2050-basic-common.dtsi b/arch/arm/dts/k3-am6528-iot2050-basic-common.dtsi index 0d215b4d668..4a9bf7d7c07 100644 --- a/arch/arm/dts/k3-am6528-iot2050-basic-common.dtsi +++ b/arch/arm/dts/k3-am6528-iot2050-basic-common.dtsi @@ -11,9 +11,6 @@ #include "k3-am65-iot2050-common.dtsi" -#include "k3-am65-iot2050-common-u-boot.dtsi" -#include "k3-am65-iot2050-boot-image.dtsi" - / { memory@80000000 { device_type = "memory"; diff --git a/arch/arm/dts/k3-am6528-iot2050-basic-pg2-u-boot.dtsi b/arch/arm/dts/k3-am6528-iot2050-basic-pg2-u-boot.dtsi new file mode 100644 index 00000000000..1e393042ac0 --- /dev/null +++ b/arch/arm/dts/k3-am6528-iot2050-basic-pg2-u-boot.dtsi @@ -0,0 +1,11 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) Siemens AG, 2023 + * + * Authors: + * Jan Kiszka <jan.kiszka(a)siemens.com> + */ + +#include "k3-am65-iot2050-common-u-boot.dtsi" +#include "k3-am65-iot2050-common-pg2-u-boot.dtsi" +#include "k3-am65-iot2050-boot-image.dtsi" diff --git a/arch/arm/dts/k3-am6528-iot2050-basic-u-boot.dtsi b/arch/arm/dts/k3-am6528-iot2050-basic-u-boot.dtsi new file mode 100644 index 00000000000..64afe25e38f --- /dev/null +++ b/arch/arm/dts/k3-am6528-iot2050-basic-u-boot.dtsi @@ -0,0 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) Siemens AG, 2023 + * + * Authors: + * Jan Kiszka <jan.kiszka(a)siemens.com> + */ + +#include "k3-am65-iot2050-common-u-boot.dtsi" +#include "k3-am65-iot2050-boot-image.dtsi" diff --git a/arch/arm/dts/k3-am6548-iot2050-advanced-common.dtsi b/arch/arm/dts/k3-am6548-iot2050-advanced-common.dtsi index 816a4cb4a68..d25e8b26187 100644 --- a/arch/arm/dts/k3-am6548-iot2050-advanced-common.dtsi +++ b/arch/arm/dts/k3-am6548-iot2050-advanced-common.dtsi @@ -13,9 +13,6 @@ #include "k3-am65-iot2050-common.dtsi" -#include "k3-am65-iot2050-common-u-boot.dtsi" -#include "k3-am65-iot2050-boot-image.dtsi" - / { memory@80000000 { device_type = "memory"; diff --git a/arch/arm/dts/k3-am6548-iot2050-advanced-m2-u-boot.dtsi b/arch/arm/dts/k3-am6548-iot2050-advanced-m2-u-boot.dtsi new file mode 120000 index 00000000000..859776d3ffe --- /dev/null +++ b/arch/arm/dts/k3-am6548-iot2050-advanced-m2-u-boot.dtsi @@ -0,0 +1 @@ +k3-am6528-iot2050-basic-pg2-u-boot.dtsi \ No newline at end of file diff --git a/arch/arm/dts/k3-am6548-iot2050-advanced-pg2-u-boot.dtsi b/arch/arm/dts/k3-am6548-iot2050-advanced-pg2-u-boot.dtsi new file mode 120000 index 00000000000..859776d3ffe --- /dev/null +++ b/arch/arm/dts/k3-am6548-iot2050-advanced-pg2-u-boot.dtsi @@ -0,0 +1 @@ +k3-am6528-iot2050-basic-pg2-u-boot.dtsi \ No newline at end of file diff --git a/arch/arm/dts/k3-am6548-iot2050-advanced-u-boot.dtsi b/arch/arm/dts/k3-am6548-iot2050-advanced-u-boot.dtsi new file mode 120000 index 00000000000..ac30e4ef46e --- /dev/null +++ b/arch/arm/dts/k3-am6548-iot2050-advanced-u-boot.dtsi @@ -0,0 +1 @@ +k3-am6528-iot2050-basic-u-boot.dtsi \ No newline at end of file -- 2.35.3

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[PATCH] environment: ti: Add get_fit_config command to get FIT config string
by Andrew Davis 05 May '23

05 May '23

When OE is packaging a dtb file into the FIT image it names the node based on the dtb filename. Node names can't have "/" so it is turned into "_". We select our FIT config using the "fdtfile" env var so we don't duplicate the board_name to fdt logic. Result is fdtfile needs mangled when used to select a config node from OE made FIT image. Do this here. Signed-off-by: Andrew Davis <afd(a)ti.com> --- include/configs/ti_armv7_common.h | 3 ++- include/environment/ti/ti_armv7_common.env | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h index d54c208ef66..149a74d98e8 100644 --- a/include/configs/ti_armv7_common.h +++ b/include/configs/ti_armv7_common.h @@ -55,7 +55,8 @@ "do;" \ "setenv overlaystring ${overlaystring}'#'${overlay};" \ "done;\0" \ - "run_fit=bootm ${addr_fit}#conf-${fdtfile}${overlaystring}\0" \ + "get_fit_config=setexpr name_fit_config gsub / _ conf-${fdtfile}\0" \ + "run_fit=run get_fit_config; bootm ${addr_fit}#${name_fit_config}${overlaystring}\0" \ /* * DDR information. If the CONFIG_NR_DRAM_BANKS is not defined, diff --git a/include/environment/ti/ti_armv7_common.env b/include/environment/ti/ti_armv7_common.env index 4d334648c05..0c0929d8628 100644 --- a/include/environment/ti/ti_armv7_common.env +++ b/include/environment/ti/ti_armv7_common.env @@ -20,5 +20,6 @@ get_overlaystring= do; setenv overlaystring ${overlaystring}'#'${overlay}; done; -run_fit=bootm ${addr_fit}#conf-${fdtfile}${overlaystring} +get_fit_config=setexpr name_fit_config gsub / _ conf-${fdtfile} +run_fit=run get_fit_config; bootm ${addr_fit}#${name_fit_config}${overlaystring} -- 2.39.2

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[PATCH 0/2] Update DDR configs to latest tested version
by Neha Malcom Francis 05 May '23

05 May '23

This series aims to update the DDR dtsi files that are generated by the Jacinto 7 DDRSS Configuration tool. It updates J721E and J7200 to generated files of two different versions of the same tool as these are the latest ones that have been thoroughly tested with U-Boot on each device internally. Thus it is best to update to that version for each instead of: A. sticking with the current old version or B. updating to the very latest version that hasn't been tested on U-Boot. Neha Malcom Francis (2): arm: dts: k3-j721e: ddr: Update to 0.9.1 version of DDR config tool arm: dts: k3-j7200: ddr: Update to 0.6 version of DDR config tool arch/arm/dts/k3-j7200-ddr-evm-lp4-2666.dtsi | 120 ++++++++-------- arch/arm/dts/k3-j721e-ddr-evm-lp4-4266.dtsi | 149 ++++++++++---------- 2 files changed, 135 insertions(+), 134 deletions(-) -- 2.34.1

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[PATCH] configs: am62x: enable secure device configs by default
by Praneeth Bajjuri 05 May '23

05 May '23

Enable the CONFIG_TI_SECURE_DEVICE by default Non-HS devices will continue to boot due to runtime device type detection. TI's security enforcing SoCs will authenticate each binary it loads by comparing it's signature with keys etched into the SoC during the boot up process. The am62x family of SoCs by default will have some level of security enforcement checking. To keep things as simple as possible, enable the CONFIG_TI_SECURE_DEVICE options by default so all levels of secure SoCs will work out of the box Signed-off-by: Praneeth Bajjuri <praneeth(a)ti.com> Signed-off-by: Kamlesh Gurudasani <kamlesh(a)ti.com> Signed-off-by: Bryan Brattlof <bb(a)ti.com> --- configs/am62x_evm_a53_defconfig | 1 + configs/am62x_evm_r5_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/configs/am62x_evm_a53_defconfig b/configs/am62x_evm_a53_defconfig index cc9c8eab3e..fc76d88727 100644 --- a/configs/am62x_evm_a53_defconfig +++ b/configs/am62x_evm_a53_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_K3=y +CONFIG_TI_SECURE_DEVICE=y CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y diff --git a/configs/am62x_evm_r5_defconfig b/configs/am62x_evm_r5_defconfig index 44a9130d99..cab8c820f9 100644 --- a/configs/am62x_evm_r5_defconfig +++ b/configs/am62x_evm_r5_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_K3=y +CONFIG_TI_SECURE_DEVICE=y CONFIG_SYS_MALLOC_LEN=0x08000000 CONFIG_SYS_MALLOC_F_LEN=0x9000 CONFIG_SPL_LIBCOMMON_SUPPORT=y -- 2.17.1

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[PATCH] k3: pmic: Clear ESM masks
by Neha Malcom Francis 05 May '23

05 May '23

ESM MCU masks must be set to 0h so that PMIC can handle errors that require attention for example SYS_SAFETY_ERRn. The required bits must be cleared: ESM_MCU_RST_MASK, ESM_MCU_FAIL_MASK, ESM_MCU_PIN_MASK. If PMIC expected to handle errors, make sure EVM is configured to connect SOC_SAFETY_ERRz (Main) to the PMIC. Note that even though the User Guide for TPS65941 for J721E mentions that these bits are reset to 0h; it is not reflected once board boots to kernel, possibly due to NVM configurations. Eithercase, it is best to account for this from R5 SPL side as well. Signed-off-by: Neha Malcom Francis <n-francis(a)ti.com> --- drivers/misc/esm_pmic.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/misc/esm_pmic.c b/drivers/misc/esm_pmic.c index a195dc5eb1d..b971f32f6a1 100644 --- a/drivers/misc/esm_pmic.c +++ b/drivers/misc/esm_pmic.c @@ -26,6 +26,9 @@ #define ESM_MCU_EN BIT(6) #define ESM_MCU_ENDRV BIT(5) +#define ESM_MCU_MASK_REG 0x59 +#define ESM_MCU_MASK 0x7 + /** * pmic_esm_probe: configures and enables PMIC ESM functionality * @@ -48,6 +51,12 @@ static int pmic_esm_probe(struct udevice *dev) return ret; } + ret = pmic_reg_write(dev->parent, ESM_MCU_MASK_REG, ESM_MCU_MASK); + if (ret) { + dev_err(dev, "clearing ESM masks failed: %d\n", ret); + return ret; + } + ret = pmic_reg_write(dev->parent, ESM_MCU_START_REG, ESM_MCU_START); if (ret) { dev_err(dev, "starting ESM failed: %d\n", ret); -- 2.34.1

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[PATCH v2 00/18] x86: Various fixes for chromebooks
by Simon Glass 05 May '23

05 May '23

This adds some fixes for x86-based Chromebook builds which have picked up a few problems recently. With this, chromebook_link/64, chromebook_samus and chromebook_coral work correctly. Changes in v2: - Add new patch to set up LPC only after relocation - Add new patch to tidy up address for loading U-Boot from SPL - Drop patch "x86: Add on to existing MTRRs in SPL" - Add various patches to resolve problems with chromebook_link64 Simon Glass (18): dm: Emit the arch_cpu_init_dm() even only before relocation binman: Support writing symbols for ucode etypes sf: Guard against zero erasesize sf: Rename spi-nor-tiny functions x86: ivybridge: Ensure LPC is available for GPIO base x86: samus: Drop EFI_LOADER x86: Support debug UART in 64-bit mode x86: Tidy up availability of string functions x86: mrc: Correct SPL debug message x86: spl: Show debugging for BSS x86: Set up LPC only after relocation x86: Tidy up address for loading U-Boot from SPL x86: Return mtrr_add_request() to its old purpose x86: spl: Avoid using init_cache_f_r() from SPL spl: Commit MTRRs only in board_init_f_r() x86: Simplify cpu_jump_to_64bit_uboot() x86: samus: Don't include audio and SATA in TPL x86: samus: Adjust TPL start and pre-reloc memory size arch/arm/mach-imx/imx8/cpu.c | 2 +- arch/arm/mach-imx/imx8m/soc.c | 2 +- arch/arm/mach-imx/imx8ulp/soc.c | 2 +- arch/arm/mach-imx/imx9/soc.c | 2 +- arch/arm/mach-omap2/am33xx/board.c | 2 +- arch/arm/mach-omap2/hwinit-common.c | 2 +- arch/mips/mach-pic32/cpu.c | 2 +- arch/nios2/cpu/cpu.c | 2 +- arch/riscv/cpu/cpu.c | 2 +- arch/x86/cpu/baytrail/cpu.c | 2 +- arch/x86/cpu/broadwell/Makefile | 4 +-- arch/x86/cpu/broadwell/cpu.c | 2 +- arch/x86/cpu/i386/cpu.c | 32 +++---------------- arch/x86/cpu/ivybridge/bd82x6x.c | 17 +++++----- arch/x86/cpu/ivybridge/cpu.c | 2 +- arch/x86/cpu/mtrr.c | 6 +++- arch/x86/cpu/quark/quark.c | 2 +- arch/x86/cpu/x86_64/cpu.c | 7 ++++ arch/x86/include/asm/string.h | 6 +++- arch/x86/lib/Makefile | 4 ++- arch/x86/lib/fsp2/fsp_init.c | 2 +- arch/x86/lib/mrccache.c | 2 +- arch/x86/lib/spl.c | 21 +++++------- configs/chromebook_samus_defconfig | 1 + configs/chromebook_samus_tpl_defconfig | 4 +-- doc/develop/event.rst | 6 ++-- drivers/core/root.c | 4 +-- drivers/cpu/microblaze_cpu.c | 2 +- drivers/mtd/spi/sf_probe.c | 3 +- drivers/mtd/spi/spi-nor-tiny.c | 16 +++++----- drivers/sysreset/sysreset_x86.c | 9 ++++-- include/event.h | 2 +- .../binman/etype/u_boot_spl_with_ucode_ptr.py | 2 +- .../binman/etype/u_boot_tpl_with_ucode_ptr.py | 2 +- tools/binman/etype/u_boot_with_ucode_ptr.py | 4 +-- 35 files changed, 90 insertions(+), 92 deletions(-) -- 2.40.0.634.g4ca3ef3211-goog

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[PATCH 1/4] cmd: bdinfo: Map fdt_blob and new_fdt to sysmem
by Marek Vasut 05 May '23

05 May '23

Map fdt_blob and new_fdt to sysmem, otherwise $fdtcontroladdr and bdinfo output do not match and the bdinfo output address is not a valid address accessible via sandbox memory accessors. Signed-off-by: Marek Vasut <marek.vasut+renesas(a)mailbox.org> --- Cc: Jason Liu <jason.hui.liu(a)nxp.com> Cc: Michal Simek <michal.simek(a)amd.com> Cc: Ovidiu Panait <ovpanait(a)gmail.com> Cc: Simon Glass <sjg(a)chromium.org> --- cmd/bdinfo.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c index f709904c516..78cb41f0760 100644 --- a/cmd/bdinfo.c +++ b/cmd/bdinfo.c @@ -11,6 +11,7 @@ #include <dm.h> #include <env.h> #include <lmb.h> +#include <mapmem.h> #include <net.h> #include <video.h> #include <vsprintf.h> @@ -128,8 +129,8 @@ int do_bdinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) print_eth(0); printf("IP addr = %s\n", env_get("ipaddr")); } - bdinfo_print_num_l("fdt_blob", (ulong)gd->fdt_blob); - bdinfo_print_num_l("new_fdt", (ulong)gd->new_fdt); + bdinfo_print_num_l("fdt_blob", (ulong)map_to_sysmem(gd->fdt_blob)); + bdinfo_print_num_l("new_fdt", (ulong)map_to_sysmem(gd->new_fdt)); bdinfo_print_num_l("fdt_size", (ulong)gd->fdt_size); if (IS_ENABLED(CONFIG_VIDEO)) show_video_info(); -- 2.39.2

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[PATCH 00/10] Add AM62x LP SK support
by Nitin Yadav 04 May '23

04 May '23

This series adds support of AM62x LP SK. The AM62x LP SK board is similar to AM62x SK but has some significant changes that requires different set of device tree at each stage of bootloader. First 5 patches add support and sync device tree with linus master. Next 3 patches perform board detection and select correct dtb based on board ID. The last 2 patches enable config to support for building multiple dtb. Nitin Yadav (10): arm: dts: Makefile: Add AM62x LP SK device tree arm: dts: Add support for AM62x LP SK arm: dts: Sync DT to add support of AM62x LP SK arm: dts: Add support for AM62x LP SK at R5 SPL stage arm: dts: k3-am625-generic: Add generic DT for pre R5 SPL board: ti: am62x: am62x_env: Update env to select correct dtb arm: mach-k3: am625_init: Update board specific API name to K3 generic API's board: ti: am62x: Add support for detecting multiple device trees configs: am62x_lpsk_a53_defconfig: Enable support for building multiple dtbs into FIT configs: am62x_evm_r5_defconfig: Enable support for building multiple dtbs at R5 SPL arch/arm/dts/Makefile | 7 +- arch/arm/dts/k3-am62-lp-sk-u-boot.dtsi | 7 + arch/arm/dts/k3-am62-lp-sk.dts | 232 ++ arch/arm/dts/k3-am62-main.dtsi | 368 ++- arch/arm/dts/k3-am62-r5-lp-sk.dts | 12 + arch/arm/dts/k3-am625-generic.dts | 70 + arch/arm/dts/k3-am625-sk-u-boot.dtsi | 8 + arch/arm/dts/k3-am625-sk.dts | 5 +- arch/arm/dts/k3-am62x-ddr-lp4-50-800-800.dtsi | 2190 +++++++++++++++++ arch/arm/dts/k3-am62x-r5-sk-common.dtsi | 86 + arch/arm/dts/k3-am62x-sk-common-u-boot.dtsi | 194 ++ arch/arm/dts/k3-am62x-sk-common.dtsi | 430 ++++ arch/arm/mach-k3/am625_init.c | 34 +- arch/arm/mach-k3/include/mach/sys_proto.h | 1 + board/ti/am62x/am62x.env | 4 + board/ti/am62x/evm.c | 159 ++ configs/am62x_evm_a53_defconfig | 10 + configs/am62x_evm_r5_defconfig | 8 +- 18 files changed, 3783 insertions(+), 42 deletions(-) create mode 100644 arch/arm/dts/k3-am62-lp-sk-u-boot.dtsi create mode 100644 arch/arm/dts/k3-am62-lp-sk.dts create mode 100644 arch/arm/dts/k3-am62-r5-lp-sk.dts create mode 100644 arch/arm/dts/k3-am625-generic.dts create mode 100644 arch/arm/dts/k3-am62x-ddr-lp4-50-800-800.dtsi create mode 100644 arch/arm/dts/k3-am62x-r5-sk-common.dtsi create mode 100644 arch/arm/dts/k3-am62x-sk-common-u-boot.dtsi create mode 100644 arch/arm/dts/k3-am62x-sk-common.dtsi -- 2.25.1

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[PATCH 1/1] tools: fix TestFdtUtil()
by Heinrich Schuchardt 04 May '23

04 May '23

Variable old_outdir cannot be used before assignment. The assignment must occur before the try block. tools/dtoc/test_fdt.py:796:26: E0601: Using variable 'old_outdir' before assignment (used-before-assignment) Add missing space in assignment. Fixes: a004f29464d1 ("binman: Tidy up _SetupDtb() to use its own temporary file") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt(a)canonical.com> --- tools/dtoc/test_fdt.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tools/dtoc/test_fdt.py b/tools/dtoc/test_fdt.py index 32fa69cbb0..4fe8d12c40 100755 --- a/tools/dtoc/test_fdt.py +++ b/tools/dtoc/test_fdt.py @@ -784,8 +784,8 @@ class TestFdtUtil(unittest.TestCase): def test_ensure_compiled_tmpdir(self): """Test providing a temporary directory""" + old_outdir = tools.outdir try: - old_outdir = tools.outdir tools.outdir= None tmpdir = tempfile.mkdtemp(prefix='test_fdt.') dtb = fdt_util.EnsureCompiled(find_dtb_file('dtoc_test_simple.dts'), @@ -793,7 +793,7 @@ class TestFdtUtil(unittest.TestCase): self.assertEqual(tmpdir, os.path.dirname(dtb)) shutil.rmtree(tmpdir) finally: - tools.outdir= old_outdir + tools.outdir = old_outdir def test_get_phandle_name_offset(self): val = fdt_util.GetPhandleNameOffset(self.node, 'missing') -- 2.39.2

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[PATCH u-boot 0/3] pci: Do not access Freescale PCI controllers BARs registers
by Pali Rohár 04 May '23

04 May '23

Freescale PCI and PCIe controllers export in config space in BARs offset for BDF address 00:00.0 internal controller registers, instead of BAR registers. Avoid access to these registers to prevent overwriting them. Fixes autoconfiguration of PCI and PCIe devices on Freescale PowerPC platforms. Pali Rohár (3): pci: mpc85xx: Do not access PCI BARs registers of BDF address 00:00.0 pci: fsl: Do not access PCI BAR0 register of PCIe Root Port pci: auto: Remove PCI_CLASS_PROCESSOR_POWERPC autoconfig case drivers/pci/pci_auto.c | 4 ---- drivers/pci/pci_mpc85xx.c | 12 ++++++++++++ drivers/pci/pcie_fsl.c | 14 ++++++++++++++ 3 files changed, 26 insertions(+), 4 deletions(-) -- 2.20.1

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