March 2023 - U-Boot

[PATCH] stm32mp: fix various array bounds checks
by Rasmus Villemoes 19 Apr '23

19 Apr '23

In all these cases, the index on the LHS is immediately afterwards used to access the array appearing in the ARRAY_SIZE() on the RHS - so if that index is equal to the array size, we'll access one-past-the-end of the array. Signed-off-by: Rasmus Villemoes <rasmus.villemoes(a)prevas.dk> --- Patch generated with '-U5' to make that access obvious from the diff context. arch/arm/mach-stm32mp/cpu.c | 4 ++-- board/st/stm32mp1/stm32mp1.c | 2 +- drivers/ram/stm32mp1/stm32mp1_interactive.c | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c index dc4112d5e6..e2f67fc423 100644 --- a/arch/arm/mach-stm32mp/cpu.c +++ b/arch/arm/mach-stm32mp/cpu.c @@ -188,11 +188,11 @@ static void setup_boot_mode(void) log_debug("%s: boot_ctx=0x%x => boot_mode=%x, instance=%d forced=%x\n", __func__, boot_ctx, boot_mode, instance, forced_mode); switch (boot_mode & TAMP_BOOT_DEVICE_MASK) { case BOOT_SERIAL_UART: - if (instance > ARRAY_SIZE(serial_addr)) + if (instance >= ARRAY_SIZE(serial_addr)) break; /* serial : search associated node in devicetree */ sprintf(cmd, "serial@%x", serial_addr[instance]); if (uclass_get_device_by_name(UCLASS_SERIAL, cmd, &dev)) { /* restore console on error */ @@ -218,11 +218,11 @@ static void setup_boot_mode(void) env_set("boot_device", "usb"); env_set("boot_instance", "0"); break; case BOOT_FLASH_SD: case BOOT_FLASH_EMMC: - if (instance > ARRAY_SIZE(sdmmc_addr)) + if (instance >= ARRAY_SIZE(sdmmc_addr)) break; /* search associated sdmmc node in devicetree */ sprintf(cmd, "mmc@%x", sdmmc_addr[instance]); if (uclass_get_device_by_name(UCLASS_MMC, cmd, &dev)) { printf("mmc%d = %s not found in device tree!\n", diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c index ca8f0255ae..1a1b1844c8 100644 --- a/board/st/stm32mp1/stm32mp1.c +++ b/board/st/stm32mp1/stm32mp1.c @@ -870,11 +870,11 @@ int mmc_get_boot(void) STM32_SDMMC1_BASE, STM32_SDMMC2_BASE, STM32_SDMMC3_BASE }; - if (instance > ARRAY_SIZE(sdmmc_addr)) + if (instance >= ARRAY_SIZE(sdmmc_addr)) return 0; /* search associated sdmmc node in devicetree */ snprintf(cmd, sizeof(cmd), "mmc@%x", sdmmc_addr[instance]); if (uclass_get_device_by_name(UCLASS_MMC, cmd, &dev)) { diff --git a/drivers/ram/stm32mp1/stm32mp1_interactive.c b/drivers/ram/stm32mp1/stm32mp1_interactive.c index f0fe7e61e3..2c19847c66 100644 --- a/drivers/ram/stm32mp1/stm32mp1_interactive.c +++ b/drivers/ram/stm32mp1/stm32mp1_interactive.c @@ -389,11 +389,11 @@ bool stm32mp1_ddr_interactive(void *priv, log_debug("** step %d ** %s / %d\n", step, step_str[step], next_step); if (next_step < 0) return false; - if (step < 0 || step > ARRAY_SIZE(step_str)) { + if (step < 0 || step >= ARRAY_SIZE(step_str)) { printf("** step %d ** INVALID\n", step); return false; } printf("%d:%s\n", step, step_str[step]); -- 2.37.2

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[PATCH] mtd: rawnand: stm32_fmc2: remove unsupported EDO mode
by Christophe Kerello 19 Apr '23

19 Apr '23

Remove the EDO mode support from as the FMC2 controller does not support the feature. Signed-off-by: Christophe Kerello <christophe.kerello(a)foss.st.com> --- drivers/mtd/nand/raw/stm32_fmc2_nand.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/mtd/nand/raw/stm32_fmc2_nand.c b/drivers/mtd/nand/raw/stm32_fmc2_nand.c index fb3279b405e..69dbb629e93 100644 --- a/drivers/mtd/nand/raw/stm32_fmc2_nand.c +++ b/drivers/mtd/nand/raw/stm32_fmc2_nand.c @@ -735,6 +735,9 @@ static int stm32_fmc2_nfc_setup_interface(struct mtd_info *mtd, int chipnr, if (IS_ERR(sdrt)) return PTR_ERR(sdrt); + if (sdrt->tRC_min < 30000) + return -EOPNOTSUPP; + if (chipnr == NAND_DATA_IFACE_CHECK_ONLY) return 0; -- 2.25.1

2 2

[PATCH] ARM: dts: stm32: add FMC support on STM32MP13x SoC family
by Christophe Kerello 19 Apr '23

19 Apr '23

Add FMC support on STM32MP13x SoC family. Signed-off-by: Christophe Kerello <christophe.kerello(a)foss.st.com> --- arch/arm/dts/stm32mp131.dtsi | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/arch/arm/dts/stm32mp131.dtsi b/arch/arm/dts/stm32mp131.dtsi index 3cf51f09bcb..cf1171bc9bb 100644 --- a/arch/arm/dts/stm32mp131.dtsi +++ b/arch/arm/dts/stm32mp131.dtsi @@ -191,6 +191,39 @@ dma-requests = <48>; }; + fmc: memory-controller@58002000 { + compatible = "st,stm32mp1-fmc2-ebi"; + reg = <0x58002000 0x1000>; + ranges = <0 0 0x60000000 0x04000000>, /* EBI CS 1 */ + <1 0 0x64000000 0x04000000>, /* EBI CS 2 */ + <2 0 0x68000000 0x04000000>, /* EBI CS 3 */ + <3 0 0x6c000000 0x04000000>, /* EBI CS 4 */ + <4 0 0x80000000 0x10000000>; /* NAND */ + #address-cells = <2>; + #size-cells = <1>; + clocks = <&rcc FMC_K>; + resets = <&rcc FMC_R>; + status = "disabled"; + + nand-controller@4,0 { + compatible = "st,stm32mp1-fmc2-nfc"; + reg = <4 0x00000000 0x1000>, + <4 0x08010000 0x1000>, + <4 0x08020000 0x1000>, + <4 0x01000000 0x1000>, + <4 0x09010000 0x1000>, + <4 0x09020000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&mdma 24 0x2 0x12000a02 0x0 0x0>, + <&mdma 24 0x2 0x12000a08 0x0 0x0>, + <&mdma 25 0x2 0x12000a0a 0x0 0x0>; + dma-names = "tx", "rx", "ecc"; + status = "disabled"; + }; + }; + sdmmc1: mmc@58005000 { compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell"; arm,primecell-periphid = <0x20253180>; -- 2.25.1

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[PATCH] pinctrl: pinctrl_stm32: Add slew rate support for stm32_pinctrl_get_pin_muxing()
by Patrice Chotard 19 Apr '23

19 Apr '23

For debug purpose, it should be useful to indicate the slew rate for each pins. Add ospeed register information for pins which are configured in either alternate function or gpio output. Signed-off-by: Patrice Chotard <patrice.chotard(a)foss.st.com> --- drivers/pinctrl/pinctrl_stm32.c | 19 +++++++++++++++---- 1 file changed, 15 insertions(+), 4 deletions(-) diff --git a/drivers/pinctrl/pinctrl_stm32.c b/drivers/pinctrl/pinctrl_stm32.c index b755fa42b4f..b06da50b2cd 100644 --- a/drivers/pinctrl/pinctrl_stm32.c +++ b/drivers/pinctrl/pinctrl_stm32.c @@ -61,6 +61,13 @@ static const char * const pinmux_otype[] = { [STM32_GPIO_OTYPE_OD] = "open-drain", }; +static const char * const pinmux_speed[] = { + [STM32_GPIO_SPEED_2M] = "Low speed", + [STM32_GPIO_SPEED_25M] = "Medium speed", + [STM32_GPIO_SPEED_50M] = "High speed", + [STM32_GPIO_SPEED_100M] = "Very-high speed", +}; + static int stm32_pinctrl_get_af(struct udevice *dev, unsigned int offset) { struct stm32_gpio_priv *priv = dev_get_priv(dev); @@ -201,6 +208,7 @@ static int stm32_pinctrl_get_pin_muxing(struct udevice *dev, int af_num; unsigned int gpio_idx; u32 pupd, otype; + u8 speed; /* look up for the bank which owns the requested pin */ gpio_dev = stm32_pinctrl_get_gpio_dev(dev, selector, &gpio_idx); @@ -214,6 +222,7 @@ static int stm32_pinctrl_get_pin_muxing(struct udevice *dev, priv = dev_get_priv(gpio_dev); pupd = (readl(&priv->regs->pupdr) >> (gpio_idx * 2)) & PUPD_MASK; otype = (readl(&priv->regs->otyper) >> gpio_idx) & OTYPE_MSK; + speed = (readl(&priv->regs->ospeedr) >> gpio_idx * 2) & OSPEED_MASK; switch (mode) { case GPIOF_UNKNOWN: @@ -222,13 +231,15 @@ static int stm32_pinctrl_get_pin_muxing(struct udevice *dev, break; case GPIOF_FUNC: af_num = stm32_pinctrl_get_af(gpio_dev, gpio_idx); - snprintf(buf, size, "%s %d %s %s", pinmux_mode[mode], af_num, - pinmux_otype[otype], pinmux_bias[pupd]); + snprintf(buf, size, "%s %d %s %s %s", pinmux_mode[mode], af_num, + pinmux_otype[otype], pinmux_bias[pupd], + pinmux_speed[speed]); break; case GPIOF_OUTPUT: - snprintf(buf, size, "%s %s %s %s", + snprintf(buf, size, "%s %s %s %s %s", pinmux_mode[mode], pinmux_otype[otype], - pinmux_bias[pupd], label ? label : ""); + pinmux_bias[pupd], label ? label : "", + pinmux_speed[speed]); break; case GPIOF_INPUT: snprintf(buf, size, "%s %s %s", pinmux_mode[mode], -- 2.25.1

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[PATCH 1/2] configs: stm32mp15: Add usb_pgood_delay for ST boards
by Patrice Chotard 19 Apr '23

19 Apr '23

Add usb_pgood_delay to ensure a correct detection of USB devices. Signed-off-by: Patrice Chotard <patrice.chotard(a)foss.st.com> --- include/configs/stm32mp15_st_common.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/stm32mp15_st_common.h b/include/configs/stm32mp15_st_common.h index d0cd4130cec..866cd7a719f 100644 --- a/include/configs/stm32mp15_st_common.h +++ b/include/configs/stm32mp15_st_common.h @@ -9,6 +9,7 @@ #define __CONFIG_STM32MP15_ST_COMMON_H__ #define STM32MP_BOARD_EXTRA_ENV \ + "usb_pgood_delay=2000\0" \ "console=ttySTM0\0" #include <configs/stm32mp15_common.h> -- 2.25.1

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[PATCH] spl: fit: Report fdt error for loading u-boot
by Su, Bao Cheng 19 Apr '23

19 Apr '23

Commit 71551055cbdb ("spl: fit: Load devicetree when a Linux payload is found") made a change to not report the spl_fit_append_fdt error at all if next-stage image is u-boot. However for u-boot image without CONFIG_OF_EMBED, the error should be reported to uplevel caller. Otherwise, uplevel caller would think the fdt is already loaded which is obviously not true. Signed-off-by: Baocheng Su <baocheng.su(a)siemens.com> --- common/spl/spl_fit.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c index a35be52965..00404935cb 100644 --- a/common/spl/spl_fit.c +++ b/common/spl/spl_fit.c @@ -770,8 +770,12 @@ int spl_load_simple_fit(struct spl_image_info *spl_image, */ if (os_takes_devicetree(spl_image->os)) { ret = spl_fit_append_fdt(spl_image, info, sector, &ctx); - if (ret < 0 && spl_image->os != IH_OS_U_BOOT) - return ret; + if (ret < 0) { + if (spl_image->os != IH_OS_U_BOOT) + return ret; + else if (!IS_ENABLED(CONFIG_OF_EMBED)) + return ret; + } } firmware_node = node; -- 2.30.2

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using binman sym for size of u-boot itb
by Rasmus Villemoes 19 Apr '23

19 Apr '23

On imx8mp, binman is heavily used for the assembling of all the various pieces. Partly for my own future reference: There's u-boot-spl-ddr which is u-boot-spl.bin with the DDR firmware blobs tacked on at the end, and the sizes and positions of those blobs then updated via the binman syms mechanism. This file, u-boot-spl-ddr.bin, is then passed through mkimage to compute and generate the imx-specific header, resulting in the final spl.bin. Parallel to that, U-Boot proper and its .dtb along with ATF/bl31.bin is wrapped in an itb image. And finally, spl.bin and u-boot.itb are concatenated, with u-boot.itb landing on a known offset, to produce the final "flash.bin", which can then be written to eMMC (user or boot partition) or even booted over usb with uuu. So far so good. Currently, the spl_imx_romapi.c contains a somewhat delicate tiptoeing-around algorithm for determining the size of the itb, in the case where we're booting over USB. (1) read from the stream 1K at a time looking for the 0xd00dfeed marker. (2) if that was found too close to the end of the 1K block we just fetched so we don't have a full struct fdt_header, we fetch another 1K. (3) So now we have a struct fdt_header and can thus read the .totalsize member, so now we can go on and read from the stream until we've read that much in total. (4) But that just gives us the size of the DTB structure; the itb is built with "external data", so now we abuse spl_load_simple_fit() and call it twice, the first time with some extra private data that make the .read callback stash the maximum offset it ever saw while most likely also copying garbage (never initialized RAM) to whatever the loadaddr= properties specify, then use that info to actually read that much data from the usb stream so we now do have a full, including all the external data, FIT image at CONFIG_SPL_IMX_ROMAPI_LOADADDR, and then do spl_load_simple_fit() again. Now I have two ideas: First, all of this complexity could go away if we could just do binman_sym_declare(ulong, itb, size); in spl_imx_romapi.c. But that fails with binman: Section '/binman/u-boot-spl-ddr': Symbol '_binman_itb_prop_size' in entry '/binman/u-boot-spl-ddr/u-boot-spl/u-boot-spl-nodtb': Entry 'itb' not found in list (u-boot-spl-nodtb,u-boot-spl-dtb,u-boot-spl,ddr-1d-imem-fw,ddr-1d-dmem-fw,ddr-2d-imem-fw,ddr-2d-dmem-fw,main-section) So I know that tools/binman/binman.rst says that binman currently doesn't support images that depend on each other, but as can be seen above, imx8mp actually defines several images that do depend on each other: u-boot-spl-ddr.bin <- spl.bin <---\ flash.bin u-boot.itb <----------/ Perhaps this just works by chance, because binman happens to build the images in the order defined in the binman node. I want to add a new dependency u-boot-spl-ddr.bin <- spl.bin <---\ v flash.bin u-boot.itb <---------------------/ and I don't mind if one has to manually do a topological sort of subnodes of the binman node [so this would mean moving the itb node to the top]. Or we could introduce an image-deps = <&itb>; property and let binman do the topological sorting for us. Regardless, obviously some work on the python side would be needed; perhaps (and I'm really not familiar with the binman code) Entry_section should grow an ".external_entries" member that could be populated from such an image-deps property, and then LookupSymbol() would need to be taught to also look through .external_entries - only allowing prop_name==size for such. And now to the second idea: If we could to this, then we could definitely also do typedef struct { uchar x[32]; } sha256_digest; binman_sym_declare(sha256_digest, itb, sha256); and teach LookupSymbol also to handle size==32 and prop_name=='sha256' (I guess the pack format would be 32B). And then SPL could verify the whole ITB payload with just a single sha256 call, and one wouldn't have to deal with all the complexity of FIT image verification in SPL and code size constraints and whatnot. This hash would be baked into u-boot-spl-ddr.bin before mkimage is invoked to produce the imx header and possibly HAB signature etc., so we do have chain of trust preserved. Thoughts? Any pointers on how I could start doing that external_entries thing? Rasmus

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[PATCH v4 0/9] Add video damage tracking
by Alexander Graf 19 Apr '23

19 Apr '23

This patch set speeds up graphics output on ARM by a factor of 60x. On most ARM SBCs, we keep the frame buffer in DRAM and map it as cached, but need it accessible by the display controller which reads directly from a later point of consistency. Hence, we flush the frame buffer to DRAM on every change. The full frame buffer. Unfortunately, with the advent of 4k displays, we are seeing frame buffers that can take a while to flush out. This was reported by Da Xue with grub, which happily print 1000s of spaces on the screen to draw a menu. Every printed space triggers a cache flush. This patch set implements the easiest mitigation against this problem: Damage tracking. We remember the lowest common denominator region that was touched since the last video_sync() call and only flush that. The most typical writer to the frame buffer is the video console, which always writes rectangles of characters on the screen and syncs afterwards. With this patch set applied, we reduce drawing a large grub menu (with serial console attached for size information) on an RK3399-ROC system at 1440p from 55 seconds to less than 1 second. Version 2 also implements VIDEO_COPY using this mechanism, reducing its overhead compared to before as well. So even x86 systems should be faster with this now :). Alternatives considered: 1) Lazy sync - Sandbox does this. It only calls video_sync(true) ever so often. We are missing timers to do this generically. 2) Double buffering - We could try to identify whether anything changed at all and only draw to the FB if it did. That would require maintaining a second buffer that we need to scan. 3) Text buffer - Maintain a buffer of all text printed on the screen with respective location. Don't write if the old and new character are identical. This would limit applicability to text only and is an optimization on top of this patch set. 4) Hash screen lines - Create a hash (sha256?) over every line when it changes. Only flush when it does. I'm not sure if this would waste more time, memory and cache than the current approach. It would make full screen updates much more expensive. v1 -> v2: - new patch: video: Use VIDEO_DAMAGE for VIDEO_COPY - Remove ifdefs - Fix dcache range; we were flushing too much before - Fix ranges in truetype target - Limit rotate to necessary damange v2 -> v3: - Rebase - Adapt to DM_VIDEO always - Make CONFIG_COPY always select VIDEO_DAMAGE v3 -> v4: - New patch: video: Always compile cache flushing code - New patch: video: Enable VIDEO_DAMAGE for drivers that need it - Simplify first damage logic - Skip damage on EfiBltVideoToBltBuffer - Move damage clear from patch 6 to patch 1 - Remove VIDEO_DAMAGE default for ARM Alexander Graf (9): dm: video: Add damage tracking API dm: video: Add damage notification on display clear vidconsole: Add damage notifications to all vidconsole drivers video: Add damage notification on bmp display efi_loader: GOP: Add damage notification on BLT video: Only dcache flush damaged lines video: Use VIDEO_DAMAGE for VIDEO_COPY video: Always compile cache flushing code video: Enable VIDEO_DAMAGE for drivers that need it arch/arm/mach-omap2/omap3/Kconfig | 1 + arch/arm/mach-sunxi/Kconfig | 1 + drivers/video/Kconfig | 27 +++++ drivers/video/console_normal.c | 22 ++-- drivers/video/console_rotate.c | 87 +++++++++----- drivers/video/console_truetype.c | 30 ++--- drivers/video/exynos/Kconfig | 1 + drivers/video/imx/Kconfig | 1 + drivers/video/meson/Kconfig | 1 + drivers/video/rockchip/Kconfig | 1 + drivers/video/stm32/Kconfig | 1 + drivers/video/vidconsole-uclass.c | 16 --- drivers/video/video-uclass.c | 187 +++++++++++++++++------------- drivers/video/video_bmp.c | 7 +- include/video.h | 54 ++++----- include/video_console.h | 49 -------- lib/efi_loader/efi_gop.c | 6 + 17 files changed, 251 insertions(+), 241 deletions(-) -- 2.37.1 (Apple Git-137.1)

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[PATCH v4 00/10] Renesas RZ/N1 SoC initial support
by Ralph Siemsen 18 Apr '23

18 Apr '23

The RZ/N1 is a family of SoC devices from Renesas [1], featuring ARM Cortex-A7 and/or Cortex-M3 CPU, industrial ethernet protocols, integrated Ethernet switch, and numerous peripherals. This is a first step in upstreaming support for the RZ/N1 family. Currently it contains just enough to boot to the u-boot prompt. Additional patches will follow to support flash, SD, USB, Ethernet, etc. This work is based on a vendor-supplied u-boot 2017.01 tree [2], which supports several eval boards, none of which I have access to. Instead development has been done on a Schneider RZN1 board, which is fairly similar to the Renesas RZ/N1D-DB Demo board. [1] https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz-… [2] https://github.com/renesas-rz/rzn1_u-boot/tree/rzn1-stable Changes in v4: - rebase to u-boot v2023.04-rc3 - remove RFC prefix - cc entire series to Marek by request - clock tables synced with linux (pending patches) - documentation and comment improvements Changes in v3: - many tweaks to clock driver based on reviewer feedback - rebased to u-boot v2023.04-rc2 - reviewer suggestions added to spkgimage.c - many small cleanups, checkpatch, FIXMEs resolved Changes in v2: - rewrote the stand-alone spkg_utility to integrate into mkimage Ralph Siemsen (10): ARM: armv7: add non-SPL enable for Cortex SMPEN clk: renesas: prepare for non-RCAR clock drivers clk: renesas: add R906G032 driver pinctrl: renesas: add R906G032 driver ram: cadence: add driver for Cadence EDAC dts: basic devicetree for Renesas RZ/N1 SoC ARM: rzn1: basic support for Renesas RZ/N1 SoC board: schneider: add RZN1 board support tools: spkgimage: add Renesas SPKG format doc: renesas: add Renesas board docs arch/arm/Kconfig | 17 + arch/arm/Makefile | 1 + arch/arm/cpu/armv7/Kconfig | 5 + arch/arm/dts/r9a06g032-rzn1-snarc-u-boot.dtsi | 23 + arch/arm/dts/r9a06g032-rzn1-snarc.dts | 51 + arch/arm/dts/r9a06g032.dtsi | 226 ++++ arch/arm/mach-rzn1/Kconfig | 32 + arch/arm/mach-rzn1/Makefile | 3 + arch/arm/mach-rzn1/cpu_info.c | 19 + board/schneider/rzn1-snarc/Kconfig | 18 + board/schneider/rzn1-snarc/Makefile | 3 + board/schneider/rzn1-snarc/ddr_timing.c | 140 +++ .../jedec_ddr3_2g_x16_1333h_500_cl8.h | 399 ++++++ board/schneider/rzn1-snarc/rzn1.c | 39 + board/schneider/rzn1-snarc/spkgimage.cfg | 26 + boot/image.c | 1 + configs/rzn1_snarc_defconfig | 21 + doc/board/renesas/index.rst | 9 + doc/board/renesas/renesas.rst | 115 ++ doc/mkimage.1 | 45 + drivers/clk/renesas/Kconfig | 8 +- drivers/clk/renesas/Makefile | 6 +- drivers/clk/renesas/r9a06g032-clocks.c | 1096 +++++++++++++++++ drivers/pinctrl/Makefile | 1 + drivers/pinctrl/renesas/Kconfig | 7 + drivers/pinctrl/renesas/Makefile | 1 + drivers/pinctrl/renesas/pinctrl-rzn1.c | 379 ++++++ drivers/ram/Kconfig | 1 + drivers/ram/Makefile | 2 + drivers/ram/cadence/Kconfig | 12 + drivers/ram/cadence/Makefile | 1 + drivers/ram/cadence/ddr_async.c | 311 +++++ drivers/ram/cadence/ddr_ctrl.c | 414 +++++++ drivers/ram/cadence/ddr_ctrl.h | 175 +++ include/configs/rzn1-snarc.h | 17 + include/dt-bindings/clock/r9a06g032-sysctrl.h | 148 +++ include/dt-bindings/pinctrl/rzn1-pinctrl.h | 141 +++ include/image.h | 1 + tools/Makefile | 1 + tools/spkgimage.c | 330 +++++ tools/spkgimage.h | 87 ++ 41 files changed, 4328 insertions(+), 4 deletions(-) create mode 100644 arch/arm/dts/r9a06g032-rzn1-snarc-u-boot.dtsi create mode 100644 arch/arm/dts/r9a06g032-rzn1-snarc.dts create mode 100644 arch/arm/dts/r9a06g032.dtsi create mode 100644 arch/arm/mach-rzn1/Kconfig create mode 100644 arch/arm/mach-rzn1/Makefile create mode 100644 arch/arm/mach-rzn1/cpu_info.c create mode 100644 board/schneider/rzn1-snarc/Kconfig create mode 100644 board/schneider/rzn1-snarc/Makefile create mode 100644 board/schneider/rzn1-snarc/ddr_timing.c create mode 100644 board/schneider/rzn1-snarc/jedec_ddr3_2g_x16_1333h_500_cl8.h create mode 100644 board/schneider/rzn1-snarc/rzn1.c create mode 100644 board/schneider/rzn1-snarc/spkgimage.cfg create mode 100644 configs/rzn1_snarc_defconfig create mode 100644 doc/board/renesas/index.rst create mode 100644 doc/board/renesas/renesas.rst create mode 100644 drivers/clk/renesas/r9a06g032-clocks.c create mode 100644 drivers/pinctrl/renesas/pinctrl-rzn1.c create mode 100644 drivers/ram/cadence/Kconfig create mode 100644 drivers/ram/cadence/Makefile create mode 100644 drivers/ram/cadence/ddr_async.c create mode 100644 drivers/ram/cadence/ddr_ctrl.c create mode 100644 drivers/ram/cadence/ddr_ctrl.h create mode 100644 include/configs/rzn1-snarc.h create mode 100644 include/dt-bindings/clock/r9a06g032-sysctrl.h create mode 100644 include/dt-bindings/pinctrl/rzn1-pinctrl.h create mode 100644 tools/spkgimage.c create mode 100644 tools/spkgimage.h -- 2.25.1

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[PATCH] mtd: nand: Allow full NAND framework in SPL
by Jit Loon Lim 17 Apr '23

17 Apr '23

From: Tien Fong Chee <tien.fong.chee(a)intel.com> Add configuration option to compile the entire NAND framework into U-Boot SPL. This is required by some drivers, like the Denali NAND, which use a lot of functionality from the NAND core. Signed-off-by: Marek Vasut <marex(a)denx.de> Signed-off-by: Tien Fong Chee <tien.fong.chee(a)intel.com> Signed-off-by: Jit Loon Lim <jit.loon.lim(a)intel.com> --- drivers/mtd/nand/raw/Kconfig | 7 +++++++ drivers/mtd/nand/raw/Makefile | 16 +++++++++------- 2 files changed, 16 insertions(+), 7 deletions(-) diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig index ce67d1abde..a3bd45f24e 100644 --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig @@ -694,4 +694,11 @@ config SPL_NAND_SIMPLE expose the cmd_ctrl() interface. endif +config SPL_NAND_FRAMEWORK + bool "Compile the entire NAND framework into the SPL" + help + Some drivers require a lot of functionality from the NAND framework + core when used in SPL. This option allows compiling the full NAND + framework into the SPL instead of it's reduced version. + endif # if NAND diff --git a/drivers/mtd/nand/raw/Makefile b/drivers/mtd/nand/raw/Makefile index a398aa9d88..e0f7045fec 100644 --- a/drivers/mtd/nand/raw/Makefile +++ b/drivers/mtd/nand/raw/Makefile @@ -3,8 +3,16 @@ # (C) Copyright 2006 # Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +nand-framework-objs := nand.o nand_bbt.o nand_ids.o nand_util.o \ + nand_ecc.o nand_base.o nand_timings.o + ifdef CONFIG_SPL_BUILD +ifdef CONFIG_SPL_NAND_FRAMEWORK +obj-y += $(nand-framework-objs) +NORMAL_DRIVERS=y +endif + ifdef CONFIG_SPL_NAND_DRIVERS NORMAL_DRIVERS=y endif @@ -27,19 +35,13 @@ else # not spl NORMAL_DRIVERS=y -obj-y += nand.o -obj-y += nand_bbt.o -obj-y += nand_ids.o -obj-y += nand_util.o -obj-y += nand_ecc.o -obj-y += nand_base.o obj-y += nand_amd.o obj-y += nand_hynix.o obj-y += nand_macronix.o obj-y += nand_micron.o obj-y += nand_samsung.o obj-y += nand_toshiba.o -obj-y += nand_timings.o +obj-y += $(nand-framework-objs) endif # not spl -- 2.26.2

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