October 2023 - U-Boot

[PATCH] drivers: mtd: Add MT25QU128AB params
by seanedmond＠linux.microsoft.com 14 Dec '23

14 Dec '23

From: Godfrey Mwangi <godmwan(a)microsoft.com> Add Micron MT25QU128AB flash. Signed-off-by: Godfrey Mwangi <godmwan(a)microsoft.com> --- drivers/mtd/spi/spi-nor-ids.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index 4587215984..a99bb6125b 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -299,6 +299,7 @@ const struct flash_info spi_nor_ids[] = { { INFO("n25q256a", 0x20ba19, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_FSR) }, { INFO6("mt25qu256a", 0x20bb19, 0x104400, 64 * 1024, 512, SECT_4K | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES | USE_FSR) }, { INFO("n25q256ax1", 0x20bb19, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_QUAD_READ | USE_FSR) }, + { INFO("mt25qu128ab", 0x20bb18, 0, 64 * 1024, 256, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) }, { INFO6("mt25qu512a", 0x20bb20, 0x104400, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES | USE_FSR) }, -- 2.40.0

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[PATCH v2] spi: cadence_qspi: Select flash subnode at runtime
by Udit Kumar 14 Dec '23

14 Dec '23

Currently spi driver gets flash parameter from first subnode. Few boards have more than one flash with different parameters and selection of flash is done by on board switch settings. In such case, uboot needs to be recompiled with updated device tree to align with board switch settings. This patch allows to select flash node at runtime. Boards those are supporting multiple flashes needs to implement cadence_qspi_get_subnode function and return correct flash node. Cc: Apurva Nandan <a-nandan(a)ti.com> Signed-off-by: Udit Kumar <u-kumar1(a)ti.com> Reviewed-by: Neha Malcom Francis <n-francis(a)ti.com> --- One of such platform is J721S2 EVM link https://www.ti.com/lit/pdf/spruj69 Fig 3.1, Page 18 has details of two flashes connected with one controller Change log: Changes in v2 - Corrected link in comment - removed extra space - Added Reviewed-by, after addressing v1 feedback - link to v1 https://lore.kernel.org/all/20230907092143.4110817-1-u-kumar1@ti.com/ drivers/spi/cadence_qspi.c | 7 ++++++- drivers/spi/cadence_qspi.h | 1 + 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c index cc3a54f295..eb7fbf83d0 100644 --- a/drivers/spi/cadence_qspi.c +++ b/drivers/spi/cadence_qspi.c @@ -40,6 +40,11 @@ __weak int cadence_qspi_versal_flash_reset(struct udevice *dev) return 0; } +__weak ofnode cadence_qspi_get_subnode(struct udevice *dev) +{ + return dev_read_first_subnode(dev); +} + static int cadence_spi_write_speed(struct udevice *bus, uint hz) { struct cadence_spi_priv *priv = dev_get_priv(bus); @@ -401,7 +406,7 @@ static int cadence_spi_of_to_plat(struct udevice *bus) plat->is_dma = dev_read_bool(bus, "cdns,is-dma"); /* All other parameters are embedded in the child node */ - subnode = dev_read_first_subnode(bus); + subnode = cadence_qspi_get_subnode(bus); if (!ofnode_valid(subnode)) { printf("Error: subnode with SPI flash config missing!\n"); return -ENODEV; diff --git a/drivers/spi/cadence_qspi.h b/drivers/spi/cadence_qspi.h index 1c59d1a9d9..12825f8911 100644 --- a/drivers/spi/cadence_qspi.h +++ b/drivers/spi/cadence_qspi.h @@ -304,6 +304,7 @@ int cadence_qspi_apb_dma_read(struct cadence_spi_priv *priv, int cadence_qspi_apb_wait_for_dma_cmplt(struct cadence_spi_priv *priv); int cadence_qspi_apb_exec_flash_cmd(void *reg_base, unsigned int reg); int cadence_qspi_versal_flash_reset(struct udevice *dev); +ofnode cadence_qspi_get_subnode(struct udevice *dev); void cadence_qspi_apb_enable_linear_mode(bool enable); #endif /* __CADENCE_QSPI_H__ */ -- 2.34.1

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[PATCH v1] spi: spi-nor-ids: add flash model w25q01/02 support
by Jim Liu 14 Dec '23

14 Dec '23

add flash w25q01jv, w25q01jvfim and w25q02jv support Signed-off-by: Jim Liu <JJLIU0(a)nuvoton.com> --- drivers/mtd/spi/spi-nor-ids.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index 4587215984..fd74efe609 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -512,6 +512,16 @@ const struct flash_info spi_nor_ids[] = { SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) }, + { + INFO("w25q01jvfim", 0xef7021, 0, 64 * 1024, 2048, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | + SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) + }, + { + INFO("w25q02jv", 0xef7022, 0, 64 * 1024, 4096, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | + SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) + }, { INFO("w25q80", 0xef5014, 0, 64 * 1024, 16, SECT_4K) }, { INFO("w25q80bl", 0xef4014, 0, 64 * 1024, 16, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { INFO("w25q16cl", 0xef4015, 0, 64 * 1024, 32, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, -- 2.25.1

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[PATCH v2] arm: mxs: Clear CPSR V bit to activate low vectors
by Marek Vasut 14 Dec '23

14 Dec '23

The MXS starts with CPSR V bit set, which makes the CPU jump to high vectors in case of an exception. Those high vectors are located at 0xffff0000, which is where the BootROM exception table is located as well. U-Boot should handle exceptions on its own using its own exception handling code, which is located at 0x0, i.e. at low vectors. Clear the CPSR V bit, so that the CPU would jump to low vectors on exception instead, and therefore run the U-Boot exception handling code. Signed-off-by: Marek Vasut <marex(a)denx.de> --- Cc: "NXP i.MX U-Boot Team" <uboot-imx(a)nxp.com> Cc: Fabio Estevam <festevam(a)gmail.com> Cc: Lukasz Majewski <lukma(a)denx.de> Cc: Stefano Babic <sbabic(a)denx.de> --- V2: Mark both get_cr()/set_cr() callsites as __attribute__((target("arm"))) and noinline to force generation of ARM version of those functions, as this core cannot run mrc/mcr in Thumb mode. This is truly hideous workaround right here. --- arch/arm/cpu/arm926ejs/mxs/mxs.c | 4 ++++ arch/arm/cpu/arm926ejs/mxs/spl_boot.c | 8 +++++++- 2 files changed, 11 insertions(+), 1 deletion(-) diff --git a/arch/arm/cpu/arm926ejs/mxs/mxs.c b/arch/arm/cpu/arm926ejs/mxs/mxs.c index 6d6166cb839..4f3cb63c56d 100644 --- a/arch/arm/cpu/arm926ejs/mxs/mxs.c +++ b/arch/arm/cpu/arm926ejs/mxs/mxs.c @@ -71,6 +71,7 @@ void reset_cpu(void) * actually 0x20, this the associated <destination address>. Loading the PC * register with an address performs a jump to that address. */ +noinline __attribute__((target("arm"))) void mx28_fixup_vt(uint32_t start_addr) { /* ldr pc, [pc, #0x18] */ @@ -85,6 +86,9 @@ void mx28_fixup_vt(uint32_t start_addr) /* cppcheck-suppress nullPointer */ vt[i + 8] = start_addr + (4 * i); } + + /* Make sure ARM core points to low vectors */ + set_cr(get_cr() & ~CR_V); } #ifdef CONFIG_ARCH_MISC_INIT diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c index 5e7bdb78be1..249f8de8fbe 100644 --- a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c +++ b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c @@ -17,6 +17,7 @@ #include <asm/arch/sys_proto.h> #include <asm/gpio.h> #include <asm/sections.h> +#include <asm/system.h> #include <linux/compiler.h> #include "mxs_init.h" @@ -93,7 +94,9 @@ static uint8_t mxs_get_bootmode_index(void) return i; } -static void mxs_spl_fixup_vectors(void) +static noinline +__attribute__((target("arm"))) +void mxs_spl_fixup_vectors(void) { /* * Copy our vector table to 0x0, since due to HAB, we cannot @@ -104,6 +107,9 @@ static void mxs_spl_fixup_vectors(void) /* cppcheck-suppress nullPointer */ memcpy(0x0, _start, 0x60); + + /* Make sure ARM core points to low vectors */ + set_cr(get_cr() & ~CR_V); } static void mxs_spl_console_init(void) -- 2.42.0

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[PATCH 0/2] librem5: allow using distroboot w/ extlinux files
by Arnaud Ferraris 13 Dec '23

13 Dec '23

The Librem 5 currently can't boot from `extlinux.conf` files due to undefined environment variables: * `fdtfile` is missing, preventing the kernel from selecting the appropriate device-tree * the lack of `kernel_comp_addr_r` and `kernel_comp_size` forbids using compressed kernels This series ensures those environment variables are defined and have usable values with regard to the board revision. Arnaud Ferraris (2): librem5: properly set the `fdtfile` env variable librem5: Add addresses for compressed kernel load board/purism/librem5/librem5.c | 27 ++++++++++++++++++++++++++- include/configs/librem5.h | 2 ++ 2 files changed, 28 insertions(+), 1 deletion(-) -- 2.42.0

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[PATCH 1/5] configs: imx8mp_beacon: Do not set SYS_CONSOLE_IS_IN_ENV
by Adam Ford 13 Dec '23

13 Dec '23

The hardware only supports a specific console port, so remove the option to change the console location in the environment. Signed-off-by: Adam Ford <aford173(a)gmail.com> --- configs/imx8mp_beacon_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/imx8mp_beacon_defconfig b/configs/imx8mp_beacon_defconfig index b686af8d18..c758ff371d 100644 --- a/configs/imx8mp_beacon_defconfig +++ b/configs/imx8mp_beacon_defconfig @@ -42,6 +42,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi" CONFIG_DEFAULT_FDT_FILE="imx8mp-beacon-kit.dtb" +# CONFIG_SYS_CONSOLE_IS_IN_ENV is not set # CONFIG_SYS_DEVICE_NULLDEV is not set CONFIG_SPL_MAX_SIZE=0x26000 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -- 2.40.1

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[PATCH] MAINTAINERS: Remove non-working address from MAINTAINERS
by Hugo Villeneuve 13 Dec '23

13 Dec '23

From: Hugo Villeneuve <hvilleneuve(a)dimonoff.com> The address ariel.dalessandro(a)collabora.com is no longer working: A message that you sent could not be delivered to one or more of its recipients. This is a permanent error. The following address(es) failed: ariel.dalessandro(a)collabora.com host mx.collabora.co.uk [46.235.227.165] SMTP error from remote mail server after RCPT TO:<ariel.dalessandro(a)collabora.com>: 550 5.1.1 <ariel.dalessandro(a)collabora.com>: Recipient address rejected: undeliverable address: host mail.collabora.co.uk[46.235.227.172] said: 550 5.1.1 <ariel.dalessandro(a)collabora.com>: Recipient address rejected: User unknown in local recipient table (in reply to RCPT TO command) Remove this address from MAINTAINERS. Signed-off-by: Hugo Villeneuve <hvilleneuve(a)dimonoff.com> --- board/bsh/imx8mn_smm_s2/MAINTAINERS | 1 - board/variscite/imx8mn_var_som/MAINTAINERS | 1 - 2 files changed, 2 deletions(-) diff --git a/board/bsh/imx8mn_smm_s2/MAINTAINERS b/board/bsh/imx8mn_smm_s2/MAINTAINERS index 1de816ca871..c7898278359 100644 --- a/board/bsh/imx8mn_smm_s2/MAINTAINERS +++ b/board/bsh/imx8mn_smm_s2/MAINTAINERS @@ -1,5 +1,4 @@ ARM i.MX8MN BSH SMM S2 BOARDS -M: Ariel D'Alessandro <ariel.dalessandro(a)collabora.com> M: Michael Trimarchi <michael(a)amarulasolutions.com> S: Maintained F: arch/arm/dts/imx8mn-bsh-smm-s2* diff --git a/board/variscite/imx8mn_var_som/MAINTAINERS b/board/variscite/imx8mn_var_som/MAINTAINERS index 367f72dfe4f..a0fb1546f2f 100644 --- a/board/variscite/imx8mn_var_som/MAINTAINERS +++ b/board/variscite/imx8mn_var_som/MAINTAINERS @@ -1,5 +1,4 @@ ARM i.MX8MN VARISCITE VAR-SOM-MX8MN MODULE -M: Ariel D'Alessandro <ariel.dalessandro(a)collabora.com> M: Hugo Villeneuve <hvilleneuve(a)dimonoff.com> S: Maintained F: arch/arm/dts/imx8mn-var-som* base-commit: 4655b75335384e040358a2e3e478cc42f32a96c9 prerequisite-patch-id: 046349f916b24300d12c076e4cc3f02d81599e5e -- 2.39.2

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[PATCH] imx8mn-var-som: Simplify FEC initialization
by Hugo Villeneuve 13 Dec '23

13 Dec '23

From: Hugo Villeneuve <hvilleneuve(a)dimonoff.com> With DM enabled, there is no need for board code to initialize the FEC interface. The ethernet PHYs on the symphony carrier board have a dedicated crystal/oscillator. If the SOM has the EC configuration option (onboard ethernet PHY), it also has a dedicated crystal/oscillator. So in all cases, there is no need to enable the RGMII TX clk output. This follows a similar change introduced by Fabio Estevam: Link: https://lore.kernel.org/u-boot/20231019170441.1610453-1-festevam@gmail.com/ Signed-off-by: Hugo Villeneuve <hvilleneuve(a)dimonoff.com> --- board/variscite/imx8mn_var_som/imx8mn_var_som.c | 13 ------------- 1 file changed, 13 deletions(-) diff --git a/board/variscite/imx8mn_var_som/imx8mn_var_som.c b/board/variscite/imx8mn_var_som/imx8mn_var_som.c index 61b9455a8f4..994fd4f7058 100644 --- a/board/variscite/imx8mn_var_som/imx8mn_var_som.c +++ b/board/variscite/imx8mn_var_som/imx8mn_var_som.c @@ -12,7 +12,6 @@ #include <fdt_support.h> #include <i2c_eeprom.h> #include <malloc.h> -#include <asm/io.h> #include <asm/global_data.h> #include <dt-bindings/gpio/gpio.h> #include <linux/libfdt.h> @@ -46,20 +45,8 @@ struct var_imx8_eeprom_info { u8 partnumber2[5]; /* Part number 2 */ } __packed; -static void setup_fec(void) -{ - struct iomuxc_gpr_base_regs *gpr = - (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR; - - /* Use 125M anatop REF_CLK1 for ENET1, not from external */ - clrsetbits_le32(&gpr->gpr[1], 0x2000, 0); -} - int board_init(void) { - if (IS_ENABLED(CONFIG_FEC_MXC)) - setup_fec(); - return 0; } base-commit: 4655b75335384e040358a2e3e478cc42f32a96c9 -- 2.39.2

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[PATCH] imx8mn_var_som: Add myself to MAINTAINERS
by Hugo Villeneuve 13 Dec '23

13 Dec '23

From: Hugo Villeneuve <hvilleneuve(a)dimonoff.com> I would like to help maintaining the imx8mn_var_som symphony board. Add myself to MAINTAINERS. Signed-off-by: Hugo Villeneuve <hvilleneuve(a)dimonoff.com> --- board/variscite/imx8mn_var_som/MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/board/variscite/imx8mn_var_som/MAINTAINERS b/board/variscite/imx8mn_var_som/MAINTAINERS index 068f807ae69..367f72dfe4f 100644 --- a/board/variscite/imx8mn_var_som/MAINTAINERS +++ b/board/variscite/imx8mn_var_som/MAINTAINERS @@ -1,5 +1,6 @@ ARM i.MX8MN VARISCITE VAR-SOM-MX8MN MODULE M: Ariel D'Alessandro <ariel.dalessandro(a)collabora.com> +M: Hugo Villeneuve <hvilleneuve(a)dimonoff.com> S: Maintained F: arch/arm/dts/imx8mn-var-som* F: board/variscite/imx8mn_var_som/ base-commit: 4655b75335384e040358a2e3e478cc42f32a96c9 -- 2.39.2

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[PATCH] clock_imx8mm: Add a stub for imx8mp_fec_interface_init()
by Fabio Estevam 13 Dec '23

13 Dec '23

From: Fabio Estevam <festevam(a)denx.de> When CONFIG_DWC_ETH_QOS_IMX=y and CONFIG_FEC_MXC is not selected, the following warning is seen: arch/arm/mach-imx/imx8m/clock_imx8mm.c: In function 'board_interface_eth_init': arch/arm/mach-imx/imx8m/clock_imx8mm.c:914:24: warning: implicit declaration of function 'imx8mp_fec_interface_init; did you mean 'imx8mp_eqos_interface_init'? [-Wimplicit-function-declaration] Fix it by adding a stub for imx8mp_fec_interface_init() to handle this case. This follows the same approach done on imx8mp_eqos_interface_init(). Signed-off-by: Fabio Estevam <festevam(a)denx.de> --- arch/arm/mach-imx/imx8m/clock_imx8mm.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mm.c b/arch/arm/mach-imx/imx8m/clock_imx8mm.c index 986870799d36..5cf97a5ea952 100644 --- a/arch/arm/mach-imx/imx8m/clock_imx8mm.c +++ b/arch/arm/mach-imx/imx8m/clock_imx8mm.c @@ -904,6 +904,13 @@ static int imx8mp_fec_interface_init(struct udevice *dev, return 0; } +#else +static int imx8mp_fec_interface_init(struct udevice *dev, + phy_interface_t interface_type, + bool mx8mp) +{ + return 0; +} #endif int board_interface_eth_init(struct udevice *dev, phy_interface_t interface_type) -- 2.34.1

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