January 2023 - U-Boot

[PATCH] net: zynq_gem: Wait for SGMII PCS link in zynq_gem_init()
by Stefan Roese 11 Jan '23

11 Jan '23

In our system using ZynqMP with an external SGMII PHY it's necessary to wait for the PCS link and auto negotiation to finish before the xfer starts. Otherwise the first packet(s) might get dropped, resulting in a delay at the start of the ethernet transfers. This patch adds the necessary code at the end of zynq_gem_init() including a minimal delay of 10ms which fixes problems of dropped first packages. Signed-off-by: Stefan Roese <sr(a)denx.de> Cc: Michal Simek <michal.simek(a)amd.com> Cc: T Karthik Reddy <t.karthik.reddy(a)amd.com> Cc: Ramon Fried <rfried.dev(a)gmail.com> --- drivers/net/zynq_gem.c | 32 +++++++++++++++++++++++++++++++- 1 file changed, 31 insertions(+), 1 deletion(-) diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index 507b19b75975..625b0303d6e2 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -125,6 +125,10 @@ */ #define PHY_DETECT_MASK 0x1808 +/* PCS (SGMII) Link Status */ +#define ZYNQ_GEM_PCSSTATUS_LINK BIT(2) +#define ZYNQ_GEM_PCSSTATUS_ANEG_COMPL BIT(5) + /* TX BD status masks */ #define ZYNQ_GEM_TXBUF_FRMLEN_MASK 0x000007ff #define ZYNQ_GEM_TXBUF_EXHAUSTED 0x08000000 @@ -164,7 +168,8 @@ struct zynq_gem_regs { u32 stat[STAT_SIZE]; /* 0x100 - Octects transmitted Low reg */ u32 reserved9[20]; u32 pcscntrl; - u32 rserved12[36]; + u32 pcsstatus; + u32 rserved12[35]; u32 dcfg6; /* 0x294 Design config reg6 */ u32 reserved7[106]; u32 transmit_q1_ptr; /* 0x440 - Transmit priority queue 1 */ @@ -522,6 +527,31 @@ static int zynq_gem_init(struct udevice *dev) return ret; } } + + /* Wait for SGMII link */ + if (priv->interface == PHY_INTERFACE_MODE_SGMII && priv->int_pcs) { + u32 pcsstatus; + + if (priv->phydev->phy_id == PHY_FIXED_ID) + pcsstatus = ZYNQ_GEM_PCSSTATUS_LINK; + else + pcsstatus = ZYNQ_GEM_PCSSTATUS_LINK | + ZYNQ_GEM_PCSSTATUS_ANEG_COMPL; + + ret = wait_for_bit_le32(&regs->pcsstatus, pcsstatus, + true, 5000, true); + if (ret) { + dev_err(dev, "no PCS (SGMII) link detected\n"); + return ret; + } + + /* + * Some additional minimal delay seems to be needed so that + * the first packet will be sent correctly + */ + mdelay(10); + } + setbits_le32(&regs->nwctrl, ZYNQ_GEM_NWCTRL_RXEN_MASK | ZYNQ_GEM_NWCTRL_TXEN_MASK); -- 2.39.0

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[PATCH v2] ARM: omap3: evm: Name this directory omap3evm
by Andrew Davis 11 Jan '23

11 Jan '23

Before this was named just evm, which doesn't match the naming of the other TI board file directory and makes it look like a common directory for evms. Name this omap3evm. Signed-off-by: Andrew Davis <afd(a)ti.com> --- Changes from v1: - Call dir omap3evm instead of omap3 arch/arm/mach-omap2/omap3/Kconfig | 2 +- board/ti/{evm => omap3evm}/Kconfig | 2 +- board/ti/{evm => omap3evm}/MAINTAINERS | 2 +- board/ti/{evm => omap3evm}/Makefile | 0 board/ti/{evm => omap3evm}/evm.c | 0 board/ti/{evm => omap3evm}/evm.h | 0 6 files changed, 3 insertions(+), 3 deletions(-) rename board/ti/{evm => omap3evm}/Kconfig (86%) rename board/ti/{evm => omap3evm}/MAINTAINERS (85%) rename board/ti/{evm => omap3evm}/Makefile (100%) rename board/ti/{evm => omap3evm}/evm.c (100%) rename board/ti/{evm => omap3evm}/evm.h (100%) diff --git a/arch/arm/mach-omap2/omap3/Kconfig b/arch/arm/mach-omap2/omap3/Kconfig index 3e97ec26295..671e4791c67 100644 --- a/arch/arm/mach-omap2/omap3/Kconfig +++ b/arch/arm/mach-omap2/omap3/Kconfig @@ -163,7 +163,7 @@ config SYS_SOC source "board/logicpd/am3517evm/Kconfig" source "board/ti/beagle/Kconfig" source "board/timll/devkit8000/Kconfig" -source "board/ti/evm/Kconfig" +source "board/ti/omap3evm/Kconfig" source "board/isee/igep00x0/Kconfig" source "board/logicpd/omap3som/Kconfig" source "board/nokia/rx51/Kconfig" diff --git a/board/ti/evm/Kconfig b/board/ti/omap3evm/Kconfig similarity index 86% rename from board/ti/evm/Kconfig rename to board/ti/omap3evm/Kconfig index 4f490ddd9d5..08a8aa20ae8 100644 --- a/board/ti/evm/Kconfig +++ b/board/ti/omap3evm/Kconfig @@ -1,7 +1,7 @@ if TARGET_OMAP3_EVM config SYS_BOARD - default "evm" + default "omap3evm" config SYS_VENDOR default "ti" diff --git a/board/ti/evm/MAINTAINERS b/board/ti/omap3evm/MAINTAINERS similarity index 85% rename from board/ti/evm/MAINTAINERS rename to board/ti/omap3evm/MAINTAINERS index cd315c1635b..fb4268b312f 100644 --- a/board/ti/evm/MAINTAINERS +++ b/board/ti/omap3evm/MAINTAINERS @@ -1,6 +1,6 @@ EVM BOARD M: Derald D. Woods <woods.technical(a)gmail.com> S: Maintained -F: board/ti/evm/ +F: board/ti/omap3evm/ F: include/configs/omap3_evm.h F: configs/omap3_evm_defconfig diff --git a/board/ti/evm/Makefile b/board/ti/omap3evm/Makefile similarity index 100% rename from board/ti/evm/Makefile rename to board/ti/omap3evm/Makefile diff --git a/board/ti/evm/evm.c b/board/ti/omap3evm/evm.c similarity index 100% rename from board/ti/evm/evm.c rename to board/ti/omap3evm/evm.c diff --git a/board/ti/evm/evm.h b/board/ti/omap3evm/evm.h similarity index 100% rename from board/ti/evm/evm.h rename to board/ti/omap3evm/evm.h -- 2.38.1

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[PATCH 1/3] arm: mvebu: Fix default CONFIG_BUILD_TARGET
by Pali Rohár 11 Jan '23

11 Jan '23

u-boot-with-spl.kwb is built only for SPL enabled 32-bit armada boards. u-boot.kwb is built for 32-bit armada and kirkwood boards but only for non-SPL targets. So replace CONFIG_ARCH_MVEBU by CONFIG_ARMADA_32BIT (it implies CONFIG_ARCH_MVEBU) for u-boot-with-spl.kwb. And add additional CONFIG_ARMADA_32BIT && !CONFIG_SPL for u-boot.kwb. Signed-off-by: Pali Rohár <pali(a)kernel.org> --- Kconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Kconfig b/Kconfig index 0cdc9658f796..2243cc51c7cb 100644 --- a/Kconfig +++ b/Kconfig @@ -456,11 +456,11 @@ config BUILD_TARGET string "Build target special images" default "u-boot-with-spl.sfp" if TARGET_SOCFPGA_ARRIA10 default "u-boot-with-spl.sfp" if TARGET_SOCFPGA_GEN5 - default "u-boot-with-spl.kwb" if ARCH_MVEBU && SPL + default "u-boot-with-spl.kwb" if ARMADA_32BIT && SPL default "u-boot-elf.srec" if RCAR_GEN3 default "u-boot.itb" if !BINMAN && SPL_LOAD_FIT && (ARCH_ROCKCHIP || \ ARCH_SUNXI || RISCV || ARCH_ZYNQMP) - default "u-boot.kwb" if ARCH_KIRKWOOD + default "u-boot.kwb" if (ARCH_KIRKWOOD || ARMADA_32BIT) && !SPL default "u-boot-with-spl.bin" if ARCH_AT91 && SPL_NAND_SUPPORT default "u-boot-with-spl.imx" if ARCH_MX6 && SPL help -- 2.20.1

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[PATCH 0/5] add support for hs bootflows to am62a
by Bryan Brattlof 11 Jan '23

11 Jan '23

Hello everyone! Texas Instruments has started to enable security settings inside all the boot ROM and TIFS firmware in all of their SoCs. One of the few changes this brings is ROM and TIFS will now begin protecting the RAM regions they're using with firewalls. This means the wakeup domain's SPL will need to move the stack and heap to HSM RAM to ensure it stays within its allotted memory regions as well as move the needed boot information to the main domain's bootloaders that will no longer have access to HSM RAM. We will also need to edit the bootcmd to pull in the kernel and dtb's fitImage if uboot is enforcing the high security bootflow. While we're editing this bootcmd, we can also take the opportunity to convert it to a distro_bootcmd macro. Thanks for reviewing! ~Bryan Bryan Brattlof (5): configs: restrict am62ax wakup SPL size configs: am62a: move stack and heap to HSM RAM arm: mach-k3: copy bootindex to OCRAM for main domain SPL configs: am62a: convert bootcmd to distro_bootcmd configs: am62a: use kernel fitImage when using secure bootflow arch/arm/mach-k3/Kconfig | 4 ++- arch/arm/mach-k3/am62a7_init.c | 16 +++++++-- .../arm/mach-k3/include/mach/am62a_hardware.h | 17 +++++++++- configs/am62ax_evm_a53_defconfig | 1 - configs/am62ax_evm_r5_defconfig | 15 +++++--- include/configs/am62ax_evm.h | 34 +++++++++++++++++-- 6 files changed, 74 insertions(+), 13 deletions(-) base-commit: 52d91e1c20b399ddab276e2c03e5788ed5e5fdd2 -- 2.39.0

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[PATCH 0/2] Enable distroboot as a boot option for am62x
by Martyn Welch 11 Jan '23

11 Jan '23

The am62x config currently doesn't enable distroboot as an option for booting. Add this as a further option after the existing mechanisms have failed. Whilst working on this it was found that boot detection was failing on the am625-sk when attempting to boot from raw offsets on an SD card. Boot mode is updated to correctly detect the boot mode from the SoC boot config. Martyn Welch (2): arm64:mach-k3 am625_init: Correct boot mode detection configs: Enable distroboot on am625 arch/arm/mach-k3/am625_init.c | 19 +++++++++---------- configs/am62x_evm_a53_defconfig | 2 +- include/configs/am62x_evm.h | 26 +++++++++++++++++++++++++- 3 files changed, 35 insertions(+), 12 deletions(-) -- 2.35.1

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[PATCH v2 0/4] Enable ethernet for ti am62x
by Sjoerd Simons 11 Jan '23

11 Jan '23

These patches enable ethernet from u-boot on the ti am62x EVM. They are based on the u-boot next branch (33f4d3c3) to take advantage of recent dts sync of these boards with linux The first two patches clean up the configurations little bit (fixing incorrect config variable, running savedefconfig), the last two actually enable ethernet support Changes in v2: - Split out config cleanup from ethernet changes Sjoerd Simons (4): configs: am62x_evm_*: Correct SPI configuration option configs: am62x_evm_*: Run savedefconfig arm: dts: k3-am625-sk: Enable first ethernet port configs: am62x_evm_a53: Enable ethernet arch/arm/dts/k3-am625-sk-u-boot.dtsi | 22 +++++++++++++++++++ configs/am62x_evm_a53_defconfig | 12 ++++++++--- configs/am62x_evm_r5_defconfig | 32 +++++++++++++--------------- 3 files changed, 46 insertions(+), 20 deletions(-) -- 2.39.0

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[PATCH v1] pinctrl: nuvoton: add NPCM7xx/NPCM8xx reset type detect
by Jim Liu 11 Jan '23

11 Jan '23

add reset type detect and persist setting. Signed-off-by: Jim Liu <JJLIU0(a)nuvoton.com> --- arch/arm/include/asm/arch-npcm8xx/rst.h | 2 +- drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c | 20 ++++++++++++++++++++ drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c | 22 +++++++++++++++++++++- 3 files changed, 42 insertions(+), 2 deletions(-) diff --git a/arch/arm/include/asm/arch-npcm8xx/rst.h b/arch/arm/include/asm/arch-npcm8xx/rst.h index 379e841fca..09e1485063 100644 --- a/arch/arm/include/asm/arch-npcm8xx/rst.h +++ b/arch/arm/include/asm/arch-npcm8xx/rst.h @@ -16,7 +16,7 @@ #define SW1RST BIT(28) #define SW2RST BIT(27) #define SW3RST BIT(26) -#define SW4RST BIT(25) +#define TIPRST BIT(25) #define WD1RST BIT(24) #define WD2RST BIT(23) #define RST_STS_MASK GENMASK(31, 23) diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c index 31678f5537..1ad8bfbd88 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c +++ b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c @@ -47,6 +47,10 @@ #define WD0RST BIT(29) #define WD1RST BIT(24) #define WD2RST BIT(23) +#define SWRST1 BIT(28) +#define SWRST2 BIT(27) +#define SWRST3 BIT(26) +#define SW4RST BIT(25) #define GPIOX_MODULE_RESET 16 #define CA9C_RESET BIT(0) @@ -1374,6 +1378,14 @@ static bool is_gpio_persist(struct udevice *dev, u8 bank) regmap_read(priv->rst_regmap, NPCM7XX_RST_WD1RCR, &tmp); else if (value & WD2RST) regmap_read(priv->rst_regmap, NPCM7XX_RST_WD2RCR, &tmp); + else if (value & SWRST1) + regmap_read(priv->rst_regmap, NPCM7XX_RST_SWRSTC1, &tmp); + else if (value & SWRST2) + regmap_read(priv->rst_regmap, NPCM7XX_RST_SWRSTC2, &tmp); + else if (value & SWRST3) + regmap_read(priv->rst_regmap, NPCM7XX_RST_SWRSTC3, &tmp); + else if (value & SW4RST) + regmap_read(priv->rst_regmap, NPCM7XX_RST_SWRSTC4, &tmp); else return false; @@ -1392,11 +1404,19 @@ static int npcm7xx_gpio_reset_persist(struct udevice *dev, unsigned int banknum, regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_WD1RCR, BIT(num), 0); regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_WD2RCR, BIT(num), 0); regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_CORSTC, BIT(num), 0); + regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_SWRSTC1, BIT(num), 0); + regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_SWRSTC2, BIT(num), 0); + regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_SWRSTC3, BIT(num), 0); + regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_SWRSTC4, BIT(num), 0); } else { regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_WD0RCR, BIT(num) | CA9C_RESET, BIT(num) | CA9C_RESET); regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_WD1RCR, BIT(num) | CA9C_RESET, BIT(num) | CA9C_RESET); regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_WD2RCR, BIT(num) | CA9C_RESET, BIT(num) | CA9C_RESET); regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_CORSTC, BIT(num) | CA9C_RESET, BIT(num) | CA9C_RESET); + regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_SWRSTC1, BIT(num) | CA9C_RESET, BIT(num) | CA9C_RESET); + regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_SWRSTC2, BIT(num) | CA9C_RESET, BIT(num) | CA9C_RESET); + regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_SWRSTC3, BIT(num) | CA9C_RESET, BIT(num) | CA9C_RESET); + regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_SWRSTC4, BIT(num) | CA9C_RESET, BIT(num) | CA9C_RESET); } return 0; diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c index c6ffa89f77..0ec47e9577 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c +++ b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c @@ -20,7 +20,7 @@ #define SWRSTC1 0x44 #define SWRSTC2 0x48 #define SWRSTC3 0x4c -#define SWRSTC4 0x50 +#define TIPRSTC 0x50 #define CORSTC 0x5c #define FLOCKR1 0x74 #define INTCR4 0xc0 @@ -772,6 +772,10 @@ static int npcm8xx_gpio_reset_persist(struct udevice *dev, uint bank, regmap_update_bits(priv->rst_regmap, WD1RCR, BIT(offset), 0); regmap_update_bits(priv->rst_regmap, WD2RCR, BIT(offset), 0); regmap_update_bits(priv->rst_regmap, CORSTC, BIT(offset), 0); + regmap_update_bits(priv->rst_regmap, SWRSTC1, BIT(offset), 0); + regmap_update_bits(priv->rst_regmap, SWRSTC2, BIT(offset), 0); + regmap_update_bits(priv->rst_regmap, SWRSTC3, BIT(offset), 0); + regmap_update_bits(priv->rst_regmap, TIPRSTC, BIT(offset), 0); } else { regmap_update_bits(priv->rst_regmap, WD0RCR, BIT(offset), BIT(offset)); @@ -781,6 +785,14 @@ static int npcm8xx_gpio_reset_persist(struct udevice *dev, uint bank, BIT(offset)); regmap_update_bits(priv->rst_regmap, CORSTC, BIT(offset), BIT(offset)); + regmap_update_bits(priv->rst_regmap, SWRSTC1, BIT(offset), + BIT(offset)); + regmap_update_bits(priv->rst_regmap, SWRSTC2, BIT(offset), + BIT(offset)); + regmap_update_bits(priv->rst_regmap, SWRSTC3, BIT(offset), + BIT(offset)); + regmap_update_bits(priv->rst_regmap, TIPRSTC, BIT(offset), + BIT(offset)); } return 0; @@ -804,6 +816,14 @@ static bool is_gpio_persist(struct udevice *dev, uint bank) regmap_read(priv->rst_regmap, WD1RCR, &val); else if (status & WD2RST) regmap_read(priv->rst_regmap, WD2RCR, &val); + else if (status & SW1RST) + regmap_read(priv->rst_regmap, SWRSTC1, &val); + else if (status & SW2RST) + regmap_read(priv->rst_regmap, SWRSTC2, &val); + else if (status & SW3RST) + regmap_read(priv->rst_regmap, SWRSTC3, &val); + else if (status & TIPRST) + regmap_read(priv->rst_regmap, TIPRSTC, &val); else return false; -- 2.17.1

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dt-schema u-boot,config node
by Michal Simek 11 Jan '23

11 Jan '23

Hi Simon, We just got a request to setup bootscript address via DT that's why I am trying to refresh my mind how to do it. I know that u-boot,config have been merged to via this pull request https://github.com/devicetree-org/dt-schema/pull/62 I also grep all your branches in u-boot-dm tree but I can't see it to be used anywhere. What's the current state on it? I expect all of these options doc/device-tree-bindings/config.txt should be converted to u-boot,config node. Thanks, Michal

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[PATCH u-boot] powerpc/mpc85xx: socrates: Re-enable building u-boot-socrates.bin
by Pali Rohár 11 Jan '23

11 Jan '23

U-Boot build system builds final U-Boot binary for socrates board in custom file u-boot-socrates.bin (instead of standard u-boot.bin). Output target file u-boot-socrates.bin is generated by binman as defined in board binman config file arch/powerpc/dts/socrates-u-boot.dtsi. But binman was disabled in commit 5af42eafd7e1 ("Makefile: Reduce usage of custom mpc85xx u-boot.bin target") for all mpc85xx boards which do not use standard powerpc binman config file arch/powerpc/dts/u-boot.dtsi and boards which do not require binman at all. The only such mpc85xx board is socrates. So since that commit, U-Boot does not final binary for socrates board anymore. Fix this issue by re-enabling binman for socrates board. And build process starts again producing u-boot-socrates.bin binary. Note that build process for this socrates board always produce u-boot.bin binary which is broken and not usable for socrates board. Long term solution should be to disable building broken binary u-boot.bin and then renaming u-boot-socrates.bin to u-boot.bin, or switching to use common powerpc binman config file arch/powerpc/dts/socrates-u-boot.dtsi (if it is possible). Fixes: 5af42eafd7e1 ("Makefile: Reduce usage of custom mpc85xx u-boot.bin target") Signed-off-by: Pali Rohár <pali(a)kernel.org> --- Heiko Schocher: Could you test if u-boot is still working on this board? Tom Rini: Cannot be this issue handled by CI? For example that CI check build process produce required output binaries? --- arch/powerpc/cpu/mpc85xx/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index 24d3f1f20c25..4c765efab7a5 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -72,6 +72,7 @@ choice config TARGET_SOCRATES bool "Support socrates" select ARCH_MPC8544 + select BINMAN config TARGET_P3041DS bool "Support P3041DS" -- 2.20.1

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[PATCH 0/8] env: mmc: improvements and corrections
by Patrick Delaunay 10 Jan '23

10 Jan '23

Update in U-Boot env mmc backend with several cosmetic changes or corrections and 2 new features: 1/ CONFIG_ENV_MMC_USE_DT = no more use CONFIG_ENV_OFFSET in the mmc ENV backend when this config is activated. Requested by the STM32MP STMicroelectronics boards which activate several ENV_IS_IN_XXX; the value of CONFIG_ENV_OFFSET is invalid for SD-Card / eMMC boot; this offset should only used in SPIFlash backend (sf.c) for SPI-NOR boot. If this offset is used on mmc backend, when partition name in GPT is not aligned with U-Boot DT: "u-boot,mmc-env-partition", the behavior is difficult to debug: a partition is corrupted on 'env save' command. 2/ selects the GPT env partition by the "u-boot-env" type GUID introduced by the commit c0364ce1c695 ("doc/README.gpt: define partition type GUID for U-Boot environment") This feature can also avoid issue when 'u-boot-env' partition name change in GPT partitioning but not in the U-Boot DT with "u-boot,mmc-env-partition" Few check patch warnings remained in the series, but after check I can't remove them : - IS_ENABLED(ENV_MMC_HWPART_REDUND) is normally used as IS_ENABLED(CONFIG_ENV_MMC_HWPART_REDUND) => ENV_MMC_HWPART_REDUND is locally defined in this file it is not a real CONFIG but I can use the IS_ENABLED() macro as it is defined to 1 - Use 'if (IS_ENABLED(CONFIG...))' instead of '#if or #ifdef' where possible + CONFIG_PARTITION_TYPE_GUID => info.type_guid existence + CONFIG_ENV_OFFSET_REDUND and CONFIG_ENV_MMC_USE_DT => only for define As I miss the merge window, not targeted for v2023.01 but for next v2023.04. Regards Patrick Patrick Delaunay (8): env: mmc: introduced ENV_MMC_OFFSET env: mcc: Drop unnecessary #ifdefs env: mcc: fix compilation error with ENV_IS_EMBEDDED env: mmc: add CONFIG_ENV_MMC_USE_DT configs: stm32mp: activate CONFIG_ENV_MMC_USE_DT env: mmc: select GPT env partition by type guid env: mmc: add debug message when mmc-env-partition is not found env: mmc: cosmetic: remove unused macro STR(X) configs/stm32mp13_defconfig | 1 + configs/stm32mp15_basic_defconfig | 1 + configs/stm32mp15_defconfig | 1 + configs/stm32mp15_trusted_defconfig | 1 + env/Kconfig | 16 +++ env/mmc.c | 182 ++++++++++++++++++---------- 6 files changed, 135 insertions(+), 67 deletions(-) -- 2.25.1

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