July 2022 - U-Boot

[PATCH v1 3/6] rockchip: rk3066: add Rockchip IDB block device as boot action
by Johan Jonker 05 Jul '22

05 Jul '22

From: Johan Jonker <jbx6244(a)gmail.com> Add Rockchip IDB block device as boot action for rk3066. When a key is pressed the NAND IDB blocks can be accessed by a USB gadget like rockusb. Signed-off-by: Johan Jonker <jbx6244(a)gmail.com> --- This patch comes on top of a serie called: [PATCH v1 00/17] Add rk3066 ADC and USB support https://lore.kernel.org/u-boot/20220508150825.21711-1-jbx6244@gmail.com/ --- arch/arm/mach-rockchip/rk3066/rk3066.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/mach-rockchip/rk3066/rk3066.c b/arch/arm/mach-rockchip/rk3066/rk3066.c index be19400c..c2058369 100644 --- a/arch/arm/mach-rockchip/rk3066/rk3066.c +++ b/arch/arm/mach-rockchip/rk3066/rk3066.c @@ -32,6 +32,8 @@ void board_debug_uart_init(void) GPIO1B0_UART2_SIN << GPIO1B0_SHIFT); } +int rk_idb_start(void); + __weak void do_spl(void) { if (CONFIG_IS_ENABLED(OF_PLATDATA)) @@ -43,6 +45,15 @@ __weak void do_spl(void) int ret; switch (spl_boot_device()) { +#if IS_ENABLED(CONFIG_SPL_ROCKCHIP_IDB) + case BOOT_DEVICE_NAND: + dev_type = "idb"; + dev_index = 0; + ret = rk_idb_start(); + if (ret) + return; + break; +#endif case BOOT_DEVICE_MMC1: dev_type = "mmc"; dev_index = 0; -- 2.20.1

1 0

[PATCH v1 2/6] rockchip: spl: allow more boot devices
by Johan Jonker 05 Jul '22

05 Jul '22

From: Johan Jonker <jbx6244(a)gmail.com> Rockchip SoCs have more boot device options then currently included in the function spl_boot_device(). Make this function generic for SPI and NAND. Signed-off-by: Johan Jonker <jbx6244(a)gmail.com> --- This patch should replace a patch in the serie called: [PATCH v1 02/17] rockchip: spl: allow more boot devices https://lore.kernel.org/u-boot/20220508150825.21711-3-jbx6244@gmail.com/ Changed: replace #elseif by #elif --- arch/arm/mach-rockchip/spl.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c index ceef9d91..aab3804f 100644 --- a/arch/arm/mach-rockchip/spl.c +++ b/arch/arm/mach-rockchip/spl.c @@ -53,13 +53,16 @@ u32 spl_boot_device(void) { u32 boot_device = BOOT_DEVICE_MMC1; -#if defined(CONFIG_TARGET_CHROMEBOOK_JERRY) || \ +#if defined(CONFIG_SPI_BOOT) || \ + defined(CONFIG_TARGET_CHROMEBOOK_JERRY) || \ defined(CONFIG_TARGET_CHROMEBIT_MICKEY) || \ defined(CONFIG_TARGET_CHROMEBOOK_MINNIE) || \ defined(CONFIG_TARGET_CHROMEBOOK_SPEEDY) || \ defined(CONFIG_TARGET_CHROMEBOOK_BOB) || \ defined(CONFIG_TARGET_CHROMEBOOK_KEVIN) return BOOT_DEVICE_SPI; +#elif defined(CONFIG_NAND_BOOT) + return BOOT_DEVICE_NAND; #endif if (CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)) return BOOT_DEVICE_BOOTROM; -- 2.20.1

1 0

[PATCH] log: force DEBUG when LOG_DEBUG is activated
by Patrick Delaunay 05 Jul '22

05 Jul '22

When CONFIG_LOG is activated, if LOG_DEBUG is defined in a file and DEBUG is not defined the trace with debug() macro are not displayed, because the parameter cond : _DEBUG = 0 is checked in debug_cond(). With this patch the define DEBUG, used to force the trace generated by debug() macro, is linked with the define LOG_DEBUG, used to force the trace generated by other macros (log_debug, dev_dbg, pr_debug). We only need to define LOG_DEBUG in a file to activate all the traces generated by any U-Boot debug macro, as it is described in /doc/develop/logging.rst Signed-off-by: Patrick Delaunay <patrick.delaunay(a)foss.st.com> --- include/log.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/log.h b/include/log.h index 8f35c10abb5..7abc70e4398 100644 --- a/include/log.h +++ b/include/log.h @@ -194,6 +194,9 @@ int _log_buffer(enum log_category_t cat, enum log_level_t level, #ifdef LOG_DEBUG #define _LOG_DEBUG LOGL_FORCE_DEBUG +#ifndef DEBUG +#define DEBUG +#endif #else #define _LOG_DEBUG 0 #endif -- 2.25.1

2 1

[PATCH] doc: board: amlogic: add documentation on boot flow
by Neil Armstrong 05 Jul '22

05 Jul '22

This is a preliminary documentation introducing different boot sequences, and notably the recovery mode. Signed-off-by: Neil Armstrong <narmstrong(a)baylibre.com> --- doc/board/amlogic/boot-flow.rst | 147 ++++++++++++++++++++++++++++++++ doc/board/amlogic/index.rst | 1 + 2 files changed, 148 insertions(+) create mode 100644 doc/board/amlogic/boot-flow.rst diff --git a/doc/board/amlogic/boot-flow.rst b/doc/board/amlogic/boot-flow.rst new file mode 100644 index 0000000000..32943f42db --- /dev/null +++ b/doc/board/amlogic/boot-flow.rst @@ -0,0 +1,147 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Amlogic SoC Boot Flow +===================== + +The Amlogic SoCs has a pre-defined boot sequence in the SoC ROM code. + +Here is the possible boot sources of different SoC families supported by U-Boot: + +GX* & AXG family +---------------- + ++----------+--------------------+-------+-------+---------------+---------------+ +| | 1 | 2 | 3 | 4 | 5 | ++==========+====================+=======+=======+===============+===============+ +| S905 | POC=0: SPI NOR | eMMC | NAND | SD Card | USB Device | +| S905X | | | | | | +| S905L | | | | | | +| S905W | | | | | | +| S912 | | | | | | ++----------+--------------------+-------+-------+---------------+---------------+ +| S805X | POC=0: SPI NOR | eMMC | NAND | USB Device | - | +| A113D | | | | | | +| A113X | | | | | | ++----------+--------------------+-------+-------+---------------+---------------+ + +POC pin: `NAND_CLE` + +Usually boards provides a button to force USB BOOT which disables eMMC clock signal to +bypass eMMC. + +Most of the GX SBCs have removable eMMC modules, in this case removing the eMMC and SDCard +will boot over USB. + +An exception is the lafrite board (aml-s805x-xx) which doesn't have an SDCard and boots +over SPI. The only ways to boot over USB are: + + - erase first sectors of SPI NOR flash + - insert an HDMI boot plug forcing boot over USB + +The VIM1 and initial VIM2 boards provides a test point on the eMMC signals to block the +storage from answering and continue to the next boot step. + +The USB Device boot uses the first USB interface, on some boards this port is only +available on an USB-A type connector, and needs an special Type-A to Type-A cable +to communicate with the BootROM. + +G12* & SM1 family +----------------- + ++-------+-------+-------+---------------+---------------+---------------+---------------+ +| POC0 | POC1 | POC2 | 1 | 2 | 3 | 4 | ++=======+=======+=======+===============+===============+===============+===============+ +| 0 | 0 | 0 | USB Device | SPI NOR | NAND/eMMC | SDCard | ++-------+-------+-------+---------------+---------------+---------------+---------------+ +| 0 | 0 | 1 | USB Device | NAND/eMMC | SDCard | - | ++-------+-------+-------+---------------+---------------+---------------+---------------+ +| 0 | 1 | 0 | SPI NOR | NAND/eMMC | SDCard | USB Device | ++-------+-------+-------+---------------+---------------+---------------+---------------+ +| 0 | 1 | 1 | SPI NAND | NAND/eMMC | USB Device | - | ++-------+-------+-------+---------------+---------------+---------------+---------------+ +| 1 | 0 | 0 | USB Device | SPI NOR | NAND/eMMC | SDCard | ++-------+-------+-------+---------------+---------------+---------------+---------------+ +| 1 | 0 | 1 | USB Device | NAND/eMMC | SDCard | - | ++-------+-------+-------+---------------+---------------+---------------+---------------+ +| 1 | 1 | 0 | SPI NOR | NAND/eMMC | SDCard | USB Device | ++-------+-------+-------+---------------+---------------+---------------+---------------+ +| 1 | 1 | 1 | NAND/eMMC | SDCard | USB Device | - | ++-------+-------+-------+---------------+---------------+---------------+---------------+ + +The last is the normal default boot on production devices. + + * POC0 pin: `BOOT_4` (0 and all other 1 means SPI NAND boot first) + * POC1 pin: `BOOT_5` (0 and all other 1 means USB Device boot first + * POC2 pin: `BOOT_6` (0 and all other 1 means SPI NOR boot first) + +Usually boards provides a button to force USB BOOT which lowers `BOOT_5` to 0. + +Some boards provides a test point on the eMMC or SPI NOR clock signals to block the +storage from answering and continue to the next boot step. + +The Khadas VIM3 boards embeds a microcontroller which sets POC signals depending +on it's configuration or a specific key press sequence to either boot from SPI NOR +or eMMC then SDCard, or boot as USB Device. + +The Odroid-N2(+) has a switch to select SPI NOR or eMMC boot. + +Boot Modes +---------- + + * SDCard + +The BootROM fetches the first SDCard sectors in one sequence, then checks the content +of the data. + +The BootROM expects finding the FIP binary are sector 1, 512 bytes offset from the start. + + * eMMC + +The BootROM fetches the first sectors in one sequence, first on the main partition, +and then on the Boot0 followed by Boot1 HW partitions. + +After each read, the BootROM checks the data and looks the next partition if it fails. + +The BootROM expects finding the FIP binary are sector 1, 512 bytes offset from the start. + + * SPI NOR + +The BootROM fetches the first SPI NOR sectors in one sequence, then checks the content +of the data. + +The BootROM expects finding the FIP binary are sector 1, 512 bytes offset from the start. + + * NAND & SPI NAND + +Those modes are not widely used in open platforms, thus no details are available. + + * USB Device + +The BootROM setups the USB Gadget interface to serve a custom USB protocols with the +USB ID 1b8e:c003. + +This protocol is also implemented in the Amlogic Vendor U-Boot. + +The `update` utility provided by Amlogic is designed to use this protocol. + +The https://github.com/superna9999/pyamlboot open-source utility also implements this +protocol and can load U-Boot in memory in order to start the SoC without any attached +storage or to recover from a failed storage/flash tentative. + +HDMI Recovery +------------- + +The BootROM also briefly reads 8 bytes at address I2C 0x52 offset 0xf8 (248) on the +HDMI DDC bus. + +If the content is `boot@USB` it will force USB boot mode, if the content is `boot@SDC` +it will force SDCard boot mode. + +If USB Device doesn't enumerate or SD Card boot step doesn't work, it will continue the +boot steps. + +Special boot dongles can be built by connecting a 256bytes EEPROM set to answer on +address 0x52, and program `boot@USB` or `boot@SDC` at offset 0xf8 (248). + +Note: if the SoC was booted with USB Device forced at first step, it will keep the boot +order on a warm reboot, only a cold reboot (remove power) will reset the boot order. diff --git a/doc/board/amlogic/index.rst b/doc/board/amlogic/index.rst index 9c7fadf2c0..8b9f1e2e1d 100644 --- a/doc/board/amlogic/index.rst +++ b/doc/board/amlogic/index.rst @@ -81,6 +81,7 @@ Boot Documentation :maxdepth: 1 pre-generated-fip + boot-flow Board Documentation ------------------- -- 2.25.1

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[PATCH V2 00/49] imx: support i.MX93
by Peng Fan (OSS) 05 Jul '22

05 Jul '22

From: Peng Fan <peng.fan(a)nxp.com> V2: Fix issue reported by CI build - Enlarge SPL_MAX_SIZE for i.MX8MM - Fix i.MX8ULP break This patchset is to support i.MX93, during the development, there are some code cleanup and restructure to make i.MX93 code porting cleaner. i.MX9 is a new i.MX family and i.MX93 is the first one that we would support in upstream. It features two Cortex-A55 core, one NPU, one M33 and others. There are some driver changes that also included to make i.MX93 function well, lpuart/mmc/network. mkimage also included, but I have not enable BINMAN which is under development, will post a follow patchset to switch to binman. Alice Guo (3): misc: imx8ulp: move fuse.c from imx8ulp to sentinel misc: fuse: support to access fuse on i.MX93 misc: fuse: update the code for accessing fuse of i.MX93 Jian Li (1): imx: imx9: Add function to initialize timer Peng Fan (31): spl: imx8mm: enlarge SPL_MAX_SIZE arm: makefile: cleanup mach-imx usage imx: simplify dependency with SPL_BOOTROM_SUPPORT imx: move get_boot_device to common header imx: move get_boot_device to common file imx: add USB2_BOOT type imx: add basic i.MX9 support fsl_lpuart: add i.MX9 support gpio: pca953x: support pcal6524 imx: pinctrl: add pinctrl and pinfunc file for i.MX93 imx: imx9: Add CCM and clock API support mmc: fsl_esdhc_imx: Support i.MX9 spl: Use SPL_FIT_IMAGE_TINY for iMX9 imx: imx9: support romapi misc: s4mu: Support iMX93 with Sentinel MU misc: S400_API: New API for FW status and chip info misc: s400_api: introduce ahab_release_m33_trout imx: imx9: Get the chip revision through S400 API imx: imx9: Add MIX power init imx: imx9: Add M33 release prepare function imx: imx9: Support booting m33 from Acore arm: dts: Add i.MX93 SoC DTSi file imx: imx93_evk: Add basic board support imx: imx93_evk: Set ARM clock to 1.7Ghz net: fec_mxc: support i.MX93 net: dwc_eth_qos: fix build break when CLK not enabled net: dwc_eth_qos: public some functions net: dwc_eth_qos: move i.MX code out net: dwc_eth_qos: intrdouce eqos hook eqos_get_enetaddr board: freescale: imx93_evk: support ethernet tools: image: support i.MX93 Ye Li (14): imx: Change USB boot device type imx: spl: Allow iMX7/8/8M to overwrite spl_board_boot_device imx: imx9: disable watchdog misc: imx: S400_API: Move S400 MU and API to a common place misc: S400_API: Update release RDC API imx: imx9: Add TRDC driver for TRDC init imx: imx9: Add AHAB boot support misc: S400_API: Rename imx8ulp_s400_msg to sentinel_msg imx: imx9: Add gpio registers structure imx: imx9: Support multiple env storages at runtime imx: imx9: clock: Add DDR clock support ddr: imx: Add i.MX9 DDR controller driver ddr: imx9: enable Performance monitor counter net: eqos: add function to get phy node and address arch/arm/Kconfig | 16 + arch/arm/Makefile | 12 +- arch/arm/dts/Makefile | 3 + arch/arm/dts/imx93-11x11-evk-u-boot.dtsi | 157 ++ arch/arm/dts/imx93-11x11-evk.dts | 527 ++++++ arch/arm/dts/imx93-pinfunc.h | 625 +++++++ arch/arm/dts/imx93.dtsi | 688 ++++++++ arch/arm/include/asm/arch-imx/cpu.h | 2 + arch/arm/include/asm/arch-imx8/sys_proto.h | 1 - arch/arm/include/asm/arch-imx8m/ddr.h | 6 +- arch/arm/include/asm/arch-imx8m/sys_proto.h | 2 +- arch/arm/include/asm/arch-imx8ulp/sys_proto.h | 5 - arch/arm/include/asm/arch-imx9/ccm_regs.h | 266 +++ arch/arm/include/asm/arch-imx9/clock.h | 244 +++ arch/arm/include/asm/arch-imx9/ddr.h | 126 ++ arch/arm/include/asm/arch-imx9/gpio.h | 20 + arch/arm/include/asm/arch-imx9/imx-regs.h | 234 +++ arch/arm/include/asm/arch-imx9/imx93_pins.h | 729 ++++++++ arch/arm/include/asm/arch-imx9/sys_proto.h | 14 + arch/arm/include/asm/arch-imx9/trdc.h | 19 + arch/arm/include/asm/arch-mx7/sys_proto.h | 1 - arch/arm/include/asm/arch-mx7ulp/sys_proto.h | 1 - arch/arm/include/asm/global_data.h | 5 +- arch/arm/include/asm/mach-imx/boot_mode.h | 1 + arch/arm/include/asm/mach-imx/iomux-v3.h | 11 +- .../asm/{arch-imx8ulp => mach-imx}/mu_hal.h | 4 +- .../asm/{arch-imx8ulp => mach-imx}/s400_api.h | 18 +- arch/arm/include/asm/mach-imx/sys_proto.h | 11 +- arch/arm/mach-imx/Kconfig | 3 +- arch/arm/mach-imx/Makefile | 10 +- arch/arm/mach-imx/imx8m/soc.c | 47 - arch/arm/mach-imx/imx8ulp/ahab.c | 345 ++++ arch/arm/mach-imx/imx8ulp/rdc.c | 6 +- arch/arm/mach-imx/imx8ulp/soc.c | 48 +- arch/arm/mach-imx/imx9/Kconfig | 34 + arch/arm/mach-imx/imx9/Makefile | 11 + arch/arm/mach-imx/imx9/ahab.c | 346 ++++ arch/arm/mach-imx/imx9/clock.c | 844 ++++++++++ arch/arm/mach-imx/imx9/clock_root.c | 438 +++++ arch/arm/mach-imx/imx9/imx_bootaux.c | 133 ++ arch/arm/mach-imx/imx9/lowlevel_init.S | 26 + arch/arm/mach-imx/imx9/soc.c | 473 ++++++ arch/arm/mach-imx/imx9/trdc.c | 581 +++++++ arch/arm/mach-imx/imx_romapi.c | 60 + arch/arm/mach-imx/spl.c | 82 +- board/freescale/common/Makefile | 2 +- board/freescale/imx8ulp_evk/spl.c | 2 +- board/freescale/imx93_evk/Kconfig | 21 + board/freescale/imx93_evk/MAINTAINERS | 6 + board/freescale/imx93_evk/Makefile | 12 + board/freescale/imx93_evk/imx93_evk.c | 90 + board/freescale/imx93_evk/lpddr4x_timing.c | 1486 +++++++++++++++++ board/freescale/imx93_evk/spl.c | 129 ++ common/spl/Kconfig | 3 +- configs/imx8mm-cl-iot-gate-optee_defconfig | 1 - configs/imx8mm-cl-iot-gate_defconfig | 1 - configs/imx8mm-icore-mx8mm-ctouch2_defconfig | 1 - configs/imx8mm-icore-mx8mm-edimm2.2_defconfig | 1 - configs/imx8mm-mx8menlo_defconfig | 1 - configs/imx8mm_beacon_defconfig | 1 - configs/imx8mm_data_modul_edm_sbc_defconfig | 1 - configs/imx8mm_evk_defconfig | 1 - configs/imx8mm_venice_defconfig | 1 - configs/imx93_11x11_evk_defconfig | 117 ++ configs/phycore-imx8mm_defconfig | 1 - configs/verdin-imx8mm_defconfig | 1 - drivers/Makefile | 1 + drivers/ddr/imx/Kconfig | 2 + drivers/ddr/imx/imx8m/Kconfig | 1 + drivers/ddr/imx/imx8m/Makefile | 3 +- drivers/ddr/imx/imx8m/ddr_init.c | 219 +++ drivers/ddr/imx/imx9/Kconfig | 27 + drivers/ddr/imx/imx9/Makefile | 10 + drivers/ddr/imx/imx9/ddr_init.c | 489 ++++++ drivers/ddr/imx/phy/Kconfig | 4 + drivers/ddr/imx/phy/Makefile | 9 + drivers/ddr/imx/{imx8m => phy}/ddrphy_csr.c | 0 drivers/ddr/imx/{imx8m => phy}/ddrphy_train.c | 1 - drivers/ddr/imx/phy/ddrphy_utils.c | 169 ++ drivers/ddr/imx/{imx8m => phy}/helper.c | 45 +- drivers/gpio/pca953x_gpio.c | 4 + drivers/misc/Kconfig | 7 + drivers/misc/Makefile | 2 +- drivers/misc/{imx8ulp => sentinel}/Makefile | 2 +- drivers/misc/{imx8ulp => sentinel}/fuse.c | 96 +- drivers/misc/{imx8ulp => sentinel}/s400_api.c | 149 +- .../{imx8ulp/imx8ulp_mu.c => sentinel/s4mu.c} | 11 +- drivers/mmc/Kconfig | 2 +- drivers/net/Kconfig | 2 +- drivers/net/Makefile | 1 + drivers/net/dwc_eth_qos.c | 406 +---- drivers/net/dwc_eth_qos.h | 284 ++++ drivers/net/dwc_eth_qos_imx.c | 131 ++ drivers/net/fec_mxc.c | 4 +- drivers/pinctrl/nxp/Kconfig | 13 + drivers/pinctrl/nxp/Makefile | 1 + drivers/pinctrl/nxp/pinctrl-imx93.c | 37 + include/configs/imx93_evk.h | 149 ++ include/dt-bindings/clock/imx93-clock.h | 203 +++ include/dt-bindings/power/imx93-power.h | 12 + include/fsl_lpuart.h | 2 +- include/imx8image.h | 15 +- include/imx_sip.h | 1 + tools/imx8image.c | 79 +- 104 files changed, 11072 insertions(+), 635 deletions(-) create mode 100644 arch/arm/dts/imx93-11x11-evk-u-boot.dtsi create mode 100644 arch/arm/dts/imx93-11x11-evk.dts create mode 100644 arch/arm/dts/imx93-pinfunc.h create mode 100644 arch/arm/dts/imx93.dtsi create mode 100644 arch/arm/include/asm/arch-imx9/ccm_regs.h create mode 100644 arch/arm/include/asm/arch-imx9/clock.h create mode 100644 arch/arm/include/asm/arch-imx9/ddr.h create mode 100644 arch/arm/include/asm/arch-imx9/gpio.h create mode 100644 arch/arm/include/asm/arch-imx9/imx-regs.h create mode 100644 arch/arm/include/asm/arch-imx9/imx93_pins.h create mode 100644 arch/arm/include/asm/arch-imx9/sys_proto.h create mode 100644 arch/arm/include/asm/arch-imx9/trdc.h rename arch/arm/include/asm/{arch-imx8ulp => mach-imx}/mu_hal.h (79%) rename arch/arm/include/asm/{arch-imx8ulp => mach-imx}/s400_api.h (75%) create mode 100644 arch/arm/mach-imx/imx8ulp/ahab.c create mode 100644 arch/arm/mach-imx/imx9/Kconfig create mode 100644 arch/arm/mach-imx/imx9/Makefile create mode 100644 arch/arm/mach-imx/imx9/ahab.c create mode 100644 arch/arm/mach-imx/imx9/clock.c create mode 100644 arch/arm/mach-imx/imx9/clock_root.c create mode 100644 arch/arm/mach-imx/imx9/imx_bootaux.c create mode 100644 arch/arm/mach-imx/imx9/lowlevel_init.S create mode 100644 arch/arm/mach-imx/imx9/soc.c create mode 100644 arch/arm/mach-imx/imx9/trdc.c create mode 100644 arch/arm/mach-imx/imx_romapi.c create mode 100644 board/freescale/imx93_evk/Kconfig create mode 100644 board/freescale/imx93_evk/MAINTAINERS create mode 100644 board/freescale/imx93_evk/Makefile create mode 100644 board/freescale/imx93_evk/imx93_evk.c create mode 100644 board/freescale/imx93_evk/lpddr4x_timing.c create mode 100644 board/freescale/imx93_evk/spl.c create mode 100644 configs/imx93_11x11_evk_defconfig create mode 100644 drivers/ddr/imx/imx9/Kconfig create mode 100644 drivers/ddr/imx/imx9/Makefile create mode 100644 drivers/ddr/imx/imx9/ddr_init.c create mode 100644 drivers/ddr/imx/phy/Kconfig create mode 100644 drivers/ddr/imx/phy/Makefile rename drivers/ddr/imx/{imx8m => phy}/ddrphy_csr.c (100%) rename drivers/ddr/imx/{imx8m => phy}/ddrphy_train.c (98%) create mode 100644 drivers/ddr/imx/phy/ddrphy_utils.c rename drivers/ddr/imx/{imx8m => phy}/helper.c (79%) rename drivers/misc/{imx8ulp => sentinel}/Makefile (67%) rename drivers/misc/{imx8ulp => sentinel}/fuse.c (69%) rename drivers/misc/{imx8ulp => sentinel}/s400_api.c (69%) rename drivers/misc/{imx8ulp/imx8ulp_mu.c => sentinel/s4mu.c} (94%) create mode 100644 drivers/net/dwc_eth_qos.h create mode 100644 drivers/net/dwc_eth_qos_imx.c create mode 100644 drivers/pinctrl/nxp/pinctrl-imx93.c create mode 100644 include/configs/imx93_evk.h create mode 100644 include/dt-bindings/clock/imx93-clock.h create mode 100644 include/dt-bindings/power/imx93-power.h -- 2.36.0

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[PATCH] watchdog: add pulse support to gpio watchdog driver
by Paul Doelle 05 Jul '22

05 Jul '22

A common external watchdog circuit is kept alive by triggering a short pulse on the reset pin. This patch adds support for this use case, while making the algorithm configurable in the devicetree. The "linux,wdt-gpio" driver being modified is based off the equivalent driver in the Linux kernel, which provides support for this algorithm. This patch brings parity to this driver, and is kept aligned with the functionality and devicetree configuration in the kernel. It should be noted that this adds a required property named 'hw_algo' to the devicetree binding, following suit with the kernel. I'm happy to make this backward-compatible if preferred. Signed-off-by: Paul Doelle <paaull.git(a)gmail.com> --- arch/sandbox/dts/test.dts | 11 ++++- .../watchdog/gpio-wdt.txt | 8 +++- drivers/watchdog/gpio_wdt.c | 40 +++++++++++++--- test/dm/wdt.c | 46 ++++++++++++++++--- 4 files changed, 90 insertions(+), 15 deletions(-) diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index 8f93775ff4..4dc591d995 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -830,10 +830,19 @@ }; }; - gpio-wdt { + wdt-gpio-toggle { gpios = <&gpio_a 7 0>; compatible = "linux,wdt-gpio"; hw_margin_ms = <100>; + hw_algo = "toggle"; + always-running; + }; + + wdt-gpio-level { + gpios = <&gpio_a 7 0>; + compatible = "linux,wdt-gpio"; + hw_margin_ms = <100>; + hw_algo = "level"; always-running; }; diff --git a/doc/device-tree-bindings/watchdog/gpio-wdt.txt b/doc/device-tree-bindings/watchdog/gpio-wdt.txt index c9a8559a3e..746c2c081e 100644 --- a/doc/device-tree-bindings/watchdog/gpio-wdt.txt +++ b/doc/device-tree-bindings/watchdog/gpio-wdt.txt @@ -5,7 +5,12 @@ Describes a simple watchdog timer which is reset by toggling a gpio. Required properties: - compatible: Must be "linux,wdt-gpio". -- gpios: gpio to toggle when wdt driver reset method is called. +- gpios: From common gpio binding; gpio connection to WDT reset pin. +- hw_algo: The algorithm used by the driver. Should be one of the + following values: + - toggle: Toggle from high-to-low or low-to-high when resetting the watchdog. + - level: Maintain a constant high/low level, and trigger a short pulse when + resetting the watchdog. Active level is determined by the GPIO flags. - always-running: Boolean property indicating that the watchdog cannot be disabled. At present, U-Boot only supports this kind of GPIO watchdog. @@ -15,5 +20,6 @@ Example: gpio-wdt { gpios = <&gpio0 1 0>; compatible = "linux,wdt-gpio"; + hw_algo = "toggle"; always-running; }; diff --git a/drivers/watchdog/gpio_wdt.c b/drivers/watchdog/gpio_wdt.c index 982a66b3f9..fe06ec8cc9 100644 --- a/drivers/watchdog/gpio_wdt.c +++ b/drivers/watchdog/gpio_wdt.c @@ -4,20 +4,38 @@ #include <dm/device_compat.h> #include <wdt.h> #include <asm/gpio.h> +#include <linux/delay.h> + +enum { + HW_ALGO_TOGGLE, + HW_ALGO_LEVEL, +}; struct gpio_wdt_priv { - struct gpio_desc gpio; - bool always_running; - int state; + struct gpio_desc gpio; + unsigned int hw_algo; + bool always_running; + int state; }; static int gpio_wdt_reset(struct udevice *dev) { struct gpio_wdt_priv *priv = dev_get_priv(dev); - priv->state = !priv->state; - - return dm_gpio_set_value(&priv->gpio, priv->state); + switch (priv->hw_algo) { + case HW_ALGO_TOGGLE: + /* Toggle output pin */ + priv->state = !priv->state; + dm_gpio_set_value(&priv->gpio, priv->state); + break; + case HW_ALGO_LEVEL: + /* Pulse */ + dm_gpio_set_value(&priv->gpio, 1); + udelay(1); + dm_gpio_set_value(&priv->gpio, 0); + break; + } + return 0; } static int gpio_wdt_start(struct udevice *dev, u64 timeout, ulong flags) @@ -34,6 +52,16 @@ static int dm_probe(struct udevice *dev) { struct gpio_wdt_priv *priv = dev_get_priv(dev); int ret; + const char *algo = dev_read_string(dev, "hw_algo"); + + if (!algo) + return -EINVAL; + if (!strcmp(algo, "toggle")) + priv->hw_algo = HW_ALGO_TOGGLE; + else if (!strcmp(algo, "level")) + priv->hw_algo = HW_ALGO_LEVEL; + else + return -EINVAL; priv->always_running = dev_read_bool(dev, "always-running"); ret = gpio_request_by_name(dev, "gpios", 0, &priv->gpio, GPIOD_IS_OUT); diff --git a/test/dm/wdt.c b/test/dm/wdt.c index ee615f0e14..535f00a874 100644 --- a/test/dm/wdt.c +++ b/test/dm/wdt.c @@ -44,20 +44,20 @@ static int dm_test_wdt_base(struct unit_test_state *uts) } DM_TEST(dm_test_wdt_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); -static int dm_test_wdt_gpio(struct unit_test_state *uts) +static int dm_test_wdt_gpio_toggle(struct unit_test_state *uts) { /* * The sandbox wdt gpio is "connected" to gpio bank a, offset * 7. Use the sandbox back door to verify that the gpio-wdt - * driver behaves as expected. + * driver behaves as expected when using the 'toggle' algorithm. */ struct udevice *wdt, *gpio; const u64 timeout = 42; const int offset = 7; int val; - ut_assertok(uclass_get_device_by_driver(UCLASS_WDT, - DM_DRIVER_GET(wdt_gpio), &wdt)); + ut_assertok(uclass_get_device_by_name(UCLASS_WDT, + "wdt-gpio-toggle", &wdt)); ut_assertnonnull(wdt); ut_assertok(uclass_get_device_by_name(UCLASS_GPIO, "base-gpios", &gpio)); @@ -74,7 +74,39 @@ static int dm_test_wdt_gpio(struct unit_test_state *uts) return 0; } -DM_TEST(dm_test_wdt_gpio, UT_TESTF_SCAN_FDT); +DM_TEST(dm_test_wdt_gpio_toggle, UT_TESTF_SCAN_FDT); + +static int dm_test_wdt_gpio_level(struct unit_test_state *uts) +{ + /* + * The sandbox wdt gpio is "connected" to gpio bank a, offset + * 7. Use the sandbox back door to verify that the gpio-wdt + * driver behaves as expected when using the 'level' algorithm. + */ + struct udevice *wdt, *gpio; + const u64 timeout = 42; + const int offset = 7; + int val; + + ut_assertok(uclass_get_device_by_name(UCLASS_WDT, + "wdt-gpio-level", &wdt)); + ut_assertnonnull(wdt); + + ut_assertok(uclass_get_device_by_name(UCLASS_GPIO, "base-gpios", &gpio)); + ut_assertnonnull(gpio); + ut_assertok(wdt_start(wdt, timeout, 0)); + + val = sandbox_gpio_get_value(gpio, offset); + ut_assertok(wdt_reset(wdt)); + ut_asserteq(val, sandbox_gpio_get_value(gpio, offset)); + ut_assertok(wdt_reset(wdt)); + ut_asserteq(val, sandbox_gpio_get_value(gpio, offset)); + + ut_asserteq(-ENOSYS, wdt_stop(wdt)); + + return 0; +} +DM_TEST(dm_test_wdt_gpio_level, UT_TESTF_SCAN_FDT); static int dm_test_wdt_watchdog_reset(struct unit_test_state *uts) { @@ -86,8 +118,8 @@ static int dm_test_wdt_watchdog_reset(struct unit_test_state *uts) uint reset_count; int val; - ut_assertok(uclass_get_device_by_driver(UCLASS_WDT, - DM_DRIVER_GET(wdt_gpio), &gpio_wdt)); + ut_assertok(uclass_get_device_by_name(UCLASS_WDT, + "wdt-gpio-toggle", &gpio_wdt)); ut_assertnonnull(gpio_wdt); ut_assertok(uclass_get_device_by_driver(UCLASS_WDT, DM_DRIVER_GET(wdt_sandbox), &sandbox_wdt)); -- 2.25.1

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[PATCH 1/1] avb: honor CONFIG_SYS_64BIT_LBA
by Heinrich Schuchardt 05 Jul '22

05 Jul '22

The size of lbaint_t depends on CONFIG_SYS_64BIT_LBA defined in common.h. common.h should always be included as first include. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt(a)canonical.com> --- common/avb_verify.c | 1 + 1 file changed, 1 insertion(+) diff --git a/common/avb_verify.c b/common/avb_verify.c index 0520a71455..6d11e31687 100644 --- a/common/avb_verify.c +++ b/common/avb_verify.c @@ -4,6 +4,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ +#include <common.h> #include <avb_verify.h> #include <blk.h> #include <cpu_func.h> -- 2.36.1

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uuu using u-boot-with-spl.imx
by Michael Nazzareno Trimarchi 05 Jul '22

05 Jul '22

Hi Fabio and Marek Trying to understand the reason why I can boot using imx_usb loader and not the uuu tool If I do: ./imx_usb SPL ./imx_usb u-boot-dtb.img It works U-Boot SPL 2022.07-rc5-00075-g01d253835a-dirty (Jul 04 2022 - 12:39: 11 +0200) >>SPL: board_init_r() spl_init Trying to boot from USB SDP SDP: initialize... SDP: handle requests... Downloading file of size 594824 to 0x877fffc0... done Jumping to header at 0x877fffc0 Header Tag is not an IMX image Found header at 0x877fffc0 image entry point: 0x87800000 U-Boot 2022.07-rc5-00075-g01d253835a-dirty (Jul 04 2022 - 12:39:11 + 0200) CPU: Freescale i.MX6ULL rev1.1 528 MHz (running at 396 MHz) CPU: Commercial temperature grade (0C to 95C) at 37C Reset cause: POR Model: BSH SMM M2 DRAM: 128 MiB Core: 29 devices, 14 uclasses, devicetree: separate NAND: 256 MiB MMC: FSL_SDHC: 1 Loading Environment from NAND... *** Warning - bad CRC, using defaul t environment In: serial@21f0000 Out: serial@21f0000 Err: serial@21f0000 Net: CPU Net Initialization Failed No ethernet found. Hit any key to stop autoboot If I tried with the combined image using uuu it does not work like that. U-Boot SPL 2022.07-rc5-00075-g01d253835a-dirty (Jul 04 2022 - 12:39: 11 +0200) >>SPL: board_init_r() spl_init Trying to boot from USB SDP SDP: initialize... SDP: handle requests... Downloading file of size 594824 to 0x877fffc0... done Jumping to header at 0x877fffc0 Header Tag is not an IMX image Found header at 0x877fffc0 image entry point: 0x87800000 Any idea? Michael

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[PATCH 1/1] xen: pvblock: honor CONFIG_SYS_64BIT_LBA
by Heinrich Schuchardt 04 Jul '22

04 Jul '22

CONFIG_SYS_64BIT_LBA is defined in common.h and used to define the size of lbaint_t in blk.h. On 32-bit system not including common.h first will lead to differences in the size of lbaint_t between modules. common.h should always be the first include. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt(a)canonical.com> --- cmd/pvblock.c | 2 +- drivers/xen/pvblock.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/cmd/pvblock.c b/cmd/pvblock.c index 56ce8b18d5..ccdd6304af 100644 --- a/cmd/pvblock.c +++ b/cmd/pvblock.c @@ -5,8 +5,8 @@ * XEN para-virtualized block device support */ -#include <blk.h> #include <common.h> +#include <blk.h> #include <command.h> /* Current I/O Device */ diff --git a/drivers/xen/pvblock.c b/drivers/xen/pvblock.c index c25c3ea4ff..c0a156fbf7 100644 --- a/drivers/xen/pvblock.c +++ b/drivers/xen/pvblock.c @@ -6,8 +6,8 @@ #define LOG_CATEGORY UCLASS_PVBLOCK -#include <blk.h> #include <common.h> +#include <blk.h> #include <dm.h> #include <dm/device-internal.h> #include <malloc.h> -- 2.36.1

2 2

Building host tools on Windows
by Martin Bonner 04 Jul '22

04 Jul '22

I am trying to build the host tools on Windows, and I have hit a road block. Specifically, I get the output: HOSTCC tools/mkeficapsule tools/mkeficapsule.c:18:10: fatal error: uuid/uuid.h: No such file or directory 18 | #include <uuid/uuid.h> Steps so far: Download latest msys Double upgrade with "pacman -Syu" pacman -S gcc make bison diffutils openssl-devel pacman -S git git clone from denx.de pacman -S flex (because make complained "flex was missing" Now I have the above error. I am not familiar with MSYS packages - I have tried "e2fsprogs" and "uuid-dev" but neither are found. Which package do I need to include? Martin

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