May 2022 - U-Boot

[PATCH] usb: eth: lan78xx: Fix logic in lan78xx_read_otp() to avoid a warning
by Tom Rini 20 Jun '23

20 Jun '23

In lan78xx_read_otp() we want to know if sig is LAN78XX_OTP_INDICATOR_1 or LAN78XX_OTP_INDICATOR_2. In the case of matching the first one we set offset to itself, and clang warns about this. Rework the logic so that if sig is the second indicator we adjust the offset as today and if it does not match the first indicator we return -EINVAL Cc: Marek Vasut <marex(a)denx.de> Signed-off-by: Tom Rini <trini(a)konsulko.com> --- drivers/usb/eth/lan78xx.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/usb/eth/lan78xx.c b/drivers/usb/eth/lan78xx.c index e34ad2603fbb..d147412990de 100644 --- a/drivers/usb/eth/lan78xx.c +++ b/drivers/usb/eth/lan78xx.c @@ -146,11 +146,9 @@ static int lan78xx_read_otp(struct usb_device *udev, u32 offset, ret = lan78xx_read_raw_otp(udev, 0, 1, &sig); if (!ret) { - if (sig == LAN78XX_OTP_INDICATOR_1) - offset = offset; - else if (sig == LAN78XX_OTP_INDICATOR_2) + if (sig == LAN78XX_OTP_INDICATOR_2) offset += 0x100; - else + else if (sig != LAN78XX_OTP_INDICATOR_1) return -EINVAL; ret = lan78xx_read_raw_otp(udev, offset, length, data); if (ret) -- 2.17.1

2 2

[PATCH] ARM: imx: Fix parsing of ROM log event IDs on iMX8M
by fedorross＠gmail.com 21 May '23

21 May '23

From: Fedor Ross <fedor.ross(a)ifm.com> It seems like the ROM log events for the iMX8M are not fully covered by AN12853 i.MX ROMs Log Events, Rev. 0, May 2020. On iMX8M the ROM event ID 0x82 seems to use parameter0 which stops the parsing because the end of list is detected too early. This patch adds ROM event ID 0x82 and skips the next word if ID 0x82 is parsed. Fixes: a5ee05cf71 ("ARM: imx: Pick correct eMMC boot partition from ROM log") Signed-off-by: Fedor Ross <fedor.ross(a)ifm.com> Cc: Fabio Estevam <festevam(a)gmail.com> Cc: Marek Vasut <marex(a)denx.de> Cc: Peng Fan <peng.fan(a)nxp.com> Cc: Stefano Babic <sbabic(a)denx.de> --- arch/arm/mach-imx/imx8m/soc.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c index 8171631db1..4df57cb150 100644 --- a/arch/arm/mach-imx/imx8m/soc.c +++ b/arch/arm/mach-imx/imx8m/soc.c @@ -677,6 +677,7 @@ int spl_mmc_emmc_boot_partition(struct mmc *mmc) /* Log entries with 1 parameter, skip 1 */ case 0x80: /* Start to perform the device initialization */ case 0x81: /* The boot device initialization completes */ + case 0x82: /* Starts to execute boot device driver pre-config */ case 0x8f: /* The boot device initialization fails */ case 0x90: /* Start to read data from boot device */ case 0x91: /* Reading data from boot device completes */ -- 2.20.1

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[PATCH v2 00/18] virtio: pci: Add and fix consistency checks
by Andrew Scull 24 Apr '23

24 Apr '23

The virtio PCI drivers forgo a number of consistency checks, particularly around pointer validation and bounds checking. This series focuses on the modern driver to add those checks. The start of the series adds and fixes some basic bounds checks. Later patches ensure PCI addresses fall within the expected regions rather than any arbitrary address. This is acheived by introducing range parameters to a few of the dm_pci_* functions that allow the ranges to be checked. The series also adds a few new configs to allow parts of virtio and PCI to be disabled where the features may be unused and the current implementations don't have the needed consistencty checks. Changelog: v2: - Refactor dm_pci_* functions, not adding new ones - Reorder patches per request in v1 Andrew Scull (18): virtio: pci: Allow exclusion of legacy driver virtio: pci: Fix discovery of device config length virtio: pci: Bounds check device config access virtio: pci: Bounds check notification writes virtio: pci: Check virtio common config size virtio: pci: Check virtio capability is in bounds virtio: pci: Read entire capability into memory pci: Fix use of flags in dm_pci_map_bar() pci: Add config for Enhanced Allocation pci: Check region ranges are addressable pci: Range check address conversions test: pci: Test PCI address conversion functions pci: Map bars with offset and length pci: Match region flags using a mask pci: Update dm_pci_bus_to_virt() parameters pci: Add mask parameter to dm_pci_map_bar() virtio: pci: Check virtio configs are mapped virtio: pci: Make use of dm_pci_map_bar() arch/sandbox/dts/test.dts | 2 +- arch/x86/cpu/baytrail/cpu.c | 2 +- drivers/ata/ahci.c | 9 +- drivers/bios_emulator/atibios.c | 4 +- drivers/gpio/octeon_gpio.c | 2 +- drivers/i2c/designware_i2c_pci.c | 3 +- drivers/i2c/intel_i2c.c | 2 +- drivers/i2c/octeon_i2c.c | 2 +- drivers/mmc/octeontx_hsmmc.c | 2 +- drivers/mmc/pci_mmc.c | 2 +- drivers/mtd/nand/raw/octeontx_bch.c | 6 +- drivers/mtd/nand/raw/octeontx_nand.c | 2 +- drivers/net/bnxt/bnxt.c | 9 +- drivers/net/fsl_enetc.c | 2 +- drivers/net/fsl_enetc_mdio.c | 2 +- drivers/net/mscc_eswitch/felix_switch.c | 4 +- drivers/net/octeontx/bgx.c | 2 +- drivers/net/octeontx/nic_main.c | 2 +- drivers/net/octeontx/nicvf_main.c | 2 +- drivers/net/octeontx/smi.c | 2 +- drivers/net/octeontx2/cgx.c | 2 +- drivers/net/octeontx2/rvu_af.c | 2 +- drivers/net/octeontx2/rvu_pf.c | 3 +- drivers/net/pch_gbe.c | 2 +- drivers/nvme/nvme_pci.c | 4 +- drivers/pci/Kconfig | 7 + drivers/pci/pci-uclass.c | 197 +++++++++++------------- drivers/spi/octeon_spi.c | 2 +- drivers/usb/host/ohci-pci.c | 2 +- drivers/virtio/Kconfig | 9 ++ drivers/virtio/Makefile | 3 +- drivers/virtio/virtio_pci_legacy.c | 3 +- drivers/virtio/virtio_pci_modern.c | 143 +++++++++++------ include/pci.h | 49 ++++-- test/dm/pci.c | 118 +++++++++++++- 35 files changed, 399 insertions(+), 210 deletions(-) -- 2.35.1.1021.g381101b075-goog

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[PATCH] pci: Handle failed calloc in decode_regions()
by Pierre-Clément Tosi 22 Mar '23

22 Mar '23

Add a check for calloc() failing to allocate the requested memory. Make decode_regions() return an error code. Cc: Bin Meng <bmeng.cn(a)gmail.com> Cc: Simon Glass <sjg(a)chromium.org> Cc: Stefan Roese <sr(a)denx.de> Signed-off-by: Pierre-Clément Tosi <ptosi(a)google.com> --- drivers/pci/pci-uclass.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c index 970ee1adf1..2c85e78a13 100644 --- a/drivers/pci/pci-uclass.c +++ b/drivers/pci/pci-uclass.c @@ -954,7 +954,7 @@ int pci_bind_bus_devices(struct udevice *bus) return 0; } -static void decode_regions(struct pci_controller *hose, ofnode parent_node, +static int decode_regions(struct pci_controller *hose, ofnode parent_node, ofnode node) { int pci_addr_cells, addr_cells, size_cells; @@ -968,7 +968,7 @@ static void decode_regions(struct pci_controller *hose, ofnode parent_node, prop = ofnode_get_property(node, "ranges", &len); if (!prop) { debug("%s: Cannot decode regions\n", __func__); - return; + return -EINVAL; } pci_addr_cells = ofnode_read_simple_addr_cells(node); @@ -986,6 +986,8 @@ static void decode_regions(struct pci_controller *hose, ofnode parent_node, max_regions = len / cells_per_record + CONFIG_NR_DRAM_BANKS; hose->regions = (struct pci_region *) calloc(1, max_regions * sizeof(struct pci_region)); + if (!hose->regions) + return -ENOMEM; for (i = 0; i < max_regions; i++, len -= cells_per_record) { u64 pci_addr, addr, size; @@ -1053,7 +1055,7 @@ static void decode_regions(struct pci_controller *hose, ofnode parent_node, /* Add a region for our local memory */ bd = gd->bd; if (!bd) - return; + return 0; for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) { if (bd->bi_dram[i].size) { @@ -1068,7 +1070,7 @@ static void decode_regions(struct pci_controller *hose, ofnode parent_node, } } - return; + return 0; } static int pci_uclass_pre_probe(struct udevice *bus) @@ -1097,7 +1099,10 @@ static int pci_uclass_pre_probe(struct udevice *bus) /* For bridges, use the top-level PCI controller */ if (!device_is_on_pci_bus(bus)) { hose->ctlr = bus; - decode_regions(hose, dev_ofnode(bus->parent), dev_ofnode(bus)); + ret = decode_regions(hose, dev_ofnode(bus->parent), + dev_ofnode(bus)); + if (ret) + return ret; } else { struct pci_controller *parent_hose; -- 2.36.1.124.g0e6072fb45-goog

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kwboot: Marvell Dove UART booting
by Tony Dinh 20 Mar '23

20 Mar '23

Hi all, With great help from Pali, I've made some good progress on kwboot the HP Thin Client T5335z (Marvell Dove SoC) board. I had been unsuccessful running kwboot with this box until Pali pointed out a few important aspects of the Dove SoC, and how the BootROM commands work (my apology for forgetting to include the u-boot-mailing list and Marek on previous email exchanges). Here is the summary of the attempt to kwboot. HP Thin Client T5335z Marvell Dove SoC 88AP510 (A1) 1Ghz CPU 1 GB RAM - Reset Strapping: As with all Dove SoCs, there is no preamble when we send the u-boot image over the serial line. IOW, no magic handshake string to tell the BootROM that we are booting over UART. Instead, the hardware must explicitly set to UART mode booting. For boards like the Solidrun Cubox, there is a button, and some other board, a DIP switch, to enable this mode. For the T55335z, there is no button or DIP switch on the board for that purpose. Instead, there is a jumper (the exact purpose is unknown), but I found that this jumper will put the BootROM into debug mode. And from the BootROM debug prompt, we can execute a command to set the boot mode to UART with "x command. Here is the log and my commentary starting with *** <Begin log> *** With jumper inserted, serial console connected, start serial console # picocom --b 115200 --f n --p n --d 8 /dev/ttyUSB0 Terminal ready *** Hit <Enter> here to get to the prompt and execute "x 0x0E" Bootstrap 2.33> Bootstrap 2.33>x 0x0E *** No more input possible here, so Control-A-X to exit serial console Terminating... Thanks for using picocom *** Run kwboot # kwboot -t -p -B 115200 /dev/ttyUSB0 -D /localdisk/mtd0.t5335z Patching image boot signature to UART Aligning image header to Xmodem block size Waiting 2s and flushing tty Sending boot image header (512 bytes)... 25 % [.... ] Done Sending boot image data (607664 bytes)... 0 % [......................................................................] 1 % [......................................................................] 2 % [......................................................................] <snip> 95 % [......................................................................] 97 % [......................................................................] 98 % [.......................................................... ] Done Finishing transfer [Type Ctrl-\ + c to quit] *** Hung here! BootROM did not execute the image payload. *** *** The file mtd0.t5335z is a dd dump from the SPI flash mtd0 with *** this command: *** # dd if=/dev/mtd0 of=mtd0.t5335z bs=768k conv=sync <End log> - Pali's observation: It looks like Dove uses kwbimage v0 format with extensions, at least according to Function Spec. See 'Binary Code Extension' and 'Header Extension'. Currently kwboot and kwbimage supports v0 image only with one extension. - My comments in response: Indeed. I've seen that in the Functional Spec, too. The mdt0 binwalk also shows what looks like the extension header. DECIMAL HEXADECIMAL DESCRIPTION -------------------------------------------------------------------------------- 118161 0x1CD91 Certificate in DER format (x509 v3), header length: 4, sequence length: 3 199169 0x30A01 Certificate in DER format (x509 v3), header length: 4, sequence length: 5464 380652 0x5CEEC CRC32 polynomial table, little endian 387072 0x5E800 CRC32 polynomial table, little endian 608166 0x947A6 LZMA compressed data, properties: 0x66, dictionary size: 0 bytes, uncompressed size: 147351982848 bytes Thanks, Tony

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[PATCH 00/17] patman: Convert camel case
by Simon Glass 01 Mar '23

01 Mar '23

Much of the Python code in U-Boot was written using the Chromium OS Python style. This series converts the patman class methods and functions from camel case to snake case. This fits with PEP8 and is one step along the way to making the code more compliant with that. Simon Glass (17): patman: Convert camel case in tools.py patman: Convert camel case in command.py patman: Convert camel case in checkpatch.py patman: Convert camel case in commit.py patman: Convert camel case in cros_subprocess.py patman: Convert camel case in func_test.py patman: Convert camel case in get_maintainer.py patman: Convert camel case in gitutil.py patman: Convert camel case in project.py patman: Convert camel case in test_checkpatch.py patman: Convert camel case in test_util.py patman: Convert camel case in tout.py patman: Rename Print() to Tprint() patman: Rename Color() method to build() patman: Convert camel case in terminal.py patman: Update with new pylint scores RFC: tools: Add a camel-case conversion script scripts/pylint.base | 26 +- scripts/style.py | 180 +++++++++++ tools/binman/bintool.py | 30 +- tools/binman/bintool_test.py | 34 +- tools/binman/btool/lz4.py | 8 +- tools/binman/btool/lzma_alone.py | 16 +- tools/binman/cbfs_util.py | 12 +- tools/binman/cbfs_util_test.py | 20 +- tools/binman/control.py | 74 ++--- tools/binman/elf.py | 20 +- tools/binman/elf_test.py | 20 +- tools/binman/entry.py | 42 +-- tools/binman/entry_test.py | 4 +- tools/binman/etype/atf_fip.py | 2 +- tools/binman/etype/blob.py | 4 +- tools/binman/etype/blob_ext_list.py | 2 +- tools/binman/etype/fdtmap.py | 2 +- tools/binman/etype/files.py | 2 +- tools/binman/etype/fill.py | 2 +- tools/binman/etype/fit.py | 20 +- tools/binman/etype/fmap.py | 6 +- tools/binman/etype/gbb.py | 10 +- tools/binman/etype/intel_ifwi.py | 12 +- tools/binman/etype/mkimage.py | 8 +- tools/binman/etype/section.py | 26 +- tools/binman/etype/text.py | 4 +- tools/binman/etype/u_boot_elf.py | 6 +- tools/binman/etype/u_boot_env.py | 4 +- tools/binman/etype/u_boot_spl_bss_pad.py | 4 +- tools/binman/etype/u_boot_spl_expanded.py | 2 +- tools/binman/etype/u_boot_tpl_bss_pad.py | 4 +- tools/binman/etype/u_boot_tpl_expanded.py | 2 +- tools/binman/etype/u_boot_ucode.py | 4 +- tools/binman/etype/u_boot_with_ucode_ptr.py | 2 +- tools/binman/etype/vblock.py | 10 +- tools/binman/fdt_test.py | 4 +- tools/binman/fip_util.py | 16 +- tools/binman/fip_util_test.py | 36 +-- tools/binman/fmap_util.py | 2 +- tools/binman/ftest.py | 324 ++++++++++---------- tools/binman/image.py | 16 +- tools/binman/main.py | 6 +- tools/binman/state.py | 34 +- tools/buildman/builder.py | 108 +++---- tools/buildman/builderthread.py | 12 +- tools/buildman/control.py | 46 +-- tools/buildman/func_test.py | 20 +- tools/buildman/test.py | 30 +- tools/buildman/toolchain.py | 26 +- tools/dtoc/fdt.py | 4 +- tools/dtoc/fdt_util.py | 12 +- tools/dtoc/main.py | 6 +- tools/dtoc/test_dtoc.py | 76 ++--- tools/dtoc/test_fdt.py | 34 +- tools/dtoc/test_src_scan.py | 12 +- tools/patman/checkpatch.py | 36 +-- tools/patman/command.py | 30 +- tools/patman/commit.py | 10 +- tools/patman/control.py | 20 +- tools/patman/cros_subprocess.py | 59 ++-- tools/patman/func_test.py | 74 ++--- tools/patman/get_maintainer.py | 8 +- tools/patman/gitutil.py | 176 +++++------ tools/patman/main.py | 8 +- tools/patman/patchstream.py | 12 +- tools/patman/project.py | 4 +- tools/patman/series.py | 32 +- tools/patman/settings.py | 4 +- tools/patman/status.py | 22 +- tools/patman/terminal.py | 56 ++-- tools/patman/test_checkpatch.py | 80 ++--- tools/patman/test_util.py | 8 +- tools/patman/tools.py | 86 +++--- tools/patman/tout.py | 58 ++-- tools/rmboard.py | 16 +- 75 files changed, 1214 insertions(+), 1033 deletions(-) create mode 100755 scripts/style.py -- 2.35.0.rc2.247.g8bbb082509-goog

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[PATCH v1 00/11] rockchip fixes and extend rk3568 support
by Peter Geis 27 Feb '23

27 Feb '23

to: Simon Glass <sjg(a)chromium.org> to: Philipp Tomsich <philipp.tomsich(a)vrull.eu> to: Kever Yang <kever.yang(a)rock-chips.com> to: Lukasz Majewski <lukma(a)denx.de> to: Sean Anderson <seanga2(a)gmail.com> to: Peng Fan <peng.fan(a)nxp.com> to: Jaehoon Chung <jh80.chung(a)samsung.com> to: Heiko Stübner <heiko(a)sntech.de> cc: u-boot(a)lists.denx.de Good Evening, The following is a few patches for rockchip mainline u-boot support. Patches 1-3 are fixes for the rk3568 reset handler, rockchip emmc dma to sram, and building the rockchip-sfc driver. Patch 4 adds a sanity check for the minimum sfc frequency. Patch 5 and 6 add adc support to spl and enable the rockchip recovery handler in spl, before attempting to load u-boot. Patch 7 enables rk3568 spl bootrom device detection. Patch 8 enables automatic clock gating and other power saving features on rk3568, which solves the chip running hotter compared to downstream. Patch 9 and 10 move the dwc3 platform data to the chip specific code and enable dwc3 otg support on rk3568. Patch 11 is an RFC patch for fixing ram detection on rk3568. Downstream goes about this a different way, where they implemented a special library to handle this. Please review and *especially test* patch 11. Very Respectfully, Peter Geis Peter Geis (11): clk: rockchip: rk3568: fix reset handler mmc: sdhci: allow disabling sdma in spl spi: rockchip-sfc: fix building rockchip-sfc spi: rockchip-sfc: sanity check minimum freq spl: support adc drivers in spl rockchip: handle bootrom recovery mode in spl rockchip: rk3568: add boot device detection rockchip: rk3568: enable automatic clock gating rockchip: move dwc3 config to chip specific handler rockchip: rk3568: add dwc3 otg support [RFC] rockchip: rk356x: attempt to fix ram detection arch/arm/mach-rockchip/Kconfig | 1 + arch/arm/mach-rockchip/Makefile | 6 +- arch/arm/mach-rockchip/board.c | 24 ------ arch/arm/mach-rockchip/boot_mode.c | 4 +- arch/arm/mach-rockchip/rk3399/rk3399.c | 29 +++++++ arch/arm/mach-rockchip/rk3568/rk3568.c | 112 +++++++++++++++++++++++++ arch/arm/mach-rockchip/sdram.c | 19 +++-- common/board_f.c | 7 ++ common/spl/Kconfig | 5 ++ drivers/Makefile | 1 + drivers/clk/rockchip/clk_rk3568.c | 2 + drivers/mmc/Kconfig | 7 ++ drivers/mmc/sdhci.c | 6 +- drivers/spi/rockchip_sfc.c | 6 ++ include/configs/rk3568_common.h | 5 ++ 15 files changed, 197 insertions(+), 37 deletions(-) -- 2.25.1

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[PATCH 0/3] Introduce new sign binman's option
by Ivan Mikhaylov 18 Feb '23

18 Feb '23

From: Ivan Mikhaylov <ivan.mikhaylov(a)siemens.com> This patch introduces prototype of new sign binman's option. Enhancing the sign procedure, as example: mkimage -G privateky -r -o sha256,rsa4096 -F fit.fit binman replace -i flash.bin -f fit.fit fit into: binman sign -i flash.bin -k privatekey -a sha256,rsa4096 -f fit.fit fit It works with extracted FIT container and image, which provides key signing and replacing FIT container in directed image. Also, I'll add additional enhancement in future to this procedure with skipping on FIT container and providing extract->sign->replace in whole instead of sign->replace with documentation update and test as well. As example: binman sign -i flash.bin -k privatekey -a sha256,rsa4096 -f fit Ivan Mikhaylov (3): binman: add sign option for binman binman: add documentation for binman sign option binman: add test for sign option tools/binman/binman.rst | 10 +++++ tools/binman/cmdline.py | 13 ++++++ tools/binman/control.py | 26 +++++++++++- tools/binman/ftest.py | 42 +++++++++++++++++++ tools/binman/test/225_fit_sign.dts | 67 ++++++++++++++++++++++++++++++ 5 files changed, 157 insertions(+), 1 deletion(-) create mode 100644 tools/binman/test/225_fit_sign.dts -- 2.35.1

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bind/unbind command not working for usb_ether
by Tim Harvey 15 Feb '23

15 Feb '23

Greetings, I'm trying to understand how to use the U-Boot bind command to bind the usb_ether driver to the usb class to register a USB ethernet gadget network device as referenced in: commit 02291d83fdaaf ("doc: add bind/unbind command documentation") commit 49c752c93a78 ("cmd: Add bind/unbind commands to bind a device to a driver from the command line") I have enabled: CONFIG_DM_USB=y CONFIG_USB_GADGET=y CONFIG_USB_ETHER=y However the 'usb_ether' driver is never registered and thus doesn't appear in a 'dm tree' list and can't be bound to the usb controller. With the help of Heiko I've found two ways to get the usb_ether driver to register: dt-way: - add of match in ether.c: diff --git a/drivers/usb/gadget/ether.c b/drivers/usb/gadget/ether.c index 63d552bc8b..8e2a05a5af 100644 --- a/drivers/usb/gadget/ether.c +++ b/drivers/usb/gadget/ether.c @@ -2690,10 +2690,16 @@ int usb_ether_init(void) return 0; } +static const struct udevice_id usb_ether_ids[] = { + { .compatible = "gadget,usb_ether" }, + { } +}; + U_BOOT_DRIVER(eth_usb) = { .name = "usb_ether", .id = UCLASS_ETH, .probe = usb_eth_probe, + .of_match = usb_ether_ids, .ops = &usb_eth_ops, .priv_auto_alloc_size = sizeof(struct ether_priv), .platdata_auto_alloc_size = sizeof(struct eth_pdata), - then add it directly in your board u-boot.dts: +&usbotg1 { + usb_ether0 { + compatible = "gadget,usb_ether"; + status = "okay"; + }; +}; The non-dt way: - bind it manually in board code with: { struct udevice *dev; struct udevice *usb_dev; int ret; ret = uclass_first_device(UCLASS_USB, &usb_dev); if (!usb_dev || ret) printf("%s: No USB device found\n", __func__); ret = device_bind_driver(usb_dev, "usb_ether", "usb_ether", &dev); if (!dev || ret) printf("%s: usb - not able to bind usb_ether device\n", __func__); } - Note that this is the same code from usb_ether_init() but with UCLASS_USB instead of UCLASS_USB_GADGET_GENERIC What is the intended way to bind the usb_ether gadget device at runtime? Additionally Heiko found that once bound and usb_ether is registered as a network device using a network command like ping/tftpboot calls usb_setup_ehci_gadget() which removes the USB driver ... and so also the child usb ethernet gadget device then re-probes only the usb driver and not the gadget thus fails. I compared this to how the 'ums' command works and that also removes the usb driver and child nodes but because ums isn't a gadget driver it doesn't get removed and works. Best Regards, Tim

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[PATCH v2] riscv: cancel the limitation that NR_CPUS is less than or equal to 32
by Xiang W 13 Feb '23

13 Feb '23

Various specifications of riscv allow the number of hart to be greater than 32. The limit of 32 is determined by gd->arch.available_harts. We can eliminate this limitation through bitmaps. Currently, the number of hart is limited to 4095, and 4095 is the limit of the RISC-V Advanced Core Local Interruptor Specification. Test on sifive unmatched. Signed-off-by: Xiang W <wxjstz(a)126.com> --- Changes since v1: * When NR_CPUS is very large, the value of GD_AVAILABLE_HARTS will overflow the immediate range of ld/lw. This patch fixes this problem arch/riscv/Kconfig | 4 ++-- arch/riscv/cpu/start.S | 21 ++++++++++++++++----- arch/riscv/include/asm/global_data.h | 4 +++- arch/riscv/lib/smp.c | 2 +- 4 files changed, 22 insertions(+), 9 deletions(-) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index ba29e70acf..7b9c7f5bca 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -220,8 +220,8 @@ config SPL_SMP all, single processor machines. config NR_CPUS - int "Maximum number of CPUs (2-32)" - range 2 32 + int "Maximum number of CPUs (2-4095)" + range 2 4095 depends on SMP || SPL_SMP default 8 help diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S index 76850ec9be..92f3b78f29 100644 --- a/arch/riscv/cpu/start.S +++ b/arch/riscv/cpu/start.S @@ -166,11 +166,22 @@ wait_for_gd_init: mv gp, s0 /* register available harts in the available_harts mask */ - li t1, 1 - sll t1, t1, tp - LREG t2, GD_AVAILABLE_HARTS(gp) - or t2, t2, t1 - SREG t2, GD_AVAILABLE_HARTS(gp) + li t1, GD_AVAILABLE_HARTS + add t1, t1, gp + LREG t1, 0(t1) +#if defined(CONFIG_ARCH_RV64I) + srli t2, tp, 6 + slli t2, t2, 3 +#elif defined(CONFIG_ARCH_RV32I) + srli t2, tp, 5 + slli t2, t2, 2 +#endif + add t1, t1, t2 + LREG t2, 0(t1) + li t3, 1 + sll t3, t3, tp + or t2, t2, t3 + SREG t2, 0(t1) amoswap.w.rl zero, zero, 0(t0) diff --git a/arch/riscv/include/asm/global_data.h b/arch/riscv/include/asm/global_data.h index 095484a635..6de2ee0b25 100644 --- a/arch/riscv/include/asm/global_data.h +++ b/arch/riscv/include/asm/global_data.h @@ -10,9 +10,11 @@ #ifndef __ASM_GBL_DATA_H #define __ASM_GBL_DATA_H +#include <config.h> #include <asm/smp.h> #include <asm/u-boot.h> #include <compiler.h> +#include <linux/bitops.h> /* Architecture-specific global data */ struct arch_global_data { @@ -28,7 +30,7 @@ struct arch_global_data { struct ipi_data ipi[CONFIG_NR_CPUS]; #endif #ifndef CONFIG_XIP - ulong available_harts; + ulong available_harts[BITS_TO_LONGS(CONFIG_NR_CPUS)]; #endif }; diff --git a/arch/riscv/lib/smp.c b/arch/riscv/lib/smp.c index ba992100ad..e8e391fd41 100644 --- a/arch/riscv/lib/smp.c +++ b/arch/riscv/lib/smp.c @@ -47,7 +47,7 @@ static int send_ipi_many(struct ipi_data *ipi, int wait) #ifndef CONFIG_XIP /* skip if hart is not available */ - if (!(gd->arch.available_harts & (1 << reg))) + if (!test_bit(reg, gd->arch.available_harts)) continue; #endif -- 2.30.2

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