April 2022 - U-Boot

[PATCH v2] boot: don't enable the non-secure boot commands by default if secure boot enabled
by Rover Mo 12 Apr '22

12 Apr '22

To prevent booting unsigned images, don't enable the non-secure boot commands(booti, bootz .etc) by default if secure boot enabled. Signed-off-by: Rover Mo <myzmzz(a)126.com> Cc: Heinrich Schuchardt <xypron.glpk(a)gmx.de> Cc: Simon Glass <sjg(a)chromium.org> --- Changes for v2: - Don't enable the non-secure boot commands too if !EFI_SECURE_BOOT - Update the help information - Changed commit title cmd/Kconfig | 11 +++++++++-- common/Kconfig.boot | 2 +- 2 files changed, 10 insertions(+), 3 deletions(-) diff --git a/cmd/Kconfig b/cmd/Kconfig index 5b30b13e43..98c588e638 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -203,15 +203,22 @@ config BOOTM_EFI config CMD_BOOTZ bool "bootz" + default y if !FIT_SIGNATURE && !EFI_SECURE_BOOT help Boot the Linux zImage + The bootz command is used for launching unsigned Linux zImage. + If you want to have secure boot either via signed FIT images or via + signed UEFI images, this option should be disabled. config CMD_BOOTI bool "booti" depends on ARM64 || RISCV - default y + default y if !FIT_SIGNATURE && !EFI_SECURE_BOOT help - Boot an AArch64 Linux Kernel image from memory. + Boot an AArch64/RISC-V Linux Kernel image from memory. + The booti command is used for launching unsigned AArch64 and RISC-V + Linux kernel images. If you want to have secure boot either via signed + FIT images or via signed UEFI images, this option should be disabled. config BOOTM_LINUX bool "Support booting Linux OS images" diff --git a/common/Kconfig.boot b/common/Kconfig.boot index a8d4be23a9..574f35b42e 100644 --- a/common/Kconfig.boot +++ b/common/Kconfig.boot @@ -283,7 +283,7 @@ endif # FIT config LEGACY_IMAGE_FORMAT bool "Enable support for the legacy image format" - default y if !FIT_SIGNATURE + default y if !FIT_SIGNATURE && !EFI_SECURE_BOOT help This option enables the legacy image format. It is enabled by default for backward compatibility, unless FIT_SIGNATURE is -- 2.25.1

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[PATCH 1/3] armv8: Include <linux/types.h> in mmu.h
by Pierre-Clément Tosi 12 Apr '22

12 Apr '22

Import missing definition of type u64. Fixes: 22932ffc03e5 ("ARMv8: Adjust MMU setup") Signed-off-by: Pierre-Clément Tosi <ptosi(a)google.com> Cc: Tom Rini <trini(a)konsulko.com> Cc: York Sun <yorksun(a)freescale.com> --- arch/arm/include/asm/armv8/mmu.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/include/asm/armv8/mmu.h b/arch/arm/include/asm/armv8/mmu.h index fc97c55114..517300e566 100644 --- a/arch/arm/include/asm/armv8/mmu.h +++ b/arch/arm/include/asm/armv8/mmu.h @@ -104,6 +104,9 @@ #define TCR_EL3_RSVD (1 << 31 | 1 << 23) #ifndef __ASSEMBLY__ + +#include <linux/types.h> + static inline void set_ttbr_tcr_mair(int el, u64 table, u64 tcr, u64 attr) { asm volatile("dsb sy"); -- 2.35.1.1021.g381101b075-goog

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[PATCH] linux/mtd/mtd.h: Add <dm/ofnode.h>
by Tom Rini 11 Apr '22

11 Apr '22

We need to know where the typedef of 'ofnode' comes from. Fixes: c86a4de8df61 ("mtd: Add flash_node in struct mtd_info") Signed-off-by: Tom Rini <trini(a)konsulko.com> --- include/linux/mtd/mtd.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h index af45e63bf9c1..ff635bd71681 100644 --- a/include/linux/mtd/mtd.h +++ b/include/linux/mtd/mtd.h @@ -25,6 +25,7 @@ #if IS_ENABLED(CONFIG_DM) #include <dm/device.h> #endif +#include <dm/ofnode.h> #define MAX_MTD_DEVICES 32 #endif -- 2.25.1

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[RFC PATCH v2] arm: kirkwood: nsa310s: Use Marvell uclass mvgbe and PHY driver for DM Ethernet
by Tony Dinh 11 Apr '22

11 Apr '22

Hi all, This is a work-in-progress patch, to clean up the DM Ethernet code for the Zyxel NSA310S board (Kirkwood 88F6702 A1). This NSA310s board Ethernet has some quirks that it does not work quite the same way as other Kirwood boards with the similar network chip (MV88E1318), such as the Sheevaplug and the Dreamplug. Currently, in the NSA310S board file we use CONFIG_RESET_PHY_R to execute reset_phy() during initialization. And the reset_phy() code in this board file is ad-hoc, does not involve Marvell PHY driver (which it should be). So I'm following the same pattern that I've done for the Sheevaplug: use the uclass drivers/net/mvgbe.c (CONFIG_MVGBE) to bring up Ethernet, removing the reset_phy() code, and enable CONFIG_PHY_MARVEL. With this board, I could not get it to work the same way as for the Sheevaplug to bring up the PHY automatically. I had to insert the ad-hoc code to set RGMII delay in the __mvgbe_phy_init() function in mvgbe.c, so the phy_connect() call will find the PHY. The PHY Id is 1410e90, same as in the Sheevaplug and Dreamplug. Please see this in the patch below (it's only a hack to see the PHY can be brought up this way). With the Sheevaplug and Dreamplug, there is no need to do this hack. The uclass mvgbe did all the work, by the time phy_connect() is executed, the PHY was already up and working fine. And then the Marvell PHY driver kicks in, setting up the rest. Perhaps we need code in the uclass MVGBE that handles this in a generic way? These are the Marvell PHY driver functions invoked after phy_connect() was successful. This happens in all 3 boards (Sheevaplug, Dreamplug, and NSA310s). m88e1310_config m88e1011s_startup I would appreciate hearing some explanation and perhaps some suggestion/guidance about this topic. Thanks, Tony Signed-off-by: Tony Dinh <mibodhi(a)gmail.com> --- Changes in v2: Cleanup patch formatting arch/arm/dts/kirkwood-nsa310s.dts | 1 + board/zyxel/nsa310s/nsa310s.c | 120 +++++++++--------------------- board/zyxel/nsa310s/nsa310s.h | 46 ------------ configs/nsa310s_defconfig | 3 + drivers/net/mvgbe.c | 18 +++++ include/configs/nsa310s.h | 15 ++-- 6 files changed, 62 insertions(+), 141 deletions(-) delete mode 100644 board/zyxel/nsa310s/nsa310s.h diff --git a/arch/arm/dts/kirkwood-nsa310s.dts b/arch/arm/dts/kirkwood-nsa310s.dts index e1c9c9080c..09ee76c2a2 100644 --- a/arch/arm/dts/kirkwood-nsa310s.dts +++ b/arch/arm/dts/kirkwood-nsa310s.dts @@ -306,6 +306,7 @@ status = "okay"; ethernet0-port@0 { phy-handle = <&ethphy0>; + phy-mode = "rgmii"; }; }; diff --git a/board/zyxel/nsa310s/nsa310s.c b/board/zyxel/nsa310s/nsa310s.c index b71de4e11f..8a45020bfa 100644 --- a/board/zyxel/nsa310s/nsa310s.c +++ b/board/zyxel/nsa310s/nsa310s.c @@ -1,22 +1,49 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2015, 2021 Tony Dinh <mibodhi(a)gmail.com> + * Copyright (C) 2015, 2021-2022 Tony Dinh <mibodhi(a)gmail.com> * Copyright (C) 2015 Gerald Kerma <dreagle(a)doukki.net> */ #include <common.h> #include <init.h> -#include <miiphy.h> -#include <net.h> +#include <netdev.h> #include <asm/arch/cpu.h> #include <asm/arch/soc.h> #include <asm/arch/mpp.h> #include <asm/global_data.h> #include <asm/io.h> -#include "nsa310s.h" +#include <linux/bitops.h> DECLARE_GLOBAL_DATA_PTR; +/* + * low GPIO's + */ +#define HDD1_GREEN_LED BIT(16) +#define HDD1_RED_LED BIT(13) +#define USB_GREEN_LED BIT(15) +#define USB_POWER BIT(21) +#define SYS_GREEN_LED BIT(28) +#define SYS_ORANGE_LED BIT(29) + +#define COPY_GREEN_LED BIT(22) +#define COPY_RED_LED BIT(23) + +#define PIN_USB_GREEN_LED 15 +#define PIN_USB_POWER 21 + +#define NSA310S_OE_LOW (~(0)) +#define NSA310S_VAL_LOW (SYS_GREEN_LED | USB_POWER) + +/* + * high GPIO's + */ +#define HDD2_GREEN_LED BIT(2) +#define HDD2_POWER BIT(1) + +#define NSA310S_OE_HIGH (~(0)) +#define NSA310S_VAL_HIGH (HDD2_POWER) + int board_early_init_f(void) { /* @@ -80,87 +107,8 @@ int board_init(void) return 0; } -static int fdt_get_phy_addr(const char *path) -{ - const void *fdt = gd->fdt_blob; - const u32 *reg; - const u32 *val; - int node, phandle, addr; - - /* Find the node by its full path */ - node = fdt_path_offset(fdt, path); - if (node >= 0) { - /* Look up phy-handle */ - val = fdt_getprop(fdt, node, "phy-handle", NULL); - if (val) { - phandle = fdt32_to_cpu(*val); - if (!phandle) - return -1; - /* Follow it to its node */ - node = fdt_node_offset_by_phandle(fdt, phandle); - if (node) { - /* Look up reg */ - reg = fdt_getprop(fdt, node, "reg", NULL); - if (reg) { - addr = fdt32_to_cpu(*reg); - return addr; - } - } - } - } - return -1; -} - -#ifdef CONFIG_RESET_PHY_R -void reset_phy(void) +int board_eth_init(struct bd_info *bis) { - u16 reg; - u16 phyaddr; - char *name = "ethernet-controller@72000"; - char *eth0_path = "/ocp@f1000000/ethernet-controller@72000/ethernet0-port@0"; - - if (miiphy_set_current_dev(name)) - return; - - phyaddr = fdt_get_phy_addr(eth0_path); - if (phyaddr < 0) - return; - - /* set RGMII delay */ - miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, MV88E1318_MAC_CTRL_PG); - miiphy_read(name, phyaddr, MV88E1318_MAC_CTRL_REG, &reg); - reg |= (MV88E1318_RGMII_RX_CTRL | MV88E1318_RGMII_TX_CTRL); - miiphy_write(name, phyaddr, MV88E1318_MAC_CTRL_REG, reg); - miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, 0); - - /* reset PHY */ - if (miiphy_reset(name, phyaddr)) - return; - - /* - * ZyXEL NSA310S uses the 88E1310S Alaska (interface identical to 88E1318) - * and has an MCU attached to the LED[2] via tristate interrupt - */ - - /* switch to LED register page */ - miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, MV88E1318_LED_PG); - /* read out LED polarity register */ - miiphy_read(name, phyaddr, MV88E1318_LED_POL_REG, &reg); - /* clear 4, set 5 - LED2 low, tri-state */ - reg &= ~(MV88E1318_LED2_4); - reg |= (MV88E1318_LED2_5); - /* write back LED polarity register */ - miiphy_write(name, phyaddr, MV88E1318_LED_POL_REG, reg); - /* jump back to page 0, per the PHY chip documenation. */ - miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, 0); - - /* set PHY back to auto-negotiation mode */ - miiphy_write(name, phyaddr, 0x4, 0x1e1); - miiphy_write(name, phyaddr, 0x9, 0x300); - /* downshift */ - miiphy_write(name, phyaddr, 0x10, 0x3860); - miiphy_write(name, phyaddr, 0x0, 0x9140); - - printf("MV88E1318 PHY initialized on %s\n", name); + printf("nsa310s.c: %s\n", __func__); + return cpu_eth_init(bis); } -#endif /* CONFIG_RESET_PHY_R */ diff --git a/board/zyxel/nsa310s/nsa310s.h b/board/zyxel/nsa310s/nsa310s.h deleted file mode 100644 index d8bd9a586f..0000000000 --- a/board/zyxel/nsa310s/nsa310s.h +++ /dev/null @@ -1,46 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2015 - * Gerald Kerma <dreagle(a)doukki.net> - * Tony Dinh <mibodhi(a)gmail.com> - */ - -#ifndef __NSA310S_H -#define __NSA310S_H - -/* low GPIO's */ -#define HDD1_GREEN_LED (1 << 16) -#define HDD1_RED_LED (1 << 13) -#define USB_GREEN_LED (1 << 15) -#define USB_POWER (1 << 21) -#define SYS_GREEN_LED (1 << 28) -#define SYS_ORANGE_LED (1 << 29) - -#define COPY_GREEN_LED (1 << 22) -#define COPY_RED_LED (1 << 23) - -#define PIN_USB_GREEN_LED 15 -#define PIN_USB_POWER 21 - -#define NSA310S_OE_LOW (~(0)) -#define NSA310S_VAL_LOW (SYS_GREEN_LED | USB_POWER) - -/* high GPIO's */ -#define HDD2_GREEN_LED (1 << 2) -#define HDD2_POWER (1 << 1) - -#define NSA310S_OE_HIGH (~(0)) -#define NSA310S_VAL_HIGH (HDD2_POWER) - -/* PHY related */ -#define MV88E1318_PGADR_REG 22 -#define MV88E1318_MAC_CTRL_PG 2 -#define MV88E1318_MAC_CTRL_REG 21 -#define MV88E1318_RGMII_TX_CTRL (1 << 4) -#define MV88E1318_RGMII_RX_CTRL (1 << 5) -#define MV88E1318_LED_PG 3 -#define MV88E1318_LED_POL_REG 17 -#define MV88E1318_LED2_4 (1 << 4) -#define MV88E1318_LED2_5 (1 << 5) - -#endif /* __NSA310S_H */ diff --git a/configs/nsa310s_defconfig b/configs/nsa310s_defconfig index 05a6761854..0745c2820c 100644 --- a/configs/nsa310s_defconfig +++ b/configs/nsa310s_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y +CONFIG_SYS_THUMB_BUILD=y CONFIG_ARCH_KIRKWOOD=y CONFIG_SYS_KWD_CONFIG="board/zyxel/nsa310s/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x600000 @@ -30,6 +31,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y CONFIG_CMD_JFFS2=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:0xe0000@0x0(uboot),0x20000@0xe0000(uboot_env),0x100000@0x100000(second_stage_uboot),-@0x200000(root)" @@ -47,6 +49,7 @@ CONFIG_SYS_SATA_MAX_DEVICE=1 # CONFIG_MMC is not set CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y +CONFIG_PHY_MARVELL=y CONFIG_DM_ETH=y CONFIG_MVGBE=y CONFIG_MII=y diff --git a/drivers/net/mvgbe.c b/drivers/net/mvgbe.c index 954bf86121..9429c2913b 100644 --- a/drivers/net/mvgbe.c +++ b/drivers/net/mvgbe.c @@ -726,6 +726,15 @@ static int mvgbe_recv(struct eth_device *dev) } #endif +#ifdef CONFIG_TARGET_NSA310S +/* PHY related */ +#define MV88E1318_PGADR_REG 22 +#define MV88E1318_MAC_CTRL_PG 2 +#define MV88E1318_MAC_CTRL_REG 21 +#define MV88E1318_RGMII_TX_CTRL BIT(4) +#define MV88E1318_RGMII_RX_CTRL BIT(5) +#endif + #if defined(CONFIG_PHYLIB) || defined(CONFIG_DM_ETH) #if defined(CONFIG_DM_ETH) static struct phy_device *__mvgbe_phy_init(struct udevice *dev, @@ -740,11 +749,20 @@ static struct phy_device *__mvgbe_phy_init(struct eth_device *dev, #endif { struct phy_device *phydev; + int reg; /* Set phy address of the port */ miiphy_write(dev->name, MV_PHY_ADR_REQUEST, MV_PHY_ADR_REQUEST, phyid); +#ifdef CONFIG_TARGET_NSA310S + miiphy_write(dev->name, phyid, MV88E1318_PGADR_REG, MV88E1318_MAC_CTRL_PG); + miiphy_read(dev->name, phyid, MV88E1318_MAC_CTRL_REG, &reg); + reg |= (MV88E1318_RGMII_RX_CTRL | MV88E1318_RGMII_TX_CTRL); + miiphy_write(dev->name, phyid, MV88E1318_MAC_CTRL_REG, reg); + miiphy_write(dev->name, phyid, MV88E1318_PGADR_REG, 0); +#endif + phydev = phy_connect(bus, phyid, dev, phy_interface); if (!phydev) { printf("phy_connect failed\n"); diff --git a/include/configs/nsa310s.h b/include/configs/nsa310s.h index ccf4519119..09a747f8af 100644 --- a/include/configs/nsa310s.h +++ b/include/configs/nsa310s.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright (C) 2015, 2021 Tony Dinh <mibodhi(a)gmail.com> + * Copyright (C) 2015, 2021-2022 Tony Dinh <mibodhi(a)gmail.com> * Copyright (C) 2015 * Gerald Kerma <dreagle(a)doukki.net> * Luka Perkov <luka.perkov(a)sartura.hr> @@ -11,8 +11,6 @@ #include "mv-common.h" -/* environment variables configuration */ - /* default environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ @@ -24,15 +22,14 @@ "bootargs_root=ubi.mtd=3 root=ubi0:rootfs rootfstype=ubifs rw\0" /* Ethernet driver configuration */ -#ifdef CONFIG_CMD_NET #define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ #define CONFIG_PHY_BASE_ADR 1 -#define CONFIG_RESET_PHY_R -#endif /* CONFIG_CMD_NET */ +#ifdef CONFIG_RESET_PHY_R +#undef CONFIG_RESET_PHY_R /* remove legacy reset_phy() */ +#endif -/* SATA driver configuration */ -#ifdef CONFIG_SATA +/* Support large HDDs for USB and SATA */ #define CONFIG_LBA48 -#endif /* CONFIG_SATA */ +#define CONFIG_SYS_64BIT_LBA #endif /* _CONFIG_NSA310S_H */ -- 2.30.2

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[PATCH 1/1] ubifs: Fix journal replay wrt. xattr nodes
by Ville Baillie 11 Apr '22

11 Apr '22

backport 1cb51a15b576ee325d527726afff40947218fd5e from Linux --- fs/ubifs/tnc.c | 25 +++++++++++++++++++++++-- 1 file changed, 23 insertions(+), 2 deletions(-) diff --git a/fs/ubifs/tnc.c b/fs/ubifs/tnc.c index e8b8f16838..3303711477 100644 --- a/fs/ubifs/tnc.c +++ b/fs/ubifs/tnc.c @@ -50,6 +50,11 @@ enum { NOT_ON_MEDIA = 3, }; +static int fallible_read_node(struct ubifs_info *c, const union ubifs_key *key, + struct ubifs_zbranch *zbr, void *node); +static int try_read_node(const struct ubifs_info *c, void *buf, int type, + int len, int lnum, int offs); + /** * insert_old_idx - record an index node obsoleted since the last commit start. * @c: UBIFS file-system description object @@ -402,7 +407,19 @@ static int tnc_read_node_nm(struct ubifs_info *c, struct ubifs_zbranch *zbr, return 0; } - err = ubifs_tnc_read_node(c, zbr, node); + if (c->replaying) { + err = fallible_read_node(c, &zbr->key, zbr, node); + /* + * When the node was not found, return -ENOENT, 0 otherwise. + * Negative return codes stay as-is. + */ + if (err == 0) + err = -ENOENT; + else if (err == 1) + err = 0; + } else { + err = ubifs_tnc_read_node(c, zbr, node); + } if (err) return err; @@ -2770,7 +2787,11 @@ struct ubifs_dent_node *ubifs_tnc_next_ent(struct ubifs_info *c, if (nm->name) { if (err) { /* Handle collisions */ - err = resolve_collision(c, key, &znode, &n, nm); + if (c->replaying) + err = fallible_resolve_collision(c, key, &znode, &n, + nm, 0); + else + err = resolve_collision(c, key, &znode, &n, nm); dbg_tnc("rc returned %d, znode %p, n %d", err, znode, n); if (unlikely(err < 0)) -- 2.17.1

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[PATCH] ahci: add PCI bindings for Marvell 88SE6121/45 SATA controllers
by Hajo Noerenberg 11 Apr '22

11 Apr '22

Add AHCI PCI bindings for Marvell 88SE6121/45 SATA controllers. The 88SE6121 controller is used, for example, in the Seagate Blackarmor NAS440 or the Iomega ix4-200d NAS. As Pali Rohár explained [1], these controllers do not match the standard AHCI class code and therefore require an explizit PCI binding. The Linux kernel also uses this approach [2]. [1] https://lists.denx.de/pipermail/u-boot/2022-March/479197.html [2] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/dri… Signed-off-by: Hajo Noerenberg <hajo-uboot(a)noerenberg.de> --- drivers/ata/ahci-pci.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/ata/ahci-pci.c b/drivers/ata/ahci-pci.c index b1d231e0f9..797e0d570e 100644 --- a/drivers/ata/ahci-pci.c +++ b/drivers/ata/ahci-pci.c @@ -38,6 +38,8 @@ U_BOOT_DRIVER(ahci_pci) = { static struct pci_device_id ahci_pci_supported[] = { { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_SATA_AHCI, ~0) }, { PCI_DEVICE(0x1b21, 0x0611) }, + { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x6121) }, + { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x6145) }, {}, }; -- 2.20.1

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[PATCH] image: fit: Align hash output buffers
by Sean Anderson 11 Apr '22

11 Apr '22

Hardware-accelerated hash functions require that the input and output buffers be aligned to the minimum DMA alignment. memalign.h helpfully provides a macro just for this purpose. It doesn't exist on the host, but we don't need to be aligned there either. Fixes: 5dfb521386 ("[new uImage] New uImage low-level API") Signed-off-by: Sean Anderson <sean.anderson(a)seco.com> --- boot/image-fit.c | 4 +++- tools/mkimage.h | 3 +++ 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/boot/image-fit.c b/boot/image-fit.c index f01cafe4e2..6610035d0a 100644 --- a/boot/image-fit.c +++ b/boot/image-fit.c @@ -24,6 +24,7 @@ #include <mapmem.h> #include <asm/io.h> #include <malloc.h> +#include <memalign.h> #include <asm/global_data.h> #ifdef CONFIG_DM_HASH #include <dm.h> @@ -1263,7 +1264,8 @@ int calculate_hash(const void *data, int data_len, const char *name, static int fit_image_check_hash(const void *fit, int noffset, const void *data, size_t size, char **err_msgp) { - uint8_t value[FIT_MAX_HASH_LEN]; + DEFINE_ALIGN_BUFFER(uint8_t, value, FIT_MAX_HASH_LEN, + ARCH_DMA_MINALIGN); int value_len; const char *algo; uint8_t *fit_value; diff --git a/tools/mkimage.h b/tools/mkimage.h index 0d3148444c..7652c8b001 100644 --- a/tools/mkimage.h +++ b/tools/mkimage.h @@ -41,6 +41,9 @@ static inline ulong map_to_sysmem(void *ptr) return (ulong)(uintptr_t)ptr; } +#define ARCH_DMA_MINALIGN 1 +#define DEFINE_ALIGN_BUFFER(type, name, size, alugn) type name[size] + #define MKIMAGE_TMPFILE_SUFFIX ".tmp" #define MKIMAGE_MAX_TMPFILE_LEN 256 #define MKIMAGE_DEFAULT_DTC_OPTIONS "-I dts -O dtb -p 500" -- 2.25.1

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[PATCH v2] cmd: pxe_utils: sysboot: replace cls command by video_clear in PXE parser
by Patrick Delaunay 11 Apr '22

11 Apr '22

Since the commit bfaa51dd4adf ("cmd: add serial console support for the cls command") the cls command is not enough to clear the video display when ANSI console is activated. This patch clears the video device with the video_clear() API before to display the bitmap used for the PXE background. This patch avoids to display the LOGO, activated by default with commit 7a8555d87136 ("video: Show the U-Boot logo by default"). Signed-off-by: Patrick Delaunay <patrick.delaunay(a)foss.st.com> --- I let a patman warning: boot/pxe_utils.c:1520: warning: Use 'if (IS_ENABLED(CONFIG...))' instead of '#if or #ifdef' where possible To avoid parameter issue for video_clear(dev) function: no parameter dev when CONFIG_DM_VIDEO is deactivated. Changes in v2: - move #include <dm.h> to avoid compilation issue when CONFIG_DM_RNG is not activated for uclass_first_device_err - Avoid error too many arguments to function 'video_clear' when CONFIG_DM_VIDEO is not activated, use: #if defined(CONFIG_DM_VIDEO) boot/pxe_utils.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/boot/pxe_utils.c b/boot/pxe_utils.c index 0c24becae3..b08aee9896 100644 --- a/boot/pxe_utils.c +++ b/boot/pxe_utils.c @@ -6,6 +6,7 @@ #include <common.h> #include <command.h> +#include <dm.h> #include <env.h> #include <image.h> #include <log.h> @@ -14,6 +15,7 @@ #include <lcd.h> #include <net.h> #include <fdt_support.h> +#include <video.h> #include <linux/libfdt.h> #include <linux/string.h> #include <linux/ctype.h> @@ -21,7 +23,6 @@ #include <linux/list.h> #ifdef CONFIG_DM_RNG -#include <dm.h> #include <rng.h> #endif @@ -1516,8 +1517,13 @@ void handle_pxe_menu(struct pxe_context *ctx, struct pxe_menu *cfg) /* display BMP if available */ if (cfg->bmp) { if (get_relfile(ctx, cfg->bmp, image_load_addr, NULL)) { - if (CONFIG_IS_ENABLED(CMD_CLS)) - run_command("cls", 0); +#if defined(CONFIG_DM_VIDEO) + struct udevice *dev; + + err = uclass_first_device_err(UCLASS_VIDEO, &dev); + if (!err) + video_clear(dev); +#endif bmp_display(image_load_addr, BMP_ALIGN_CENTER, BMP_ALIGN_CENTER); } else { -- 2.25.1

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[PATCH v1 0/2] mtd: Allow to parse DT partitions for raw nand
by Patrice Chotard 11 Apr '22

11 Apr '22

This series is fixing issue where "mtd list" command can't displayed nand raw partitions even if the flash DT node is populated with partitions subnode with "fixed-partitions" compatible. Patrice Chotard (2): mtd: Add flash_node in struct mtd_info mtd: Update the way partitions are parsed drivers/mtd/mtdpart.c | 8 ++++++-- drivers/mtd/nand/raw/nand_base.c | 1 + include/linux/mtd/mtd.h | 1 + 3 files changed, 8 insertions(+), 2 deletions(-) -- 2.17.1

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[PATCH] drivers: led: bcm6858: Set default brightness when setting LED state
by Paul HENRYS 11 Apr '22

11 Apr '22

When setting the LED state (OFF, ON or blinking), the default maximum brightness is set for ON and blinking state and the brightness is set to 0 for OFF state. This should make sure the LED controller's registers affecting the brightness are correctly initialized and should give consistent behaviour. Signed-off-by: Paul HENRYS <paul.henrys_ext(a)softathome.com> --- drivers/led/led_bcm6858.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/drivers/led/led_bcm6858.c b/drivers/led/led_bcm6858.c index fbf46a114c..02a8308611 100644 --- a/drivers/led/led_bcm6858.c +++ b/drivers/led/led_bcm6858.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright (C) 2019 Philippe Reynes <philippe.reynes(a)softathome.com> + * Copyright (C) 2022 Paul HENRYS <paul.henrys_ext(a)softathome.com> * * based on: * drivers/led/led_bcm6328.c @@ -38,6 +39,8 @@ #define LED_HW_LED_EN_REG 0x08 /* LED Flash control register0 */ #define LED_FLASH_RATE_CONTROL_REG0 0x10 +/* LED Brightness control register0 */ +#define LED_BRIGHTNESS_CONTROL_REG0 0x20 /* Soft LED input register */ #define LED_SW_LED_IP_REG 0xb8 /* Parallel LED Output Polarity Register */ @@ -96,6 +99,24 @@ static int bcm6858_led_set_period(struct udevice *dev, int period_ms) } #endif +static int led_set_brightness(struct udevice *dev, unsigned int brightness) +{ + struct bcm6858_led_priv *priv = dev_get_priv(dev); + u32 offset, shift, mask, value; + + offset = (priv->pin / 8) * 4; + shift = (priv->pin % 8) * 4; + mask = 0xf << shift; + + /* 8 levels of brightness achieved through PWM */ + value = (brightness > 7 ? 7 : brightness) << shift; + + clrbits_32(priv->regs + LED_BRIGHTNESS_CONTROL_REG0 + offset, mask); + setbits_32(priv->regs + LED_BRIGHTNESS_CONTROL_REG0 + offset, value); + + return 0; +} + static enum led_state_t bcm6858_led_get_state(struct udevice *dev) { struct bcm6858_led_priv *priv = dev_get_priv(dev); @@ -116,12 +137,15 @@ static int bcm6858_led_set_state(struct udevice *dev, enum led_state_t state) switch (state) { case LEDST_OFF: clrbits_32(priv->regs + LED_SW_LED_IP_REG, (1 << priv->pin)); + led_set_brightness(dev, 0); #ifdef CONFIG_LED_BLINK bcm6858_led_set_period(dev, 0); #endif break; case LEDST_ON: setbits_32(priv->regs + LED_SW_LED_IP_REG, (1 << priv->pin)); + /* Set maximum brightness by default */ + led_set_brightness(dev, 7); #ifdef CONFIG_LED_BLINK bcm6858_led_set_period(dev, 0); #endif @@ -135,6 +159,8 @@ static int bcm6858_led_set_state(struct udevice *dev, enum led_state_t state) #ifdef CONFIG_LED_BLINK case LEDST_BLINK: setbits_32(priv->regs + LED_SW_LED_IP_REG, (1 << priv->pin)); + /* Set maximum brightness by default */ + led_set_brightness(dev, 7); break; #endif default: -- 2.25.1

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