December 2022 - U-Boot

[PATCH v2] doc: add texinfodocs and infodocs targets
by Maxim Cournoyer 18 Dec '22

18 Dec '22

Sphinx supports generating Texinfo sources and Info documentation, which can be navigated easily and is convenient to search (via the indexed nodes or anchors, for example). This is basically the same as 1f050e904dd6f2955eecbd22031d912ccb2e7683, which was recently applied to the Linux kernel. Signed-off-by: Maxim Cournoyer <maxim.cournoyer(a)savoirfairelinux.com> --- Changes in v2: - Do not invoke nonexistent 'sphinx-pre-install' script Makefile | 2 +- doc/Makefile | 10 ++++++++++ doc/media/Makefile | 3 ++- 3 files changed, 13 insertions(+), 2 deletions(-) diff --git a/Makefile b/Makefile index de5746399a..597a8886c3 100644 --- a/Makefile +++ b/Makefile @@ -2372,7 +2372,7 @@ tcheck: # Documentation targets # --------------------------------------------------------------------------- DOC_TARGETS := xmldocs latexdocs pdfdocs htmldocs epubdocs cleandocs \ - linkcheckdocs dochelp refcheckdocs + linkcheckdocs dochelp refcheckdocs texinfodocs infodocs PHONY += $(DOC_TARGETS) $(DOC_TARGETS): scripts_basic FORCE $(Q)$(MAKE) $(build)=doc $@ diff --git a/doc/Makefile b/doc/Makefile index f5de65e927..d0904a9f99 100644 --- a/doc/Makefile +++ b/doc/Makefile @@ -69,6 +69,14 @@ quiet_cmd_sphinx = SPHINX $@ --> file://$(abspath $(BUILDDIR)/$3/$4) htmldocs: @+$(foreach var,$(SPHINXDIRS),$(call loop_cmd,sphinx,html,$(var),,$(var))) +texinfodocs: + @+$(foreach var,$(SPHINXDIRS),$(call loop_cmd,sphinx,texinfo,$(var),texinfo,$(var))) + +# Note: the 'info' Make target is generated by sphinx itself when +# running the texinfodocs target defined above. +infodocs: texinfodocs + $(MAKE) -C $(BUILDDIR)/texinfo info + linkcheckdocs: @$(foreach var,$(SPHINXDIRS),$(call loop_cmd,sphinx,linkcheck,$(var),,$(var))) @@ -109,6 +117,8 @@ cleandocs: dochelp: @echo ' U-Boot documentation in different formats from ReST:' @echo ' htmldocs - HTML' + @echo ' texinfodocs - Texinfo' + @echo ' infodocs - Info' @echo ' latexdocs - LaTeX' @echo ' pdfdocs - PDF' @echo ' epubdocs - EPUB' diff --git a/doc/media/Makefile b/doc/media/Makefile index b9b43a34c3..9b32258696 100644 --- a/doc/media/Makefile +++ b/doc/media/Makefile @@ -22,10 +22,11 @@ $(BUILDDIR)/linker_lists.h.rst: ${API}/linker_lists.h ${PARSER} $(SRC_DIR)/linke # Media build rules -.PHONY: all html epub xml latex +.PHONY: all html texinfo epub xml latex all: $(IMGDOT) $(BUILDDIR) ${TARGETS} html: all +texinfo: all epub: all xml: all latex: $(IMGPDF) all base-commit: 9bd3d354a1a0712ac27c717df9ad60566b0406ee -- 2.38.1

2 1

[PATCH] phy: rockchip: handle clock without enable function
by John Keeping 18 Dec '22

18 Dec '22

If a clock doesn't supply the enable hook, clk_enable() will return -ENOSYS. In this case the clock is always enabled so there is no error and the phy initialisation should continue. Signed-off-by: John Keeping <john(a)metanate.com> --- drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c index 62b8ba3a4a..b32a498ea7 100644 --- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c +++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c @@ -119,7 +119,7 @@ static int rockchip_usb2phy_init(struct phy *phy) int ret; ret = clk_enable(&priv->phyclk); - if (ret) { + if (ret && ret != -ENOSYS) { dev_err(phy->dev, "failed to enable phyclk (ret=%d)\n", ret); return ret; } -- 2.38.1

2 1

[PATCH] rockchip: Pinebook Pro: Do not initialize i2c before relocation
by Michal Suchanek 18 Dec '22

18 Dec '22

The i2c locks up when initialized before relocation, and it stays broken in Linux as well breaking the ability to boot Linux. The i2c bus and pmic was not actually used in pre-reloc before commit ad607512f575 ("power: pmic: rk8xx: Support sysreset shutdown method") The cause is not known. This is board-specific, other boards that do not add the option to include the i2c bus in pre-reloc DT are not affected. Signed-off-by: Michal Suchanek <msuchanek(a)suse.de> --- This is not tested, my board does not currentl;y boot at all, YMMV --- arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi | 8 -------- 1 file changed, 8 deletions(-) diff --git a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi index 2d87bea933..fd87102c0b 100644 --- a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi +++ b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi @@ -20,14 +20,6 @@ rockchip,panel = <&edp_panel>; }; -&i2c0 { - u-boot,dm-pre-reloc; -}; - -&rk808 { - u-boot,dm-pre-reloc; -}; - &sdhci { max-frequency = <25000000>; u-boot,dm-pre-reloc; -- 2.38.1

5 6

[PATCH v2] configs: roc-pc-rk3399: Enable rockchip efuse support
by Christopher Obbard 18 Dec '22

18 Dec '22

Enable efuse support which allows reading of the cpuid#, serial# and also generates a unique mac address from the board's serial. Signed-off-by: Christopher Obbard <chris.obbard(a)collabora.com> --- Changes in v2: - added missing configuration symbol CONFIG_MISC_INIT_R=y configs/roc-pc-mezzanine-rk3399_defconfig | 2 ++ configs/roc-pc-rk3399_defconfig | 2 ++ 2 files changed, 4 insertions(+) diff --git a/configs/roc-pc-mezzanine-rk3399_defconfig b/configs/roc-pc-mezzanine-rk3399_defconfig index 3cdcc729f853..d936309709ed 100644 --- a/configs/roc-pc-mezzanine-rk3399_defconfig +++ b/configs/roc-pc-mezzanine-rk3399_defconfig @@ -22,6 +22,7 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc-mezzanine.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y @@ -50,6 +51,7 @@ CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MISC=y +CONFIG_ROCKCHIP_EFUSE=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig index e03442afa462..865d4e0e9f25 100644 --- a/configs/roc-pc-rk3399_defconfig +++ b/configs/roc-pc-rk3399_defconfig @@ -22,6 +22,7 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y @@ -49,6 +50,7 @@ CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MISC=y +CONFIG_ROCKCHIP_EFUSE=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y -- 2.38.1

2 1

[PATCH 1/2] rc4: mark key as const
by John Keeping 18 Dec '22

18 Dec '22

Key data is never written so the parameter can be const, which allows putting fixed keys in .rodata. Signed-off-by: John Keeping <john(a)metanate.com> --- include/rc4.h | 2 +- lib/rc4.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/rc4.h b/include/rc4.h index c1ff1349d4..d1257f20a4 100644 --- a/include/rc4.h +++ b/include/rc4.h @@ -15,6 +15,6 @@ * @len: Length of buffer in bytes * @key: 16-byte key to use */ -void rc4_encode(unsigned char *buf, unsigned int len, unsigned char key[16]); +void rc4_encode(unsigned char *buf, unsigned int len, const unsigned char key[16]); #endif diff --git a/lib/rc4.c b/lib/rc4.c index 0c00439843..720112d1fd 100644 --- a/lib/rc4.c +++ b/lib/rc4.c @@ -12,7 +12,7 @@ #endif #include <rc4.h> -void rc4_encode(unsigned char *buf, unsigned int len, unsigned char key[16]) +void rc4_encode(unsigned char *buf, unsigned int len, const unsigned char key[16]) { unsigned char s[256], k[256], temp; unsigned short i, j, t; -- 2.38.1

3 5

[PATCH] rockchip: puma-rk3399: sync DTS with Linux kernel next-20221114
by Quentin Schulz 18 Dec '22

18 Dec '22

From: Quentin Schulz <quentin.schulz(a)theobroma-systems.com> This synchronizes the Device Trees related to Puma RK3399 SoM with Linux kernel next-20221114 to include two important changes pertaining to eMMC and SD card instability. Cc: Quentin Schulz <foss+uboot(a)0leil.net> Signed-off-by: Quentin Schulz <quentin.schulz(a)theobroma-systems.com> --- To: Simon Glass <sjg(a)chromium.org> To: Philipp Tomsich <philipp.tomsich(a)vrull.eu> To: Kever Yang <kever.yang(a)rock-chips.com> To: Klaus Goger <klaus.goger(a)theobroma-systems.com> Cc: u-boot(a)lists.denx.de --- arch/arm/dts/rk3399-puma-haikou.dts | 5 +++-- arch/arm/dts/rk3399-puma.dtsi | 32 +++++++++++++++++++++++++++++++- 2 files changed, 34 insertions(+), 3 deletions(-) diff --git a/arch/arm/dts/rk3399-puma-haikou.dts b/arch/arm/dts/rk3399-puma-haikou.dts index 292bb7e80c..115c14c0a3 100644 --- a/arch/arm/dts/rk3399-puma-haikou.dts +++ b/arch/arm/dts/rk3399-puma-haikou.dts @@ -49,7 +49,7 @@ sgtl5000_clk: sgtl5000-oscillator { compatible = "fixed-clock"; #clock-cells = <0>; - clock-frequency = <24576000>; + clock-frequency = <24576000>; }; dc_12v: dc-12v { @@ -207,7 +207,7 @@ cap-sd-highspeed; cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; disable-wp; - max-frequency = <150000000>; + max-frequency = <40000000>; pinctrl-names = "default"; pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; vmmc-supply = <&vcc3v3_baseboard>; @@ -232,6 +232,7 @@ &usbdrd_dwc3_0 { dr_mode = "otg"; + extcon = <&extcon_usb3>; status = "okay"; }; diff --git a/arch/arm/dts/rk3399-puma.dtsi b/arch/arm/dts/rk3399-puma.dtsi index fb67db4619..aa3e21bd6c 100644 --- a/arch/arm/dts/rk3399-puma.dtsi +++ b/arch/arm/dts/rk3399-puma.dtsi @@ -25,6 +25,13 @@ }; }; + extcon_usb3: extcon-usb3 { + compatible = "linux,extcon-usb-gpio"; + id-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&usb3_id>; + }; + clkin_gmac: external-gmac-clock { compatible = "fixed-clock"; clock-frequency = <125000000>; @@ -55,7 +62,6 @@ vcc5v0_host: vcc5v0-host-regulator { compatible = "regulator-fixed"; gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_LOW>; - enable-active-low; pinctrl-names = "default"; pinctrl-0 = <&vcc5v0_host_en>; regulator-name = "vcc5v0_host"; @@ -71,6 +77,17 @@ regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; }; + + vdd_log: vdd-log { + compatible = "pwm-regulator"; + pwms = <&pwm2 0 25000 1>; + pwm-supply = <&vcc5v0_sys>; + regulator-name = "vdd_log"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1400000>; + regulator-always-on; + regulator-boot-on; + }; }; &cpu_b0 { @@ -422,9 +439,22 @@ <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; }; }; + + usb3 { + usb3_id: usb3-id { + rockchip,pins = + <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; }; &sdhci { + /* + * Signal integrity isn't great at 200MHz but 100MHz has proven stable + * enough. + */ + max-frequency = <100000000>; + bus-width = <8>; mmc-hs400-1_8v; mmc-hs400-enhanced-strobe; --- base-commit: c4ee4fe92e9be120be6d12718273dec6b63cc7d9 change-id: 20221115-puma-dts-sync-b73a5c739ad8 Best regards, -- Quentin Schulz <quentin.schulz(a)theobroma-systems.com>

2 1

[PATCH] board: rockchip: Add support for Rock Pi S
by Angelo Compagnucci 18 Dec '22

18 Dec '22

Add support for the Radxa Rock Pi S RK3308 SBC. Signed-off-by: Angelo Compagnucci <angelo(a)amarulasolutions.com> --- arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi | 21 ++++ arch/arm/dts/rk3308-rock-pi-s.dts | 115 ++++++++++++++++++++++ arch/arm/mach-rockchip/rk3308/Kconfig | 5 + board/radxa/rock-pi-s/Kconfig | 15 +++ board/radxa/rock-pi-s/MAINTAINERS | 8 ++ board/radxa/rock-pi-s/Makefile | 7 ++ board/radxa/rock-pi-s/rock-pi-s.c | 6 ++ configs/rock-pi-s-rk3308_defconfig | 88 +++++++++++++++++ doc/README.rockchip | 7 ++ include/configs/rock-pi-s.h | 15 +++ include/configs/rock-pi-s_rk3308.h | 15 +++ 11 files changed, 302 insertions(+) create mode 100644 arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi create mode 100644 arch/arm/dts/rk3308-rock-pi-s.dts create mode 100644 board/radxa/rock-pi-s/Kconfig create mode 100644 board/radxa/rock-pi-s/MAINTAINERS create mode 100644 board/radxa/rock-pi-s/Makefile create mode 100644 board/radxa/rock-pi-s/rock-pi-s.c create mode 100644 configs/rock-pi-s-rk3308_defconfig create mode 100644 include/configs/rock-pi-s.h create mode 100644 include/configs/rock-pi-s_rk3308.h diff --git a/arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi b/arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi new file mode 100644 index 0000000000..b6f18824ba --- /dev/null +++ b/arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2022 Angelo Compagnucci <angelo(a)amarulasolutions.com> + */ +#include "rk3308-u-boot.dtsi" + +/ { + chosen { + u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc; + }; +}; + +&uart0 { + u-boot,dm-pre-reloc; + clock-frequency = <24000000>; + status = "okay"; +}; + +&sdmmc { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/rk3308-rock-pi-s.dts b/arch/arm/dts/rk3308-rock-pi-s.dts new file mode 100644 index 0000000000..5880fec8fe --- /dev/null +++ b/arch/arm/dts/rk3308-rock-pi-s.dts @@ -0,0 +1,115 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2022 Angelo Compagnucci <angelo(a)amarulasolutions.com> + */ + +/dts-v1/; +#include "rk3308.dtsi" + +/ { + model = "Radxa ROCK Pi S"; + compatible = "radxa,rockpis", "rockchip,rk3308"; + + aliases { + mmc0 = &emmc; + mmc1 = &sdmmc; + }; + + chosen { + stdout-path = "serial0:1500000n8"; + }; + + vcc_1v8: vcc-1v8 { + compatible = "regulator-fixed"; + regulator-name = "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc_io>; + }; + + vcc_io: vcc-io { + compatible = "regulator-fixed"; + regulator-name = "vcc_io"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc5v0_sys>; + }; + + vcc_ddr: vcc-ddr { + compatible = "regulator-fixed"; + regulator-name = "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + vin-supply = <&vcc5v0_sys>; + }; + + vcc5v0_sys: vcc5v0-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + vdd_core: vdd-core { + compatible = "pwm-regulator"; + pwms = <&pwm0 0 5000 1>; + pwm-supply = <&vcc5v0_sys>; + regulator-name = "vdd_core"; + regulator-min-microvolt = <827000>; + regulator-max-microvolt = <1340000>; + regulator-init-microvolt = <1015000>; + regulator-settling-time-up-us = <250>; + regulator-always-on; + regulator-boot-on; + }; + +}; + +&cpu0 { + cpu-supply = <&vdd_core>; +}; + +&emmc { + bus-width = <4>; + cap-mmc-highspeed; + mmc-hs200-1_8v; + non-removable; + vmmc-supply = <&vcc_io>; + status = "okay"; +}; + +&mac { + clock_in_out = "output"; + phy-supply = <&vcc_io>; + snps,reset-gpio = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + snps,reset-delays-us = <0 50000 50000>; + status = "okay"; +}; + +&i2c1 { + status = "okay"; +}; + +&pwm0 { + status = "okay"; + pinctrl-0 = <&pwm0_pin_pull_down>; +}; + +&saradc { + vref-supply = <&vcc_1v8>; + status = "okay"; +}; + +&sdmmc { + cap-sd-highspeed; + status = "okay"; +}; diff --git a/arch/arm/mach-rockchip/rk3308/Kconfig b/arch/arm/mach-rockchip/rk3308/Kconfig index 194353e4cd..8ca696181b 100644 --- a/arch/arm/mach-rockchip/rk3308/Kconfig +++ b/arch/arm/mach-rockchip/rk3308/Kconfig @@ -8,6 +8,10 @@ config TARGET_ROC_RK3308_CC bool "Firefly roc-rk3308-cc" select BOARD_LATE_INIT +config TARGET_ROCK_PI_S + bool "Radxa Rock PI S" + select BOARD_LATE_INIT + config ROCKCHIP_BOOT_MODE_REG default 0xff000500 @@ -25,5 +29,6 @@ config SPL_SERIAL source "board/rockchip/evb_rk3308/Kconfig" source "board/firefly/firefly-rk3308/Kconfig" +source "board/radxa/rock-pi-s/Kconfig" endif diff --git a/board/radxa/rock-pi-s/Kconfig b/board/radxa/rock-pi-s/Kconfig new file mode 100644 index 0000000000..de5b71a66b --- /dev/null +++ b/board/radxa/rock-pi-s/Kconfig @@ -0,0 +1,15 @@ +if TARGET_ROCK_PI_S + +config SYS_BOARD + default "rock-pi-s" + +config SYS_VENDOR + default "radxa" + +config SYS_CONFIG_NAME + default "rock-pi-s" + +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + +endif diff --git a/board/radxa/rock-pi-s/MAINTAINERS b/board/radxa/rock-pi-s/MAINTAINERS new file mode 100644 index 0000000000..f139dbceaf --- /dev/null +++ b/board/radxa/rock-pi-s/MAINTAINERS @@ -0,0 +1,8 @@ +FIREFLY +M: Angelo Compagnucci <angelo(a)amarulasolutions.com> +S: Maintained +F: arch/arm/dts/rk3288-rock-pi-s.dts +F: arch/arm/dts/rk3288-rock-pi-s-u-boot.dtsi +F: board/radxa/rock-pi-s +F: include/configs/rock-pi-s_rk3308.h +F: configs/rock-pi-s-rk3308_defconfig diff --git a/board/radxa/rock-pi-s/Makefile b/board/radxa/rock-pi-s/Makefile new file mode 100644 index 0000000000..8d2b5ad36e --- /dev/null +++ b/board/radxa/rock-pi-s/Makefile @@ -0,0 +1,7 @@ +# +# (C) Copyright 2022 Angelo Compagnucci <angelo(a)amarulasolutions.com> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += rock-pi-s.o diff --git a/board/radxa/rock-pi-s/rock-pi-s.c b/board/radxa/rock-pi-s/rock-pi-s.c new file mode 100644 index 0000000000..cbd4ab4f32 --- /dev/null +++ b/board/radxa/rock-pi-s/rock-pi-s.c @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* +# (C) Copyright 2022 Angelo Compagnucci <angelo(a)amarulasolutions.com> + */ + +#include <common.h> diff --git a/configs/rock-pi-s-rk3308_defconfig b/configs/rock-pi-s-rk3308_defconfig new file mode 100644 index 0000000000..2cbcf90839 --- /dev/null +++ b/configs/rock-pi-s-rk3308_defconfig @@ -0,0 +1,88 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 +CONFIG_ARCH_ROCKCHIP=y +CONFIG_TEXT_BASE=0x00600000 +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_DEFAULT_DEVICE_TREE="rk3308-rock-pi-s" +CONFIG_ROCKCHIP_RK3308=y +CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0 +CONFIG_SPL_DRIVERS_MISC=y +CONFIG_TARGET_ROCK_PI_S=y +CONFIG_SPL_STACK_R_ADDR=0xc00000 +CONFIG_DEBUG_UART_BASE=0xFF0A0000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SYS_LOAD_ADDR=0xc00800 +CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 +CONFIG_ANDROID_BOOT_IMAGE=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_BOOTDELAY=0 +CONFIG_SYS_CONSOLE_INFO_QUIET=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_SPL_MAX_SIZE=0x20000 +CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x400000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x400000 +CONFIG_SPL_STACK_R=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_ELF is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_XIMG is not set +CONFIG_CMD_GPT=y +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_SLEEP is not set +# CONFIG_DOS_PARTITION is not set +# CONFIG_ISO_PARTITION is not set +CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64 +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_LIVE=y +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_REGMAP=y +CONFIG_SYSCON=y +CONFIG_CLK=y +# CONFIG_USB_FUNCTION_FASTBOOT is not set +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_SUPPORT_EMMC_RPMB=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_GMAC_ROCKCHIP=y +CONFIG_PHY=y +CONFIG_PINCTRL=y +CONFIG_REGULATOR_PWM=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_RAM=y +CONFIG_DM_RESET=y +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_DEBUG_UART_SKIP_INIT=y +CONFIG_SYSRESET=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_DWC2=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DWC2_OTG=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_SPL_TINY_MEMSET=y +CONFIG_LZO=y +CONFIG_ERRNO_STR=y +# CONFIG_EFI_LOADER is not set diff --git a/doc/README.rockchip b/doc/README.rockchip index 52b5140eca..b60eb80c39 100644 --- a/doc/README.rockchip +++ b/doc/README.rockchip @@ -46,7 +46,14 @@ Building => export BL31=/path/to/rkbin/bin/rk33/rk3308_bl31_v2.22.elf => make roc-cc-rk3308_defconfig => make CROSS_COMPILE=aarch64-linux-gnu- all + + - idbloader for roc-cc-rk3308 => ./tools/mkimage -n rk3308 -T rksd -d /path/to/rkbin/bin/rk33/rk3308_ddr_589MHz_uart2_m0_v1.26.bin idbloader.img + + - idbloader for rock-pi-s-rk3308 + => ./tools/mkimage -n rk3308 -T rksd -d /path/to/rkbin/bin/rk33/rk3308_ddr_589MHz_uart0_m0_v1.26.bin idbloader.img + + - Finalize idbloader => cat spl/u-boot-spl.bin >> idbloader.img 3. To build RK3399 board: diff --git a/include/configs/rock-pi-s.h b/include/configs/rock-pi-s.h new file mode 100644 index 0000000000..0273e751ce --- /dev/null +++ b/include/configs/rock-pi-s.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * (C) Copyright 2018 Rockchip Electronics Co., Ltd + */ + +#ifndef __EVB_RK3308_H +#define __EVB_RK3308_H + +#include <configs/rk3308_common.h> + +#define ROCKCHIP_DEVICE_SETTINGS \ + "stdout=serial,vidconsole\0" \ + "stderr=serial,vidconsole\0" + +#endif diff --git a/include/configs/rock-pi-s_rk3308.h b/include/configs/rock-pi-s_rk3308.h new file mode 100644 index 0000000000..0273e751ce --- /dev/null +++ b/include/configs/rock-pi-s_rk3308.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * (C) Copyright 2018 Rockchip Electronics Co., Ltd + */ + +#ifndef __EVB_RK3308_H +#define __EVB_RK3308_H + +#include <configs/rk3308_common.h> + +#define ROCKCHIP_DEVICE_SETTINGS \ + "stdout=serial,vidconsole\0" \ + "stderr=serial,vidconsole\0" + +#endif -- 2.25.1

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[PATCH v2] rockchip: px30: make watchdog and tsadc trigger a first global reset
by Quentin Schulz 18 Dec '22

18 Dec '22

From: Quentin Schulz <quentin.schulz(a)theobroma-systems.com> By default, the PX30 is configured for watchdog and tsadc to trigger a second global reset which is a more permissive reset than first global reset. >From TRM part 1 "2.3 System Reset Solution": glb_srstn_1 will reset the all logic, and glb_srstn_2 will reset the all logic except GRF, SGRF and all GPIOs. This enforces that the watchdog and tsadc trigger glb_srstn_1 as similarly done for RK3399 in U-Boot (in SDRAM driver for some reason?), TF-A and Coreboot. Cc: Quentin Schulz <foss+uboot(a)0leil.net> Signed-off-by: Quentin Schulz <quentin.schulz(a)theobroma-systems.com> --- rockchip: px30: make watchdog and tsadc trigger a first global reset Our devkits have a HW switch which electrically cuts the power and clock lines to the on-board eMMC so that the module is forced to boot from SD card (or enter USB flashing mode if none is present). This HW switch is electrically bypassed in SW by a GPIO in U-Boot SPL to allow for eMMC to be used in U-Boot and Linux. In a second global reset, the GPIO do not get reset and is therefore still bypassing the HW switch, meaning the eMMC will be operational even though it is not desired (because the HW switch is supposed to enforce booting from SD card/USB when in that position). This also mimics what's seen on RK3399. To: Simon Glass <sjg(a)chromium.org> To: Philipp Tomsich <philipp.tomsich(a)vrull.eu> To: Kever Yang <kever.yang(a)rock-chips.com> Cc: u-boot(a)lists.denx.de --- Changes in v2: - add missing cru struct --- arch/arm/mach-rockchip/px30/px30.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c index 0641e6af0f..ded03ffa51 100644 --- a/arch/arm/mach-rockchip/px30/px30.c +++ b/arch/arm/mach-rockchip/px30/px30.c @@ -234,6 +234,7 @@ enum { int arch_cpu_init(void) { static struct px30_grf * const grf = (void *)GRF_BASE; + static struct px30_cru * const cru = (void *)CRU_BASE; u32 __maybe_unused val; #ifdef CONFIG_SPL_BUILD @@ -285,6 +286,9 @@ int arch_cpu_init(void) /* Clear the force_jtag */ rk_clrreg(&grf->cpu_con[1], 1 << 7); + /* Make TSADC and WDT trigger a first global reset */ + clrsetbits_le32(&cru->glb_rst_con, 0x3, 0x3); + return 0; } --- base-commit: 0cbeed4f6648e0e4966475e3544280a69ecb59d3 change-id: 20221111-px30-wdt-1-glb-rst-0ce41249727d Best regards, -- Quentin Schulz <quentin.schulz(a)theobroma-systems.com>

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[PATCH] rockchip: puma: fix GPT table corruption when saving U-Boot environment
by Quentin Schulz 18 Dec '22

18 Dec '22

From: Quentin Schulz <quentin.schulz(a)theobroma-systems.com> The GPT table is taking the first 34 sectors, which amounts to 0x4400 bytes. Saving the environment below this address in storage will corrupt the GPT table. While technically the table ends at 0x4400, some tools (e.g. bmaptool) are rounding everything to the logical block size (0x1000), so it is safer to make it point to 0x5000 so that the environment could still persist when flashing a sparse image with bmaptool or similar tools. Obviously, the default 0x4000 environment size does not work anymore, so let's set it to 0x3000 so it does fill the gap between the GPT table (rounded to 0x1000) and the start of the idbloader.img. Fixes: 56f580d3eb8d ("rockchip: dts: rk3399-puma: put environment (in MMC/SD configurations) before SPL") Cc: Quentin Schulz <foss+uboot(a)0leil.net> Signed-off-by: Quentin Schulz <quentin.schulz(a)theobroma-systems.com> --- To: Simon Glass <sjg(a)chromium.org> To: Philipp Tomsich <philipp.tomsich(a)vrull.eu> To: Kever Yang <kever.yang(a)rock-chips.com> To: Klaus Goger <klaus.goger(a)theobroma-systems.com> Cc: u-boot(a)lists.denx.de --- arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi | 2 +- configs/puma-rk3399_defconfig | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi b/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi index f8335c74a7..d2349ae90e 100644 --- a/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi +++ b/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi @@ -15,7 +15,7 @@ / { config { u-boot,spl-payload-offset = <0x80000>; /* @ 512KB */ - u-boot,mmc-env-offset = <0x4000>; /* @ 16KB */ + u-boot,mmc-env-offset = <0x5000>; /* @ 20KB */ u-boot,efi-partition-entries-offset = <0x200000>; /* 2MB */ u-boot,boot-led = "module_led"; sysreset-gpio = <&gpio1 RK_PA6 GPIO_ACTIVE_HIGH>; diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig index 34186d1caa..91f31b37e8 100644 --- a/configs/puma-rk3399_defconfig +++ b/configs/puma-rk3399_defconfig @@ -5,6 +5,7 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SPL_GPIO=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_SIZE=0x3000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3399-puma-haikou" CONFIG_ROCKCHIP_RK3399=y --- base-commit: 1e892ef0b59a4a04971ac23619b95917020b3e18 change-id: 20221025-upstream-puma-mmc-env-gpt-6f42cd038fdd Best regards, -- Quentin Schulz <quentin.schulz(a)theobroma-systems.com>

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[PATCH] arm: dts: rockchip: enable ums/rockusb command for ROCK Pi 4
by FUKAUMI Naoki 18 Dec '22

18 Dec '22

this patch add USB mass storage function and Rockusb function for Radxa ROCK Pi 4 series. Signed-off-by: FUKAUMI Naoki <naoki(a)radxa.com> --- configs/rock-pi-4-rk3399_defconfig | 3 +++ configs/rock-pi-4c-rk3399_defconfig | 3 +++ 2 files changed, 6 insertions(+) diff --git a/configs/rock-pi-4-rk3399_defconfig b/configs/rock-pi-4-rk3399_defconfig index a13ac12d8c..c4f5a71f89 100644 --- a/configs/rock-pi-4-rk3399_defconfig +++ b/configs/rock-pi-4-rk3399_defconfig @@ -34,6 +34,8 @@ CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y +CONFIG_CMD_ROCKUSB=y +CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TIME=y CONFIG_SPL_OF_CONTROL=y @@ -78,6 +80,7 @@ CONFIG_USB_ETHER_MCS7830=y CONFIG_USB_ETHER_RTL8152=y CONFIG_USB_ETHER_SMSC95XX=y CONFIG_USB_GADGET=y +CONFIG_USB_FUNCTION_ROCKUSB=y CONFIG_DM_VIDEO=y CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y diff --git a/configs/rock-pi-4c-rk3399_defconfig b/configs/rock-pi-4c-rk3399_defconfig index be9ac7aab9..04bff81022 100644 --- a/configs/rock-pi-4c-rk3399_defconfig +++ b/configs/rock-pi-4c-rk3399_defconfig @@ -34,6 +34,8 @@ CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y +CONFIG_CMD_ROCKUSB=y +CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TIME=y CONFIG_SPL_OF_CONTROL=y @@ -78,6 +80,7 @@ CONFIG_USB_ETHER_MCS7830=y CONFIG_USB_ETHER_RTL8152=y CONFIG_USB_ETHER_SMSC95XX=y CONFIG_USB_GADGET=y +CONFIG_USB_FUNCTION_ROCKUSB=y CONFIG_DM_VIDEO=y CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y -- 2.35.1

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