December 2022 - U-Boot

[PATCH v2] doc: Fix eth_env_[gs]et_enetaddr() return value
by Marek Vasut 03 Jan '23

03 Jan '23

Per env/common.c, eth_env_get_enetaddr() returns the same return values as is_valid_ethaddr(), i.e. true if valid, false otherwise. Per env/common.c, eth_env_set_enetaddr() may return -EEXIST is the ethaddr is already set. Fix both. Signed-off-by: Marek Vasut <marex(a)denx.de> --- Cc: Heinrich Schuchardt <heinrich.schuchardt(a)canonical.com> Cc: Marek Behún <marek.behun(a)nic.cz> Cc: Simon Glass <sjg(a)chromium.org> Cc: Tom Rini <trini(a)konsulko.com> --- V2: Update the set variant description further --- include/env.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/env.h b/include/env.h index 60acb5454ec..1480efa59e3 100644 --- a/include/env.h +++ b/include/env.h @@ -226,7 +226,7 @@ int env_complete(char *var, int maxv, char *cmdv[], int maxsz, char *buf, * * @name: Environment variable to get (e.g. "ethaddr") * @enetaddr: Place to put MAC address (6 bytes) - * Return: 0 if OK, 1 on error + * Return: 1 if OK, 0 on error */ int eth_env_get_enetaddr(const char *name, uint8_t *enetaddr); @@ -235,7 +235,7 @@ int eth_env_get_enetaddr(const char *name, uint8_t *enetaddr); * * @name: Environment variable to set (e.g. "ethaddr") * @enetaddr: Pointer to MAC address to put into the variable (6 bytes) - * Return: 0 if OK, 1 on error + * Return: 0 if OK, non-zero otherwise */ int eth_env_set_enetaddr(const char *name, const uint8_t *enetaddr); -- 2.35.1

2 1

[PATCH 1/2] arm: mediatek: add mt8195 SOC support
by Macpaul Lin 02 Jan '23

02 Jan '23

From: Fabien Parent <fparent(a)baylibre.com> The MediaTek MT8195 is a ARM64-based SoC with a quad-core Cortex-A73 and a quad-core Cortex-A53. It is including UART, SPI, USB3.0 device and hosts, SD and MMC cards, UFS, PWM, I2C, I2S, S/PDIF, and several LPDDR3 and LPDDR4 options. Signed-off-by: Fabien Parent <fparent(a)baylibre.com> Signed-off-by: Macpaul Lin <macpaul.lin(a)mediatek.com> --- MAINTAINERS | 2 + arch/arm/dts/mt8195.dtsi | 317 +++++++++++++++++++++++++ arch/arm/mach-mediatek/Kconfig | 13 +- arch/arm/mach-mediatek/Makefile | 1 + arch/arm/mach-mediatek/mt8195/Makefile | 3 + arch/arm/mach-mediatek/mt8195/init.c | 81 +++++++ 6 files changed, 416 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/mt8195.dtsi create mode 100644 arch/arm/mach-mediatek/mt8195/Makefile create mode 100644 arch/arm/mach-mediatek/mt8195/init.c diff --git a/MAINTAINERS b/MAINTAINERS index 1cf99c1393..5528dd28c3 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -362,8 +362,10 @@ ARM MEDIATEK M: Ryder Lee <ryder.lee(a)mediatek.com> M: Weijie Gao <weijie.gao(a)mediatek.com> M: Chunfeng Yun <chunfeng.yun(a)mediatek.com> +M: Macpaul Lin <macpaul.lin(a)mediatek.com> R: GSS_MTK_Uboot_upstream <GSS_MTK_Uboot_upstream(a)mediatek.com> S: Maintained +F: arch/arm/dts/mt8195.dtsi F: arch/arm/mach-mediatek/ F: arch/arm/include/asm/arch-mediatek/ F: board/mediatek/ diff --git a/arch/arm/dts/mt8195.dtsi b/arch/arm/dts/mt8195.dtsi new file mode 100644 index 0000000000..d28b038d57 --- /dev/null +++ b/arch/arm/dts/mt8195.dtsi @@ -0,0 +1,317 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright (C) 2022 MediaTek Inc. + * Copyright (C) 2022 BayLibre, SAS + * Author: Ben Ho <ben.ho(a)mediatek.com> + * Erin Lo <erin.lo(a)mediatek.com> + * Fabien Parent <fparent(a)baylibre.com> + * Macpaul Lin <macpaul.lin(a)mediatek.com> + */ + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/phy/phy.h> + +/ { + compatible = "mediatek,mt8195"; + interrupt-parent = <&sysirq>; + #address-cells = <2>; + #size-cells = <2>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu-map { + cluster0 { + core0 { + cpu = <&cpu0>; + }; + core1 { + cpu = <&cpu1>; + }; + core2 { + cpu = <&cpu2>; + }; + core3 { + cpu = <&cpu3>; + }; + }; + + cluster1 { + core0 { + cpu = <&cpu4>; + }; + core1 { + cpu = <&cpu5>; + }; + core2 { + cpu = <&cpu6>; + }; + core3 { + cpu = <&cpu7>; + }; + }; + }; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x000>; + enable-method = "psci"; + capacity-dmips-mhz = <741>; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x001>; + enable-method = "psci"; + capacity-dmips-mhz = <741>; + }; + + cpu2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x002>; + enable-method = "psci"; + capacity-dmips-mhz = <741>; + }; + + cpu3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x003>; + enable-method = "psci"; + capacity-dmips-mhz = <741>; + }; + + cpu4: cpu@100 { + device_type = "cpu"; + compatible = "arm,cortex-a73"; + reg = <0x100>; + enable-method = "psci"; + capacity-dmips-mhz = <1024>; + }; + + cpu5: cpu@101 { + device_type = "cpu"; + compatible = "arm,cortex-a73"; + reg = <0x101>; + enable-method = "psci"; + capacity-dmips-mhz = <1024>; + }; + + cpu6: cpu@102 { + device_type = "cpu"; + compatible = "arm,cortex-a73"; + reg = <0x102>; + enable-method = "psci"; + capacity-dmips-mhz = <1024>; + }; + + cpu7: cpu@103 { + device_type = "cpu"; + compatible = "arm,cortex-a73"; + reg = <0x103>; + enable-method = "psci"; + capacity-dmips-mhz = <1024>; + }; + }; + + clk26m: oscillator { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <26000000>; + clock-output-names = "clk26m"; + }; + + mmc_source_clk: mmc-source-clk{ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <400000000>; + clock-output-names = "mmc_source_clk"; + }; + + soc { + #address-cells = <2>; + #size-cells = <2>; + compatible = "simple-bus"; + ranges; + + watchdog: watchdog@10007000 { + compatible = "mediatek,mt8195-wdt", + "mediatek,wdt"; + reg = <0 0x10007000 0 0x100>; + status = "disabled"; + }; + + gic: interrupt-controller@c000000 { + compatible = "arm,gic-v3"; + #interrupt-cells = <4>; + interrupt-parent = <&gic>; + interrupt-controller; + reg = <0 0x0c000000 0 0x40000>, /* GICD */ + <0 0x0c100000 0 0x200000>, /* GICR */ + <0 0x0c400000 0 0x2000>, /* GICC */ + <0 0x0c410000 0 0x1000>, /* GICH */ + <0 0x0c420000 0 0x2000>; /* GICV */ + + interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH 0>; + ppi-partitions { + ppi_cluster0: interrupt-partition-0 { + affinity = <&cpu0 &cpu1 &cpu2 &cpu3>; + }; + ppi_cluster1: interrupt-partition-1 { + affinity = <&cpu4 &cpu5 &cpu6 &cpu7>; + }; + }; + }; + + sysirq: interrupt-controller@c530a80 { + compatible = "mediatek,mt8195-sysirq", + "mediatek,mt6577-sysirq"; + interrupt-controller; + #interrupt-cells = <3>; + interrupt-parent = <&gic>; + reg = <0 0x0c530a80 0 0x50>; + }; + + topckgen: syscon@10000000 { + compatible = "mediatek,mt8195-topckgen", "syscon"; + reg = <0 0x10000000 0 0x1000>; + #clock-cells = <1>; + }; + + infracfg: syscon@10001000 { + compatible = "mediatek,mt8195-infracfg", "syscon"; + reg = <0 0x10001000 0 0x1000>; + #clock-cells = <1>; + }; + + apmixedsys: syscon@1000c000 { + compatible = "mediatek,mt8195-apmixedsys", "syscon"; + reg = <0 0x1000c000 0 0x1000>; + #clock-cells = <1>; + }; + + uart0: serial@11001100 { + compatible = "mediatek,mt8195-uart", + "mediatek,hsuart"; + reg = <0 0x11001100 0 0x1000>; + interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>; + clock-frequency = <26000000>; + clocks = <&clk26m>, <&clk26m>; + clock-names = "baud", "bus"; + status = "disabled"; + }; + + mmc0: mmc@11230000 { + compatible = "mediatek,mt8195-mmc", + "mediatek,mt8183-mmc"; + reg = <0 0x11230000 0 0x1000>, + <0 0x11f50000 0 0x1000>; + interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_LOW>; + clocks = <&mmc_source_clk>, + <&clk26m>, + <&clk26m>; + clock-names = "source", "hclk", "source_cg"; + status = "disabled"; + }; + + u3phy0: usb-phy@11f40000 { + compatible = "mediatek,generic-tphy-v2"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0x11e40000 0xe00>; + status = "okay"; + + u2port0: usb-phy@0 { + reg = <0 0x700>; + clocks = <&clk26m>, + <&clk26m>; + clock-names = "ref", "da_ref"; + #phy-cells = <1>; + status = "okay"; + }; + + u3port0: usb-phy@700 { + reg = <0x700 0x700>; + clocks = <&clk26m>, + <&clk26m>; + clock-names = "ref", "da_ref"; + #phy-cells = <1>; + status = "okay"; + }; + }; + + usb: usb@11200000 { + compatible ="mediatek,mt8195-mtu3", "mediatek,mtu3"; + reg = <0 0x11200000 0 0x3e00>, + <0 0x11203e00 0 0x0100>; + reg-names = "mac", "ippc"; + phys = <&u2port0 PHY_TYPE_USB2>; + clocks = <&clk26m>, + <&clk26m>, + <&clk26m>; + clock-names = "sys_ck", "ref_ck", "mcu_ck"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + status = "disabled"; + + ssusb: ssusb@11200000 { + compatible = "mediatek,ssusb"; + reg = <0 0x11200000 0 0x3e00>; + reg-names = "mac"; + interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_LOW>; + status = "disabled"; + }; + + xhci0: xhci@11200000 { + compatible = "mediatek,mtk-xhci"; + reg = <0 0x11200000 0 0x1000>; + reg-names = "mac"; + interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_LOW>; + clocks = <&clk26m>, + <&clk26m>, + <&clk26m>, + <&clk26m>; + clock-names = "sys_ck", "xhci_ck", "ref_ck", "mcu_ck"; + status = "disabled"; + }; + }; + + u3phy3: t-phy@11c50000 { + compatible = "mediatek,generic-tphy-v2"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0x11c50000 0x700>; + status = "okay"; + + u2port3: usb-phy@0 { + reg = <0x0 0x700>; + clocks = <&clk26m>; + clock-names = "ref"; + #phy-cells = <1>; + }; + }; + + xhci3: xhci3@112b0000 { + compatible = "mediatek,mt8195-xhci", + "mediatek,mtk-xhci"; + reg = <0 0x112b0000 0 0x1000>, + <0 0x112b3e00 0 0x0100>; + reg-names = "mac", "ippc"; + interrupts = <GIC_SPI 536 IRQ_TYPE_LEVEL_HIGH>; + phys = <&u2port3 PHY_TYPE_USB2>; + clocks = <&clk26m>, + <&clk26m>, + <&clk26m>; + clock-names = "sys_ck", "xhci_ck", "ref_ck"; + usb2-lpm-disable; + status = "disabled"; + }; + }; +}; diff --git a/arch/arm/mach-mediatek/Kconfig b/arch/arm/mach-mediatek/Kconfig index 04aa2fd97f..3a2af1cdee 100644 --- a/arch/arm/mach-mediatek/Kconfig +++ b/arch/arm/mach-mediatek/Kconfig @@ -67,6 +67,15 @@ config TARGET_MT8183 SD and MMC cards, UFS, PWM, I2C, I2S, S/PDIF, and several LPDDR3 and LPDDR4 options. +config TARGET_MT8195 + bool "MediaTek MT8195 SoC" + select ARM64 + help + The MediaTek MT8195 is a ARM64-based SoC with a quad-core Cortex-A73 and + a quad-core Cortex-A53. It is including UART, SPI, USB3.0 device and hosts, + SD and MMC cards, UFS, PWM, I2C, I2S, S/PDIF, and several LPDDR3 + and LPDDR4 options. + config TARGET_MT8512 bool "MediaTek MT8512 M1 Board" select ARM64 @@ -105,6 +114,7 @@ config SYS_BOARD default "mt7981" if TARGET_MT7981 default "mt7986" if TARGET_MT7986 default "mt8183" if TARGET_MT8183 + default "mt8195" if TARGET_MT8195 default "mt8512" if TARGET_MT8512 default "mt8516" if TARGET_MT8516 default "mt8518" if TARGET_MT8518 @@ -122,6 +132,7 @@ config SYS_CONFIG_NAME default "mt7981" if TARGET_MT7981 default "mt7986" if TARGET_MT7986 default "mt8183" if TARGET_MT8183 + default "mt8195" if TARGET_MT8195 default "mt8512" if TARGET_MT8512 default "mt8516" if TARGET_MT8516 default "mt8518" if TARGET_MT8518 @@ -134,7 +145,7 @@ config SYS_CONFIG_NAME config MTK_BROM_HEADER_INFO string default "media=nor" if TARGET_MT8518 || TARGET_MT8512 || TARGET_MT7629 || TARGET_MT7622 - default "media=emmc" if TARGET_MT8516 || TARGET_MT8365 || TARGET_MT8183 + default "media=emmc" if TARGET_MT8516 || TARGET_MT8365 || TARGET_MT8183 || TARGET_MT8195 default "media=snand;nandinfo=2k+64" if TARGET_MT7981 || TARGET_MT7986 default "lk=1" if TARGET_MT7623 diff --git a/arch/arm/mach-mediatek/Makefile b/arch/arm/mach-mediatek/Makefile index fc85293f71..fbbb5431d1 100644 --- a/arch/arm/mach-mediatek/Makefile +++ b/arch/arm/mach-mediatek/Makefile @@ -10,5 +10,6 @@ obj-$(CONFIG_TARGET_MT7629) += mt7629/ obj-$(CONFIG_TARGET_MT7981) += mt7981/ obj-$(CONFIG_TARGET_MT7986) += mt7986/ obj-$(CONFIG_TARGET_MT8183) += mt8183/ +obj-$(CONFIG_TARGET_MT8195) += mt8195/ obj-$(CONFIG_TARGET_MT8516) += mt8516/ obj-$(CONFIG_TARGET_MT8518) += mt8518/ diff --git a/arch/arm/mach-mediatek/mt8195/Makefile b/arch/arm/mach-mediatek/mt8195/Makefile new file mode 100644 index 0000000000..886ab7e4eb --- /dev/null +++ b/arch/arm/mach-mediatek/mt8195/Makefile @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0 + +obj-y += init.o diff --git a/arch/arm/mach-mediatek/mt8195/init.c b/arch/arm/mach-mediatek/mt8195/init.c new file mode 100644 index 0000000000..1eb4ade6c5 --- /dev/null +++ b/arch/arm/mach-mediatek/mt8195/init.c @@ -0,0 +1,81 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2022 MediaTek Inc. + * Copyright (C) 2022 BayLibre, SAS + * Author: Macpaul Lin <macpaul.lin(a)mediatek.com> + * Author: Fabien Parent <fparent(a)baylibre.com> + */ + +#include <clk.h> +#include <common.h> +#include <dm.h> +#include <fdtdec.h> +#include <ram.h> +#include <asm/arch/misc.h> +#include <asm/armv8/mmu.h> +#include <asm/sections.h> +#include <asm/system.h> +#include <dm/uclass.h> + +DECLARE_GLOBAL_DATA_PTR; + +int dram_init(void) +{ + int ret; + + ret = fdtdec_setup_memory_banksize(); + if (ret) + return ret; + + return fdtdec_setup_mem_size_base(); +} + +int dram_init_banksize(void) +{ + gd->bd->bi_dram[0].start = gd->ram_base; + gd->bd->bi_dram[0].size = gd->ram_size; + + return 0; +} + +int mtk_pll_early_init(void) +{ + return 0; +} + +int mtk_soc_early_init(void) +{ + return 0; +} + +void reset_cpu(ulong addr) +{ + psci_system_reset(); +} + +int print_cpuinfo(void) +{ + printf("CPU: MediaTek MT8195\n"); + return 0; +} + +static struct mm_region mt8195_mem_map[] = { + { + /* DDR */ + .virt = 0x40000000UL, + .phys = 0x40000000UL, + .size = 0x80000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE, + }, { + .virt = 0x00000000UL, + .phys = 0x00000000UL, + .size = 0x20000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { + 0, + } +}; + +struct mm_region *mem_map = mt8195_mem_map; -- 2.18.0

4 22

[PATCH] binman: Support optional external blobs
by Simon Glass 02 Jan '23

02 Jan '23

Some blobs are actually not necessary for the board to work correctly. Add a property to allow this to be indicated. Missing optional blobs do not cause a build failure. Signed-off-by: Simon Glass <sjg(a)chromium.org> --- tools/binman/binman.rst | 9 +++++++++ tools/binman/control.py | 11 +++++++++++ tools/binman/entry.py | 25 +++++++++++++++++++++---- tools/binman/etype/blob.py | 2 +- tools/binman/etype/section.py | 14 +++++++++++++- tools/binman/ftest.py | 10 ++++++++++ tools/binman/test/266_blob_ext_opt.dts | 21 +++++++++++++++++++++ 7 files changed, 86 insertions(+), 6 deletions(-) create mode 100644 tools/binman/test/266_blob_ext_opt.dts diff --git a/tools/binman/binman.rst b/tools/binman/binman.rst index 1ab6d012b83..391494907ab 100644 --- a/tools/binman/binman.rst +++ b/tools/binman/binman.rst @@ -689,6 +689,15 @@ no-expanded: `no-expanded` property disables this just for a single entry. Put the `no-expanded` boolean property in the node to select this behaviour. +optional: + External blobs are normally required to be present for the image to be + built (but see `External blobs`_). This properly allows an entry to be + optional, so that when it is cannot be found, this problem is ignored and + an empty file is used for this blob. This should be used only when the blob + is entirely optional and is not needed for correct operation of the image. + Note that missing, optional blobs do not produce a non-zero exit code from + binman, although it does show a warning about the missing external blob. + The attributes supported for images and sections are described below. Several are similar to those for entries. diff --git a/tools/binman/control.py b/tools/binman/control.py index 07225381146..e64740094f6 100644 --- a/tools/binman/control.py +++ b/tools/binman/control.py @@ -594,12 +594,14 @@ def ProcessImage(image, update_fdt, write_map, get_contents=True, image.BuildImage() if write_map: image.WriteMap() + missing_list = [] image.CheckMissing(missing_list) if missing_list: tout.warning("Image '%s' is missing external blobs and is non-functional: %s" % (image.name, ' '.join([e.name for e in missing_list]))) _ShowHelpForMissingBlobs(missing_list) + faked_list = [] image.CheckFakedBlobs(faked_list) if faked_list: @@ -607,6 +609,15 @@ def ProcessImage(image, update_fdt, write_map, get_contents=True, "Image '%s' has faked external blobs and is non-functional: %s" % (image.name, ' '.join([os.path.basename(e.GetDefaultFilename()) for e in faked_list]))) + + optional_list = [] + image.CheckOptional(optional_list) + if optional_list: + tout.warning( + "Image '%s' is missing external blobs but is still functional: %s" % + (image.name, ' '.join([e.name for e in optional_list]))) + _ShowHelpForMissingBlobs(optional_list) + missing_bintool_list = [] image.check_missing_bintools(missing_bintool_list) if missing_bintool_list: diff --git a/tools/binman/entry.py b/tools/binman/entry.py index de51d295891..d73f3013405 100644 --- a/tools/binman/entry.py +++ b/tools/binman/entry.py @@ -73,7 +73,9 @@ class Entry(object): compress: Compression algoithm used (e.g. 'lz4'), 'none' if none orig_offset: Original offset value read from node orig_size: Original size value read from node - missing: True if this entry is missing its contents + missing: True if this entry is missing its contents. Note that if it is + optional, this entry will not appear in the list generated by + entry.CheckMissing() since it is considered OK for it to be missing. allow_missing: Allow children of this entry to be missing (used by subclasses such as Entry_section) allow_fake: Allow creating a dummy fake file if the blob file is not @@ -95,6 +97,7 @@ class Entry(object): the entry itself, allowing it to vanish in certain circumstances. An absent entry is removed during processing so that it does not appear in the map + optional (bool): True if this entry contains an optional external blob """ fake_dir = None @@ -138,6 +141,7 @@ class Entry(object): self.elf_fname = None self.auto_write_symbols = auto_write_symbols self.absent = False + self.optional = False @staticmethod def FindEntryClass(etype, expanded): @@ -289,6 +293,7 @@ class Entry(object): self.offset_unset = fdt_util.GetBool(self._node, 'offset-unset') self.extend_size = fdt_util.GetBool(self._node, 'extend-size') self.missing_msg = fdt_util.GetString(self._node, 'missing-msg') + self.optional = fdt_util.GetBool(self._node, 'optional') # This is only supported by blobs and sections at present self.compress = fdt_util.GetString(self._node, 'compress', 'none') @@ -1039,14 +1044,15 @@ features to produce new behaviours. self.allow_fake = allow_fake def CheckMissing(self, missing_list): - """Check if any entries in this section have missing external blobs + """Check if the entry has missing external blobs - If there are missing blobs, the entries are added to the list + If there are missing (non-optional) blobs, the entries are added to the + list Args: missing_list: List of Entry objects to be added to """ - if self.missing: + if self.missing and not self.optional: missing_list.append(self) def check_fake_fname(self, fname, size=0): @@ -1085,6 +1091,17 @@ features to produce new behaviours. # This is meaningless for anything other than blobs pass + def CheckOptional(self, optional_list): + """Check if the entry has missing but optional external blobs + + If there are missing (optional) blobs, the entries are added to the list + + Args: + optional_list (list): List of Entry objects to be added to + """ + if self.missing and self.optional: + optional_list.append(self) + def GetAllowMissing(self): """Get whether a section allows missing external blobs diff --git a/tools/binman/etype/blob.py b/tools/binman/etype/blob.py index a50a8068901..70dea7158ee 100644 --- a/tools/binman/etype/blob.py +++ b/tools/binman/etype/blob.py @@ -39,7 +39,7 @@ class Entry_blob(Entry): def ObtainContents(self, fake_size=0): self._filename = self.GetDefaultFilename() self._pathname = tools.get_input_filename(self._filename, - self.external and self.section.GetAllowMissing()) + self.external and (self.optional or self.section.GetAllowMissing())) # Allow the file to be missing if not self._pathname: self._pathname, faked = self.check_fake_fname(self._filename, diff --git a/tools/binman/etype/section.py b/tools/binman/etype/section.py index 57bfee0b286..44dafaf7262 100644 --- a/tools/binman/etype/section.py +++ b/tools/binman/etype/section.py @@ -863,7 +863,8 @@ class Entry_section(Entry): def CheckMissing(self, missing_list): """Check if any entries in this section have missing external blobs - If there are missing blobs, the entries are added to the list + If there are missing (non-optional) blobs, the entries are added to the + list Args: missing_list: List of Entry objects to be added to @@ -882,6 +883,17 @@ class Entry_section(Entry): for entry in self._entries.values(): entry.CheckFakedBlobs(faked_blobs_list) + def CheckOptional(self, optional_list): + """Check the section for missing but optional external blobs + + If there are missing (optional) blobs, the entries are added to the list + + Args: + optional_list (list): List of Entry objects to be added to + """ + for entry in self._entries.values(): + entry.CheckOptional(optional_list) + def check_missing_bintools(self, missing_list): """Check if any entries in this section have missing bintools diff --git a/tools/binman/ftest.py b/tools/binman/ftest.py index f893050e706..330e8e1ccb4 100644 --- a/tools/binman/ftest.py +++ b/tools/binman/ftest.py @@ -6178,6 +6178,16 @@ fdt fdtmap Extract the devicetree blob from the fdtmap "Node '/binman/fit/images/@tee-SEQ/tee-os': Invalid OP-TEE file: size mismatch (expected 0x4, have 0xe)", str(exc.exception)) + def testExtblobOptional(self): + """Test an image with an external blob that is optional""" + with test_util.capture_sys_output() as (stdout, stderr): + data = self._DoReadFile('266_blob_ext_opt.dts') + self.assertEqual(REFCODE_DATA, data) + err = stderr.getvalue() + self.assertRegex( + err, + "Image '.*' is missing external blobs but is still functional: missing") + if __name__ == "__main__": unittest.main() diff --git a/tools/binman/test/266_blob_ext_opt.dts b/tools/binman/test/266_blob_ext_opt.dts new file mode 100644 index 00000000000..717153152ce --- /dev/null +++ b/tools/binman/test/266_blob_ext_opt.dts @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0+ + +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + + binman { + ok { + type = "blob-ext"; + filename = "refcode.bin"; + }; + + missing { + type = "blob-ext"; + filename = "missing.bin"; + optional; + }; + }; +}; -- 2.39.0.314.g84b9a713c41-goog

3 2

[PATCH] rockchip: Only call binman when TPL available
by Kever Yang 02 Jan '23

02 Jan '23

Rockchip platform use TPL to do the DRAM initialize for all the SoCs, if TPL is not available, means no available DRAM init program, and the u-boot-rockchip.bin is not functionable. Signed-off-by: Kever Yang <kever.yang(a)rock-chips.com> --- arch/arm/dts/rockchip-u-boot.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/dts/rockchip-u-boot.dtsi b/arch/arm/dts/rockchip-u-boot.dtsi index 584f21eb5bf..e2b0f389711 100644 --- a/arch/arm/dts/rockchip-u-boot.dtsi +++ b/arch/arm/dts/rockchip-u-boot.dtsi @@ -11,7 +11,7 @@ }; }; -#ifdef CONFIG_SPL +#ifdef CONFIG_TPL_BUILD &binman { simple-bin { filename = "u-boot-rockchip.bin"; -- 2.25.1

3 2

[PATCH] rockchip: rk3399: pass platform parameter to TF-A by default
by Quentin Schulz 02 Jan '23

02 Jan '23

From: Quentin Schulz <quentin.schulz(a)theobroma-systems.com> Long are gone the times TF-A couldn't handle the FDT passed by U-Boot. Specifically, since commit e7b586987c0a ("rockchip: don't crash if we get an FDT we can't parse") in TF-A, failure to parse the FDT will use the fallback mechanism. This patch was merged in TF-A v2.4-rc0 from two years ago. Therefore, let's finally pass the FDT to TF-A so that it can get the serial configuration from U-Boot FDT instead of requiring the user to patch TF-A hardcoded fallback values. Cc: Quentin Schulz <foss+uboot(a)0leil.net> Signed-off-by: Quentin Schulz <quentin.schulz(a)theobroma-systems.com> --- rockchip: rk3399: pass platform parameter to TF-A Finally pass the FDT address to TF-A since it now gracefully fallbacks to hardcoded defaults if it cannot parse it. This allows us to avoid modifying hardcoded values in TF-A to enable the console. This was tested with TF-A v2.7.0 on Puma Haikou RK3399. To: Simon Glass <sjg(a)chromium.org> To: Philipp Tomsich <philipp.tomsich(a)vrull.eu> To: Kever Yang <kever.yang(a)rock-chips.com> Cc: Hugh Cole-Baker <sigmaris(a)gmail.com> Cc: Walter Lozano <walter.lozano(a)collabora.com> Cc: u-boot(a)lists.denx.de --- arch/arm/mach-rockchip/Kconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 69d51ff378..2fcc23f9fa 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -249,7 +249,6 @@ config ROCKCHIP_RK3399 imply PRE_CONSOLE_BUFFER imply ROCKCHIP_COMMON_BOARD imply ROCKCHIP_SDRAM_COMMON - imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF imply SPL_ROCKCHIP_COMMON_BOARD imply TPL_SERIAL imply TPL_LIBCOMMON_SUPPORT --- base-commit: 0cbeed4f6648e0e4966475e3544280a69ecb59d3 change-id: 20221114-rk3399-tf-a-plat-param-3ab055f40b9e Best regards, -- Quentin Schulz <quentin.schulz(a)theobroma-systems.com>

6 6

[PATCH] timer: orion-timer: Fix problem with early static variable
by Stefan Roese 02 Jan '23

02 Jan '23

We've noticed that at least one Kirkwood board (Pogo v4) has problems with the new orion DM timer implementation. Debugging revealed that this issue is related with the static variable "early_init_done" which does not work correctly before relocation in all cases. This patch removes this static variable and replaces it's functionality via a function that detects if the timer is already initialized. Signed-off-by: Stefan Roese <sr(a)denx.de> Cc: Pali Rohár <pali(a)kernel.org> Cc: Michael Walle <michael(a)walle.cc> Cc: Tony Dinh <mibodhi(a)gmail.com> --- drivers/timer/orion-timer.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/timer/orion-timer.c b/drivers/timer/orion-timer.c index d0eab3ce781d..6804bf0fa2cb 100644 --- a/drivers/timer/orion-timer.c +++ b/drivers/timer/orion-timer.c @@ -23,15 +23,19 @@ struct orion_timer_priv { #define MVEBU_TIMER_FIXED_RATE_25MHZ 25000000 -static bool early_init_done __section(".data") = false; +static bool early_init_done(void *base) +{ + if (readl(base + TIMER_CTRL) & TIMER0_EN) + return true; + return false; +} /* Common functions for early (boot) and DM based timer */ static void orion_timer_init(void *base, enum input_clock_type type) { /* Only init the timer once */ - if (early_init_done) + if (early_init_done(base)) return; - early_init_done = true; writel(~0, base + TIMER0_VAL); writel(~0, base + TIMER0_RELOAD); -- 2.39.0

2 2

[PATCH] i2c: add dm_i2c_probe_chip() to detect chip presence
by Johan Korsnes 01 Jan '23

01 Jan '23

Add function to determine whether a chip is present. This check is typically implemented by writing the chip address to the bus and checking that the chip replies with an ACK. The already existing dm_i2c_probe() will attempt to bind/probe the relevant driver if the chip is present. This makes it unsuitable for situations where one only wants to know the presence of a chip. Signed-off-by: Johan Korsnes <johan.korsnes(a)remarkable.no> Cc: Eirik Schultz <schultzern(a)gmail.com> Cc: Heiko Schocher <hs(a)denx.de> Cc: Simon Glass <sjg(a)chromium.org> --- Previously, I've used i2c_probe() to determine whether or not an i2c chip is present on an i2c bus. With the introduction of the driver model this function is deprecated. Fortunately, I found dm_i2c_probe(), which I expected to perform the same check, it was even documented to be suitable for this purpose: ``` dm_i2c_probe() - probe a particular chip address This can be useful to check for the existence of a chip on the bus. It is typically implemented by writing the chip address to the bus and checking that the chip replies with an ACK. ``` Unfortunately, it does not seem to be a replacement. It seems dm_i2c_probe() will attempt to bind/probe a driver if the chip is present, and will in turn return the return value from the driver probe/bind attempt. --- drivers/i2c/i2c-uclass.c | 11 +++++++++++ include/i2c.h | 16 +++++++++++++--- 2 files changed, 24 insertions(+), 3 deletions(-) diff --git a/drivers/i2c/i2c-uclass.c b/drivers/i2c/i2c-uclass.c index 8d9a89ed89..16a2be7531 100644 --- a/drivers/i2c/i2c-uclass.c +++ b/drivers/i2c/i2c-uclass.c @@ -409,6 +409,17 @@ int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags, return ret; } +int dm_i2c_probe_chip(struct udevice *bus, uint chip_addr, uint chip_flags) +{ + int ret; + + ret = i2c_probe_chip(bus, chip_addr, chip_flags); + debug("%s: bus='%s', address %02x, ret=%d\n", __func__, bus->name, + chip_addr, ret); + + return ret; +} + int dm_i2c_set_bus_speed(struct udevice *bus, unsigned int speed) { struct dm_i2c_ops *ops = i2c_get_ops(bus); diff --git a/include/i2c.h b/include/i2c.h index e0ee94e550..4c22d8c887 100644 --- a/include/i2c.h +++ b/include/i2c.h @@ -206,6 +206,18 @@ int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer, /** * dm_i2c_probe() - probe a particular chip address * + * @bus: Bus to probe + * @chip_addr: 7-bit address to probe (10-bit and others are not supported) + * @chip_flags: Flags for the probe (see enum dm_i2c_chip_flags) + * @devp: Returns the device found, or NULL if none + * Return: 0 if a chip was found at that address, -ve if not + */ +int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags, + struct udevice **devp); + +/** + * dm_i2c_probe_chip() - probe a particular chip address + * * This can be useful to check for the existence of a chip on the bus. * It is typically implemented by writing the chip address to the bus * and checking that the chip replies with an ACK. @@ -213,11 +225,9 @@ int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer, * @bus: Bus to probe * @chip_addr: 7-bit address to probe (10-bit and others are not supported) * @chip_flags: Flags for the probe (see enum dm_i2c_chip_flags) - * @devp: Returns the device found, or NULL if none * Return: 0 if a chip was found at that address, -ve if not */ -int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags, - struct udevice **devp); +int dm_i2c_probe_chip(struct udevice *bus, uint chip_addr, uint chip_flags); /** * dm_i2c_reg_read() - Read a value from an I2C register -- 2.38.1

3 2

[PATCH v4 0/5] cmd: source: Support specifying config name
by Sean Anderson 31 Dec '22

31 Dec '22

This series adds support for using configs with the source command. See the third patch for details. Changes in v4: - Add fallback for fit_config_verify - Fix fit_conf_get_prop_node missing a phase Changes in v3: - Halve the quotes Changes in v2: - Add test for source command Sean Anderson (5): image: Add fallback for fit_config_verify test: Add test for source command treewide: Use NULL for script image name cmd: source: Clean up a few lines cmd: source: Support specifying config name .../cmd_stm32prog/cmd_stm32prog.c | 2 +- boot/bootmeth_script.c | 2 +- cmd/source.c | 84 +++++++++++++------ doc/uImage.FIT/source_file_format.txt | 3 + drivers/usb/gadget/f_sdp.c | 2 +- include/image.h | 26 ++++-- test/py/tests/source.its | 43 ++++++++++ test/py/tests/test_source.py | 37 ++++++++ 8 files changed, 164 insertions(+), 35 deletions(-) create mode 100644 test/py/tests/source.its create mode 100644 test/py/tests/test_source.py -- 2.35.1.1320.gc452695387.dirty

3 8

[RFC PATCH v5 00/24] Modernize U-Boot shell
by Francis Laniel 31 Dec '22

31 Dec '22

Hi. Before presenting this contribution, I would like to pay homage to Wolfgang Denk for his work on the U-Boot project. Moreover, first versions of this series received valued feedback from him and he also contributed to the discussion which leaded to this patchset. During 2021 summer, Sean Anderson wrote a contribution to add a new shell, based on LIL, to U-Boot [1, 2]. While one of the goals of this contribution was to address the fact actual U-Boot shell, which is based on Busybox hush, is old there was a discussion about adding a new shell versus updating the actual one [3, 4]. So, in this series, with Harald Seiler, we updated the actual U-Boot shell to reflect what is currently in Busybox source code. Basically, this contribution is about taking a snapshot of Busybox shell/hush.c file (as it exists in commit 37460f5da) and adapt it to suit U-Boot needs. This contribution was written to be as backward-compatible as possible to avoid breaking the existing. So, the 2021 hush flavor offers the same as the actual, that is to say: 1. Variable expansion. 2. Instruction lists (;, && and ||). 3. If, then and else. 4. Loops (for, while and until). No new features offered by Busybox hush were implemented (e.g. functions). It is possible to change the parser at runtime using the "parser" command: => parser print old => parser set 2021 => parser print 2021 => parser set old The default parser is the old one. Note that to use both parser, you would need to set both CONFIG_HUSH_2021_PARSER and CONFIG_HUSH_OLD_PARSER. In terms of testing, new unit tests were added to ut to ensure the new behavior is the same as the old one and it does not add regression. Nonetheless, if old behavior was buggy and fixed upstream, the fix is then added to U-Boot [5]. In sandbox, all of these tests pass smoothly: => printenv board board=sandbox => ut hush Running 20 hush tests ... Failures: 0 => parser set 2021 => ut hush Running 20 hush tests ... Failures: 0 Thanks to the effort of Harald Seiler, I was successful booting a board: => printenv fdtfile fdtfile=amlogic/meson-gxl-s905x-libretech-cc.dtb => parser get old => boot ... root@lepotato:~# root@lepotato:~# reboot ... => parser set 2021 => parser get 2021 => printenv fdtfile fdtfile=amlogic/meson-gxl-s905x-libretech-cc.dtb => boot ... root@lepotato:~# I was able to have the CI passes but I had to not use CONFIG_HUSH_2021_PARSER for two boards: 1. u-boot.img file size for the rcar3_ulcb, when built with CONFIG_HUSH_PARSER_2021, exceeds the 1MB file limit of 890 bytes. It should be possible to reduce the image size by not compiling some hush features (e.g. loop) for this particular board. 2. The keymile board family is the only set of boards to call get_local_var(), set_local_var() and unset_local_var(). Sadly, these functions are static in this contribution. I could have change all of them to introduce code like this: *_local_var(/*...*/) { if (gd->flags & GD_FLG_HUSH_OLD_PARSER) return *_local_var_old(/*...*/); if (gd->flags & GD_FLG_HUSH_2021_PARSER) return *_local_var_2021(/*...*/); } But this would have mean renaming all old hush functions calls and I did not want to change the old hush particularly to avoid breaking things. Instead, I change the keymile board to use environment variable instead of local ones. I think this particularities can be addressed in future works. For all these reasons, I marked this contribution as RFC to indeed collect your opinions. My goal is not to change suddenly actual shell to this one, we clearly need a transition period to think about it. I think it is better to see this contribution as a proof of concept which shows it is possible to update the actual shell. If you want to review it - your review will really be appreciated - here are some information regarding the commits: * commits marked as "test:" deal with unit tests. * commit "cli: Add Busybox upstream hush.c file." copies Busybox shell/hush.c into U-Boot tree, this explain why this commit contains around 12000 additions. * commit "cli: Port Busybox 2021 hush to U-Boot." modifies previously added file to permit us to use this as new shell. The really good idea of #include'ing Busybox code into a wrapper file to define some particular functions while minimizing modifications to upstream code comes from Harald Seiler. * commit "cmd: Add new parser command" adds a new command which permits selecting parser at runtime. I am not really satisfied with the fact it calls cli_init() and cli_loop() each time the parser is set, so your reviews would be welcomed. * Other commits focus on enabling features we need (e.g. if). Changes since: v2: * Added a small fix to compile sandbox with NO_SDL=1. * Added a command to change parser at runtime. * Added 2021 parser function to all run_command*(). v3: * Various bug fixes pointed by the CI. * Added upstream busybox hush commits until 6th February 2022. v4: * Various cleaning. * Modified python test to accept failure output when the test are designed to fail. * Bumped upstream busybox hush commits until 24h March 2022. Francis Laniel (24): test: Add framework to test hush behavior test: hush: Test hush if/else test/py: hush_if_test: Remove the test file test: hush: Test hush variable expansion test: hush: Test hush commands list test: hush: Test hush loops cli: Add Busybox upstream hush.c file cli: Port Busybox 2021 hush to U-Boot cli: Add menu for hush parser global_data.h: add GD_FLG_HUSH_OLD_PARSER flag cmd: Add new parser command cli: Enables using hush 2021 parser as command line parser cli: hush_2021: Enable variables expansion for hush 2021 cli: hush_2021: Add functions to be called from run_command() cli: add hush 2021 as parser for run_command*() test: hush: Fix instructions list tests for hush 2021 test: hush: Fix variable expansion tests for hush 2021 cli: hush_2021: Enable using \< and \> as string compare operators cli: hush_2021: Enable if keyword test: hush: Fix if tests for hush 2021 cli: hush_2021: Enable loops test: hush: Fix loop tests for hush 2021 cli: hush_2021: Add upstream commits up to 24th March 2022. DO NOT MERGE: only to make CI happy cmd/Kconfig | 22 + cmd/Makefile | 2 + cmd/parser.c | 125 + common/Makefile | 3 +- common/cli.c | 84 +- common/cli_hush_2021.c | 303 + common/cli_hush_upstream.c | 12912 +++++++++++++++++++++++++++ configs/rcar3_ulcb_defconfig | 2 + include/asm-generic/global_data.h | 8 + include/cli_hush.h | 51 +- include/test/hush.h | 15 + include/test/suites.h | 1 + test/Makefile | 3 + test/cmd_ut.c | 6 + test/hush/Makefile | 10 + test/hush/cmd_ut_hush.c | 20 + test/hush/dollar.c | 226 + test/hush/if.c | 353 + test/hush/list.c | 140 + test/hush/loop.c | 91 + test/py/tests/test_hush_if_test.py | 184 - test/py/tests/test_ut.py | 8 +- 22 files changed, 14369 insertions(+), 200 deletions(-) create mode 100644 cmd/parser.c create mode 100644 common/cli_hush_2021.c create mode 100644 common/cli_hush_upstream.c create mode 100644 include/test/hush.h create mode 100644 test/hush/Makefile create mode 100644 test/hush/cmd_ut_hush.c create mode 100644 test/hush/dollar.c create mode 100644 test/hush/if.c create mode 100644 test/hush/list.c create mode 100644 test/hush/loop.c delete mode 100644 test/py/tests/test_hush_if_test.py Best regards and thank you in advance. --- [1] https://lists.denx.de/pipermail/u-boot/2021-July/453347.html [2] https://runtimeterror.com/tech/lil/ [3] https://lists.denx.de/pipermail/u-boot/2021-July/453790.html [4] https://lists.denx.de/pipermail/u-boot/2021-July/453848.html [5] https://lists.denx.de/pipermail/u-boot/2021-August/458569.html [6] https://dev.azure.com/u-boot/u-boot/_build/results?buildId=5279&view=results -- 2.25.1

6 31

Pull request: u-boot-rockchip/for-next
by Kever Yang 31 Dec '22

31 Dec '22

Hi Tom, Please pull the updates for rockchip platform for next: - Add support for rv1126 soc and rv1126 neu2 io board; - Add support for rk3399 pine64 pinephone pro board; - dts sync from linux for rk3399 and px30; Travis: https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/jobs/546342 Thanks, - Kever The following changes since commit 3e4cbe184a0f6537abb457d6afa61224396c4e46: Merge branch '2022-12-23-complete-phase1-CONFIG-migration' into next (2022-12-23 22:19:39 -0500) are available in the Git repository at: https://source.denx.de/u-boot/custodians/u-boot-rockchip.git for-next for you to fetch changes up to 9636b196c7046f1efa16fcfe7e1df9dcbb0f77fc: board: rockchip: Add Edgeble Neu2 IO Board (2022-12-26 13:53:26 +0800) ---------------------------------------------------------------- Christopher Obbard (1): configs: roc-pc-rk3399: Enable rockchip efuse support Jagan Teki (25): ram: Mark ram-uclass depend on TPL_DM or SPL_DM ram: rockchip: Add common ddr type configs ram: rockchip: Compute ddr capacity based on grf split ram: rockchip: Update ddr pctl regs for px30 ram: rockchip: Add rv1126 ddr3 support ram: rockchip: Add rv1126 ddr loader params ram: rockchip: Add rv1126 ddr driver support ram: rockchip: rv1126: Control ddr init prints via DEBUG ram: rockchip: Add rv1126 lpddr4 support pinctrl: rockchip: Add pinctrl route types pinctrl: rockchip: Add rv1126 support arch: rockchip: Add cru header for rv1126 dt-bindings: clk: Add dt-binding header for RV1126 clk: rockchip: Add rv1126 clk support dt-bindings: power: Add power-domain header for rv1126 arm: rockchip: Add grf header for rv1126 ARM: dts: rockchip: Add Rockchip RV1126 pinctrl ARM: dts: rockchip: Add Rockchip RV1126 SoC arm: rockchip: Add RV1126 arch core support arm: rockchip: rv1126: Set dram area unsecure for SPL rockchip: mkimage: Add rv1126 support ARM: dts: rockchip: rv1126: Add Edgeble Neural Compute Module 2(Neu2) ARM: dts: rockchip: rv1126: Add Edgeble Neural Compute Module 2(Neu2) IO ARM: dts: rockchip: Add rv1126-u-boot.dtsi board: rockchip: Add Edgeble Neu2 IO Board John Keeping (2): rc4: mark key as const rockchip: mkimage: make RC4 key const Peter Robinson (3): arm64: dts: rk3399: sync rk3399.dtsi from 6.1-rc1 arm64: dts: rk3399: Add upstream Pinephone Pro dts rockchip: Add initial support for the PINE64 Pinephone Pro Quentin Schulz (7): rockchip: px30: make watchdog and tsadc trigger a first global reset rockchip: clk: add watchdog clock to px30_clk_enable rockchip: puma-rk3399: sync DTS with Linux kernel next-20221114 rockchip: px30: fix CFG_IRAM_BASE rockchip: px30: list possible SPL boot devices rockchip: px30: insert u-boot, spl-boot-device into U-Boot device tree arm64: dts: rockchip: sync px30 DTSI with Linux kernel next-20221114 arch/arm/dts/Makefile | 4 + arch/arm/dts/px30.dtsi | 28 +- arch/arm/dts/rk3399-opp.dtsi | 6 +- arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi | 39 + arch/arm/dts/rk3399-pinephone-pro.dts | 398 +++ arch/arm/dts/rk3399-puma-haikou.dts | 5 +- arch/arm/dts/rk3399-puma.dtsi | 32 +- arch/arm/dts/rk3399-u-boot.dtsi | 36 +- arch/arm/dts/rk3399.dtsi | 200 +- arch/arm/dts/rv1126-edgeble-neu2-io-u-boot.dtsi | 10 + arch/arm/dts/rv1126-edgeble-neu2-io.dts | 42 + arch/arm/dts/rv1126-edgeble-neu2.dtsi | 338 ++ arch/arm/dts/rv1126-pinctrl.dtsi | 211 ++ arch/arm/dts/rv1126-u-boot.dtsi | 62 + arch/arm/dts/rv1126.dtsi | 438 +++ arch/arm/include/asm/arch-rockchip/cru_rv1126.h | 459 +++ .../include/asm/arch-rockchip/dram_spec_timing.h | 452 +++ arch/arm/include/asm/arch-rockchip/grf_rv1126.h | 251 ++ arch/arm/include/asm/arch-rockchip/sdram_common.h | 214 +- arch/arm/include/asm/arch-rockchip/sdram_msch.h | 12 + .../include/asm/arch-rockchip/sdram_pctl_px30.h | 100 +- .../include/asm/arch-rockchip/sdram_phy_rv1126.h | 93 + arch/arm/include/asm/arch-rockchip/sdram_rv1126.h | 420 +++ arch/arm/include/asm/arch-rv1126/boot0.h | 11 + arch/arm/include/asm/arch-rv1126/gpio.h | 11 + arch/arm/mach-rockchip/Kconfig | 46 + arch/arm/mach-rockchip/Makefile | 1 + arch/arm/mach-rockchip/px30/px30.c | 61 + arch/arm/mach-rockchip/rk3399/Kconfig | 8 + arch/arm/mach-rockchip/rv1126/Kconfig | 59 + arch/arm/mach-rockchip/rv1126/Makefile | 13 + arch/arm/mach-rockchip/rv1126/clk_rv1126.c | 33 + arch/arm/mach-rockchip/rv1126/rv1126.c | 75 + arch/arm/mach-rockchip/rv1126/syscon_rv1126.c | 47 + board/edgeble/neural-compute-module-2/Kconfig | 16 + board/edgeble/neural-compute-module-2/MAINTAINERS | 6 + board/edgeble/neural-compute-module-2/Makefile | 7 + board/edgeble/neural-compute-module-2/neu2.c | 4 + board/engicam/px30_core/Kconfig | 2 +- board/pine64/pinephone-pro-rk3399/Kconfig | 15 + board/pine64/pinephone-pro-rk3399/MAINTAINERS | 8 + board/pine64/pinephone-pro-rk3399/Makefile | 1 + .../pinephone-pro-rk3399/pinephone-pro-rk3399.c | 76 + common/spl/Kconfig.tpl | 2 +- configs/khadas-edge-captain-rk3399_defconfig | 2 +- configs/khadas-edge-rk3399_defconfig | 2 +- configs/khadas-edge-v-rk3399_defconfig | 2 +- configs/leez-rk3399_defconfig | 2 +- configs/nanopi-r4s-rk3399_defconfig | 2 +- configs/neu2-io-rv1126_defconfig | 57 + configs/pinebook-pro-rk3399_defconfig | 2 +- configs/pinephone-pro-rk3399_defconfig | 104 + configs/roc-pc-mezzanine-rk3399_defconfig | 4 +- configs/roc-pc-rk3399_defconfig | 4 +- configs/rock-pi-4-rk3399_defconfig | 2 +- configs/rock-pi-4c-rk3399_defconfig | 2 +- configs/rockpro64-rk3399_defconfig | 2 +- doc/board/rockchip/rockchip.rst | 3 + drivers/clk/rockchip/Makefile | 1 + drivers/clk/rockchip/clk_px30.c | 3 + drivers/clk/rockchip/clk_rk3399.c | 2 +- drivers/clk/rockchip/clk_rv1126.c | 1889 +++++++++++ drivers/pinctrl/rockchip/Makefile | 1 + drivers/pinctrl/rockchip/pinctrl-px30.c | 11 +- drivers/pinctrl/rockchip/pinctrl-rk3128.c | 11 +- drivers/pinctrl/rockchip/pinctrl-rk322x.c | 11 +- drivers/pinctrl/rockchip/pinctrl-rk3288.c | 11 +- drivers/pinctrl/rockchip/pinctrl-rk3308.c | 11 +- drivers/pinctrl/rockchip/pinctrl-rk3328.c | 11 +- drivers/pinctrl/rockchip/pinctrl-rk3399.c | 11 +- drivers/pinctrl/rockchip/pinctrl-rockchip-core.c | 45 +- drivers/pinctrl/rockchip/pinctrl-rockchip.h | 58 +- drivers/pinctrl/rockchip/pinctrl-rv1126.c | 416 +++ drivers/ram/Makefile | 2 +- drivers/ram/rockchip/Kconfig | 32 +- drivers/ram/rockchip/Makefile | 1 + .../ram/rockchip/sdram-rv1126-ddr3-detect-1056.inc | 72 + .../ram/rockchip/sdram-rv1126-ddr3-detect-328.inc | 72 + .../ram/rockchip/sdram-rv1126-ddr3-detect-396.inc | 72 + .../ram/rockchip/sdram-rv1126-ddr3-detect-528.inc | 72 + .../ram/rockchip/sdram-rv1126-ddr3-detect-664.inc | 72 + .../ram/rockchip/sdram-rv1126-ddr3-detect-784.inc | 72 + .../ram/rockchip/sdram-rv1126-ddr3-detect-924.inc | 72 + .../ram/rockchip/sdram-rv1126-loader_params.inc | 197 ++ .../rockchip/sdram-rv1126-lpddr4-detect-1056.inc | 78 + .../rockchip/sdram-rv1126-lpddr4-detect-328.inc | 78 + .../rockchip/sdram-rv1126-lpddr4-detect-396.inc | 78 + .../rockchip/sdram-rv1126-lpddr4-detect-528.inc | 78 + .../rockchip/sdram-rv1126-lpddr4-detect-664.inc | 78 + .../rockchip/sdram-rv1126-lpddr4-detect-784.inc | 78 + .../rockchip/sdram-rv1126-lpddr4-detect-924.inc | 78 + drivers/ram/rockchip/sdram_common.c | 6 +- drivers/ram/rockchip/sdram_pctl_px30.c | 6 +- drivers/ram/rockchip/sdram_px30.c | 8 +- drivers/ram/rockchip/sdram_rk3328.c | 2 +- drivers/ram/rockchip/sdram_rk3399.c | 9 +- drivers/ram/rockchip/sdram_rv1126.c | 3543 ++++++++++++++++++++ include/configs/neural-compute-module-2.h | 21 + include/configs/pinephone-pro-rk3399.h | 19 + include/configs/px30_common.h | 3 +- include/configs/rv1126_common.h | 40 + include/dt-bindings/clock/rk3399-cru.h | 24 +- include/dt-bindings/clock/rockchip,rv1126-cru.h | 632 ++++ include/dt-bindings/power/rk3399-power.h | 1 + include/dt-bindings/power/rockchip,rv1126-power.h | 35 + include/rc4.h | 2 +- lib/rc4.c | 2 +- tools/rkcommon.c | 3 +- 108 files changed, 12471 insertions(+), 201 deletions(-) create mode 100644 arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi create mode 100644 arch/arm/dts/rk3399-pinephone-pro.dts create mode 100644 arch/arm/dts/rv1126-edgeble-neu2-io-u-boot.dtsi create mode 100644 arch/arm/dts/rv1126-edgeble-neu2-io.dts create mode 100644 arch/arm/dts/rv1126-edgeble-neu2.dtsi create mode 100644 arch/arm/dts/rv1126-pinctrl.dtsi create mode 100644 arch/arm/dts/rv1126-u-boot.dtsi create mode 100644 arch/arm/dts/rv1126.dtsi create mode 100644 arch/arm/include/asm/arch-rockchip/cru_rv1126.h create mode 100644 arch/arm/include/asm/arch-rockchip/dram_spec_timing.h create mode 100644 arch/arm/include/asm/arch-rockchip/grf_rv1126.h create mode 100644 arch/arm/include/asm/arch-rockchip/sdram_phy_rv1126.h create mode 100644 arch/arm/include/asm/arch-rockchip/sdram_rv1126.h create mode 100644 arch/arm/include/asm/arch-rv1126/boot0.h create mode 100644 arch/arm/include/asm/arch-rv1126/gpio.h create mode 100644 arch/arm/mach-rockchip/rv1126/Kconfig create mode 100644 arch/arm/mach-rockchip/rv1126/Makefile create mode 100644 arch/arm/mach-rockchip/rv1126/clk_rv1126.c create mode 100644 arch/arm/mach-rockchip/rv1126/rv1126.c create mode 100644 arch/arm/mach-rockchip/rv1126/syscon_rv1126.c create mode 100644 board/edgeble/neural-compute-module-2/Kconfig create mode 100644 board/edgeble/neural-compute-module-2/MAINTAINERS create mode 100644 board/edgeble/neural-compute-module-2/Makefile create mode 100644 board/edgeble/neural-compute-module-2/neu2.c create mode 100644 board/pine64/pinephone-pro-rk3399/Kconfig create mode 100644 board/pine64/pinephone-pro-rk3399/MAINTAINERS create mode 100644 board/pine64/pinephone-pro-rk3399/Makefile create mode 100644 board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c create mode 100644 configs/neu2-io-rv1126_defconfig create mode 100644 configs/pinephone-pro-rk3399_defconfig create mode 100644 drivers/clk/rockchip/clk_rv1126.c create mode 100644 drivers/pinctrl/rockchip/pinctrl-rv1126.c create mode 100644 drivers/ram/rockchip/sdram-rv1126-ddr3-detect-1056.inc create mode 100644 drivers/ram/rockchip/sdram-rv1126-ddr3-detect-328.inc create mode 100644 drivers/ram/rockchip/sdram-rv1126-ddr3-detect-396.inc create mode 100644 drivers/ram/rockchip/sdram-rv1126-ddr3-detect-528.inc create mode 100644 drivers/ram/rockchip/sdram-rv1126-ddr3-detect-664.inc create mode 100644 drivers/ram/rockchip/sdram-rv1126-ddr3-detect-784.inc create mode 100644 drivers/ram/rockchip/sdram-rv1126-ddr3-detect-924.inc create mode 100644 drivers/ram/rockchip/sdram-rv1126-loader_params.inc create mode 100644 drivers/ram/rockchip/sdram-rv1126-lpddr4-detect-1056.inc create mode 100644 drivers/ram/rockchip/sdram-rv1126-lpddr4-detect-328.inc create mode 100644 drivers/ram/rockchip/sdram-rv1126-lpddr4-detect-396.inc create mode 100644 drivers/ram/rockchip/sdram-rv1126-lpddr4-detect-528.inc create mode 100644 drivers/ram/rockchip/sdram-rv1126-lpddr4-detect-664.inc create mode 100644 drivers/ram/rockchip/sdram-rv1126-lpddr4-detect-784.inc create mode 100644 drivers/ram/rockchip/sdram-rv1126-lpddr4-detect-924.inc create mode 100644 drivers/ram/rockchip/sdram_rv1126.c create mode 100644 include/configs/neural-compute-module-2.h create mode 100644 include/configs/pinephone-pro-rk3399.h create mode 100644 include/configs/rv1126_common.h create mode 100644 include/dt-bindings/clock/rockchip,rv1126-cru.h create mode 100644 include/dt-bindings/power/rockchip,rv1126-power.h

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