November 2022 - U-Boot

[RFC PATCH v5 00/24] Modernize U-Boot shell
by Francis Laniel 31 Dec '22

31 Dec '22

Hi. Before presenting this contribution, I would like to pay homage to Wolfgang Denk for his work on the U-Boot project. Moreover, first versions of this series received valued feedback from him and he also contributed to the discussion which leaded to this patchset. During 2021 summer, Sean Anderson wrote a contribution to add a new shell, based on LIL, to U-Boot [1, 2]. While one of the goals of this contribution was to address the fact actual U-Boot shell, which is based on Busybox hush, is old there was a discussion about adding a new shell versus updating the actual one [3, 4]. So, in this series, with Harald Seiler, we updated the actual U-Boot shell to reflect what is currently in Busybox source code. Basically, this contribution is about taking a snapshot of Busybox shell/hush.c file (as it exists in commit 37460f5da) and adapt it to suit U-Boot needs. This contribution was written to be as backward-compatible as possible to avoid breaking the existing. So, the 2021 hush flavor offers the same as the actual, that is to say: 1. Variable expansion. 2. Instruction lists (;, && and ||). 3. If, then and else. 4. Loops (for, while and until). No new features offered by Busybox hush were implemented (e.g. functions). It is possible to change the parser at runtime using the "parser" command: => parser print old => parser set 2021 => parser print 2021 => parser set old The default parser is the old one. Note that to use both parser, you would need to set both CONFIG_HUSH_2021_PARSER and CONFIG_HUSH_OLD_PARSER. In terms of testing, new unit tests were added to ut to ensure the new behavior is the same as the old one and it does not add regression. Nonetheless, if old behavior was buggy and fixed upstream, the fix is then added to U-Boot [5]. In sandbox, all of these tests pass smoothly: => printenv board board=sandbox => ut hush Running 20 hush tests ... Failures: 0 => parser set 2021 => ut hush Running 20 hush tests ... Failures: 0 Thanks to the effort of Harald Seiler, I was successful booting a board: => printenv fdtfile fdtfile=amlogic/meson-gxl-s905x-libretech-cc.dtb => parser get old => boot ... root@lepotato:~# root@lepotato:~# reboot ... => parser set 2021 => parser get 2021 => printenv fdtfile fdtfile=amlogic/meson-gxl-s905x-libretech-cc.dtb => boot ... root@lepotato:~# I was able to have the CI passes but I had to not use CONFIG_HUSH_2021_PARSER for two boards: 1. u-boot.img file size for the rcar3_ulcb, when built with CONFIG_HUSH_PARSER_2021, exceeds the 1MB file limit of 890 bytes. It should be possible to reduce the image size by not compiling some hush features (e.g. loop) for this particular board. 2. The keymile board family is the only set of boards to call get_local_var(), set_local_var() and unset_local_var(). Sadly, these functions are static in this contribution. I could have change all of them to introduce code like this: *_local_var(/*...*/) { if (gd->flags & GD_FLG_HUSH_OLD_PARSER) return *_local_var_old(/*...*/); if (gd->flags & GD_FLG_HUSH_2021_PARSER) return *_local_var_2021(/*...*/); } But this would have mean renaming all old hush functions calls and I did not want to change the old hush particularly to avoid breaking things. Instead, I change the keymile board to use environment variable instead of local ones. I think this particularities can be addressed in future works. For all these reasons, I marked this contribution as RFC to indeed collect your opinions. My goal is not to change suddenly actual shell to this one, we clearly need a transition period to think about it. I think it is better to see this contribution as a proof of concept which shows it is possible to update the actual shell. If you want to review it - your review will really be appreciated - here are some information regarding the commits: * commits marked as "test:" deal with unit tests. * commit "cli: Add Busybox upstream hush.c file." copies Busybox shell/hush.c into U-Boot tree, this explain why this commit contains around 12000 additions. * commit "cli: Port Busybox 2021 hush to U-Boot." modifies previously added file to permit us to use this as new shell. The really good idea of #include'ing Busybox code into a wrapper file to define some particular functions while minimizing modifications to upstream code comes from Harald Seiler. * commit "cmd: Add new parser command" adds a new command which permits selecting parser at runtime. I am not really satisfied with the fact it calls cli_init() and cli_loop() each time the parser is set, so your reviews would be welcomed. * Other commits focus on enabling features we need (e.g. if). Changes since: v2: * Added a small fix to compile sandbox with NO_SDL=1. * Added a command to change parser at runtime. * Added 2021 parser function to all run_command*(). v3: * Various bug fixes pointed by the CI. * Added upstream busybox hush commits until 6th February 2022. v4: * Various cleaning. * Modified python test to accept failure output when the test are designed to fail. * Bumped upstream busybox hush commits until 24h March 2022. Francis Laniel (24): test: Add framework to test hush behavior test: hush: Test hush if/else test/py: hush_if_test: Remove the test file test: hush: Test hush variable expansion test: hush: Test hush commands list test: hush: Test hush loops cli: Add Busybox upstream hush.c file cli: Port Busybox 2021 hush to U-Boot cli: Add menu for hush parser global_data.h: add GD_FLG_HUSH_OLD_PARSER flag cmd: Add new parser command cli: Enables using hush 2021 parser as command line parser cli: hush_2021: Enable variables expansion for hush 2021 cli: hush_2021: Add functions to be called from run_command() cli: add hush 2021 as parser for run_command*() test: hush: Fix instructions list tests for hush 2021 test: hush: Fix variable expansion tests for hush 2021 cli: hush_2021: Enable using \< and \> as string compare operators cli: hush_2021: Enable if keyword test: hush: Fix if tests for hush 2021 cli: hush_2021: Enable loops test: hush: Fix loop tests for hush 2021 cli: hush_2021: Add upstream commits up to 24th March 2022. DO NOT MERGE: only to make CI happy cmd/Kconfig | 22 + cmd/Makefile | 2 + cmd/parser.c | 125 + common/Makefile | 3 +- common/cli.c | 84 +- common/cli_hush_2021.c | 303 + common/cli_hush_upstream.c | 12912 +++++++++++++++++++++++++++ configs/rcar3_ulcb_defconfig | 2 + include/asm-generic/global_data.h | 8 + include/cli_hush.h | 51 +- include/test/hush.h | 15 + include/test/suites.h | 1 + test/Makefile | 3 + test/cmd_ut.c | 6 + test/hush/Makefile | 10 + test/hush/cmd_ut_hush.c | 20 + test/hush/dollar.c | 226 + test/hush/if.c | 353 + test/hush/list.c | 140 + test/hush/loop.c | 91 + test/py/tests/test_hush_if_test.py | 184 - test/py/tests/test_ut.py | 8 +- 22 files changed, 14369 insertions(+), 200 deletions(-) create mode 100644 cmd/parser.c create mode 100644 common/cli_hush_2021.c create mode 100644 common/cli_hush_upstream.c create mode 100644 include/test/hush.h create mode 100644 test/hush/Makefile create mode 100644 test/hush/cmd_ut_hush.c create mode 100644 test/hush/dollar.c create mode 100644 test/hush/if.c create mode 100644 test/hush/list.c create mode 100644 test/hush/loop.c delete mode 100644 test/py/tests/test_hush_if_test.py Best regards and thank you in advance. --- [1] https://lists.denx.de/pipermail/u-boot/2021-July/453347.html [2] https://runtimeterror.com/tech/lil/ [3] https://lists.denx.de/pipermail/u-boot/2021-July/453790.html [4] https://lists.denx.de/pipermail/u-boot/2021-July/453848.html [5] https://lists.denx.de/pipermail/u-boot/2021-August/458569.html [6] https://dev.azure.com/u-boot/u-boot/_build/results?buildId=5279&view=results -- 2.25.1

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Broken commit de47ff536363289f92f85ed1e4901724d238432d
by Pali Rohár 29 Dec '22

29 Dec '22

Hello Tom! Your commit de47ff536363289f92f85ed1e4901724d238432d ("Convert CONFIG_SYS_MPC85XX_NO_RESETVEC to Kconfig") seems to be broken. If you look at P1020RDB-PD_defconfig file change in this commit there is: --- a/configs/P1020RDB-PD_defconfig +++ b/configs/P1020RDB-PD_defconfig @@ -9,6 +9,7 @@ CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PD=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y Which does not make sense to me. First thing is that CONFIG_MPC85XX_HAVE_RESET_VECTOR and CONFIG_SYS_MPC85XX_NO_RESETVEC are exclusive options. You can either disable generating of reset vector in image or enable it. What is expected from the result when you ask Kconfig to both enable and disable it? First specified option win? Or last specified win? Or random of those two options win? It is not really clear for me. Second thing is that reset vector is required for (parallel) NOR booting and your change is adding CONFIG_SYS_MPC85XX_NO_RESETVEC=y to defconfig for NOR, which to my guess make image non-bootable and broken. And seems that other defconfig files in that change have similar issues.

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[PATCH v2] power: regulator: Add support for NPCM8xx
by Jim Liu 26 Dec '22

26 Dec '22

Add support for setting nuvoton BMC NPCM845 voltage supply. Signed-off-by: Jim Liu <JJLIU0(a)nuvoton.com> --- Changes for v2: - modify Kconfig description - modify get_value function --- drivers/power/regulator/Kconfig | 8 ++ drivers/power/regulator/Makefile | 1 + drivers/power/regulator/npcm8xx_regulator.c | 132 ++++++++++++++++++++ 3 files changed, 141 insertions(+) create mode 100644 drivers/power/regulator/npcm8xx_regulator.c diff --git a/drivers/power/regulator/Kconfig b/drivers/power/regulator/Kconfig index c519e066ef..c02e6377d8 100644 --- a/drivers/power/regulator/Kconfig +++ b/drivers/power/regulator/Kconfig @@ -128,6 +128,14 @@ config DM_REGULATOR_MAX77686 features for REGULATOR MAX77686. The driver implements get/set api for: value, enable and mode. +config DM_REGULATOR_NPCM8XX + bool "Enable Driver Model for NPCM8xx voltage supply" + depends on DM_REGULATOR && ARCH_NPCM8XX + help + Enable support for configuring voltage supply on NPCM8XX SoC. The + voltage supplies support two voltage levels and the driver implements + get/set api for setting the value. + config DM_REGULATOR_FAN53555 bool "Enable Driver Model for REGULATOR FAN53555" depends on DM_PMIC_FAN53555 diff --git a/drivers/power/regulator/Makefile b/drivers/power/regulator/Makefile index bc736068bc..68e4c0f9dd 100644 --- a/drivers/power/regulator/Makefile +++ b/drivers/power/regulator/Makefile @@ -9,6 +9,7 @@ obj-$(CONFIG_REGULATOR_ACT8846) += act8846.o obj-$(CONFIG_REGULATOR_AS3722) += as3722_regulator.o obj-$(CONFIG_$(SPL_)DM_REGULATOR_DA9063) += da9063.o obj-$(CONFIG_DM_REGULATOR_MAX77686) += max77686.o +obj-$(CONFIG_DM_REGULATOR_NPCM8XX) += npcm8xx_regulator.o obj-$(CONFIG_$(SPL_)DM_PMIC_PFUZE100) += pfuze100.o obj-$(CONFIG_$(SPL_)DM_REGULATOR_BD71837) += bd71837.o obj-$(CONFIG_$(SPL_)DM_REGULATOR_PCA9450) += pca9450.o diff --git a/drivers/power/regulator/npcm8xx_regulator.c b/drivers/power/regulator/npcm8xx_regulator.c new file mode 100644 index 0000000000..fcd1058cdf --- /dev/null +++ b/drivers/power/regulator/npcm8xx_regulator.c @@ -0,0 +1,132 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2022 Nuvoton Technology Corp. + */ + +#include <common.h> +#include <dm.h> +#include <asm/io.h> +#include <dm/device_compat.h> +#include <power/regulator.h> + +#define REG_VSRCR 0xf08000e8 /* Voltage Supply Control Register */ + +/* Supported voltage levels (uV) */ +static const u32 volts_type1[] = { 3300000, 1800000 }; +static const u32 volts_type2[] = { 1000000, 1800000 }; +#define VOLT_LEV0 0 +#define VOLT_LEV1 1 + +struct volt_supply { + char *name; + const u32 *volts; + u32 reg_shift; /* Register bit offset for setting voltage */ +}; + +static const struct volt_supply npcm8xx_volt_supps[] = { + {"v1", volts_type1, 0}, + {"v2", volts_type1, 1}, + {"v3", volts_type1, 2}, + {"v4", volts_type1, 3}, + {"v5", volts_type1, 4}, + {"v6", volts_type1, 5}, + {"v7", volts_type1, 6}, + {"v8", volts_type1, 7}, + {"v9", volts_type1, 8}, + {"v10", volts_type1, 9}, + {"v11", volts_type2, 10}, + {"v12", volts_type1, 11}, + {"v13", volts_type1, 12}, + {"v14", volts_type2, 13}, + {"vsif", volts_type1, 14}, + {"vr2", volts_type1, 30}, +}; + +static const struct volt_supply *npcm8xx_volt_supply_get(const char *name) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(npcm8xx_volt_supps); i++) { + if (!strcmp(npcm8xx_volt_supps[i].name, name)) + return &npcm8xx_volt_supps[i]; + } + + return NULL; +} + +static int npcm8xx_regulator_set_value(struct udevice *dev, int uV) +{ + struct dm_regulator_uclass_plat *uc_pdata; + const struct volt_supply *supp; + u32 val, level; + + uc_pdata = dev_get_uclass_plat(dev); + if (!uc_pdata) + return -ENXIO; + + dev_dbg(dev, "%s set_value: %d\n", uc_pdata->name, uV); + supp = npcm8xx_volt_supply_get(uc_pdata->name); + if (!supp) + return -ENOENT; + + if (uV == supp->volts[VOLT_LEV0]) + level = VOLT_LEV0; + else if (uV == supp->volts[VOLT_LEV1]) + level = VOLT_LEV1; + else + return -EINVAL; + + /* Set voltage level */ + val = readl(REG_VSRCR); + val &= ~BIT(supp->reg_shift); + val |= level << supp->reg_shift; + writel(val, REG_VSRCR); + + return 0; +} + +static int npcm8xx_regulator_get_value(struct udevice *dev) +{ + struct dm_regulator_uclass_plat *uc_pdata; + const struct volt_supply *supp; + u32 val; + + uc_pdata = dev_get_uclass_plat(dev); + if (!uc_pdata) + return -ENXIO; + + supp = npcm8xx_volt_supply_get(uc_pdata->name); + if (!supp) + return -ENOENT; + + val = readl(REG_VSRCR) & BIT(supp->reg_shift); + + dev_dbg(dev, "%s get_value: %d\n", uc_pdata->name, + val ? supp->volts[VOLT_LEV1] : supp->volts[VOLT_LEV0]); + + return val ? supp->volts[VOLT_LEV1] : supp->volts[VOLT_LEV0]; +} + +static int npcm8xx_regulator_set_enable(struct udevice *dev, bool enable) +{ + /* Always on */ + return 0; +} + +static const struct dm_regulator_ops npcm8xx_regulator_ops = { + .set_value = npcm8xx_regulator_set_value, + .get_value = npcm8xx_regulator_get_value, + .set_enable = npcm8xx_regulator_set_enable, +}; + +static const struct udevice_id npcm8xx_regulator_ids[] = { + { .compatible = "regulator-npcm845" }, + { }, +}; + +U_BOOT_DRIVER(regulator_npcm8xx) = { + .name = "regulator_npcm845", + .id = UCLASS_REGULATOR, + .ops = &npcm8xx_regulator_ops, + .of_match = npcm8xx_regulator_ids, +}; -- 2.17.1

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[PATCH 01/38] power: pmic: Guard non-DM_PMIC drivers with a check for POWER_LEGACY
by Tom Rini 24 Dec '22

24 Dec '22

As we have more legacy PMIC drivers to move to Kconfig, guard them all with POWER_LEGACY or SPL_POWER_LEGACY. Do the same kind of check for building the drivers too. This also means that we need to resort the list slightly in the Makefile. Cc: Jaehoon Chung <jh80.chung(a)samsung.com> Signed-off-by: Tom Rini <trini(a)konsulko.com> --- drivers/power/pmic/Kconfig | 5 ++++- drivers/power/pmic/Makefile | 10 ++++++---- 2 files changed, 10 insertions(+), 5 deletions(-) diff --git a/drivers/power/pmic/Kconfig b/drivers/power/pmic/Kconfig index 628d3a94bcba..d30bb4d4e9cc 100644 --- a/drivers/power/pmic/Kconfig +++ b/drivers/power/pmic/Kconfig @@ -393,10 +393,13 @@ config PMIC_TPS65217 only, and you can enable the regulator/charger drivers separately if required. +if POWER_LEGACY || SPL_POWER_LEGACY + config POWER_MC34VR500 bool "Enable driver for Freescale MC34VR500 PMIC" - depends on !DM_PMIC ---help--- The MC34VR500 is used in conjunction with the FSL T1 and LS1 series SoC. It provides 4 buck DC-DC convertors and 5 LDOs, and it is accessed via an I2C interface. + +endif diff --git a/drivers/power/pmic/Makefile b/drivers/power/pmic/Makefile index 58c6507c58c3..e78dc1e20535 100644 --- a/drivers/power/pmic/Makefile +++ b/drivers/power/pmic/Makefile @@ -30,17 +30,19 @@ obj-$(CONFIG_$(SPL_)PMIC_PALMAS) += palmas.o obj-$(CONFIG_$(SPL_)PMIC_LP873X) += lp873x.o obj-$(CONFIG_$(SPL_)PMIC_LP87565) += lp87565.o obj-$(CONFIG_PMIC_STPMIC1) += stpmic1.o +obj-$(CONFIG_PMIC_TPS65217) += pmic_tps65217.o +obj-$(CONFIG_PMIC_TPS65219) += tps65219.o +obj-$(CONFIG_PMIC_TPS65941) += tps65941.o +ifeq ($(CONFIG_$(SPL_)POWER_LEGACY),y) obj-$(CONFIG_POWER_LTC3676) += pmic_ltc3676.o obj-$(CONFIG_POWER_MUIC_MAX8997) += muic_max8997.o obj-$(CONFIG_POWER_PCA9450) += pmic_pca9450.o obj-$(CONFIG_POWER_PFUZE100) += pmic_pfuze100.o obj-$(CONFIG_POWER_PFUZE3000) += pmic_pfuze3000.o -obj-$(CONFIG_PMIC_TPS65217) += pmic_tps65217.o -obj-$(CONFIG_POWER_TPS65218) += pmic_tps62362.o +obj-$(CONFIG_POWER_TPS62362) += pmic_tps62362.o obj-$(CONFIG_POWER_TPS65218) += pmic_tps65218.o obj-$(CONFIG_POWER_TPS65910) += pmic_tps65910.o obj-$(CONFIG_POWER_HI6553) += pmic_hi6553.o obj-$(CONFIG_POWER_MC34VR500) += pmic_mc34vr500.o -obj-$(CONFIG_PMIC_TPS65941) += tps65941.o -obj-$(CONFIG_PMIC_TPS65219) += tps65219.o +endif -- 2.25.1

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[PATCH v2 1/3] spl: Kconfig: Fix SPL_OPTEE_IMAGE dependency
by Jagan Teki 23 Dec '22

23 Dec '22

fdt_addr will build as part of SPL_LOAD_FIT or SPL_LOAD_FIT_FULL which is indeed required to build optee image support in SPL. common/spl/spl.c: In function ‘jump_to_image_optee’: common/spl/spl.c:220:46: error: ‘struct spl_image_info’ has no member named ‘fdt_addr’ 220 | spl_optee_entry(NULL, NULL, spl_image->fdt_addr, Fix the dependency support. Signed-off-by: Jagan Teki <jagan(a)edgeble.ai> --- Changes for v2: - none common/spl/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/common/spl/Kconfig b/common/spl/Kconfig index b738c749ff..95a4b8e855 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -1479,6 +1479,7 @@ config SPL_AM33XX_ENABLE_RTC32K_OSC config SPL_OPTEE_IMAGE bool "Support OP-TEE Trusted OS image in SPL" depends on ARM + depends on SPL_LOAD_FIT || SPL_LOAD_FIT_FULL help OP-TEE is an open source Trusted OS which is loaded by SPL. More detail at: https://github.com/OP-TEE/optee_os -- 2.25.1

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[PATCH v1] net: nuvoton: fix build broken for use phy_get_interface_by_name
by Jim Liu 23 Dec '22

23 Dec '22

The original patch is use phy_get_interface_by_name to set interface. The new patch is use dev_read_phy_mode to replace it. Signed-off-by: Jim Liu <JJLIU0(a)nuvoton.com> --- drivers/net/npcm750_eth.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/net/npcm750_eth.c b/drivers/net/npcm750_eth.c index 409d5cce4a..bd29a10def 100644 --- a/drivers/net/npcm750_eth.c +++ b/drivers/net/npcm750_eth.c @@ -710,12 +710,12 @@ static int npcm750_eth_ofdata_to_platdata(struct udevice *dev) pdata->phy_interface = -1; phy_mode = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "phy-mode", NULL); + if (phy_mode) - pdata->phy_interface = phy_get_interface_by_name(phy_mode); - if (pdata->phy_interface == -1) { - printf("%s: Invalid PHY interface '%s'\n", __func__, phy_mode); + pdata->phy_interface = dev_read_phy_mode(dev); + + if (pdata->phy_interface == PHY_INTERFACE_MODE_NA) return -EINVAL; - } pdata->max_speed = 0; cell = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "max-speed", NULL); -- 2.17.1

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[PATCH v2 1/1] gitdm: fix typo csets
by Heinrich Schuchardt 22 Dec '22

22 Dec '22

The output should be human readable. %s/csets/changesets/ Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt(a)canonical.com> --- v2: avoid typo in test --- gitdm | 2 +- tests/expected-results.txt | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/gitdm b/gitdm index 61318ad..aea16b0 100755 --- a/gitdm +++ b/gitdm @@ -546,7 +546,7 @@ for h in hlist: for e in elist: if e.count > 0: nempl += 1 -reports.Write('Processed %d csets from %d developers\n' % (CSCount, +reports.Write('Processed %d changesets from %d developers\n' % (CSCount, ndev)) reports.Write('%d employers found\n' % (nempl)) reports.Write('A total of %d lines added, %d removed (delta %d)\n' % diff --git a/tests/expected-results.txt b/tests/expected-results.txt index 049f887..03985f3 100644 --- a/tests/expected-results.txt +++ b/tests/expected-results.txt @@ -1,4 +1,4 @@ -Processed 10 csets from 4 developers +Processed 10 changesets from 4 developers 4 employers found A total of 24 lines added, 24 removed (delta 0) -- 2.36.1

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[PATCH 1/3] dt-bindings: mfd: add at91-usart.h from Linux
by Eugen Hristev 21 Dec '22

21 Dec '22

Copy include file dt-bindings/mfd/at91-usart.h from Linux Signed-off-by: Eugen Hristev <eugen.hristev(a)microchip.com> --- include/dt-bindings/mfd/at91-usart.h | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) create mode 100644 include/dt-bindings/mfd/at91-usart.h diff --git a/include/dt-bindings/mfd/at91-usart.h b/include/dt-bindings/mfd/at91-usart.h new file mode 100644 index 0000000000..2de5bc312e --- /dev/null +++ b/include/dt-bindings/mfd/at91-usart.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * This header provides macros for AT91 USART DT bindings. + * + * Copyright (C) 2018 Microchip Technology + * + * Author: Radu Pirea <radu.pirea(a)microchip.com> + * + */ + +#ifndef __DT_BINDINGS_AT91_USART_H__ +#define __DT_BINDINGS_AT91_USART_H__ + +#define AT91_USART_MODE_SERIAL 0 +#define AT91_USART_MODE_SPI 1 + +#endif /* __DT_BINDINGS_AT91_USART_H__ */ -- 2.25.1

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[PATCH v1] 1: Adding rngb entry in imx6ull device tree
by Kshitiz Varshney 21 Dec '22

21 Dec '22

From: Kshitiz <kshitiz.varshney(a)nxp.com> Added entry for rngb in imx6ull device tree which is required for Random number generation in u-boot. Signed-off-by: Kshitiz Varshney <kshitiz.varshney(a)nxp.com> Reviewed-by: Ye Li <ye.li(a)nxp.com> --- arch/arm/dts/imx6ull.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/dts/imx6ull.dtsi b/arch/arm/dts/imx6ull.dtsi index 46e7ad6bab..c5d5a5ab7b 100644 --- a/arch/arm/dts/imx6ull.dtsi +++ b/arch/arm/dts/imx6ull.dtsi @@ -66,6 +66,12 @@ clocks = <&clks IMX6ULL_CLK_DCP_CLK>; clock-names = "dcp"; }; + rngb: rng@2284000 { + compatible = "fsl,imx6ull-rngb", "fsl,imx25-rngb"; + reg = <0x02284000 0x4000>; + interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks IMX6UL_CLK_DUMMY>; + }; iomuxc_snvs: iomuxc-snvs@2290000 { compatible = "fsl,imx6ull-iomuxc-snvs"; -- 2.25.1

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[PATCH 00/12] Introduce initial TI's J784S4 support
by Hari Nagalla 21 Dec '22

21 Dec '22

Hello Everyone! This series will introduce basic support (SD and UART) support for Texas Instruments J784S4 EVM. The J784S4 SoC device tree patches are taken from kernel patch submissions and will be updated as they are accepted and merged to the kernel tree. All other patches are specific to SPL and u-boot and do not have dependency on other trees. Appreciate a review for acceptance to u-boot tree. Here are some of the salient features of the J784S4 automotive grade application processor: The J784S4 SoC belongs to the K3 Multicore SoC architecture platform, providing advanced system integration in automotive, ADAS and industrial applications requiring AI at the network edge. This SoC extends the K3 Jacinto 7 family of SoCs with focus on raising performance and integration while providing interfaces, memory architecture and compute performance for multi-sensor, high concurrency applications. Some highlights of this SoC are: * Up to 8 Cortex-A72s, four clusters of lockstep capable dual Cortex-R5F MCUs, 4 C7x floating point vector DSPs with Matrix Multiply Accelerator(MMA) for deep learning and CNN. * 3D GPU: Automotive grade IMG BXS-4-64 * Vision Processing Accelerator (VPAC) with image signal processor and Depth and Motion Processing Accelerator (DMPAC) * Three CSI2.0 4L RX plus two CSI2.0 4L TX, two DSI Tx, one eDP/DP and one DPI interface. * Integrated gigabit ethernet switch, up to 8 ports (TDA4VH), two ports support 10Gb USXGMII; Two 4 lane PCIe-GEN3 controllers, USB3.0 Dual-role device subsystems, Up to 20 MCANs, among other peripherals. See J784S4 Technical Reference Manual (SPRUJ52 - JUNE 2022) for further details: http://www.ti.com/lit/zip/spruj52 In addtion, the J784S4 EVM board is designed for TI J784S4 SoC. It supports the following interfaces: * 32 GB DDR4 RAM * x2 Gigabit Ethernet interfaces capable of working in Switch and MAC mode * x1 Input Audio Jack, x1 Output Audio Jack * x1 USB2.0 Hub with two Type A host and x1 USB 3.1 Type-C Port * x2 4L PCIe connector * x1 UHS-1 capable micro-SD card slot * 512 Mbit OSPI flash, 1 Gbit Octal NAND flash, 512 Mbit QSPI flash, UFS flash. * x6 UART through UART-USB bridge * XDS110 for onboard JTAG debug using USB * Temperature sensors, user push buttons and LEDs * 40-pin User Expansion Connector * x2 ENET Expansion Connector, x1 GESI expander, x2 Display connector * x1 15-pin CSI header * x6 MCAN instances Schematics: https://www.ti.com/lit/zip/sprr458 bootlog: https://paste.sr.ht/~hnagalla/496faf211ddda17fb6221886c6496744f3891746 Hari Nagalla (12): arm: dts: introduce j784s4 dtbs from linux kernel arm: dts: introduce j784s4 u-boot dtbs arm: K3: Add basic support for J784S4 SoC definition drivers: dma: Add support for J784S4 clk: clk-k3: Add support for J784S4 SoC power: domain: ti: Add support for J784S4 SoC ram: k3-ddrss: Add support for J784S4 SoC soc: ti: k3-socinfo: Add entry for J784S4 SoC board: ti: j784s4: Add board support for J784S4 SoC dt-bindings: ti-serdes-mux: Add defines for J784S4 SoC configs: j784s4_evm_r5_defconfig: Add R5 specific defconfig configs: j784s4_evm_a72_defconfig: Add A72 specific defconfig arch/arm/dts/Makefile | 2 + arch/arm/dts/k3-j784s4-ddr-evm-lp4-4266.dtsi | 8757 ++++++++++++++++ arch/arm/dts/k3-j784s4-ddr.dtsi | 8858 +++++++++++++++++ arch/arm/dts/k3-j784s4-evm-u-boot.dtsi | 135 + arch/arm/dts/k3-j784s4-evm.dts | 199 + arch/arm/dts/k3-j784s4-main.dtsi | 1006 ++ arch/arm/dts/k3-j784s4-mcu-wakeup.dtsi | 315 + arch/arm/dts/k3-j784s4-r5-evm.dts | 209 + arch/arm/dts/k3-j784s4.dtsi | 287 + arch/arm/mach-k3/Kconfig | 16 +- arch/arm/mach-k3/Makefile | 2 + arch/arm/mach-k3/arm64-mmu.c | 41 + arch/arm/mach-k3/include/mach/hardware.h | 4 + .../mach-k3/include/mach/j784s4_hardware.h | 41 + arch/arm/mach-k3/include/mach/j784s4_spl.h | 46 + arch/arm/mach-k3/include/mach/spl.h | 6 +- arch/arm/mach-k3/j784s4/Makefile | 5 + arch/arm/mach-k3/j784s4/clk-data.c | 428 + arch/arm/mach-k3/j784s4/dev-data.c | 97 + arch/arm/mach-k3/j784s4_init.c | 322 + board/ti/j784s4/Kconfig | 61 + board/ti/j784s4/MAINTAINERS | 7 + board/ti/j784s4/Makefile | 8 + board/ti/j784s4/evm.c | 180 + configs/j784s4_evm_a72_defconfig | 212 + configs/j784s4_evm_r5_defconfig | 176 + drivers/clk/ti/clk-k3.c | 6 + drivers/dma/ti/Makefile | 1 + drivers/dma/ti/k3-psil-j784s4.c | 167 + drivers/dma/ti/k3-psil-priv.h | 1 + drivers/dma/ti/k3-psil.c | 2 + drivers/firmware/ti_sci_static_data.h | 35 + drivers/power/domain/ti-power-domain.c | 6 + drivers/ram/Kconfig | 2 +- drivers/soc/soc_ti_k3.c | 4 + include/configs/j784s4_evm.h | 146 + include/dt-bindings/mux/ti-serdes.h | 62 + include/dt-bindings/pinctrl/k3.h | 3 + include/k3-clk.h | 1 + include/k3-dev.h | 1 + 40 files changed, 21849 insertions(+), 8 deletions(-) create mode 100644 arch/arm/dts/k3-j784s4-ddr-evm-lp4-4266.dtsi create mode 100644 arch/arm/dts/k3-j784s4-ddr.dtsi create mode 100644 arch/arm/dts/k3-j784s4-evm-u-boot.dtsi create mode 100644 arch/arm/dts/k3-j784s4-evm.dts create mode 100644 arch/arm/dts/k3-j784s4-main.dtsi create mode 100644 arch/arm/dts/k3-j784s4-mcu-wakeup.dtsi create mode 100644 arch/arm/dts/k3-j784s4-r5-evm.dts create mode 100644 arch/arm/dts/k3-j784s4.dtsi create mode 100644 arch/arm/mach-k3/include/mach/j784s4_hardware.h create mode 100644 arch/arm/mach-k3/include/mach/j784s4_spl.h create mode 100644 arch/arm/mach-k3/j784s4/Makefile create mode 100644 arch/arm/mach-k3/j784s4/clk-data.c create mode 100644 arch/arm/mach-k3/j784s4/dev-data.c create mode 100644 arch/arm/mach-k3/j784s4_init.c create mode 100644 board/ti/j784s4/Kconfig create mode 100644 board/ti/j784s4/MAINTAINERS create mode 100644 board/ti/j784s4/Makefile create mode 100644 board/ti/j784s4/evm.c create mode 100644 configs/j784s4_evm_a72_defconfig create mode 100644 configs/j784s4_evm_r5_defconfig create mode 100644 drivers/dma/ti/k3-psil-j784s4.c create mode 100644 include/configs/j784s4_evm.h -- 2.17.1

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