September 2021 - U-Boot

[PATCH 0/3] sunxi: Cleanup to prepare for DM_GPIO/DM_PINCTRL
by Samuel Holland 14 Sep '21

14 Sep '21

I have a patch series in progresss to migrate sunxi to a DM_PINCTRL driver and convert the remaining legacy GPIO users (outside of SPL). This is one of several small independent sets of preparatory patches I will be sending in order to minimize the size of the main series (which has >100 patches at this point). Samuel Holland (3): sunxi: Clean up inclusions of asm/arch/gpio.h sunxi: gpio: Remove name_to_gpio macro sunxi: gpio: Remove bank-specific size macros arch/arm/include/asm/arch-sunxi/gpio.h | 15 ++------------- arch/arm/mach-sunxi/board.c | 1 - arch/arm/mach-sunxi/clock.c | 1 - arch/arm/mach-sunxi/clock_sun4i.c | 1 - board/sunxi/board.c | 1 - board/sunxi/gmac.c | 1 - drivers/gpio/axp_gpio.c | 1 - drivers/gpio/sunxi_gpio.c | 3 --- drivers/mmc/sunxi_mmc.c | 3 +-- drivers/net/sun8i_emac.c | 5 +---- drivers/power/axp809.c | 1 - drivers/power/axp818.c | 1 - drivers/spi/spi-sunxi.c | 2 +- drivers/usb/musb-new/sunxi.c | 2 -- drivers/video/Kconfig | 10 +++++----- drivers/video/hitachi_tx18d42vm_lcd.c | 6 +++--- drivers/video/sunxi/sunxi_display.c | 11 +++++------ drivers/video/sunxi/sunxi_lcd.c | 1 - 18 files changed, 18 insertions(+), 48 deletions(-) -- 2.31.1

2 6

[PATCH] mmc: fsl_esdhc: remove 1ms sleep in esdhc_send_cmd_common()
by Michael Walle 14 Sep '21

14 Sep '21

Since the beginning of this driver which was initially for the MPC8379 and MPC8536 SoCs, there is this spurious 1ms delay. According to the comment it should actually be only 8 clock cycles. Esp. during EFI block transfers, this 1ms add up to a significant delay and slows down EFI boot. I couldn't find any mention in the MPC8536 that there should be a delay of 8 clock cycles between commands. The SD card specification mentions that the clock has to be left enabled for 8 cycles after a command or response. But I don't see how this delay will help with this. Go ahead and just remove it. If there will ever be any regression we can introduce a compile time flag, but for now I'd like to keep it simple. In the split off imx driver this delay was also removed in commit 9098682200e6 ("mmc: fsl_esdhc_imx: remove the 1ms delay before sending command"). Signed-off-by: Michael Walle <michael(a)walle.cc> --- drivers/mmc/fsl_esdhc.c | 7 ------- 1 file changed, 7 deletions(-) diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index 1d98fa65c4..ebb307e950 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -361,13 +361,6 @@ static int esdhc_send_cmd_common(struct fsl_esdhc_priv *priv, struct mmc *mmc, while (esdhc_read32(&regs->prsstat) & PRSSTAT_DLA) ; - /* Wait at least 8 SD clock cycles before the next command */ - /* - * Note: This is way more than 8 cycles, but 1ms seems to - * resolve timing issues with some cards - */ - udelay(1000); - /* Set up for a data transfer if we have one */ if (data) { err = esdhc_setup_data(priv, mmc, data); -- 2.30.2

2 1

[PULL] Please pull mmc-2021-9-13
by Peng Fan (OSS) 13 Sep '21

13 Sep '21

Hi Tom, Please pull mmc-2021-9-13 CI: https://source.denx.de/u-boot/custodians/u-boot-mmc/-/pipelines/9096 ----------------------------------- Support using mmc command for enumerating mmc card in a given mode Fix device_remove in mmc Fix switch issue with send_status disabled Drop 1ms delay in fsl_esdhc command sending Revert "mmc: sdhci: set to INT_DATA_END when there are data" ----------------------------------- Thanks, Peng. The following changes since commit 4412fd8ba2ce5945d04f4b181a96e05576c46bf2: Merge branch '2021-09-08-fix-FIT-hash-algos-in-SPL' (2021-09-08 21:23:55 -0400) are available in the Git repository at: https://source.denx.de/u-boot/custodians/u-boot-mmc.git tags/mmc-2021-9-13 for you to fetch changes up to 285edfd7821e79de579b0bf1a7328dead2304a0b: mmc: fsl_esdhc: remove 1ms sleep in esdhc_send_cmd_common() (2021-09-13 11:46:50 +0800) ---------------------------------------------------------------- Aswath Govindraju (2): mmc: Add support for enumerating MMC card in a given mode using mmc command doc: usage: mmc: Document usage of speed mode in "mmc dev" and "mmc rescan" Michael Walle (1): mmc: fsl_esdhc: remove 1ms sleep in esdhc_send_cmd_common() Ye Li (2): mmc: fix switch issue with send_status disabled mmc: fix device_remove when HS400_ES is enabled Yuezhang.Mo(a)sony.com (1): Revert "mmc: sdhci: set to INT_DATA_END when there are data" cmd/Kconfig | 10 ++++++++++ cmd/mmc.c | 52 ++++++++++++++++++++++++++++++++++++++++++++-------- doc/usage/mmc.rst | 49 +++++++++++++++++++++++++++++++++++++++++++++++-- drivers/mmc/fsl_esdhc.c | 7 ------- drivers/mmc/mmc-uclass.c | 5 ++++- drivers/mmc/mmc.c | 32 +++++++++++++++++++++++++++----- drivers/mmc/sdhci.c | 3 +-- include/mmc.h | 2 ++ 8 files changed, 135 insertions(+), 25 deletions(-)

2 1

[PATCH v7 0/5] Add SIMATIC IOT2050 board support
by Jan Kiszka 13 Sep '21

13 Sep '21

This is the baseline support for the SIMATIC IOT2050 devices. Changes in v7: - rebased - registered board doc with index Changes in v6: - rebased - converted board README to docs/board/siemens/iot2050.rst Changes in v5: - rebased - use DEFAULT_LINUX_BOOT_ENV from ti_armv7_common.h, rather than home-grown values - avoids misaligned kernel load address - no longer exposes issue around LMB reservations Changes in v4: - rebased - make rtd-wdt firmware a "loadable" inside U-Boot proper fit image, avoiding controversial embedding as object - improved mmc1 removal from boot_targets - fixed various build issues Changes in v3: - rebased - addressed several checkpatch warnings - a few #ifdef -> IS_ENABLED conversions - comment marker for SPDK identifier in .S file - trailing whitespaces - factored out rti_wdt_load_fw (less #ifdef) Changes in v2: - rebased - sync with upstream-accepted DT - add boot switch - include watchdog support Allows to boot mainline 5.10 kernels, but not the original BSP-derived kernel we currently ship as reference. This is due to the TI sysfw ABI breakages between 2.x and 3.x. We will soon provide a transitional kernel that allows booting both firmware ABIs - as long as full upstream kernel support is work in progress. Note that this baseline support lacks Ethernet drivers. We are working closely with TI to ensure that the to-be-upstreamed icssg-prueth driver will work both with new SR2.0 AM65x silicon as well as with SR1.0 which is used in the currently shipped IOT2050 devices. A staging tree for complete IOT2050 support can be found at [1]. Full image integration is available via [2]. Jan [1] https://github.com/siemens/u-boot/commits/jan/iot2050 [2] https://github.com/siemens/meta-iot2050 Jan Kiszka (5): arm: dts: Add IOT2050 device tree files board: siemens: Add support for SIMATIC IOT2050 devices arm64: dts: ti: k3-am65-mcu: Add RTI watchdog entry watchdog: rti_wdt: Add support for loading firmware iot2050: Enable watchdog support, but do not auto-start it arch/arm/dts/Makefile | 7 +- arch/arm/dts/k3-am65-iot2050-boot-image.dtsi | 121 ++++ .../dts/k3-am65-iot2050-common-u-boot.dtsi | 103 +++ arch/arm/dts/k3-am65-iot2050-common.dtsi | 655 ++++++++++++++++++ arch/arm/dts/k3-am65-iot2050-spl.dts | 16 + arch/arm/dts/k3-am65-mcu.dtsi | 9 + arch/arm/dts/k3-am6528-iot2050-basic.dts | 67 ++ arch/arm/dts/k3-am6548-iot2050-advanced.dts | 66 ++ arch/arm/mach-k3/Kconfig | 1 + board/siemens/iot2050/Kconfig | 32 + board/siemens/iot2050/MAINTAINERS | 9 + board/siemens/iot2050/Makefile | 10 + board/siemens/iot2050/board.c | 284 ++++++++ board/siemens/iot2050/config.mk | 8 + configs/iot2050_defconfig | 138 ++++ doc/board/index.rst | 1 + doc/board/siemens/index.rst | 9 + doc/board/siemens/iot2050.rst | 76 ++ drivers/watchdog/Kconfig | 20 + drivers/watchdog/rti_wdt.c | 88 +++ include/configs/iot2050.h | 62 ++ 21 files changed, 1781 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/k3-am65-iot2050-boot-image.dtsi create mode 100644 arch/arm/dts/k3-am65-iot2050-common-u-boot.dtsi create mode 100644 arch/arm/dts/k3-am65-iot2050-common.dtsi create mode 100644 arch/arm/dts/k3-am65-iot2050-spl.dts create mode 100644 arch/arm/dts/k3-am6528-iot2050-basic.dts create mode 100644 arch/arm/dts/k3-am6548-iot2050-advanced.dts create mode 100644 board/siemens/iot2050/Kconfig create mode 100644 board/siemens/iot2050/MAINTAINERS create mode 100644 board/siemens/iot2050/Makefile create mode 100644 board/siemens/iot2050/board.c create mode 100644 board/siemens/iot2050/config.mk create mode 100644 configs/iot2050_defconfig create mode 100644 doc/board/siemens/index.rst create mode 100644 doc/board/siemens/iot2050.rst create mode 100644 include/configs/iot2050.h -- 2.31.1

3 15

Bug: qemu_arm64: Cannot access the second flash bank
by Robin Randhawa 13 Sep '21

13 Sep '21

Hi folks. [CC'ing some hopefully relevant folks]. As of: commit 0ba41ce1b7816c229cc19e0621148b98f990cb68 libfdt: return correct value if #size-cells property is not present .. accesses to the second flash bank on the qemu_arm64 virtual board appear broken. To demonstrate, consider that the physical memory map for the 2 flash banks is: Bank 1: 0x0000_0000 - 0x03FC_0000 Bank 2: 0x0400_0000 - 0x7FC0_0000 Now, consider the abbreviated output of the flinfo command pre and post the above commit: Pre: === => flinfo Bank # 1: CFI conformant flash (32 x 16) Size: 64 MB in 256 Sectors Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x0018 Erase timeout: 16384 ms, write timeout: 3 ms Buffer write timeout: 3 ms, buffer size: 2048 bytes Sector Start Addresses: 00000000 RO 00040000 RO 00080000 RO 000C0000 00100000 00140000 00180000 001C0000 00200000 00240000 . . 03E80000 03EC0000 03F00000 03F40000 03F80000 03FC0000 Bank # 2: CFI conformant flash (32 x 16) Size: 64 MB in 256 Sectors Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x0018 Erase timeout: 16384 ms, write timeout: 3 ms Buffer write timeout: 3 ms, buffer size: 2048 bytes Sector Start Addresses: 04000000 RO 04040000 04080000 040C0000 04100000 04140000 04180000 041C0000 04200000 04240000 . . 07E80000 07EC0000 07F00000 07F40000 07F80000 07FC0000 Post: ==== => flinfo Bank # 1: CFI conformant flash (32 x 16) Size: 64 MB in 256 Sectors Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x0018 Erase timeout: 16384 ms, write timeout: 3 ms Buffer write timeout: 3 ms, buffer size: 2048 bytes Sector Start Addresses: 00000000 RO 00040000 RO 00080000 RO 000C0000 00100000 00140000 00180000 001C0000 00200000 00240000 . . 03E80000 03EC0000 03F00000 03F40000 03F80000 03FC0000 Bank # 2: CFI conformant flash (32 x 16) Size: 64 MB in 256 Sectors Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x0018 Erase timeout: 16384 ms, write timeout: 3 ms Buffer write timeout: 3 ms, buffer size: 2048 bytes Sector Start Addresses: 400000000000000 400000000040000 400000000080000 4000000000C0000 400000000100000 400000000140000 400000000180000 4000000001C0000 400000000200000 400000000240000 . . 400000003E80000 400000003EC0000 400000003F00000 40 0000003F40000 400000003F80000 400000003FC0000 As a result, the second bank is unusable for environment stores (CONFIG_ENV_ADDR is 0x4000000): => saveenv Saving Environment to Flash... Error: start and/or end address not on sector boundary Error: start and/or end address not on sector boundary Failed (1) Rewinding the u-boot repo to before this commit fixes the problem. Manually (uncleanly) reverting the commit and it's dependent commits fixes the problem. Here are the HEAD commits from the relevant repos that I used for the data above: qemu: commit dd5b0f95490883cd8bc7d070db8de70d5c979cbc u-boot: commit 6cb87cbb1475f668689f95911d1521ee6ba7f55c Here is the qemu invocation I used: $ dd if=/dev/zero of=./flash0-with-uboot.img bs=1M count=64 && dd if=/path/to/u-boot.bin of=./flash0-with-uboot.img conv=notrunc $ qemu-system-aarch64 -M virt -cpu cortex-a53 -m 1024M -nographic -drive if=pflash,format=raw,index=0,file=flash0-with-uboot.img -drive if=pflash,format=raw,index=1,file=flash1.img I'm happy to help test any fixes if and as needed. Cheers, Robin

3 9

[PATCH] board: atmel: sama7g5ek: avoid rewriting of configured CONFIG_BOOTCOMMAND
by Eugen Hristev 13 Sep '21

13 Sep '21

Rewrite the CONFIG_BOOTCOMMAND only if it's not previously configured from defconfig file. This allows the user to select from defconfig/menuconfig the desired boot command. Adjust the current board defconfigs to reflect the default booting command for the specific ENV configuration. Signed-off-by: Eugen Hristev <eugen.hristev(a)microchip.com> --- configs/sama7g5ek_mmc1_defconfig | 2 ++ configs/sama7g5ek_mmc_defconfig | 2 ++ include/configs/sama7g5ek.h | 6 +++++- 3 files changed, 9 insertions(+), 1 deletion(-) diff --git a/configs/sama7g5ek_mmc1_defconfig b/configs/sama7g5ek_mmc1_defconfig index e076e07e11..a78adf0dd8 100644 --- a/configs/sama7g5ek_mmc1_defconfig +++ b/configs/sama7g5ek_mmc1_defconfig @@ -18,6 +18,8 @@ CONFIG_FIT=y CONFIG_SD_BOOT=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mmcblk1p2 rw rootwait" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="fatload mmc 1:1 0x61000000 at91-sama7g5ek.dtb; fatload mmc 1:1 0x62000000 zImage; bootz 0x62000000 - 0x61000000" CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/sama7g5ek_mmc_defconfig b/configs/sama7g5ek_mmc_defconfig index 96549c23f8..de845178e6 100644 --- a/configs/sama7g5ek_mmc_defconfig +++ b/configs/sama7g5ek_mmc_defconfig @@ -18,6 +18,8 @@ CONFIG_FIT=y CONFIG_SD_BOOT=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootwait" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="fatload mmc 0:1 0x61000000 at91-sama7g5ek.dtb; fatload mmc 0:1 0x62000000 zImage; bootz 0x62000000 - 0x61000000" CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/include/configs/sama7g5ek.h b/include/configs/sama7g5ek.h index 96db82e9d4..07e14ff507 100644 --- a/include/configs/sama7g5ek.h +++ b/include/configs/sama7g5ek.h @@ -26,7 +26,7 @@ #define CONFIG_SYS_LOAD_ADDR 0x62000000 /* load address */ -#undef CONFIG_BOOTCOMMAND +#ifndef CONFIG_BOOTCOMMAND #ifdef CONFIG_SD_BOOT /* u-boot env in sd/mmc card */ @@ -34,6 +34,10 @@ #define CONFIG_BOOTCOMMAND "fatload mmc " CONFIG_ENV_FAT_DEVICE_AND_PART " 0x61000000 at91-sama7g5ek.dtb; " \ "fatload mmc " CONFIG_ENV_FAT_DEVICE_AND_PART " 0x62000000 zImage; " \ "bootz 0x62000000 - 0x61000000" +#else +#define CONFIG_BOOTCOMMAND "Place your bootcommand here" +#endif + #endif /* Size of malloc() pool */ -- 2.25.1

2 1

[PATCH v2] mtd: spi: nor: force mtd name to "nor%d"
by Patrick Delaunay 13 Sep '21

13 Sep '21

Force the mtd name of spi-nor to "nor" + the driver sequence number: "nor0", "nor1"... This patch is coherent with existing "nand" and "spi-nand" mtd device names. I keep the existing "nor" name to don't disturb the existing users of mtd functions. The mtd name 'nor' was configured previously by the function drivers/mtd/spi/sf_mtd.c:spi_flash_mtd_register() = "nor%d" + spi_flash_mtd_number() The 'nor' name is also coherent with get_mtd_info() and the macro MTD_DEV_TYPE(): MTD_DEV_TYPE_NOR is associated with "nor" name. This generic name can be use to identify the mtd spi-nor device without knowing the real device name or the DT path of the device, used with API get_mtd_device_nm(). And also avoid issue when the same NOR device is present 2 times, for example on STM32MP15F-EV1: STM32MP> mtd list SF: Detected mx66l51235l with page size 256 Bytes, erase size 64 KiB, \ total 64 MiB List of MTD devices: * nand0 - type: NAND flash - block size: 0x40000 bytes - min I/O: 0x1000 bytes - OOB size: 224 bytes - OOB available: 118 bytes - ECC strength: 8 bits - ECC step size: 512 bytes - bitflip threshold: 6 bits - 0x000000000000-0x000040000000 : "nand0" * mx66l51235l - device: mx66l51235l@0 - parent: spi@58003000 - driver: jedec_spi_nor - path: /soc/spi@58003000/mx66l51235l@0 - type: NOR flash - block size: 0x10000 bytes - min I/O: 0x1 bytes - 0x000000000000-0x000004000000 : "mx66l51235l" * mx66l51235l - device: mx66l51235l@1 - parent: spi@58003000 - driver: jedec_spi_nor - path: /soc/spi@58003000/mx66l51235l@1 - type: NOR flash - block size: 0x10000 bytes - min I/O: 0x1 bytes - 0x000000000000-0x000004000000 : "mx66l51235l" The same mtd name "mx66l51235l" identify the 2 instance mx66l51235l@0 and mx66l51235l@1. This patch solves a ST32CubeProgrammer / stm32prog command issue with nor0 target on STM32MP157C-EV1 board. Fixes: b7f060565e31 ("mtd: spi-nor: allow registering multiple MTDs when DM is enabled") Signed-off-by: Patrick Delaunay <patrick.delaunay(a)foss.st.com> --- For other device, the mtd name are hardcoded in each MTD driver: drivers/mtd/nand/spi/core.c:1169: sprintf(mtd->name, "spi-nand%d", spi_nand_idx++); drivers/mtd/nand/raw/nand.c:59: sprintf(dev_name[devnum], "nand%d", devnum); The existing user with "nor..." arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c:625: mtd = get_mtd_device_nm(mtd_id); board/emulation/common/qemu_mtdparts.c:63: mtd = get_mtd_device_nm("nor0"); board/emulation/common/qemu_mtdparts.c:70: mtd = get_mtd_device_nm("nor1"); board/emulation/common/qemu_dfu.c:61: mtd = get_mtd_device_nm("nor0"); board/st/common/stm32mp_dfu.c:132: mtd = get_mtd_device_nm("nor0"); drivers/dfu/dfu_mtd.c:259: mtd = get_mtd_device_nm(devstr); => see "dfu mtd" support in doc/usage/dfu.rst Changes in v2: - update commit message, change invalid patman tag "Series-Cc" drivers/mtd/spi/spi-nor-core.c | 8 +++++--- include/linux/mtd/spi-nor.h | 1 + 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index d5d905fa5a..3eb7dcfddb 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -3715,8 +3715,10 @@ int spi_nor_scan(struct spi_nor *nor) if (ret) return ret; - if (!mtd->name) - mtd->name = info->name; + if (!mtd->name) { + sprintf(nor->mtd_name, "nor%d", dev_seq(nor->dev)); + mtd->name = nor->mtd_name; + } mtd->dev = nor->dev; mtd->priv = nor; mtd->type = MTD_NORFLASH; @@ -3821,7 +3823,7 @@ int spi_nor_scan(struct spi_nor *nor) nor->rdsr_dummy = params.rdsr_dummy; nor->rdsr_addr_nbytes = params.rdsr_addr_nbytes; - nor->name = mtd->name; + nor->name = info->name; nor->size = mtd->size; nor->erase_size = mtd->erasesize; nor->sector_size = mtd->erasesize; diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index 7ddc4ba2bf..8c3d5032e3 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -561,6 +561,7 @@ struct spi_nor { int (*ready)(struct spi_nor *nor); void *priv; + char mtd_name[10]; /* Compatibility for spi_flash, remove once sf layer is merged with mtd */ const char *name; u32 size; -- 2.25.1

1 0

Pull request for efi-2021-10-rc4-2
by Heinrich Schuchardt 13 Sep '21

13 Sep '21

Dear Tom, The following changes since commit 4412fd8ba2ce5945d04f4b181a96e05576c46bf2: Merge branch '2021-09-08-fix-FIT-hash-algos-in-SPL' (2021-09-08 21:23:55 -0400) are available in the Git repository at: https://source.denx.de/u-boot/custodians/u-boot-efi.git tags/efi-2021-10-rc4-2 for you to fetch changes up to aec7c0925c8e9dc8b1475f3dfec6b54573a8ab17: efi_loader: simplify efi_watchdog_timer_notify() (2021-09-11 11:02:02 +0200) ---------------------------------------------------------------- Pull request for efi-2021-10-rc4-2 Documentation: * improve documentation of U-Boot for /config DT node * integrate bloblist documentation UEFI: * correct usage of EFI_CALL() * code tidy up ---------------------------------------------------------------- Heinrich Schuchardt (3): efi_loader: require CONFIG_BLK efi_loader: eliminate EFI_CALL() in nvedit_efi.c efi_loader: simplify efi_watchdog_timer_notify() Ilias Apalodimas (1): efi_loader: Remove incorrect calls of EFI_CALL in TCG2 Masahisa Kojima (1): efi_loader: boot_service_capability_min should be capitalized Oleksandr Suvorov (1): doc: board: toradex: fix file names Simon Glass (3): bloblist: Move to rST format doc: Tidy up the bindings for the config/ node doc: Complete the list of available runtime-config options board/toradex/apalis-imx8/MAINTAINERS | 2 +- cmd/nvedit_efi.c | 9 ++- .../toradex/{apalix-imx8.rst => apalis-imx8.rst} | 0 .../toradex/{apalix-imx8x.rst => apalis-imx8x.rst} | 0 doc/board/toradex/index.rst | 4 +- doc/{README.bloblist => develop/bloblist.rst} | 4 +- doc/develop/index.rst | 1 + doc/device-tree-bindings/config.txt | 83 +++++++++++++++++----- include/efi_tcg2.h | 2 +- lib/efi_loader/Kconfig | 1 + lib/efi_loader/efi_tcg2.c | 19 +++-- lib/efi_loader/efi_watchdog.c | 3 +- 12 files changed, 88 insertions(+), 40 deletions(-) rename doc/board/toradex/{apalix-imx8.rst => apalis-imx8.rst} (100%) rename doc/board/toradex/{apalix-imx8x.rst => apalis-imx8x.rst} (100%) rename doc/{README.bloblist => develop/bloblist.rst} (97%)

2 1

[PATCH] clk: sunxi: Move header out of arch directory
by Samuel Holland 13 Sep '21

13 Sep '21

The CCU header is only used by the DM drivers, not any platform code. Its current location adds an artificial dependency on CONFIG_ARM and ARCH_SUNXI, which will be problematic when adding the CCU driver for a RISC-V sunxi platform. Signed-off-by: Samuel Holland <samuel(a)sholland.org> --- This patch trivially conflicts with the one adding the PRCM drivers. Feel free to fix that when applying, or I can rebase either patch. drivers/clk/sunxi/clk_a10.c | 2 +- drivers/clk/sunxi/clk_a10s.c | 2 +- drivers/clk/sunxi/clk_a23.c | 2 +- drivers/clk/sunxi/clk_a31.c | 2 +- drivers/clk/sunxi/clk_a64.c | 2 +- drivers/clk/sunxi/clk_a80.c | 2 +- drivers/clk/sunxi/clk_a83t.c | 2 +- drivers/clk/sunxi/clk_h3.c | 2 +- drivers/clk/sunxi/clk_h6.c | 2 +- drivers/clk/sunxi/clk_h616.c | 2 +- drivers/clk/sunxi/clk_r40.c | 2 +- drivers/clk/sunxi/clk_sunxi.c | 2 +- drivers/clk/sunxi/clk_v3s.c | 2 +- drivers/reset/reset-sunxi.c | 2 +- .../include/asm/arch-sunxi/ccu.h => include/clk/sunxi.h | 8 +++----- 15 files changed, 17 insertions(+), 19 deletions(-) rename arch/arm/include/asm/arch-sunxi/ccu.h => include/clk/sunxi.h (94%) diff --git a/drivers/clk/sunxi/clk_a10.c b/drivers/clk/sunxi/clk_a10.c index 1b5de86e204..1342a6cda61 100644 --- a/drivers/clk/sunxi/clk_a10.c +++ b/drivers/clk/sunxi/clk_a10.c @@ -8,7 +8,7 @@ #include <clk-uclass.h> #include <dm.h> #include <errno.h> -#include <asm/arch/ccu.h> +#include <clk/sunxi.h> #include <dt-bindings/clock/sun4i-a10-ccu.h> #include <dt-bindings/reset/sun4i-a10-ccu.h> #include <linux/bitops.h> diff --git a/drivers/clk/sunxi/clk_a10s.c b/drivers/clk/sunxi/clk_a10s.c index 184f61ab234..d30846a9b3e 100644 --- a/drivers/clk/sunxi/clk_a10s.c +++ b/drivers/clk/sunxi/clk_a10s.c @@ -8,7 +8,7 @@ #include <clk-uclass.h> #include <dm.h> #include <errno.h> -#include <asm/arch/ccu.h> +#include <clk/sunxi.h> #include <dt-bindings/clock/sun5i-ccu.h> #include <dt-bindings/reset/sun5i-ccu.h> #include <linux/bitops.h> diff --git a/drivers/clk/sunxi/clk_a23.c b/drivers/clk/sunxi/clk_a23.c index 5750514a74f..52de1cb8d4b 100644 --- a/drivers/clk/sunxi/clk_a23.c +++ b/drivers/clk/sunxi/clk_a23.c @@ -8,7 +8,7 @@ #include <clk-uclass.h> #include <dm.h> #include <errno.h> -#include <asm/arch/ccu.h> +#include <clk/sunxi.h> #include <dt-bindings/clock/sun8i-a23-a33-ccu.h> #include <dt-bindings/reset/sun8i-a23-a33-ccu.h> #include <linux/bitops.h> diff --git a/drivers/clk/sunxi/clk_a31.c b/drivers/clk/sunxi/clk_a31.c index 9226112f4af..28ff82108e7 100644 --- a/drivers/clk/sunxi/clk_a31.c +++ b/drivers/clk/sunxi/clk_a31.c @@ -8,7 +8,7 @@ #include <clk-uclass.h> #include <dm.h> #include <errno.h> -#include <asm/arch/ccu.h> +#include <clk/sunxi.h> #include <dt-bindings/clock/sun6i-a31-ccu.h> #include <dt-bindings/reset/sun6i-a31-ccu.h> #include <linux/bitops.h> diff --git a/drivers/clk/sunxi/clk_a64.c b/drivers/clk/sunxi/clk_a64.c index 0553ffa4399..a46cb27bd1b 100644 --- a/drivers/clk/sunxi/clk_a64.c +++ b/drivers/clk/sunxi/clk_a64.c @@ -8,7 +8,7 @@ #include <clk-uclass.h> #include <dm.h> #include <errno.h> -#include <asm/arch/ccu.h> +#include <clk/sunxi.h> #include <dt-bindings/clock/sun50i-a64-ccu.h> #include <dt-bindings/reset/sun50i-a64-ccu.h> #include <linux/bitops.h> diff --git a/drivers/clk/sunxi/clk_a80.c b/drivers/clk/sunxi/clk_a80.c index 68973d528ed..bda7835c048 100644 --- a/drivers/clk/sunxi/clk_a80.c +++ b/drivers/clk/sunxi/clk_a80.c @@ -8,7 +8,7 @@ #include <clk-uclass.h> #include <dm.h> #include <errno.h> -#include <asm/arch/ccu.h> +#include <clk/sunxi.h> #include <dt-bindings/clock/sun9i-a80-ccu.h> #include <dt-bindings/reset/sun9i-a80-ccu.h> #include <linux/bitops.h> diff --git a/drivers/clk/sunxi/clk_a83t.c b/drivers/clk/sunxi/clk_a83t.c index 880c7d75997..5c3cc5bbf71 100644 --- a/drivers/clk/sunxi/clk_a83t.c +++ b/drivers/clk/sunxi/clk_a83t.c @@ -8,7 +8,7 @@ #include <clk-uclass.h> #include <dm.h> #include <errno.h> -#include <asm/arch/ccu.h> +#include <clk/sunxi.h> #include <dt-bindings/clock/sun8i-a83t-ccu.h> #include <dt-bindings/reset/sun8i-a83t-ccu.h> #include <linux/bitops.h> diff --git a/drivers/clk/sunxi/clk_h3.c b/drivers/clk/sunxi/clk_h3.c index f81633b92d5..3adc6a98373 100644 --- a/drivers/clk/sunxi/clk_h3.c +++ b/drivers/clk/sunxi/clk_h3.c @@ -8,7 +8,7 @@ #include <clk-uclass.h> #include <dm.h> #include <errno.h> -#include <asm/arch/ccu.h> +#include <clk/sunxi.h> #include <dt-bindings/clock/sun8i-h3-ccu.h> #include <dt-bindings/reset/sun8i-h3-ccu.h> #include <linux/bitops.h> diff --git a/drivers/clk/sunxi/clk_h6.c b/drivers/clk/sunxi/clk_h6.c index df93d96b3b0..86496ed1bb0 100644 --- a/drivers/clk/sunxi/clk_h6.c +++ b/drivers/clk/sunxi/clk_h6.c @@ -8,7 +8,7 @@ #include <clk-uclass.h> #include <dm.h> #include <errno.h> -#include <asm/arch/ccu.h> +#include <clk/sunxi.h> #include <dt-bindings/clock/sun50i-h6-ccu.h> #include <dt-bindings/reset/sun50i-h6-ccu.h> #include <linux/bitops.h> diff --git a/drivers/clk/sunxi/clk_h616.c b/drivers/clk/sunxi/clk_h616.c index 553d7c6e550..c39ba06fb85 100644 --- a/drivers/clk/sunxi/clk_h616.c +++ b/drivers/clk/sunxi/clk_h616.c @@ -7,7 +7,7 @@ #include <clk-uclass.h> #include <dm.h> #include <errno.h> -#include <asm/arch/ccu.h> +#include <clk/sunxi.h> #include <dt-bindings/clock/sun50i-h616-ccu.h> #include <dt-bindings/reset/sun50i-h616-ccu.h> #include <linux/bitops.h> diff --git a/drivers/clk/sunxi/clk_r40.c b/drivers/clk/sunxi/clk_r40.c index ee1e86d22eb..a261296805e 100644 --- a/drivers/clk/sunxi/clk_r40.c +++ b/drivers/clk/sunxi/clk_r40.c @@ -8,7 +8,7 @@ #include <clk-uclass.h> #include <dm.h> #include <errno.h> -#include <asm/arch/ccu.h> +#include <clk/sunxi.h> #include <dt-bindings/clock/sun8i-r40-ccu.h> #include <dt-bindings/reset/sun8i-r40-ccu.h> #include <linux/bitops.h> diff --git a/drivers/clk/sunxi/clk_sunxi.c b/drivers/clk/sunxi/clk_sunxi.c index 41934cd826e..9673b58a492 100644 --- a/drivers/clk/sunxi/clk_sunxi.c +++ b/drivers/clk/sunxi/clk_sunxi.c @@ -11,7 +11,7 @@ #include <log.h> #include <reset.h> #include <asm/io.h> -#include <asm/arch/ccu.h> +#include <clk/sunxi.h> #include <linux/bitops.h> #include <linux/log2.h> diff --git a/drivers/clk/sunxi/clk_v3s.c b/drivers/clk/sunxi/clk_v3s.c index 29622199fdc..34ccda7e722 100644 --- a/drivers/clk/sunxi/clk_v3s.c +++ b/drivers/clk/sunxi/clk_v3s.c @@ -8,7 +8,7 @@ #include <clk-uclass.h> #include <dm.h> #include <errno.h> -#include <asm/arch/ccu.h> +#include <clk/sunxi.h> #include <dt-bindings/clock/sun8i-v3s-ccu.h> #include <dt-bindings/reset/sun8i-v3s-ccu.h> #include <linux/bitops.h> diff --git a/drivers/reset/reset-sunxi.c b/drivers/reset/reset-sunxi.c index 264337ed803..8b95938dfe3 100644 --- a/drivers/reset/reset-sunxi.c +++ b/drivers/reset/reset-sunxi.c @@ -11,11 +11,11 @@ #include <malloc.h> #include <reset-uclass.h> #include <asm/io.h> +#include <clk/sunxi.h> #include <dm/device-internal.h> #include <dm/lists.h> #include <linux/bitops.h> #include <linux/log2.h> -#include <asm/arch/ccu.h> struct sunxi_reset_priv { void *base; diff --git a/arch/arm/include/asm/arch-sunxi/ccu.h b/include/clk/sunxi.h similarity index 94% rename from arch/arm/include/asm/arch-sunxi/ccu.h rename to include/clk/sunxi.h index cac5c5faf05..d4ad5fd0ba3 100644 --- a/arch/arm/include/asm/arch-sunxi/ccu.h +++ b/include/clk/sunxi.h @@ -4,12 +4,10 @@ * Author: Jagan Teki <jagan(a)amarulasolutions.com> */ -#ifndef _ASM_ARCH_CCU_H -#define _ASM_ARCH_CCU_H +#ifndef _CLK_SUNXI_H +#define _CLK_SUNXI_H -#ifndef __ASSEMBLY__ #include <linux/bitops.h> -#endif /** * enum ccu_flags - ccu clock/reset flags @@ -97,4 +95,4 @@ extern struct clk_ops sunxi_clk_ops; */ int sunxi_reset_bind(struct udevice *dev, ulong count); -#endif /* _ASM_ARCH_CCU_H */ +#endif /* _CLK_SUNXI_H */ -- 2.31.1

2 1

[PATCH] serial: Add a debug console using the RISC-V SBI interface
by Samuel Holland 13 Sep '21

13 Sep '21

The RISC-V SBI interface v0.1 provides a function for printing a character to the console. Even though SBI v0.1 functions are deprecated, the SBI console is quite useful for early debugging, because it works without any dcache, memory, or MMIO access in S mode. Signed-off-by: Samuel Holland <samuel(a)sholland.org> --- drivers/serial/Kconfig | 10 ++++++++++ drivers/serial/Makefile | 1 + drivers/serial/serial_sbi.c | 16 ++++++++++++++++ 3 files changed, 27 insertions(+) create mode 100644 drivers/serial/serial_sbi.c diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 36ee43210a9..e5f086271ef 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -280,6 +280,14 @@ config DEBUG_EFI_CONSOLE U-Boot when running on top of EFI (Extensive Firmware Interface). This is a type of BIOS used by PCs. +config DEBUG_SBI_CONSOLE + bool "SBI" + depends on SBI_V01 + help + Select this to enable a debug console which calls back to SBI to + output to the console. This can be useful for early debugging of + U-Boot when running on top of SBI (Supervisor Binary Interface). + config DEBUG_UART_S5P bool "Samsung S5P" depends on ARCH_EXYNOS || ARCH_S5PC1XX @@ -442,6 +450,7 @@ endchoice config DEBUG_UART_BASE hex "Base address of UART" depends on DEBUG_UART + default 0 if DEBUG_SBI_CONSOLE default 0 if DEBUG_UART_SANDBOX help This is the base address of your UART for memory-mapped UARTs. @@ -452,6 +461,7 @@ config DEBUG_UART_BASE config DEBUG_UART_CLOCK int "UART input clock" depends on DEBUG_UART + default 0 if DEBUG_SBI_CONSOLE default 0 if DEBUG_UART_SANDBOX default 0 if DEBUG_MVEBU_A3700_UART help diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index 3cbea8156f8..4edd2aa9458 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -36,6 +36,7 @@ obj-$(CONFIG_ATMEL_USART) += atmel_usart.o obj-$(CONFIG_BCM6345_SERIAL) += serial_bcm6345.o obj-$(CONFIG_COREBOOT_SERIAL) += serial_coreboot.o obj-$(CONFIG_CORTINA_UART) += serial_cortina.o +obj-$(CONFIG_DEBUG_SBI_CONSOLE) += serial_sbi.o obj-$(CONFIG_EFI_APP) += serial_efi.o obj-$(CONFIG_LPC32XX_HSUART) += lpc32xx_hsuart.o obj-$(CONFIG_MCFUART) += serial_mcf.o diff --git a/drivers/serial/serial_sbi.c b/drivers/serial/serial_sbi.c new file mode 100644 index 00000000000..b9f35ed36e6 --- /dev/null +++ b/drivers/serial/serial_sbi.c @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include <debug_uart.h> +#include <asm/sbi.h> + +static inline void _debug_uart_init(void) +{ +} + +static inline void _debug_uart_putc(int c) +{ + if (CONFIG_IS_ENABLED(RISCV_SMODE)) + sbi_console_putchar(c); +} + +DEBUG_UART_FUNCS -- 2.31.1

3 2