April 2021 - U-Boot

[PATCH 0/8] net: several updates to support i.MX
by Peng Fan 05 May '21

05 May '21

The patchset is to upstream NXP downstream network patches that runs on i.MX platforms, including eqos update, sharded mdio support, mac addr accessing and etc. Fugang Duan (3): net: phy: realtek: add rx delay support for RTL8211F net: dwc_eth_qos: add dwc eqos for imx support net: eqos: implement callbaks to get interface and set txclk rate Peng Fan (1): net: eth-uclass: add return value check Ye Li (4): net: Add eth phy generic driver for shared MDIO net: Update eQos driver and FEC driver to use eth phy interfaces fec: Move imx_get_mac_from_fuse declare to imx file eQos: Implement the read_rom_hwaddr callback arch/arm/include/asm/mach-imx/sys_proto.h | 2 + drivers/net/Kconfig | 6 + drivers/net/Makefile | 1 + drivers/net/dwc_eth_qos.c | 284 +++++++++++++++++++++++++++--- drivers/net/eth-phy-uclass.c | 123 +++++++++++++ drivers/net/fec_mxc.c | 16 +- drivers/net/fec_mxc.h | 2 - drivers/net/phy/realtek.c | 11 ++ include/dm/uclass-id.h | 1 + include/eth_phy.h | 17 ++ net/eth-uclass.c | 17 +- 11 files changed, 446 insertions(+), 34 deletions(-) create mode 100644 drivers/net/eth-phy-uclass.c create mode 100644 include/eth_phy.h -- 2.16.4

2 9

[PATCH v1 0/6] common: Introduce crypt-style password support
by Steffen Jaeckel 04 May '21

04 May '21

This patchset introduces support for crypt-style passwords to unlock the console in autoboot mode. The implementation of crypt-sha256 and crypt-sha512 originate from libxcrypt at https://github.com/besser82/libxcrypt.git Version v4.4.17 Git commit hash 6b110bc I didn't re-format those two files to make diffing to the original versions from libxcrypt easier, which leads to a huge load of checkpatch.pl warnings&errors. Please advise on whether they should be re-formatted or can be kept as is. The remaining warnings from checkpatch.pl are intentional resp. open for discussion. Cheers, Steffen Changes in v1: Added unit-tests of crypt_compare() Wrapped crypt functions to encapsulate errno Steffen Jaeckel (6): lib: add crypt subsystem lib: wrap crypt API to hide errno usage common: integrate crypt-based passwords common: Rename macro appropriately cmd: allow disabling of timeout for password entry configs: add new values to bcm963158 defconfig cmd/Kconfig | 8 + common/Kconfig.boot | 23 ++- common/autoboot.c | 109 ++++++++-- configs/bcm963158_ram_defconfig | 8 + include/crypt.h | 14 ++ lib/Kconfig | 1 + lib/Makefile | 1 + lib/crypt/Kconfig | 29 +++ lib/crypt/Makefile | 10 + lib/crypt/alg-sha256.h | 11 + lib/crypt/alg-sha512.h | 11 + lib/crypt/crypt-port.h | 30 +++ lib/crypt/crypt-sha256.c | 334 ++++++++++++++++++++++++++++++ lib/crypt/crypt-sha512.c | 349 ++++++++++++++++++++++++++++++++ lib/crypt/crypt.c | 76 +++++++ test/Kconfig | 9 + test/lib/Makefile | 1 + test/lib/test_crypt.c | 64 ++++++ 18 files changed, 1068 insertions(+), 20 deletions(-) create mode 100644 include/crypt.h create mode 100644 lib/crypt/Kconfig create mode 100644 lib/crypt/Makefile create mode 100644 lib/crypt/alg-sha256.h create mode 100644 lib/crypt/alg-sha512.h create mode 100644 lib/crypt/crypt-port.h create mode 100644 lib/crypt/crypt-sha256.c create mode 100644 lib/crypt/crypt-sha512.c create mode 100644 lib/crypt/crypt.c create mode 100644 test/lib/test_crypt.c -- 2.31.1

2 10

[PATCH] arm: dts: stm32mp157c-odyssey-som: enable the RNG1
by Grzegorz Szymaszek 04 May '21

04 May '21

Enable the true random number generator. It can be used, for example, to generate partition UUIDs when partitioning with the gpt command. The generator is already enabled in the device trees of several other STM32MP1‐based boards, like DKx or DHCOM. Signed-off-by: Grzegorz Szymaszek <gszymaszek(a)short.pl> Cc: Patrice Chotard <patrice.chotard(a)foss.st.com> Cc: Patrick Delaunay <patrick.delaunay(a)foss.st.com> --- arch/arm/dts/stm32mp157c-odyssey-som.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi index 83ff2e7ce1..e367a311c4 100644 --- a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi +++ b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi @@ -258,6 +258,10 @@ status = "okay"; }; +&rng1 { + status = "okay"; +}; + &sdmmc2 { pinctrl-names = "default", "opendrain", "sleep"; pinctrl-0 = <&sdmmc2_b4_pins_a>; -- 2.30.2

2 1

[PATCH v3 0/7] arm: cache: cp15: don't map reserved region with no-map property
by Patrick Delaunay 04 May '21

04 May '21

Hi, It it the v3 serie of [1]. This v3 serie is rebased on top of v2021.07-rc1 with integrated previous series: - [2] for stm32mp parts and added dram_bank_mmu_setup - [3] for LMB impacts On STM32MP15x platform we can use OP-TEE, loaded in DDR in a region protected by a firewall. This region is reserved in device with "no-map" property. Sometime the platform boot failed in U-Boot on a Cortex A7 access to this region (depending of the binary and the issue can change with compiler version or with code alignment), then the firewall raise an error, for example: E/TC:0 tzc_it_handler:19 TZC permission failure E/TC:0 dump_fail_filter:420 Permission violation on filter 0 E/TC:0 dump_fail_filter:425 Violation @0xde5c6bf0, non-secure privileged read, AXI ID 5c0 E/TC:0 Panic After investigation, the forbidden access is a speculative request performed by the Cortex A7 because all the DDR is mapped as MEMORY with CACHEABLE property. The issue is solved only when the region reserved by OP-TEE is no more mapped in U-Boot as it is already done in Linux kernel. Tested on DK2 board with OP-TEE 3.12 / TF-A 2.4: With hard-coded address for OP-TEE reserved memory, the error doesn't occur. void dram_bank_mmu_setup(int bank) { .... for (i = start >> MMU_SECTION_SHIFT; i < (start >> MMU_SECTION_SHIFT) + (size >> MMU_SECTION_SHIFT); i++) { option = DCACHE_DEFAULT_OPTION; if (i >= 0xde0) option = INVALID_ENTRY; set_section_dcache(i, option); } } Just by modifying the test on 0xde0 to 0xdf0, the OP-TEE memory protected by firewall is mapped cacheable and the error occurs. I think that can be a general issue for ARM architecture: the no-map tag in device should be respected by U-Boot. But I don't propose a generic solution in arm/lib/cache-cp15.c:dram_bank_mmu_setup() because the device tree parsing done in lmb_init_and_reserve() take a long time when it is executed without data cache. => the previous path 7/7 of v2 series is dropped to avoid performance issue on other ARM target. To avoid this issue on stm32mp32mp platform, this V3 series moves the lmb initialization in enable_caches() and the lmb variable becomes a static struct. This v3 series is composed by 7 patches - 1..3/7: preliminary steps to support flags in library in lmb (as it is done in memblock.c in Linux) - 4/7: unitary test on the added feature in lmb lib - 5/7: save the no-map flags in lmb when the device tree is parsed - 6/7: solve issue for the size of cacheable area in pre-reloc case - 7/7: update the stm32mp mmu support See also [4] which handle same speculative access on armv8 for area with Executable attribute. [1] http://patchwork.ozlabs.org/project/uboot/list/?series=228543&state=* [2] http://patchwork.ozlabs.org/project/uboot/list/?series=228202&state=* [3] http://patchwork.ozlabs.org/project/uboot/list/?series=227570&state=* [4] http://patchwork.ozlabs.org/project/uboot/patch/20200903000106.5016-1-marek… Regards Patrick Changes in v3: - NEW: solve performance issue as relocated DT is not marked cacheable - call lmb_init_and_reserve when data cache is activated in enable_caches() - drop v2 patch "arm: cache: cp15: don't map the reserved region with no-map property" Changes in v2: - remove unnecessary comments in lmb.h - rebase on latest lmb patches - NEW: update in stm32mp specific MMU setup functions Patrick Delaunay (7): lmb: Add support of flags for no-map properties lmb: add lmb_is_reserved_flags lmb: add lmb_dump_region() function test: lmb: add test for lmb_reserve_flags image-fdt: save no-map parameter of reserve-memory stm32mp: Increase the reserved memory in board_get_usable_ram_top stm32mp: don't map the reserved region with no-map property arch/arm/mach-stm32mp/cpu.c | 17 +++++- arch/arm/mach-stm32mp/dram_init.c | 3 +- common/image-fdt.c | 23 +++++--- include/lmb.h | 21 +++++++ lib/lmb.c | 94 ++++++++++++++++++++++--------- test/lib/lmb.c | 89 +++++++++++++++++++++++++++++ 6 files changed, 209 insertions(+), 38 deletions(-) -- 2.17.1

5 16

[PATCH v4 00/10] Add support for extension boards detection and DT overlays application
by Kory Maincent 04 May '21

04 May '21

This series of patches aims at proposing a generic U-Boot mechanism to detect extension boards connected to the HW platform, and apply the appropriate Device Tree overlays depending on the detected extension boards. Indeed, numerous popular platforms, such as the BeagleBone or the RaspberryPi, feature some kind of extension board mechanism. These extension boards are often discoverable through some kind of EEPROM (connected on I2C, 1-wire, etc.) and require Device Tree overlays to be applied at the U-Boot level to provide a complete HW description to the Linux kernel. However, currently this logic is usually implemented ad-hoc in downstream forks of U-Boot. This series proposes to bring a HW-agnostic and generic solution to this problem to upstream U-Boot. The series shows that it is generic enough by implementing its usage for 2 different families of HW platforms and expansion boards: - The BeagleBone Black and BeagleBone AI, that use extension boards where the EEPROM describing the extension boards is connected over I2C. - The CHIP, that uses extension boards where the EEPROM describing the extension boards is connected over 1-wire. The patch series implements a new command called "extension", with two sub-commands: - "extension scan" to detect available extension boards - "extension list" will simply list the detected extension boards - "extension apply" will allow to apply the Device Tree overlays corresponding to one extension board or to all expansion boards Note that the name "extension" has been chosen to not refer to any particular board-specific terminology for extension boards ("cape" for BeagleBone, "DIP" for CHIP, "hat" for RaspberryPi, etc.). However, we welcome suggestions of other names and are definitely willing to use a different naming. The "extension apply" command requires two environment variables to be defined so that it knows how to apply DT overlays. This is described in more details in PATCH 1. This generic code requires board-specific code for the detection and enumeration of extension boards. This is simply implemented in the form of a board-specific extension_board_scan() function, which fills in a list of detected extension boards. In detail: - PATCH 1 move fdt_valid function to fdt_support file - PATCH 2 implements the generic command and logic - PATCH 3 implements the python test for the "extension" command - PATCH 4 implements the board-specific code for the BeagleBone platforms - PATCH 5 enables the mechanism for the BeagleBone AI - PATCH 6 review the detection mechanism of one-wire devices - PATCH 7 and 8 enable the mechanism for the CHIP - PATCH 9 and 10 enable the mechanism for the BeagleBone Black Thanks in advance for your review and feedback Change since v1: - remove the one wire devicetree description of the CHIP board - rewrite the detection of w1 to makes it automatic and not devicetree dependent - replace Kconfig CHIP board target by Kconfig CHIP_DIP_SCAN simple option - rewrite doc to rST syntax - make few syntax update Change since v2: - review the detection of w1 to makes it compatible with automatic detection alongside the devicetree description detection - update the patch separation between the mechanism for the CHIP and the configuration activation Change since v3: - Update commit messages on the extension command patch - Remove a test on CMD_EXTENSION in the chip.c file. Kory Maincent (10): fdt_support: move fdt_valid from cmd_fdt.c to fdt_support.c cmd: add support for a new "extension" command pytest: add sandbox test for "extension" command ti/common: add support for extension_scan_board function am57xx: add support for cape detect functionality w1: replace dt detection by automatic detection arm: sunxi: add support for DIP detection to CHIP board configs: CHIP: add support for DIP detect functionality arm: am335x: add support for i2c2 bus am335x: add support for cape detect functionality arch/Kconfig | 2 + arch/arm/mach-omap2/am33xx/Kconfig | 1 + arch/arm/mach-omap2/am33xx/clock_am33xx.c | 1 + arch/arm/mach-omap2/omap5/Kconfig | 1 + arch/arm/mach-sunxi/Kconfig | 9 ++ arch/sandbox/dts/Makefile | 1 + arch/sandbox/dts/overlay0.dts | 9 ++ arch/sandbox/dts/overlay1.dts | 9 ++ board/sandbox/sandbox.c | 23 +++ board/sunxi/Makefile | 1 + board/sunxi/chip.c | 100 +++++++++++++ board/ti/am335x/board.c | 3 + board/ti/am335x/board.h | 1 + board/ti/am335x/mux.c | 15 ++ board/ti/am57xx/board.c | 1 + board/ti/common/Kconfig | 6 + board/ti/common/Makefile | 1 + board/ti/common/cape_detect.c | 96 +++++++++++++ board/ti/common/cape_detect.h | 28 ++++ cmd/Kconfig | 12 ++ cmd/Makefile | 1 + cmd/extension_board.c | 167 ++++++++++++++++++++++ cmd/fdt.c | 49 ------- common/fdt_support.c | 46 ++++++ configs/CHIP_defconfig | 1 + doc/usage/extension.rst | 111 ++++++++++++++ drivers/w1-eeprom/ds24xxx.c | 7 + drivers/w1-eeprom/ds2502.c | 6 + drivers/w1-eeprom/w1-eeprom-uclass.c | 31 ---- drivers/w1/w1-uclass.c | 76 +++++++++- include/extension_board.h | 31 ++++ include/fdt_support.h | 2 + include/w1-eeprom.h | 2 - include/w1.h | 17 +++ test/py/tests/test_extension.py | 52 +++++++ 35 files changed, 835 insertions(+), 84 deletions(-) create mode 100644 arch/sandbox/dts/overlay0.dts create mode 100644 arch/sandbox/dts/overlay1.dts create mode 100644 board/sunxi/chip.c create mode 100644 board/ti/common/cape_detect.c create mode 100644 board/ti/common/cape_detect.h create mode 100644 cmd/extension_board.c create mode 100644 doc/usage/extension.rst create mode 100644 include/extension_board.h create mode 100644 test/py/tests/test_extension.py -- 2.17.1

2 11

[PATCH v2 00/17] TI/Cadence: Add Sierra/Torrent SERDES driver
by Kishon Vijay Abraham I 04 May '21

04 May '21

Patch series adds Sierra and Torrent SERDES driver for the SERDES used in TI's K3 platforms. This SERDES is used by USB3, PCIe and Ethernet. This series is mostly an adaptation of drivers added in upstream Linux kernel. Changes from v1: 1) Fixed string comparison strncmp() to remove "==" 2) Added a test for node name comparison to ignore unit address in test/dm 3) Added better commit message in "drivers: reset: Handle gracefully NULL pointers" Alan Douglas (1): phy: cadence: Add driver for Sierra PHY Aswath Govindraju (7): dt-bindings: phy: Add definitions for additional phy types phy: cadence: Add driver for Torrent SERDES board: ti: j721e: Add support for probing and configuring Torrent serdes on J7200 arm: dts: k3-j7200-main: Add DT node for torrent serdes arm: dts: k3-j7200-common-proc-board: Enable SERDES DT arm: dts: k3-j7200-common-proc-board-u-boot: Add u-boot tags for torrent serdes configs: j7200_evm_a72_defconfig: Add config for torrent serdes and common clock framework Jean-Jacques Hiblot (3): drivers: reset: Handle gracefully NULL pointers phy: ti: j721e-wiz: Add support for WIZ module present in TI J721E SoC configs: j721e_evm_a72: Enable the drivers required for the USB3 support Kishon Vijay Abraham I (6): dm: core: Add helper to compare node names dm: test: Add test case to check node name ignoring unit address usb: cdns3: cdns3-ti: Fix clk_get_by_name() to get the correct name ARM: dts: k3-j721e: Add the entries required for USB3 support on USB0 env: ti: j721e-evm: Add env variable to power on & reset QSGMII PHY in J7200 EVM configs: j7200_evm_a72: Enhance bootcmd to configure ethernet PHY Alan Douglas (1): phy: cadence: Add driver for Sierra PHY Aswath Govindraju (7): dt-bindings: phy: Add definitions for additional phy types phy: cadence: Add driver for Torrent SERDES board: ti: j721e: Add support for probing and configuring Torrent serdes on J7200 arm: dts: k3-j7200-main: Add DT node for torrent serdes arm: dts: k3-j7200-common-proc-board: Enable SERDES DT arm: dts: k3-j7200-common-proc-board-u-boot: Add u-boot tags for torrent serdes configs: j7200_evm_a72_defconfig: Add config for torrent serdes and common clock framework Jean-Jacques Hiblot (3): drivers: reset: Handle gracefully NULL pointers phy: ti: j721e-wiz: Add support for WIZ module present in TI J721E SoC configs: j721e_evm_a72: Enable the drivers required for the USB3 support Kishon Vijay Abraham I (6): dm: core: Add helper to compare node names dm: test: Add test case to check node name ignoring unit address usb: cdns3: cdns3-ti: Fix clk_get_by_name() to get the correct name ARM: dts: k3-j721e: Add the entries required for USB3 support on USB0 env: ti: j721e-evm: Add env variable to power on & reset QSGMII PHY in J7200 EVM configs: j7200_evm_a72: Enhance bootcmd to configure ethernet PHY .../k3-j7200-common-proc-board-u-boot.dtsi | 12 + arch/arm/dts/k3-j7200-common-proc-board.dts | 23 + arch/arm/dts/k3-j7200-main.dtsi | 63 + .../k3-j721e-common-proc-board-u-boot.dtsi | 19 +- board/ti/j721e/evm.c | 34 +- configs/j7200_evm_a72_defconfig | 9 +- configs/j721e_evm_a72_defconfig | 6 + drivers/core/ofnode.c | 13 + drivers/phy/Kconfig | 3 + drivers/phy/Makefile | 2 + drivers/phy/cadence/Kconfig | 11 + drivers/phy/cadence/Makefile | 2 + drivers/phy/cadence/phy-cadence-sierra.c | 757 +++++ drivers/phy/cadence/phy-cadence-torrent.c | 2456 +++++++++++++++++ drivers/phy/ti/Kconfig | 9 + drivers/phy/ti/Makefile | 1 + drivers/phy/ti/phy-j721e-wiz.c | 985 +++++++ drivers/reset/reset-uclass.c | 30 +- drivers/usb/cdns3/cdns3-ti.c | 2 +- include/configs/j721e_evm.h | 16 +- include/dm/ofnode.h | 10 + include/dt-bindings/phy/phy.h | 1 + test/dm/core.c | 14 + 23 files changed, 4460 insertions(+), 18 deletions(-) create mode 100644 drivers/phy/cadence/Kconfig create mode 100644 drivers/phy/cadence/Makefile create mode 100644 drivers/phy/cadence/phy-cadence-sierra.c create mode 100644 drivers/phy/cadence/phy-cadence-torrent.c create mode 100644 drivers/phy/ti/Kconfig create mode 100644 drivers/phy/ti/Makefile create mode 100644 drivers/phy/ti/phy-j721e-wiz.c -- 2.17.1

2 21

[PATCH v1 00/10] net: mvpp2: Sync Marvell mvpp2 driver with Marvell version
by Stefan Roese 03 May '21

03 May '21

This patchset adds the missing ethernet mvpp2 patches from the Marvell U-Boot SDK version to support and fix higher connection speeds. This is done in preparation for the integration of the Octeon TX2 CN913x support, which uses the updated version of this code. Please note that I explicitly did not remove the incorrectly used PHY_INTERFACE_MODE_SGMII_2500 changes from these patches. This makes it easier to follow the Marvell downstream code. SGMII_2500 will be removed by the follow-up patch, that I already did send a bit earlier today. Sorry, I forgot to send this series earlier. Thanks, Stefan Ben Peled (3): net: mvpp2: AN Bypass in 1000 and 2500 basex mode net: mvpp2: remove unused define MVPP22_SMI_PHY_ADDR_REG net: mvpp2: fix missing switch case break Marcin Wojtas (2): net: mvpp2: remove redundant SMI address configuration net: mvpp2: add explicit sgmii-2500 support Stefan Chulski (5): phy: introduce 1000BaseX and 2500BaseX modes net: mvpp2: add CP115 port1 10G/5G SFI support net: mvpp2: add 1000BaseX and 2500BaseX ppv2 support net: mvpp2: Fix 2.5G GMII_SPEED configurations net: mvpp2: allow MDIO registration for fixed links drivers/net/mvpp2.c | 257 +++++++++++++++++++++++++--------------- include/phy_interface.h | 4 + 2 files changed, 163 insertions(+), 98 deletions(-) -- 2.31.1

3 22

[PATCH 00/16] Fix i.MXRT1020/50
by Giulio Benetti 03 May '21

03 May '21

This patchset adds imx-gpt-timer driver that is supported by i.MXRT and also a lot of other i.MX* SoCs. This driver is needed for i.MXRT SoC family that is lacking at the moment the timer at all and that makes u-boot to fail running on i.MXRT. There are also some fixes in imxrt10*0-evk.dts and other minor fixed and improvements. Giulio Benetti (16): arm: imxrt: soc: make mpu regions generic timer: imx-gpt: Add timer support for i.MX SoCs family ARM: dts: imxrt1020: add alias to osc ARM: dts: imxrt1020: add gpt1 node ARM: dts: imxrt1020-evk: enable gpt1 timer ARM: dts: imxrt1020-evk: set gpt1 as tick-timer for u-boot ARM: dts: imxrt1020-evk-u-boot: make gpt1 present for SPL ARM: dts: imxrt1020-evk: add device_type = "memory" to memory node configs: imxrt1020-evk: enable imx gpt timer as tick-timer ARM: dts: imxrt1050: add alias to osc ARM: dts: imxrt1050: add gpt1 node ARM: dts: imxrt1050-evk: enable gpt1 timer ARM: dts: imxrt1050-evk: set gpt1 as tick-timer for u-boot ARM: dts: imxrt1050-evk-u-boot: make gpt1 present for SPL ARM: dts: imxrt1050-evk: add device_type = "memory" to memory node configs: imxrt1050-evk: enable imx gpt timer as tick-timer arch/arm/dts/imxrt1020-evk-u-boot.dtsi | 4 + arch/arm/dts/imxrt1020-evk.dts | 6 + arch/arm/dts/imxrt1020.dtsi | 10 +- arch/arm/dts/imxrt1050-evk-u-boot.dtsi | 4 + arch/arm/dts/imxrt1050-evk.dts | 6 + arch/arm/dts/imxrt1050.dtsi | 10 +- arch/arm/mach-imx/imxrt/soc.c | 6 +- configs/imxrt1020-evk_defconfig | 1 + configs/imxrt1050-evk_defconfig | 1 + drivers/timer/Kconfig | 7 ++ drivers/timer/Makefile | 1 + drivers/timer/imx-gpt-timer.c | 162 +++++++++++++++++++++++++ 12 files changed, 213 insertions(+), 5 deletions(-) create mode 100644 drivers/timer/imx-gpt-timer.c -- 2.25.1

4 37

[PATCH v3 0/9] video: sunxi: rework DE2 driver
by Andre Przywara 03 May '21

03 May '21

Hi Anatolij, can you please take this series? This is the first part of Jernej's rework, which was checked quite thoroughly. I left out the patches with issues for a later post. I pushed a branch to: https://source.denx.de/u-boot/custodians/u-boot-sunxi/-/commits/de2-fixes-p… Thanks, Andre ----------------- This series is the first part of a major rework to the DE2 mixer and accompanying DW-HDMI platform driver. Main goal was to drop redundant device specific code, and later use the DT as a source of information. The latter part has still issues (breaks on A64), so this version only covers the first part of the cleanups. Besides those cleanups the first patches now filter the HDMI modes based on the pixel clock and search for additional detailed timings in the EDID extension block. This change allows to use 4K monitors - the base EDID block typically presents only a 4k@60 timing, which exceeds the maximum DE2 pixel clock. Other suitable timings, which are appropriate for this HDMI 1.4 compliant controller, are contained in extension block. Tested on an H5 and an A64 board. Jernej Skrabec (9): video: sunxi: Add mode_valid callback to sunxi_dw_hdmi common: edid: check for digital display earlier common: edid: extract code for detailed timing search common: edid: Search for valid timing in extension block video: sunxi: Use DW-HDMI hpd function video: sunxi: Remove check for ddc-i2c-bus property video: sunxi: Remove TV probe from DE2 video: sunxi: dw-hdmi: read source_id later video: sunxi: de2: switch to public uclass functions common/edid.c | 68 ++++++++++++++++++++--------- drivers/video/sunxi/sunxi_de2.c | 44 +++++-------------- drivers/video/sunxi/sunxi_dw_hdmi.c | 48 ++++++-------------- 3 files changed, 72 insertions(+), 88 deletions(-) -- 2.17.5

3 11

[PATCH 0/7] GE Board fixes and cleanups
by Sebastian Reichel 02 May '21

02 May '21

Collection of downstream fixes and cleanups for GE boards. -- Sebastian Ian Ray (5): configs: ge: bx50v3: adjust watchdog period configs: ge: use non-persistent environment include: configs: ge: bx50v3: drop USB boot include: configs: ge: simplify default boot command include: configs: ge: avoid shell on boot failure Sebastian Reichel (2): board: ge: bx50v3: fix crystal bit board: ge: bx50v3: add phy reset GPIO arch/arm/dts/imx6q-bx50v3-uboot.dtsi | 12 ++++++++++++ board/ge/bx50v3/bx50v3.c | 26 ++++++++++++++++++++++++++ configs/ge_bx50v3_defconfig | 4 ++-- configs/mx53ppd_defconfig | 2 +- include/configs/ge_bx50v3.h | 17 +++++------------ include/configs/mx53ppd.h | 18 +++++++++--------- 6 files changed, 55 insertions(+), 24 deletions(-) -- 2.30.2

2 14