March 2021 - U-Boot

[PATCH v2 0/2] riscv: simplify longjmp
by Heinrich Schuchardt 24 Mar '21

24 Mar '21

The implementation of longjmp() is simplified. A unit test for longjmp() is provided. For testing use CONFIG_UNIT_TEST=y CONFIG_CMD_SETEXPR=n and execute ut lib v2: correct title of patch 1 Heinrich Schuchardt (2): riscv: simplify longjmp test: unit test for longjmp arch/riscv/lib/setjmp.S | 8 ++------ test/lib/Makefile | 1 + test/lib/longjmp.c | 44 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 47 insertions(+), 6 deletions(-) create mode 100644 test/lib/longjmp.c -- 2.30.2

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[PATCH v2] efi_loader: Add a locality event on the eventlog
by Ilias Apalodimas 24 Mar '21

24 Mar '21

We are currently not adding any events on the eventlog apart from the SpecID event. The locality event is mandatory and must be logged before extending PCR[0]. The spec description is "The Startup Locality event should be placed in the log before any event which extends PCR[0]. This allows software which needs to parse the TCG Event Log to initialize its internal PCR[0] state correctly". So let's add a locality even during the EventLog creation, right after our SpecID event. Signed-off-by: Ilias Apalodimas <ilias.apalodimas(a)linaro.org> --- changes since v1: - v1 was missing the required headers changes - exit on tcg2_create_digest() failure include/efi_tcg2.h | 13 ++++++++++ lib/efi_loader/efi_tcg2.c | 52 +++++++++++++++++++++++++++++---------- 2 files changed, 52 insertions(+), 13 deletions(-) diff --git a/include/efi_tcg2.h b/include/efi_tcg2.h index 40e241ce315c..eac76774d7ff 100644 --- a/include/efi_tcg2.h +++ b/include/efi_tcg2.h @@ -72,6 +72,7 @@ struct efi_tcg2_boot_service_capability { offsetof(struct efi_tcg2_boot_service_capability, number_of_pcr_banks) #define TCG_EFI_SPEC_ID_EVENT_SIGNATURE_03 "Spec ID Event03" +#define TCG_EFI_STARTUP_LOCALITY_SIGNATURE "StartupLocality" #define TCG_EFI_SPEC_ID_EVENT_SPEC_VERSION_MAJOR_TPM2 2 #define TCG_EFI_SPEC_ID_EVENT_SPEC_VERSION_MINOR_TPM2 0 #define TCG_EFI_SPEC_ID_EVENT_SPEC_VERSION_ERRATA_TPM2 2 @@ -120,6 +121,18 @@ struct tcg_efi_spec_id_event { u8 vendor_info[]; } __packed; +/** + * struct tdTCG_EfiStartupLocalityEvent + * + * @signature: The NUL-terminated ASCII string "StartupLocality" + * @startup_locality: The Locality Indicator which sent the TPM2_Startup + * command + */ +struct tcg_efi_startup_locality_event { + u8 signature[16]; + u8 startup_locality; +} __packed; + /** * struct tdEFI_TCG2_FINAL_EVENTS_TABLE * @version: version number for this structure diff --git a/lib/efi_loader/efi_tcg2.c b/lib/efi_loader/efi_tcg2.c index 797d6eb134f6..31c80b21d8b5 100644 --- a/lib/efi_loader/efi_tcg2.c +++ b/lib/efi_loader/efi_tcg2.c @@ -513,7 +513,7 @@ static efi_status_t tcg2_create_digest(const u8 *input, u32 length, sha1_context ctx; sha256_context ctx_256; sha512_context ctx_512; - u8 final[TPM2_ALG_SHA512]; + u8 final[TPM2_ALG_SHA512] = { 0 }; efi_status_t ret; u32 active; int i; @@ -530,27 +530,35 @@ static efi_status_t tcg2_create_digest(const u8 *input, u32 length, continue; switch (hash_alg) { case TPM2_ALG_SHA1: - sha1_starts(&ctx); - sha1_update(&ctx, input, length); - sha1_finish(&ctx, final); + if (input) { + sha1_starts(&ctx); + sha1_update(&ctx, input, length); + sha1_finish(&ctx, final); + } digest_list->count++; break; case TPM2_ALG_SHA256: - sha256_starts(&ctx_256); - sha256_update(&ctx_256, input, length); - sha256_finish(&ctx_256, final); + if (input) { + sha256_starts(&ctx_256); + sha256_update(&ctx_256, input, length); + sha256_finish(&ctx_256, final); + } digest_list->count++; break; case TPM2_ALG_SHA384: - sha384_starts(&ctx_512); - sha384_update(&ctx_512, input, length); - sha384_finish(&ctx_512, final); + if (input) { + sha384_starts(&ctx_512); + sha384_update(&ctx_512, input, length); + sha384_finish(&ctx_512, final); + } digest_list->count++; break; case TPM2_ALG_SHA512: - sha512_starts(&ctx_512); - sha512_update(&ctx_512, input, length); - sha512_finish(&ctx_512, final); + if (input) { + sha512_starts(&ctx_512); + sha512_update(&ctx_512, input, length); + sha512_finish(&ctx_512, final); + } digest_list->count++; break; default: @@ -1004,6 +1012,8 @@ static efi_status_t efi_init_event_log(void) struct udevice *dev; size_t spec_event_size; efi_status_t ret; + struct tcg_efi_startup_locality_event locality_event; + struct tpml_digest_values digest_list; ret = platform_get_tpm2_device(&dev); if (ret != EFI_SUCCESS) @@ -1040,6 +1050,22 @@ static efi_status_t efi_init_event_log(void) event_log.pos = spec_event_size + sizeof(*event_header); event_log.last_event_size = event_log.pos; + /* Add a locality event before PCR[0] changes */ + memcpy(locality_event.signature, TCG_EFI_STARTUP_LOCALITY_SIGNATURE, + sizeof(locality_event.signature)); + /* + * Locality 0 is designated as the default Locality. This is usually + * the platform’s boot firmware, OS and applications. + */ + locality_event.startup_locality = 0; + ret = tcg2_create_digest(NULL, 0, &digest_list); + if (ret != EFI_SUCCESS) + goto out; + ret = tcg2_agile_log_append(0, EV_NO_ACTION, &digest_list, + sizeof(locality_event), (u8*)&locality_event); + if (ret != EFI_SUCCESS) + goto out; + ret = create_final_event(); out: -- 2.31.0

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[PATCH] usb: dwc2: Set max xfer length to speed up R/W
by Cheng Lu 24 Mar '21

24 Mar '21

Set transfer length to the maximum (65535 * 512) Bytes of SCSI READ(10) and WRITE(10) commands, while default transfer length is (20 * 512) Bytes Signed-off-by: Cheng Lu <Cheng.Lu(a)synaptics.com> Cc: <marex(a)denx.de> --- drivers/usb/host/dwc2.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c index f1d13b1c1d..936d7ceb5f 100644 --- a/drivers/usb/host/dwc2.c +++ b/drivers/usb/host/dwc2.c @@ -1456,10 +1456,17 @@ static int dwc2_usb_remove(struct udevice *dev) return 0; } +static int dwc2_get_max_xfer_size(struct udevice *dev, size_t *size) +{ + *size = SIZE_MAX; + return 0; +} + struct dm_usb_ops dwc2_usb_ops = { .control = dwc2_submit_control_msg, .bulk = dwc2_submit_bulk_msg, .interrupt = dwc2_submit_int_msg, + .get_max_xfer_size = dwc2_get_max_xfer_size, }; static const struct udevice_id dwc2_usb_ids[] = { -- 2.25.1

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[v1 0/2] Store QSPI reference clock in kHz for SOCFPGA SOC64
by Siew Chin Lim 24 Mar '21

24 Mar '21

This patchset is extracted from "Add Intel Diamond Mesa SoC support" series. We are in preparation to support new Intel N5X (Diamond Mesa) SOC64 device and we would like to clean up some code before enable N5X device. This patchset move duplicated function 'cm_get_qspi_controller_clk_hz' to clock_manager.c and change to store QSPI reference clock in kHz instead of Hz in boot scratch cold0 register for Stratix10 and Agilex. History: -------- The first version of this patchset is extracted from "Add Intel Diamond Mesa SoC support" series. https://patchwork.ozlabs.org/project/uboot/cover/20201110064439.9683-1-elly… This patchset has dependency on: -------- 1. arm: socfpga: Move Stratix10 and Agilex SPL common code https://patchwork.ozlabs.org/project/uboot/patch/20210315075916.26336-1-ell… 2. Restructure Stratix10 and Agilex handoff code https://patchwork.ozlabs.org/project/uboot/cover/20210315094329.30282-1-ell… Siew Chin Lim (2): arm: socfpga: Move Stratix10 and Agilex clock manager common code arm: socfpga: Changed to store QSPI reference clock in kHz arch/arm/mach-socfpga/clock_manager.c | 16 +++++++-- arch/arm/mach-socfpga/clock_manager_agilex.c | 6 ---- arch/arm/mach-socfpga/clock_manager_s10.c | 6 ---- arch/arm/mach-socfpga/include/mach/clock_manager.h | 4 +++ .../mach-socfpga/include/mach/clock_manager_s10.h | 1 - .../include/mach/system_manager_soc64.h | 16 ++++++++- arch/arm/mach-socfpga/mailbox_s10.c | 40 +++++++++++++++++++--- include/configs/socfpga_soc64_common.h | 1 + 8 files changed, 69 insertions(+), 21 deletions(-) -- 2.13.0

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[v2 0/2] Store QSPI reference clock in kHz for SOCFPGA SOC64
by Siew Chin Lim 24 Mar '21

24 Mar '21

This is the 2cd version of patchset to clean up clock manager code and store QSPI reference clock in kHz for SOCFPGA SOC64. This patchset is extracted from "Add Intel Diamond Mesa SoC support" series. We are in preparation to support new Intel N5X (Diamond Mesa) SOC64 device and we would like to clean up some code before enable N5X device. Patch status: Have changes: Patch 2 Other patches unchanged. Detail changelog can find in commit message. v1->v2: -------- Patch 2: - Rename mbox_qspi_set_controller_clk_hz function to cm_set_qspi_controller_clk_hz function and move to clock_manager.c. - Remove CLOCK_1K macro from socfpga_soc64_common.h - Sort include file list by alphabetical order in mailbox_s10.c History: -------- [v1] https://patchwork.ozlabs.org/project/uboot/cover/20210315143643.33102-1-ell… The first version of this patchset is extracted from "Add Intel Diamond Mesa SoC support" series. https://patchwork.ozlabs.org/project/uboot/cover/20201110064439.9683-1-elly… This patchset has dependency on: -------- 1. arm: socfpga: Move Stratix10 and Agilex SPL common code https://patchwork.ozlabs.org/project/uboot/patch/20210315075916.26336-1-ell… 2. Restructure Stratix10 and Agilex handoff code https://patchwork.ozlabs.org/project/uboot/cover/20210315094329.30282-1-ell… Siew Chin Lim (2): arm: socfpga: Move Stratix10 and Agilex clock manager common code arm: socfpga: Changed to store QSPI reference clock in kHz arch/arm/mach-socfpga/clock_manager.c | 43 ++++++++++++++++++++-- arch/arm/mach-socfpga/clock_manager_agilex.c | 6 --- arch/arm/mach-socfpga/clock_manager_s10.c | 6 --- arch/arm/mach-socfpga/include/mach/clock_manager.h | 5 +++ .../mach-socfpga/include/mach/clock_manager_s10.h | 1 - .../include/mach/system_manager_soc64.h | 16 +++++++- arch/arm/mach-socfpga/mailbox_s10.c | 17 +++++---- 7 files changed, 69 insertions(+), 25 deletions(-) -- 2.13.0

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[PATCH] common: board_f: Restore 85xx watchdog support
by Chris Packham 24 Mar '21

24 Mar '21

In commit 75918afa649b ("powerpc: Drop old non-generic-board code") we lost the call to init_85xx_watchdog() which had the effect of disabling support for the watchdog on 85xx and similar SoCs (i.e. the QorIQ P Series and T Series). Signed-off-by: Chris Packham <judge.packham(a)gmail.com> --- Admittedly this is a bit ugly but it's the most literal reinstatement of the code that was lost. At the very least I should probably rename init_85xx_watchdog() to hw_watchdog_init() so it fits with the rest of the code. The other question is how has this gone unnoticed for ~5 years. I think the answer is because only the keymile boards were using it. Finally I am wondering if this should be converted to a DM driver. But given the fact that the watchdog is part of the core and not a peripheral on the SoC I don't know how that would look (e.g. what would I put in the DTS?). So I thought I'd run this up the flag pole as-is and see what feedback I get. common/board_f.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/common/board_f.c b/common/board_f.c index 0cddf0359dca..3778571a7196 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -111,6 +111,11 @@ static int init_func_watchdog_init(void) hw_watchdog_init(); puts(" Watchdog enabled\n"); # endif +# ifdef CONFIG_MPC85xx + init_85xx_watchdog(); + puts(" Watchdog enabled\n"); +# endif + WATCHDOG_RESET(); return 0; -- 2.30.1

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[PATCH 0/6] Makefile: Tidy up of-platdata file generation rules
by Simon Glass 24 Mar '21

24 Mar '21

The recent of-platdata implementation has caused an occasional error in CI, possibly due to the transition between !OF_PLATDATA_INST and OF_PLATDATA_INST. The problems seems to be due to a generated file (C or object file) not being regenerated when the setting changes. This series take two steps aimed at correct this problem. Firstly it makes the set of files generated (in each case) mutually exclusive, except for the header files which remain common. This means that the build will fail if new files are not generated when the setting changes. Secondly it removes the old generated files before building new ones, since that could trip things up if the flag changes back again in a subsequent build. In addition, dtoc is currently running on every of-platadata build, even if nothing has changed. Also pylibfdt is always built due to a change in file naming with Python 3. Both of these problems are fixed. Simon Glass (6): dtc: Tidy up pylibfdt build rule Makefile: Avoid running dtoc every time Makefile: Depend only on required of-platdata files dtoc: Only generate the required files Makefile: Use a variable for generated of-platdata headers Makefile: Remove old of-platdata files before regenerating scripts/Makefile.spl | 36 +++++++++++++++++++++++------------ scripts/dtc/pylibfdt/Makefile | 8 ++++++-- tools/dtoc/dtb_platdata.py | 23 ++++++++++++++++++---- tools/dtoc/test_dtoc.py | 2 +- 4 files changed, 50 insertions(+), 19 deletions(-) -- 2.31.0.291.g576ba9dcdaf-goog

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Patches pending for review
by Aleksandar Gerasimovski 24 Mar '21

24 Mar '21

Hi Folks, Hope you are all well! I guess you have verry busy times, but I have to ask about the state of my last two patches on patchwork: https://patchwork.ozlabs.org/project/uboot/patch/VI1PR06MB402989C0EFEE6A512… https://patchwork.ozlabs.org/project/uboot/patch/VI1PR06MB40297747EE7A342B4… They are in same state since almost a month, and for me it looks like they are forgotten. Is it possible to get attention from some of you? Thanks in advance! Regards, Aleksandar

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[v1 0/5] Restructure Stratix10 and Agilex handoff code
by Siew Chin Lim 24 Mar '21

24 Mar '21

This patchset is extracted from "Add Intel Diamond Mesa SoC support" series. We are in preparation to support new Intel N5X (Diamond Mesa) SOC64 device and we would like to clean up some code before enable N5X device. This patchset restructure Stratix10 and Agilex handoff code to be generic and to be used by all SOC64 devices. Remove wrap_pinmux_config_s10.c. Add wrap_handoff_soc64.c which contains the generic function to parse the handoff data. Rename all handoff macro prefix from S10_* to SOC64* and change all corresponding file name from *_s10 to *_soc64. Last, change the code to use generic fundtion from wrap_handoff_soc64.c. History: -------- The first version of this patchset is extracted from "Add Intel Diamond Mesa SoC support" series. https://patchwork.ozlabs.org/project/uboot/cover/20201110064439.9683-1-elly… This patchset has dependency on: -------- 1. arm: socfpga: Move Stratix10 and Agilex SPL common code https://patchwork.ozlabs.org/project/uboot/patch/20210315075916.26336-1-ell… Siew Chin Lim (5): arm: socfpga: Rename Stratix10 and Agilex handoff common macros arm: socfpga: Changed wrap_pll_config_s10.c to wrap_pll_config_soc64.c arm: socfpga: Changed system_manager_s10.c to system_manager_soc64.c arm: socfpga: Rearrange sequence of macros in handoff_soc64.h arm: socfpga: Restructure Stratix10 and Agilex handoff code arch/arm/mach-socfpga/Makefile | 12 ++-- arch/arm/mach-socfpga/clock_manager_s10.c | 2 +- arch/arm/mach-socfpga/include/mach/handoff_s10.h | 39 ------------ arch/arm/mach-socfpga/include/mach/handoff_soc64.h | 62 ++++++++++++++++++ .../include/mach/system_manager_soc64.h | 4 -- ...system_manager_s10.c => system_manager_soc64.c} | 53 ++++++++++------ arch/arm/mach-socfpga/wrap_handoff_soc64.c | 73 ++++++++++++++++++++++ arch/arm/mach-socfpga/wrap_pinmux_config_s10.c | 56 ----------------- ...ap_pll_config_s10.c => wrap_pll_config_soc64.c} | 16 ++--- include/configs/socfpga_soc64_common.h | 4 +- 10 files changed, 187 insertions(+), 134 deletions(-) delete mode 100644 arch/arm/mach-socfpga/include/mach/handoff_s10.h create mode 100644 arch/arm/mach-socfpga/include/mach/handoff_soc64.h rename arch/arm/mach-socfpga/{system_manager_s10.c => system_manager_soc64.c} (57%) create mode 100644 arch/arm/mach-socfpga/wrap_handoff_soc64.c delete mode 100644 arch/arm/mach-socfpga/wrap_pinmux_config_s10.c rename arch/arm/mach-socfpga/{wrap_pll_config_s10.c => wrap_pll_config_soc64.c} (74%) -- 2.13.0

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test/overlay builds every time
by Simon Glass 24 Mar '21

24 Mar '21

Hi Maxime & Pantelis, I notice that this directory always builds its files even if seemingly nothing has changed: LD test/built-in.o DTC test/overlay/test-fdt-base.dtb DTB test/overlay/test-fdt-base.dtb.S AS test/overlay/test-fdt-base.dtb.o DTC test/overlay/test-fdt-overlay.dtb DTB test/overlay/test-fdt-overlay.dtb.S AS test/overlay/test-fdt-overlay.dtb.o DTC test/overlay/test-fdt-overlay-stacked.dtb DTB test/overlay/test-fdt-overlay-stacked.dtb.S AS test/overlay/test-fdt-overlay-stacked.dtb.o LD test/overlay/built-in.o LD u-boot Do either of you know what might be causing this? Can we fix it? Thanks, Simon

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