March 2021 - U-Boot

[PATCH] dm: i2c: Add a migration method for I2C
by Simon Glass 25 Mar '21

25 Mar '21

This probably should have been done a while back since it is a core system. Add a migration deadline of later this year, to catch the stragglers. Signed-off-by: Simon Glass <sjg(a)chromium.org> --- Makefile | 11 +++++++++++ doc/driver-model/migration.rst | 8 ++++++++ 2 files changed, 19 insertions(+) diff --git a/Makefile b/Makefile index b72d8d20c08..f60c7901a5b 100644 --- a/Makefile +++ b/Makefile @@ -1152,6 +1152,17 @@ ifneq ($(CONFIG_SPL_FIT_GENERATOR),) @echo >&2 "to binman instead, to avoid the proliferation of" @echo >&2 "arch-specific scripts with no tests." @echo >&2 "====================================================" +endif +ifneq ($(CONFIG_NET),) +ifneq ($(CONFIG_DM_ETH),y) + @echo >&2 "===================== WARNING ======================" + @echo >&2 "This board does not use CONFIG_DM_I2C (Driver Model" + @echo >&2 "for I2C drivers). Please update the board to use" + @echo >&2 "CONFIG_DM_I2C before the v2021.10 release. Failure to" + @echo >&2 "update by the deadline may result in board removal." + @echo >&2 "See doc/driver-model/migration.rst for more info." + @echo >&2 "====================================================" +endif endif @# Check that this build does not use CONFIG options that we do not @# know about unless they are in Kconfig. All the existing CONFIG diff --git a/doc/driver-model/migration.rst b/doc/driver-model/migration.rst index 2284e8a6f70..77a799a2700 100644 --- a/doc/driver-model/migration.rst +++ b/doc/driver-model/migration.rst @@ -99,3 +99,11 @@ Deadline: 2020.07 The network subsystem has supported the driver model since early 2015. Maintainers should submit patches switching over to using CONFIG_DM_ETH and other base driver model options in time for inclusion in the 2020.07 release. + +CONFIG_DM_I2C +------------- +Deadline: 2021.10 + +The network subsystem has supported the driver model since early 2015. +Maintainers should submit patches switching over to using CONFIG_DM_I2C and +other base driver model options in time for inclusion in the 2021.10 release. -- 2.31.0.291.g576ba9dcdaf-goog

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[PATCH v2] dm: i2c: Add a migration method for I2C
by Simon Glass 25 Mar '21

25 Mar '21

This probably should have been done a while back since it is a core system. Add a migration deadline of later this year, to catch the stragglers. Signed-off-by: Simon Glass <sjg(a)chromium.org> --- Changes in v2: - s/'network'/I2C/ Makefile | 11 +++++++++++ doc/driver-model/migration.rst | 8 ++++++++ 2 files changed, 19 insertions(+) diff --git a/Makefile b/Makefile index b72d8d20c08..f60c7901a5b 100644 --- a/Makefile +++ b/Makefile @@ -1152,6 +1152,17 @@ ifneq ($(CONFIG_SPL_FIT_GENERATOR),) @echo >&2 "to binman instead, to avoid the proliferation of" @echo >&2 "arch-specific scripts with no tests." @echo >&2 "====================================================" +endif +ifneq ($(CONFIG_NET),) +ifneq ($(CONFIG_DM_ETH),y) + @echo >&2 "===================== WARNING ======================" + @echo >&2 "This board does not use CONFIG_DM_I2C (Driver Model" + @echo >&2 "for I2C drivers). Please update the board to use" + @echo >&2 "CONFIG_DM_I2C before the v2021.10 release. Failure to" + @echo >&2 "update by the deadline may result in board removal." + @echo >&2 "See doc/driver-model/migration.rst for more info." + @echo >&2 "====================================================" +endif endif @# Check that this build does not use CONFIG options that we do not @# know about unless they are in Kconfig. All the existing CONFIG diff --git a/doc/driver-model/migration.rst b/doc/driver-model/migration.rst index 2284e8a6f70..77a799a2700 100644 --- a/doc/driver-model/migration.rst +++ b/doc/driver-model/migration.rst @@ -99,3 +99,11 @@ Deadline: 2020.07 The network subsystem has supported the driver model since early 2015. Maintainers should submit patches switching over to using CONFIG_DM_ETH and other base driver model options in time for inclusion in the 2020.07 release. + +CONFIG_DM_I2C +------------- +Deadline: 2021.10 + +The network subsystem has supported the driver model since early 2015. +Maintainers should submit patches switching over to using CONFIG_DM_I2C and +other base driver model options in time for inclusion in the 2021.10 release. -- 2.31.0.291.g576ba9dcdaf-goog

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Re: [TF-A] Proposal: TF-A to adopt hand-off blocks (HOBs) for information passing between boot stages
by Simon Glass 24 Mar '21

24 Mar '21

Hi Harb, On Wed, 24 Mar 2021 at 11:39, Harb Abdulhamid OS < abdulhamid(a)os.amperecomputing.com> wrote: > Hello Folks, > > Appreciate the feedback and replies on this. Glad to see that there is > interest in this topic. 😊 > > > > I try to address the comments/feedback from Francois and Simon below…. > > > > @François Ozog <francois.ozog(a)linaro.org> – happy to discuss this on a > zoom call. I will make that time slot work, and will be available to > attend April 8, 4pm CT. > > > > Note that I’m using the term “HOB” here more generically, as there are > typically vendor specific structures beyond the resource descriptor HOB, > which provides only a small subset of the information that needs to be > passed between the boot phases. > > > > The whole point here is to provide mechanism to develop firmware that we > can build ARM Server SoC’s that support **any** BL33 payload (e.g. EDK2, > AptioV, CoreBoot, and maybe even directly boot strapping LinuxBoot at some > point). In other-words, we are trying to come up with a TF-A that would > be completely agnostic to the implementation of BL33 (i.e. BL33 is built > completely independently by a separate entity – e.g. an ODM/OEM). > > > > Keep in mind, in the server/datacenter market segment we are not building > vertically integrated systems with a single entity compiling > firmware/software stacks like most folks in TF-A have become use to. There > are two categories of higher level firmware code blobs in the > server/datacenter model: > > 1. “SoC” or “silicon” firmware – in TF-A this may map to BL1, BL2, > BL31, and **possibly** one or more BL32 instances > 2. “Platform” or “board” firmware – in TF-A this may map to BL33 and * > *possibly** one or more BL32 instances. > > > > Even the platform firmware stack could be further fragmented by having > multiple entities involved in delivering the entire firmware stack: IBVs, > ODMs, OEMs, CSPs, and possibly even device vendor code. > > > > To support a broad range of platform designs with a broad range of memory > devices, we need a crisp and clear contract between the SoC firmware that > initializes memory (e.g. BL2) and how that platform boot firmware (e.g. > BL33) gathers information about what memory that was initialized, at what > speeds, NUMA topology, and many other relevant information that needs to be > known and comprehended by the platform firmware and eventually by the > platform software. > > > > I understand the versatility of DT, but I see two major problems with DT: > > - DT requires more complicated parsing to get properties, and even > more complex to dynamically set properties – this HOB structures may need > to be generated in boot phases where DDR is not available, and therefore we > will be extremely memory constrained. > - DT is probably overkill for this purpose – We really just want a > list of pointers to simple C structures that code cast (e.g. JEDEC SPD data > blob) > > > > I think that we should not mix the efforts around DT/ACPI specs with what > we are doing here, because those specs and concepts were developed for a > completely different purpose (i.e. abstractions needed for OS / RTOS > software, and not necessarily suitable for firmware-to-firmware hand-offs). > > > > Frankly, I would personally push back pretty hard on defining SMC’s for > something that should be one way information passing. Every SMC we add is > another attack vector to the secure world and an increased burden on the > folks that have to do security auditing and threat analysis. I see no > benefit in exposing these boot/HOB/BOB structures at run-time via SMC > calls. > > > > Please do let me know if you disagree and why. Look forward to discussing > on this thread or on the call. > > > > @Simon Glass <sjg(a)chromium.org> - Thanks for the pointer to bloblist. > I briefly reviewed and it seems like a good baseline for what we may be > looking for. > > > > That being said, I would say that there is some benefit in having some > kind of unique identifiers (e.g. UUID or some unique signature) so that we > can tie standardized data structures (based on some future TBD specs) to a > particular ID. For example, if the TPM driver in BL33 is looking for the > TPM structure in the HOB/BOB list, and may not care about the other data > blobs. The driver needs a way to identify and locate the blob it cares > about. > The tag is intended to serve that purpose, although perhaps it should switch from an auto-allocating enum to one with explicit values for each entry and a range for 'local' use. > > > I guess we can achieve this with the tag, but the problem with tag when > you have eco-system with a lot of parties doing parallel development, you > can end up with tag collisions and folks fighting about who has rights to > what tag values. We would need some official process for folks to register > tags for whatever new structures we define, or maybe some tag range for > vendor specific structures. This comes with a lot of pain and > bureaucracy. On the other hand, UUID has been a proven way to make it easy > to just define your own blobs with **either** standard or vendor specific > structures without worry of ID collisions between vendors. > True. I think the pain is overstated, though. In this case I think we actually want something that can be shared between projects and orgs, so some amount of coordination could be considered a benefit. It could just be a github pull request. I find the UUID unfriendly and not just to code size and eyesight! Trying to discover what GUIDs mean or are valid is quite tricky. E.g. see this code: #define FSP_HOB_RESOURCE_OWNER_TSEG_GUID \ EFI_GUID(0xd038747c, 0xd00c, 0x4980, \ 0xb3, 0x19, 0x49, 0x01, 0x99, 0xa4, 0x7d, 0x55) (etc.) static struct guid_name { efi_guid_t guid; const char *name; } guid_name[] = { { FSP_HOB_RESOURCE_OWNER_TSEG_GUID, "TSEG" }, { FSP_HOB_RESOURCE_OWNER_FSP_GUID, "FSP" }, { FSP_HOB_RESOURCE_OWNER_SMM_PEI_SMRAM_GUID, "SMM PEI SMRAM" }, { FSP_NON_VOLATILE_STORAGE_HOB_GUID, "NVS" }, { FSP_VARIABLE_NV_DATA_HOB_GUID, "Variable NVS" }, { FSP_GRAPHICS_INFO_HOB_GUID, "Graphics info" }, { FSP_HOB_RESOURCE_OWNER_PCD_DATABASE_GUID1, "PCD database ea" }, { FSP_HOB_RESOURCE_OWNER_PCD_DATABASE_GUID2, "PCD database 9b" }, (never figured out what those two are) { FSP_HOB_RESOURCE_OWNER_PEIM_DXE_GUID, "PEIM Init DXE" }, { FSP_HOB_RESOURCE_OWNER_ALLOC_STACK_GUID, "Alloc stack" }, { FSP_HOB_RESOURCE_OWNER_SMBIOS_MEMORY_GUID, "SMBIOS memory" }, { {}, "zero-guid" }, {} }; static const char *guid_to_name(const efi_guid_t *guid) { struct guid_name *entry; for (entry = guid_name; entry->name; entry++) { if (!guidcmp(guid, &entry->guid)) return entry->name; } return NULL; } Believe it or not it took a fair bit of effort to find just that small list, with nearly every one in a separate doc, from memory. > > We can probably debate whether there is any value in GUID/UUID or not > during the call… but again, boblist seems like a reasonable starting point > as an alternative to HOB. > Indeed. There is certainly value in both approaches. Regards, Simon > > > Thanks, > > --Harb > > > > *From:* François Ozog <francois.ozog(a)linaro.org> > *Sent:* Tuesday, March 23, 2021 10:00 AM > *To:* François Ozog <francois.ozog(a)linaro.org>; Ron Minnich < > rminnich(a)google.com>; Paul Isaac's <paul.isaacs(a)linaro.org> > *Cc:* Simon Glass <sjg(a)chromium.org>; Harb Abdulhamid OS < > abdulhamid(a)os.amperecomputing.com>; Boot Architecture Mailman List < > boot-architecture(a)lists.linaro.org>; tf-a(a)lists.trustedfirmware.org > *Subject:* Re: [TF-A] Proposal: TF-A to adopt hand-off blocks (HOBs) for > information passing between boot stages > > > > +Ron Minnich <rminnich(a)google.com> +Paul Isaac's <paul.isaacs(a)linaro.org> > > > > Adding Ron and Paul because I think this interface should be also > benefiting LinuxBoot efforts. > > > > On Tue, 23 Mar 2021 at 11:17, François Ozog via TF-A < > tf-a(a)lists.trustedfirmware.org> wrote: > > Hi, > > > > I propose we cover the topic at the next Trusted Substrate > <https://collaborate.linaro.org/display/TS/Trusted+Substrate+Home> zoom > call <https://linaro-org.zoom.us/j/94563644892> on April 8th 4pm CET. > > > > The agenda: > > ABI between non-secure firmware and the rest of firmware (EL3, S-EL1, > S-EL2, SCP) to adapt hardware description to some runtime conditions. > > runtime conditions here relates to DRAM size and topology detection, > secure DRAM memory carvings, PSCI and SCMI interface publishing. > > > > For additional background on existing metadata: UEFI Platform > Initialization Specification Version 1.7 > <https://uefi.org/sites/default/files/resources/PI_Spec_1_7_final_Jan_2019.p…> > , 5.5 Resource Descriptor HOB > > Out of the ResourceType we care about is EFI_RESOURCE_SYSTEM_MEMORY. > > This HOB lacks memory NUMA attachment or something that could be related > to fill SRAT table for ACPI or relevant DT proximity domains. > > HOB is not consistent accros platforms: some platforms (Arm) lists memory > from the booting NUMA node, other platforms (x86) lists all memory from all > NUMA nodes. (At least this is the case on the two platforms I tested). > > > > There are two proposals to use memory structures from SPL/BLx up to the > handover function (as defined in the Device Tree technical report > <https://docs.google.com/document/d/1CLkhLRaz_zcCq44DLGmPZQFPbYHOC6nzPowaL0X…>) > which can be U-boot (BL33 or just U-Boot in case of SPL/U-Boot scheme) or > EDK2. > > I would propose we also discuss possibility of FF-A interface to actually > query information or request actions to be done (this is a model actually > used in some SoCs with proprietary SMC calls). > > > > Requirements (to be validated): > > - ACPI and DT hardware descriptions. > > - agnostic to boot framework (SPL/U-Boot, TF-A/U-Boot, TF-A/EDK2) > > - agnostic to boot framework (SPL/U-Boot, TF-A/U-Boot, TF-A/EDK2, > TF-A/LinuxBoot) > > - at least allows complete DRAM description and "persistent" usage > (reserved areas for secure world or other usages) > > - support secure world device assignment > > > > Cheers > > > > FF > > > > > > On Mon, 22 Mar 2021 at 19:56, Simon Glass <sjg(a)chromium.org> wrote: > > Hi, > > Can I suggest using bloblist for this instead? It is lightweight, > easier to parse, doesn't have GUIDs and is already used within U-Boot > for passing info between SPL/U-Boot, etc. > > Docs here: > https://github.com/u-boot/u-boot/blob/master/doc/README.bloblist > Header file describes the format: > https://github.com/u-boot/u-boot/blob/master/include/bloblist.h > > Full set of unit tests: > https://github.com/u-boot/u-boot/blob/master/test/bloblist.c > > Regards, > Simon > > On Mon, 22 Mar 2021 at 23:58, François Ozog <francois.ozog(a)linaro.org> > wrote: > > > > +Boot Architecture Mailman List <boot-architecture(a)lists.linaro.org> > > > > standardization is very much welcomed here and need to accommodate a very > > diverse set of situations. > > For example, TEE OS may need to pass memory reservations to BL33 or > > "capture" a device for the secure world. > > > > I have observed a number of architectures: > > 1) pass information from BLx to BLy in the form of a specific object > > 2) BLx called by BLy by a platform specific SMC to get information > > 3) BLx called by BLy by a platform specific SMC to perform Device Tree > > fixups > > > > I also imagined a standardized "broadcast" FF-A call so that any firmware > > element can either provide information or "do something". > > > > My understanding of your proposal is about standardizing on architecture > 1) > > with the HOB format. > > > > The advantage of the HOB is simplicity but it may be difficult to > implement > > schemes such as pruning a DT because device assignment in the secure > world. > > > > In any case, it looks feasible to have TF-A and OP-TEE complement the > list > > of HOBs to pass information downstream (the bootflow). > > > > It would be good to start with building the comprehensive list of > > information that need to be conveyed between firmware elements: > > > > information. | authoritative entity | reporting entity | information > > exchanged: > > dram | TFA | TFA | > > <format to be detailed, NUMA topology to build the SRAT table or DT > > equivalent?> > > PSCI | SCP | TFA? | > > SCMI | SCP or TEE-OS | TFA? TEE-OS?| > > secure SRAM | TFA. | TFA. | > > secure DRAM | TFA? TEE-OS? | TFA? TEE-OS? | > > other? | | > > | > > > > Cheers > > > > FF > > > > > > On Mon, 22 Mar 2021 at 09:34, Harb Abdulhamid OS via TF-A < > > tf-a(a)lists.trustedfirmware.org> wrote: > > > > > Hello Folks, > > > > > > > > > > > > I'm emailing to start an open discussion about the adoption of a > concept > > > known as "hand-off blocks" or HOB to become a part of the TF-A Firmware > > > Framework Architecture (FFA). This is something that is a pretty major > > > pain point when it comes to the adoption of TF-A in ARM Server SoC’s > > > designed to enable a broad range of highly configurable datacenter > > > platforms. > > > > > > > > > > > > > > > > > > What is a HOB (Background)? > > > > > > --------------------------- > > > > > > UEFI PI spec describes a particular definition for how HOB may be used > for > > > transitioning between the PEI and DXE boot phases, which is a good > > > reference point for this discussion, but not necessarily the exact > solution > > > appropriate for TF-A. > > > > > > > > > > > > A HOB is simply a dynamically generated data structure passed in > between > > > two boot phases. This is information that was obtained through > discovery > > > and needs to be passed forward to the next boot phase *once*, with no > API > > > needed to call back (e.g. no call back into previous firmware phase is > > > needed to fetch this information at run-time - it is simply passed one > time > > > during boot). > > > > > > > > > > > > There may be one or more HOBs passed in between boot phases. If there > are > > > more than one HOB that needs to be passed, this can be in a form of a > "HOB > > > table", which (for example) could be a UUID indexed array of pointers > to > > > HOB structures, used to locate a HOB of interest (based on UUID). In > such > > > cases, instead of passing a single HOB, the boot phases may rely on > passing > > > the pointer to the HOB table. > > > > > > > > > > > > This has been extremely useful concept to employ on highly configurable > > > systems that must rely on flexible discovery mechanisms to initialize > and > > > boot the system. This is especially helpful when you have multiple > > > > > > > > > > > > > > > > > > Why do we need HOBs in TF-A?: > > > > > > ----------------------------- > > > > > > It is desirable that EL3 firmware (e.g. TF-A) built for ARM Server SoC > in > > > a way that is SoC specific *but* platform agnostic. This means that a > > > single ARM SoC that a SiP may deliver to customers may provide a single > > > TF-A binary (e.g. BL1, BL2, BL31) that could be used to support a broad > > > range of platform designs and configurations in order to boot a > platform > > > specific firmware (e.g. BL33 and possibly even BL32 code). In order to > > > achieve this, the platform configuration must be *discovered* instead > of > > > statically compiled as it is today in TF-A via device tree based > > > enumeration. The mechanisms of discovery may differ broadly depending > on > > > the relevant industry standard, or in some cases may have rely on SiP > > > specific discovery flows. > > > > > > > > > > > > For example: On server systems that support a broad range DIMM memory > > > population/topologies, all the necessary information required to boot > is > > > fully discovered via standard JEDEC Serial Presence Detect (SPD) over > an > > > I2C bus. Leveraging the SPD bus, may platform variants could be > supported > > > with a single TF-A binary. Not only is this information required to > > > initialize memory in early boot phases (e.g. BL2), the subsequent boot > > > phases will also need this SPD info to construct a system physical > address > > > map and properly initialize the MMU based on the memory present, and > where > > > the memory may be present. Subsequent boot phases (e.g. BL33 / UEFI) > may > > > need to generate standard firmware tables to the operating systems, > such as > > > SMBIOS tables describing DIMM topology and various ACPI tables (e.g. > SLIT, > > > SRAT, even NFIT if NVDIMM's are present). > > > > > > > > > > > > In short, it all starts with a standardized or vendor specific > discovery > > > flow in an early boot stage (e.g. BL1/BL2), followed by the passing of > > > information to the next boot stages (e.g. BL31/BL32/BL33). > > > > > > > > > > > > Today, every HOB may be a vendor specific structure, but in the future > > > there may be benefit of defining standard HOBs. This may be useful for > > > memory discovery, passing the system physical address map, enabling TPM > > > measured boot, and potentially many other common HOB use-cases. > > > > > > > > > > > > It would be extremely beneficial to the datacenter market segment if > the > > > TF-A community would adopt this concept of information passing between > all > > > boot phases as opposed to rely solely on device tree enumeration. > This is > > > not intended to replace device tree, rather intended as an alternative > way > > > to describe the info that must be discovered and dynamically generated. > > > > > > > > > > > > > > > > > > Conclusion: > > > > > > ----------- > > > > > > We are proposing that the TF-A community begin pursuing the adoption of > > > HOBs as a mechanism used for information exchange between each boot > stage > > > (e.g. BL1->BL2, BL2->BL31, BL31->BL32, and BL31->BL33)? Longer term we > > > want to explore standardizing some HOB structures for the BL33 phase > (e.g. > > > UEFI HOB structures), but initially would like to agree on this being a > > > useful mechanism used to pass information between each boot stage. > > > > > > > > > > > > Thanks, > > > > > > --Harb > > > > > > > > > > > > > > > > > > > > > -- > > > TF-A mailing list > > > TF-A(a)lists.trustedfirmware.org > > > https://lists.trustedfirmware.org/mailman/listinfo/tf-a > > > > > > > > > -- > > François-Frédéric Ozog | *Director Linaro Edge & Fog Computing Group* > > T: +33.67221.6485 > > francois.ozog(a)linaro.org | Skype: ffozog > > _______________________________________________ > > boot-architecture mailing list > > boot-architecture(a)lists.linaro.org > > https://lists.linaro.org/mailman/listinfo/boot-architecture > > > > > -- > > *François-Frédéric Ozog* | *Director Linaro Edge & Fog Computing Group* > > T: +33.67221.6485 > francois.ozog(a)linaro.org | Skype: ffozog > > > > -- > TF-A mailing list > TF-A(a)lists.trustedfirmware.org > https://lists.trustedfirmware.org/mailman/listinfo/tf-a > > > > > -- > > *François-Frédéric Ozog* | *Director Linaro Edge & Fog Computing Group* > > T: +33.67221.6485 > francois.ozog(a)linaro.org | Skype: ffozog > > >

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[PATCH 01/25] arm: Remove xfi3 board
by Tom Rini 24 Mar '21

24 Mar '21

This board has not been converted to CONFIG_DM_MMC by the deadline of v2019.04, which is almost two years ago. In addition there are other DM migrations it is also missing. Remove it. Cc: Marek Vasut <marek.vasut(a)gmail.com> Signed-off-by: Tom Rini <trini(a)konsulko.com> --- arch/arm/mach-imx/mxs/Kconfig | 1 - board/creative/xfi3/Kconfig | 15 --- board/creative/xfi3/MAINTAINERS | 6 - board/creative/xfi3/Makefile | 10 -- board/creative/xfi3/spl_boot.c | 133 ------------------- board/creative/xfi3/xfi3.c | 226 -------------------------------- configs/xfi3_defconfig | 43 ------ include/configs/xfi3.h | 39 ------ 8 files changed, 473 deletions(-) delete mode 100644 board/creative/xfi3/Kconfig delete mode 100644 board/creative/xfi3/MAINTAINERS delete mode 100644 board/creative/xfi3/Makefile delete mode 100644 board/creative/xfi3/spl_boot.c delete mode 100644 board/creative/xfi3/xfi3.c delete mode 100644 configs/xfi3_defconfig delete mode 100644 include/configs/xfi3.h diff --git a/arch/arm/mach-imx/mxs/Kconfig b/arch/arm/mach-imx/mxs/Kconfig index b90d7b6e4176..fb19e36559ff 100644 --- a/arch/arm/mach-imx/mxs/Kconfig +++ b/arch/arm/mach-imx/mxs/Kconfig @@ -30,7 +30,6 @@ config SYS_SOC source "board/olimex/mx23_olinuxino/Kconfig" source "board/freescale/mx23evk/Kconfig" source "board/sandisk/sansa_fuze_plus/Kconfig" -source "board/creative/xfi3/Kconfig" endif diff --git a/board/creative/xfi3/Kconfig b/board/creative/xfi3/Kconfig deleted file mode 100644 index 7b681cd81b04..000000000000 --- a/board/creative/xfi3/Kconfig +++ /dev/null @@ -1,15 +0,0 @@ -if TARGET_XFI3 - -config SYS_BOARD - default "xfi3" - -config SYS_VENDOR - default "creative" - -config SYS_SOC - default "mxs" - -config SYS_CONFIG_NAME - default "xfi3" - -endif diff --git a/board/creative/xfi3/MAINTAINERS b/board/creative/xfi3/MAINTAINERS deleted file mode 100644 index fb8235a3295f..000000000000 --- a/board/creative/xfi3/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -XFI3 BOARD -M: Marek Vasut <marek.vasut(a)gmail.com> -S: Maintained -F: board/creative/xfi3/ -F: include/configs/xfi3.h -F: configs/xfi3_defconfig diff --git a/board/creative/xfi3/Makefile b/board/creative/xfi3/Makefile deleted file mode 100644 index 67d68dd6218d..000000000000 --- a/board/creative/xfi3/Makefile +++ /dev/null @@ -1,10 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. - -ifndef CONFIG_SPL_BUILD -obj-y := xfi3.o -else -obj-y := spl_boot.o -endif diff --git a/board/creative/xfi3/spl_boot.c b/board/creative/xfi3/spl_boot.c deleted file mode 100644 index 67c1e9801b9b..000000000000 --- a/board/creative/xfi3/spl_boot.c +++ /dev/null @@ -1,133 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Creative ZEN X-Fi3 setup - * - * Copyright (C) 2013 Marek Vasut <marex(a)denx.de> - */ - -#include <common.h> -#include <config.h> -#include <asm/io.h> -#include <asm/arch/iomux-mx23.h> -#include <asm/arch/imx-regs.h> -#include <asm/arch/sys_proto.h> - -#define MUX_CONFIG_EMI (MXS_PAD_1V8 | MXS_PAD_12MA | MXS_PAD_PULLUP) -#define MUX_CONFIG_SSP (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP) -#define MUX_CONFIG_LCD (MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_NOPULL) - -const iomux_cfg_t iomux_setup[] = { - /* EMI */ - MX23_PAD_EMI_D00__EMI_D00 | MUX_CONFIG_EMI, - MX23_PAD_EMI_D01__EMI_D01 | MUX_CONFIG_EMI, - MX23_PAD_EMI_D02__EMI_D02 | MUX_CONFIG_EMI, - MX23_PAD_EMI_D03__EMI_D03 | MUX_CONFIG_EMI, - MX23_PAD_EMI_D04__EMI_D04 | MUX_CONFIG_EMI, - MX23_PAD_EMI_D05__EMI_D05 | MUX_CONFIG_EMI, - MX23_PAD_EMI_D06__EMI_D06 | MUX_CONFIG_EMI, - MX23_PAD_EMI_D07__EMI_D07 | MUX_CONFIG_EMI, - MX23_PAD_EMI_D08__EMI_D08 | MUX_CONFIG_EMI, - MX23_PAD_EMI_D09__EMI_D09 | MUX_CONFIG_EMI, - MX23_PAD_EMI_D10__EMI_D10 | MUX_CONFIG_EMI, - MX23_PAD_EMI_D11__EMI_D11 | MUX_CONFIG_EMI, - MX23_PAD_EMI_D12__EMI_D12 | MUX_CONFIG_EMI, - MX23_PAD_EMI_D13__EMI_D13 | MUX_CONFIG_EMI, - MX23_PAD_EMI_D14__EMI_D14 | MUX_CONFIG_EMI, - MX23_PAD_EMI_D15__EMI_D15 | MUX_CONFIG_EMI, - MX23_PAD_EMI_DQM0__EMI_DQM0 | MUX_CONFIG_EMI, - MX23_PAD_EMI_DQM1__EMI_DQM1 | MUX_CONFIG_EMI, - MX23_PAD_EMI_DQS0__EMI_DQS0 | MUX_CONFIG_EMI, - MX23_PAD_EMI_DQS1__EMI_DQS1 | MUX_CONFIG_EMI, - MX23_PAD_EMI_CLK__EMI_CLK | MUX_CONFIG_EMI, - MX23_PAD_EMI_CLKN__EMI_CLKN | MUX_CONFIG_EMI, - - MX23_PAD_EMI_A00__EMI_A00 | MUX_CONFIG_EMI, - MX23_PAD_EMI_A01__EMI_A01 | MUX_CONFIG_EMI, - MX23_PAD_EMI_A02__EMI_A02 | MUX_CONFIG_EMI, - MX23_PAD_EMI_A03__EMI_A03 | MUX_CONFIG_EMI, - MX23_PAD_EMI_A04__EMI_A04 | MUX_CONFIG_EMI, - MX23_PAD_EMI_A05__EMI_A05 | MUX_CONFIG_EMI, - MX23_PAD_EMI_A06__EMI_A06 | MUX_CONFIG_EMI, - MX23_PAD_EMI_A07__EMI_A07 | MUX_CONFIG_EMI, - MX23_PAD_EMI_A08__EMI_A08 | MUX_CONFIG_EMI, - MX23_PAD_EMI_A09__EMI_A09 | MUX_CONFIG_EMI, - MX23_PAD_EMI_A10__EMI_A10 | MUX_CONFIG_EMI, - MX23_PAD_EMI_A11__EMI_A11 | MUX_CONFIG_EMI, - MX23_PAD_EMI_A12__EMI_A12 | MUX_CONFIG_EMI, - MX23_PAD_EMI_BA0__EMI_BA0 | MUX_CONFIG_EMI, - MX23_PAD_EMI_BA1__EMI_BA1 | MUX_CONFIG_EMI, - - MX23_PAD_EMI_CASN__EMI_CASN | MUX_CONFIG_EMI, - MX23_PAD_EMI_CE0N__EMI_CE0N | MUX_CONFIG_EMI, - MX23_PAD_EMI_CE1N__EMI_CE1N | MUX_CONFIG_EMI, - MX23_PAD_EMI_CKE__EMI_CKE | MUX_CONFIG_EMI, - MX23_PAD_EMI_RASN__EMI_RASN | MUX_CONFIG_EMI, - MX23_PAD_EMI_WEN__EMI_WEN | MUX_CONFIG_EMI, - - MX23_PAD_LCD_D00__LCD_D00 | MUX_CONFIG_LCD, - MX23_PAD_LCD_D01__LCD_D01 | MUX_CONFIG_LCD, - MX23_PAD_LCD_D02__LCD_D02 | MUX_CONFIG_LCD, - MX23_PAD_LCD_D03__LCD_D03 | MUX_CONFIG_LCD, - MX23_PAD_LCD_D04__LCD_D04 | MUX_CONFIG_LCD, - MX23_PAD_LCD_D05__LCD_D05 | MUX_CONFIG_LCD, - MX23_PAD_LCD_D06__LCD_D06 | MUX_CONFIG_LCD, - MX23_PAD_LCD_D07__LCD_D07 | MUX_CONFIG_LCD, - MX23_PAD_LCD_D08__LCD_D08 | MUX_CONFIG_LCD, - MX23_PAD_LCD_D09__LCD_D09 | MUX_CONFIG_LCD, - MX23_PAD_LCD_D10__LCD_D10 | MUX_CONFIG_LCD, - MX23_PAD_LCD_D11__LCD_D11 | MUX_CONFIG_LCD, - MX23_PAD_LCD_D12__LCD_D12 | MUX_CONFIG_LCD, - MX23_PAD_LCD_D13__LCD_D13 | MUX_CONFIG_LCD, - MX23_PAD_LCD_D14__LCD_D14 | MUX_CONFIG_LCD, - MX23_PAD_LCD_D15__LCD_D15 | MUX_CONFIG_LCD, - MX23_PAD_LCD_D16__LCD_D16 | MUX_CONFIG_LCD, - MX23_PAD_LCD_D17__LCD_D17 | MUX_CONFIG_LCD, - MX23_PAD_LCD_RESET__LCD_RESET | MUX_CONFIG_LCD, - MX23_PAD_LCD_RS__LCD_RS | MUX_CONFIG_LCD, - MX23_PAD_LCD_WR__LCD_WR | MUX_CONFIG_LCD, - MX23_PAD_LCD_CS__LCD_CS | MUX_CONFIG_LCD, - MX23_PAD_LCD_ENABLE__LCD_ENABLE | MUX_CONFIG_LCD, - MX23_PAD_LCD_VSYNC__LCD_VSYNC | MUX_CONFIG_LCD, - - MX23_PAD_SSP1_CMD__SSP1_CMD | MUX_CONFIG_SSP, - MX23_PAD_SSP1_DETECT__GPIO_2_1 | MUX_CONFIG_SSP, - MX23_PAD_SSP1_DATA0__SSP1_DATA0 | MUX_CONFIG_SSP, - MX23_PAD_SSP1_DATA1__SSP1_DATA1 | MUX_CONFIG_SSP, - MX23_PAD_SSP1_DATA2__SSP1_DATA2 | MUX_CONFIG_SSP, - MX23_PAD_SSP1_DATA3__SSP1_DATA3 | MUX_CONFIG_SSP, - MX23_PAD_SSP1_SCK__SSP1_SCK | MUX_CONFIG_SSP, - MX23_PAD_GPMI_D07__GPIO_0_7 | MUX_CONFIG_SSP, - - MX23_PAD_GPMI_D00__SSP2_DATA0 | MUX_CONFIG_SSP, - MX23_PAD_GPMI_D01__SSP2_DATA1 | MUX_CONFIG_SSP, - MX23_PAD_GPMI_D02__SSP2_DATA2 | MUX_CONFIG_SSP, - MX23_PAD_GPMI_D03__SSP2_DATA3 | MUX_CONFIG_SSP, - MX23_PAD_GPMI_RDY1__SSP2_CMD | MUX_CONFIG_SSP, - MX23_PAD_GPMI_WRN__SSP2_SCK | MUX_CONFIG_SSP, - - /* PWM -- FIXME */ - MX23_PAD_PWM2__GPIO_1_28 | MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_PULLUP, -}; - -void mxs_adjust_memory_params(uint32_t *dram_vals) -{ - /* mDDR configuration values */ - const uint32_t regs[] = { - 0x01010001, 0x00010000, 0x01000000, 0x00000001, - 0x00010101, 0x00000001, 0x00010000, 0x01000001, - 0x01010000, 0x00000001, 0x07000200, 0x04070203, - 0x02020002, 0x06070a02, 0x0d000201, 0x0305000d, - 0x02080800, 0x19330f0a, 0x1f1f1c00, 0x020a1313, - 0x03061323, 0x0000000a, 0x00080008, 0x00200020, - 0x00200020, 0x00200020, 0x000003f7, 0x00000000, - 0x00000000, 0x00000000, 0x00000020, 0x00000000, - 0x001023cd, 0x20410010, 0x00006665, 0x00000000, - 0x00000101, 0x00000001, 0x00000000, 0x00000000, - }; - memcpy(dram_vals, regs, sizeof(regs)); -} - -void board_init_ll(const uint32_t arg, const uint32_t *resptr) -{ - mxs_common_spl_init(arg, resptr, iomux_setup, ARRAY_SIZE(iomux_setup)); -} diff --git a/board/creative/xfi3/xfi3.c b/board/creative/xfi3/xfi3.c deleted file mode 100644 index b5f0d3130745..000000000000 --- a/board/creative/xfi3/xfi3.c +++ /dev/null @@ -1,226 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Creative ZEN X-Fi3 board - * - * Copyright (C) 2013 Marek Vasut <marex(a)denx.de> - * - * Hardware investigation done by: - * - * Amaury Pouly <amaury.pouly(a)gmail.com> - */ - -#include <common.h> -#include <errno.h> -#include <init.h> -#include <net.h> -#include <asm/gpio.h> -#include <asm/io.h> -#include <asm/arch/iomux-mx23.h> -#include <asm/arch/imx-regs.h> -#include <asm/arch/clock.h> -#include <asm/arch/sys_proto.h> -#include <linux/delay.h> - -DECLARE_GLOBAL_DATA_PTR; - -/* - * Functions - */ -int board_early_init_f(void) -{ - /* IO0 clock at 480MHz */ - mxs_set_ioclk(MXC_IOCLK0, 480000); - - /* SSP0 clock at 96MHz */ - mxs_set_sspclk(MXC_SSPCLK0, 96000, 0); - - return 0; -} - -int dram_init(void) -{ - return mxs_dram_init(); -} - -#ifdef CONFIG_CMD_MMC -static int xfi3_mmc_cd(int id) -{ - switch (id) { - case 0: - /* The SSP_DETECT is inverted on this board. */ - return gpio_get_value(MX23_PAD_SSP1_DETECT__GPIO_2_1); - case 1: - /* Phison bridge always present */ - return 1; - default: - return 0; - } -} - -int board_mmc_init(struct bd_info *bis) -{ - int ret; - - /* MicroSD slot */ - gpio_direction_input(MX23_PAD_SSP1_DETECT__GPIO_2_1); - gpio_direction_output(MX23_PAD_GPMI_D07__GPIO_0_7, 0); - ret = mxsmmc_initialize(bis, 0, NULL, xfi3_mmc_cd); - if (ret) - return ret; - - /* Phison SD-NAND bridge */ - ret = mxsmmc_initialize(bis, 1, NULL, xfi3_mmc_cd); - - return ret; -} -#endif - -#ifdef CONFIG_VIDEO_MXS -static int mxsfb_write_byte(uint32_t payload, const unsigned int data) -{ - struct mxs_lcdif_regs *regs = (struct mxs_lcdif_regs *)MXS_LCDIF_BASE; - const unsigned int timeout = 0x10000; - - if (mxs_wait_mask_clr(&regs->hw_lcdif_ctrl_reg, LCDIF_CTRL_RUN, - timeout)) - return -ETIMEDOUT; - - writel((1 << LCDIF_TRANSFER_COUNT_V_COUNT_OFFSET) | - (1 << LCDIF_TRANSFER_COUNT_H_COUNT_OFFSET), - &regs->hw_lcdif_transfer_count); - - writel(LCDIF_CTRL_DATA_SELECT | LCDIF_CTRL_RUN, - &regs->hw_lcdif_ctrl_clr); - - if (data) - writel(LCDIF_CTRL_DATA_SELECT, &regs->hw_lcdif_ctrl_set); - - writel(LCDIF_CTRL_RUN, &regs->hw_lcdif_ctrl_set); - - if (mxs_wait_mask_clr(&regs->hw_lcdif_lcdif_stat_reg, 1 << 29, - timeout)) - return -ETIMEDOUT; - - writel(payload, &regs->hw_lcdif_data); - return mxs_wait_mask_clr(&regs->hw_lcdif_ctrl_reg, LCDIF_CTRL_RUN, - timeout); -} - -static void mxsfb_write_register(uint32_t reg, uint32_t data) -{ - mxsfb_write_byte(reg, 0); - mxsfb_write_byte(data, 1); -} - -static const struct { - uint8_t reg; - uint8_t delay; - uint16_t val; -} lcd_regs[] = { - { 0x01, 0, 0x001c }, - { 0x02, 0, 0x0100 }, - /* Writing 0x30 to reg. 0x03 flips the LCD */ - { 0x03, 0, 0x1038 }, - { 0x08, 0, 0x0808 }, - /* This can contain 0x111 to rotate the LCD. */ - { 0x0c, 0, 0x0000 }, - { 0x0f, 0, 0x0c01 }, - { 0x20, 0, 0x0000 }, - { 0x21, 30, 0x0000 }, - /* Wait 30 mS here */ - { 0x10, 0, 0x0a00 }, - { 0x11, 30, 0x1038 }, - /* Wait 30 mS here */ - { 0x12, 0, 0x1010 }, - { 0x13, 0, 0x0050 }, - { 0x14, 0, 0x4f58 }, - { 0x30, 0, 0x0000 }, - { 0x31, 0, 0x00db }, - { 0x32, 0, 0x0000 }, - { 0x33, 0, 0x0000 }, - { 0x34, 0, 0x00db }, - { 0x35, 0, 0x0000 }, - { 0x36, 0, 0x00af }, - { 0x37, 0, 0x0000 }, - { 0x38, 0, 0x00db }, - { 0x39, 0, 0x0000 }, - { 0x50, 0, 0x0000 }, - { 0x51, 0, 0x0705 }, - { 0x52, 0, 0x0e0a }, - { 0x53, 0, 0x0300 }, - { 0x54, 0, 0x0a0e }, - { 0x55, 0, 0x0507 }, - { 0x56, 0, 0x0000 }, - { 0x57, 0, 0x0003 }, - { 0x58, 0, 0x090a }, - { 0x59, 30, 0x0a09 }, - /* Wait 30 mS here */ - { 0x07, 30, 0x1017 }, - /* Wait 40 mS here */ - { 0x36, 0, 0x00af }, - { 0x37, 0, 0x0000 }, - { 0x38, 0, 0x00db }, - { 0x39, 0, 0x0000 }, - { 0x20, 0, 0x0000 }, - { 0x21, 0, 0x0000 }, -}; - -void mxsfb_system_setup(void) -{ - struct mxs_lcdif_regs *regs = (struct mxs_lcdif_regs *)MXS_LCDIF_BASE; - int i; - - /* Switch the LCDIF into System-Mode */ - writel(LCDIF_CTRL_LCDIF_MASTER | LCDIF_CTRL_DOTCLK_MODE | - LCDIF_CTRL_BYPASS_COUNT, &regs->hw_lcdif_ctrl_clr); - - /* Restart the SmartLCD controller */ - mdelay(50); - writel(1, &regs->hw_lcdif_ctrl1_set); - mdelay(50); - writel(1, &regs->hw_lcdif_ctrl1_clr); - mdelay(50); - writel(1, &regs->hw_lcdif_ctrl1_set); - mdelay(50); - - /* Program the SmartLCD controller */ - writel(LCDIF_CTRL1_RECOVER_ON_UNDERFLOW, &regs->hw_lcdif_ctrl1_set); - - writel((0x03 << LCDIF_TIMING_CMD_HOLD_OFFSET) | - (0x03 << LCDIF_TIMING_CMD_SETUP_OFFSET) | - (0x03 << LCDIF_TIMING_DATA_HOLD_OFFSET) | - (0x02 << LCDIF_TIMING_DATA_SETUP_OFFSET), - &regs->hw_lcdif_timing); - - /* - * OTM2201A init and configuration sequence. - */ - for (i = 0; i < ARRAY_SIZE(lcd_regs); i++) { - mxsfb_write_register(lcd_regs[i].reg, lcd_regs[i].val); - if (lcd_regs[i].delay) - mdelay(lcd_regs[i].delay); - } - /* Turn on Framebuffer Upload Mode */ - mxsfb_write_byte(0x22, 0); - - writel(LCDIF_CTRL_LCDIF_MASTER | LCDIF_CTRL_DATA_SELECT, - &regs->hw_lcdif_ctrl_set); -} -#endif - -int board_init(void) -{ - /* Adress of boot parameters */ - gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; - - /* Turn on PWM backlight */ - gpio_direction_output(MX23_PAD_PWM2__GPIO_1_28, 1); - - return 0; -} - -int board_eth_init(struct bd_info *bis) -{ - usb_eth_initialize(bis); - return 0; -} diff --git a/configs/xfi3_defconfig b/configs/xfi3_defconfig deleted file mode 100644 index c49319c3c2f0..000000000000 --- a/configs/xfi3_defconfig +++ /dev/null @@ -1,43 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_MX23=y -CONFIG_SYS_TEXT_BASE=0x40002000 -CONFIG_SPL_GPIO_SUPPORT=y -CONFIG_SPL_LIBCOMMON_SUPPORT=y -CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_NR_DRAM_BANKS=1 -CONFIG_ENV_SIZE=0x4000 -CONFIG_SPL_TEXT_BASE=0x00001000 -CONFIG_TARGET_XFI3=y -CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL=y -CONFIG_BOOTDELAY=3 -CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttyAMA0,115200n8 " -CONFIG_SYS_CONSOLE_IS_IN_ENV=y -# CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_ARCH_MISC_INIT=y -CONFIG_BOARD_EARLY_INIT_F=y -# CONFIG_SPL_FRAMEWORK is not set -CONFIG_HUSH_PARSER=y -CONFIG_CMD_GPIO=y -CONFIG_CMD_MMC=y -CONFIG_CMD_USB=y -# CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_PING=y -CONFIG_CMD_CACHE=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_FAT=y -CONFIG_ENV_OVERWRITE=y -CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_VERSION_VARIABLE=y -CONFIG_NETCONSOLE=y -CONFIG_MXS_GPIO=y -CONFIG_MMC_MXS=y -CONFIG_CONS_INDEX=0 -CONFIG_USB=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_GADGET=y -CONFIG_CI_UDC=y -CONFIG_USB_ETHER=y -CONFIG_USB_ETH_CDC=y -CONFIG_OF_LIBFDT=y diff --git a/include/configs/xfi3.h b/include/configs/xfi3.h deleted file mode 100644 index 80849129b931..000000000000 --- a/include/configs/xfi3.h +++ /dev/null @@ -1,39 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2013 Marek Vasut <marex(a)denx.de> - */ -#ifndef __CONFIGS_XFI3_H__ -#define __CONFIGS_XFI3_H__ - -/* U-Boot Commands */ - -/* Memory configuration */ -#define PHYS_SDRAM_1 0x40000000 /* Base address */ -#define PHYS_SDRAM_1_SIZE 0x08000000 /* Max 128 MB RAM */ -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 - -/* Environment */ - -/* Booting Linux */ -#define CONFIG_BOOTFILE "uImage" -#define CONFIG_LOADADDR 0x42000000 -#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR - -/* LCD */ -#ifdef CONFIG_VIDEO -#define CONFIG_VIDEO_FONT_4X6 -#define CONFIG_VIDEO_MXS_MODE_SYSTEM -#define CONFIG_SYS_BLACK_IN_WRITE -#define LCD_BPP LCD_COLOR16 -#endif - -/* USB */ -#ifdef CONFIG_CMD_USB -#define CONFIG_EHCI_MXS_PORT0 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 -#endif - -/* The rest of the configuration is shared */ -#include <configs/mxs.h> - -#endif /* __CONFIGS_XFI3_H__ */ -- 2.17.1

12 61

Re: New Defects reported by Coverity Scan for Das U-Boot
by Simon Glass 24 Mar '21

24 Mar '21

+U-Boot Mailing List On Wed, 3 Mar 2021 at 03:44, Heinrich Schuchardt <xypron.glpk(a)gmx.de> wrote: > > On 02.03.21 14:30, scan-admin(a)coverity.com wrote: > > Hi, > > > > Please find the latest report on new defect(s) introduced to Das U-Boot found with Coverity Scan. > > > > 2 new defect(s) introduced to Das U-Boot found with Coverity Scan. > > 3 defect(s), reported by Coverity Scan earlier, were marked fixed in the recent build analyzed by Coverity Scan. > > > > New defect(s) Reported-by: Coverity Scan > > Showing 2 of 2 defect(s) > > > > > > ** CID 325866: Error handling issues (CHECKED_RETURN) > > /drivers/core/ofnode.c: 77 in ofnode_read_s32_default() > > > > > > ________________________________________________________________________________________________________ > > *** CID 325866: Error handling issues (CHECKED_RETURN) > > /drivers/core/ofnode.c: 77 in ofnode_read_s32_default() > > 71 return def; > > 72 } > > 73 > > 74 int ofnode_read_s32_default(ofnode node, const char *propname, s32 def) > > 75 { > > 76 assert(ofnode_valid(node)); > >>>> CID 325866: Error handling issues (CHECKED_RETURN) > >>>> Calling "ofnode_read_u32" without checking return value (as is done elsewhere 14 out of 17 times). > > This is a false positive. If the node is not found, def remains > unchanged which matches the function description. > > > 77 ofnode_read_u32(node, propname, (u32 *)&def); > > 78 > > 79 return def; > > 80 } > > 81 > > 82 int ofnode_read_u64(ofnode node, const char *propname, u64 *outp) > > > > ** CID 325865: Memory - illegal accesses (BUFFER_SIZE_WARNING) > > /drivers/fastboot/fb_mmc.c: 64 in raw_part_get_info_by_name() > > > > > > ________________________________________________________________________________________________________ > > *** CID 325865: Memory - illegal accesses (BUFFER_SIZE_WARNING) > > /drivers/fastboot/fb_mmc.c: 64 in raw_part_get_info_by_name() > > 58 } > > 59 } > > 60 > > 61 info->start = simple_strtoul(argv[0], NULL, 0); > > 62 info->size = simple_strtoul(argv[1], NULL, 0); > > 63 info->blksz = dev_desc->blksz; > >>>> CID 325865: Memory - illegal accesses (BUFFER_SIZE_WARNING) > >>>> Calling "strncpy" with a maximum size argument of 32 bytes on destination array "info->name" of size 32 bytes might leave the destination string unterminated. > > Here we have a real issue. > > info->name is assumed to be null-terminated in different library calls, > e.g. when calling part_get_info_by_name(). > > Inside cmd/cpt.c we find the following conflicting lines: > > cmd/gpt.c:209: > newpart->gpt_part_info.name[PART_NAME_LEN - 1] = '\0'; > > cmd/gpt.c:842: > if ((strlen(name1) > PART_NAME_LEN) || (strlen(name2) > PART_NAME_LEN)) { > printf("Names longer than %d characters are truncated.\n", > > So in line 209 we assume that PART_NAME_LEN includes the terminating NUL > while in line 842 we assume that it does not. > > What needs to be done is: > > * document the structure field disk_partition.name so that it is > clear if this field is null-terminated or not > * document the meaning of PART_NAME_LEN > * check all usages of the field and PART_NAME_LEN > > Best regards > > Heinrich > > > > 64 strncpy((char *)info->name, name, PART_NAME_LEN); > > 65 > > 66 if (raw_part_desc) { > > 67 if (strcmp(strsep(&raw_part_desc, " "), "mmcpart") == 0) { > > 68 ulong mmcpart = simple_strtoul(raw_part_desc, NULL, 0); > > 69 int ret = blk_dselect_hwpart(dev_desc, mmcpart); > > > > > > ________________________________________________________________________________________________________ > > To view the defects in Coverity Scan visit, https://u15810271.ct.sendgrid.net/ls/click?upn=HRESupC-2F2Czv4BOaCWWCy7my0P… > > > > To manage Coverity Scan email notifications for "xypron.glpk(a)gmx.de", click https://u15810271.ct.sendgrid.net/ls/click?upn=HRESupC-2F2Czv4BOaCWWCy7my0P… > > >

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[PATCH v2 0/9] Use -ENOSYS consistently
by Simon Glass 24 Mar '21

24 Mar '21

A few places use -ENOTSUPP when they should use -ENOSYS. In two cases both are used. This little series tidies this up and documents the conventions. Changes in v2: - Add a patch to document the common error codes - Add new patch for acpi_get_path() - Add new patch to update clk drivers to use -EINVAL Simon Glass (9): dm: core: Document the common error codes dm: core: Use -ENOSPC in acpi_get_path() usb: Return -ENOSYS when system call is not available spi: Return -ENOSYS when system call is not available tlv_eeprom: Return -ENOSYS when system call is not available clk: Update drivers to use -EINVAL clk: Return -ENOSYS when system call is not available simple-pm-bus: Use -ENOSYS for checking missing system call pinctrl: Return -ENOSYS when system call is not available doc/driver-model/design.rst | 111 +++++++++++++++++++++++++ drivers/clk/aspeed/clk_ast2600.c | 2 +- drivers/clk/clk-composite.c | 8 +- drivers/clk/clk-hsdk-cgu.c | 4 +- drivers/clk/imx/clk-imx8.c | 4 +- drivers/clk/imx/clk-imx8qm.c | 6 +- drivers/clk/imx/clk-imx8qxp.c | 6 +- drivers/clk/imx/clk-pllv3.c | 2 +- drivers/clk/kendryte/bypass.c | 2 +- drivers/clk/kendryte/clk.c | 2 +- drivers/clk/mvebu/armada-37xx-periph.c | 6 +- drivers/core/acpi.c | 2 +- drivers/core/simple-pm-bus.c | 4 +- drivers/pinctrl/pinctrl-uclass.c | 10 ++- drivers/usb/gadget/udc/udc-uclass.c | 2 +- include/spi-mem.h | 2 +- include/tlv_eeprom.h | 6 +- 17 files changed, 146 insertions(+), 33 deletions(-) -- 2.31.0.rc2.261.g7f71774620-goog

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socfpga: cyclone5: ums not working without usb start
by Wolfgang Grandegger 24 Mar '21

24 Mar '21

Hello, I realized, that "ums 0 mmc 0" is not working without executing "usb start" in advance. That's because "ums" does not enable the clock and deassert the USB reset. Is that by purpose? At least "usb start" was not necessary with v2016.11. Wolfgang

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[PATCH] efi_loader: Add an S-CRTM even for firmware version
by Ilias Apalodimas 24 Mar '21

24 Mar '21

TCG PC Client Platform Firmware Profile Spec mandates that an S-CRTM event for the version identifier using the event type EV_S_CRTM_VERSION must be measured. So since we are trying to add more conformance into U-Boot, let's add the event using U_BOOT_VERSION_STRING, extend PCR[0] accordingly and log it in the EventLog Signed-off-by: Ilias Apalodimas <ilias.apalodimas(a)linaro.org> --- Heinrich this won't apply without my previous patch fixing EFI TCG memory when the protocol installation fails lib/efi_loader/efi_tcg2.c | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/lib/efi_loader/efi_tcg2.c b/lib/efi_loader/efi_tcg2.c index 02de63808f9a..c0efd867a486 100644 --- a/lib/efi_loader/efi_tcg2.c +++ b/lib/efi_loader/efi_tcg2.c @@ -13,6 +13,7 @@ #include <efi_loader.h> #include <efi_tcg2.h> #include <log.h> +#include <version.h> #include <tpm-v2.h> #include <u-boot/sha1.h> #include <u-boot/sha256.h> @@ -1051,6 +1052,36 @@ out: return ret; } +/** + * efi_append_scrtm_version - Append an S-CRTM EV_S_CRTM_VERSION event on the + * eventlog and extend the PCRs + * + * @dev: TPM device + * + * @Return: status code + */ +static efi_status_t efi_append_scrtm_version(struct udevice *dev) +{ + struct tpml_digest_values digest_list; + u8 ver[] = U_BOOT_VERSION_STRING; + const int pcr_index = 0; + efi_status_t ret; + + ret = tcg2_create_digest(ver, sizeof(ver), &digest_list); + if (ret != EFI_SUCCESS) + goto out; + + ret = tcg2_pcr_extend(dev, pcr_index, &digest_list); + if (ret != EFI_SUCCESS) + goto out; + + ret = tcg2_agile_log_append(pcr_index, EV_S_CRTM_VERSION, &digest_list, + sizeof(ver), ver); + +out: + return ret; +} + /** * efi_tcg2_register() - register EFI_TCG2_PROTOCOL * @@ -1074,6 +1105,10 @@ efi_status_t efi_tcg2_register(void) if (ret != EFI_SUCCESS) goto fail; + ret = efi_append_scrtm_version(dev); + if (ret != EFI_SUCCESS) + goto out; + ret = efi_add_protocol(efi_root, &efi_guid_tcg2_protocol, (void *)&efi_tcg2_protocol); if (ret != EFI_SUCCESS) { -- 2.31.0

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pull request of u-boot-fsl-qoriq for v2021.04
by Priyanka Jain 24 Mar '21

24 Mar '21

Dear Tom, Please find my pull-request for u-boot-fsl-qoriq/master https://github.com/u-boot/u-boot/pull/58 Summary Bug fixes related to FSL-IFC, watchdog layerscape-pcie, flexspi, T2080rdb. priyankajain ----- The following changes since commit 1f9c3f13f6ad8595a0fb5ab2cb830583cdc0b60a: Merge tag 'efi-2021-04-rc5-2' of https://source.denx.de/u-boot/custodians/u-boot-efi (2021-03-20 08:55:18 -0400) are available in the Git repository at: https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq.git HEAD for you to fetch changes up to cad6ffa34d255692833576bc2c911d1ee39f2af0: mtd: rawnand: fsl_ifc: fix FSL NAND driver to read all ONFI parameter pages (2021-03-23 18:06:07 +0530) ---------------------------------------------------------------- Aleksandar Gerasimovski (1): fsl_ifc: fix typo in the NOR CSOR register definition Chris Packham (3): rtc: ds1307: Add ds1339 compatible powerpc: t2080rdb: Enable RTC support board: freescale: t208xrdb: Add link to User Guide Hou Zhiqiang (1): pci: layerscape: Change to allocate zeroed memery for struct ls_pcie Kuldeep Singh (5): configs: lx2160a: Unset CONFIG_SPI_FLASH_SPANSION configs: lx2160a: Remove unused Flexspi config options configs: ls1028a: Unset CONFIG_SPI_FLASH_SPANSION configs: ls1028aqds: Move CONFIG_SPI_FLASH_* definitions to defconfig configs: ls1028a: Correct CONFIG_ENV_SECT_SIZE Maxim Kochetkov (1): mtd: rawnand: fsl_ifc: fix FSL NAND driver to read all ONFI parameter pages arch/powerpc/dts/t2080rdb.dts | 8 ++++++++ board/freescale/t208xrdb/README | 5 +++++ configs/T2080RDB_NAND_defconfig | 2 ++ configs/T2080RDB_SDCARD_defconfig | 2 ++ configs/T2080RDB_SPIFLASH_defconfig | 2 ++ configs/T2080RDB_defconfig | 2 ++ configs/ls1028aqds_tfa_SECURE_BOOT_defconfig | 3 ++- configs/ls1028aqds_tfa_defconfig | 5 +++-- configs/ls1028aqds_tfa_lpuart_defconfig | 5 +++-- configs/ls1028ardb_tfa_SECURE_BOOT_defconfig | 1 - configs/ls1028ardb_tfa_defconfig | 3 +-- configs/lx2160aqds_tfa_SECURE_BOOT_defconfig | 1 - configs/lx2160aqds_tfa_defconfig | 1 - configs/lx2160ardb_tfa_SECURE_BOOT_defconfig | 1 - configs/lx2160ardb_tfa_defconfig | 1 - configs/lx2160ardb_tfa_stmm_defconfig | 1 - drivers/mtd/nand/raw/fsl_ifc_nand.c | 17 ++++++++++------- drivers/pci/pcie_layerscape_ep.c | 2 +- drivers/pci/pcie_layerscape_rc.c | 2 +- drivers/rtc/ds1307.c | 2 ++ include/configs/ls1028aqds.h | 6 ------ include/configs/lx2160a_common.h | 6 ------ include/fsl_ifc.h | 2 +- 23 files changed, 45 insertions(+), 35 deletions(-)

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[GIT PULL] SoCFPGA changes for v2021.04-rc5
by Tan, Ley Foon 24 Mar '21

24 Mar '21

Hi Tom Please pull one fix for v2021.04-rc5. Thanks. Regards Ley Foon The following changes since commit 1f9c3f13f6ad8595a0fb5ab2cb830583cdc0b60a: Merge tag 'efi-2021-04-rc5-2' of https://source.denx.de/u-boot/custodians/u-boot-efi (2021-03-20 08:55:18 -0400) are available in the Git repository at: https://github.com/lftan/u-boot.git v2021.04-rc5 for you to fetch changes up to 2dbcc037ccf3a16a2a0225133f8721b87ae7fffb: arm: socfpga: Only do 'is OS booted from FIT' checking when VAB is enabled (2021-03-23 14:46:35 +0800) ---------------------------------------------------------------- Siew Chin Lim (1): arm: socfpga: Only do 'is OS booted from FIT' checking when VAB is enabled arch/arm/mach-socfpga/board.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)

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