February 2021 - U-Boot

[PATCH v1 01/11] stdio: Get rid of dead code, i.e. stdio_deregister()
by Andy Shevchenko 16 Feb '21

16 Feb '21

Nobody is using stdio_deregister(), remove for good. Note, even its parameters are not consistent with stdio_register(). So, if anyone want to introduce this again, better with some consistency. Signed-off-by: Andy Shevchenko <andriy.shevchenko(a)linux.intel.com> --- common/stdio.c | 11 ----------- include/stdio_dev.h | 1 - 2 files changed, 12 deletions(-) diff --git a/common/stdio.c b/common/stdio.c index abf9b1e91588..e3e24f0dbf89 100644 --- a/common/stdio.c +++ b/common/stdio.c @@ -261,17 +261,6 @@ int stdio_deregister_dev(struct stdio_dev *dev, int force) return 0; } -int stdio_deregister(const char *devname, int force) -{ - struct stdio_dev *dev; - - dev = stdio_get_by_name(devname); - if (!dev) /* device not found */ - return -ENODEV; - - return stdio_deregister_dev(dev, force); -} - int stdio_init_tables(void) { #if defined(CONFIG_NEEDS_MANUAL_RELOC) diff --git a/include/stdio_dev.h b/include/stdio_dev.h index 48871a6a22b8..109a68d06409 100644 --- a/include/stdio_dev.h +++ b/include/stdio_dev.h @@ -83,7 +83,6 @@ int stdio_add_devices(void); int stdio_init(void); void stdio_print_current_devices(void); -int stdio_deregister(const char *devname, int force); /** * stdio_deregister_dev() - deregister the device "devname". -- 2.30.0

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[PATCH v8 0/4] OP-TEE I2C trampoline and associated tests
by Igor Opaniuk 16 Feb '21

16 Feb '21

From: Igor Opaniuk <igor.opaniuk(a)foundries.io> This patchset allows OP-TEE to communicate with I2C devices; a typical use case would be servicing U-Boot requests that require underlying cryptographic operations implemented by an I2C chip. On a board fitted with the NXP SE050 I2C secure element, OP-TEE can route some of the cryptographic operations it needs to that device (ie RSA, ECC, CTR..). Before the REE executes, OP-TEE would use its own I2C drivers to communicate with the device on the bus; later on, once the REE is up, accesses to the I2C bus should be coordinated with the REE to avoid collisions. However instead of implementing such a synchronization mechanism, this trampoline service permits OP-TEE to route those I2C requests back to U-boot without then having to worry about collisions. Lets suppose that U-Boot executes the trusted application Android Verified Boot; when OP-TEE receives the request - and before executing the application - it uses RSA to verify it. So on the back of the TA function invocation, OP-TEE returns to U-boot with a sequence of RPC calls requesting I2C transfers (check carefully the implementation in do_call_with_arg(...) implemented in drivers/tee/optee/core.c and notice the while loop) When using sandbox testing, RPC is called directly to validate its actual implementation; however as succintly described above, these calls will always be originated in OP-TEE. Changes v8: * [Etienne Carriere] extended TA param description (missed one param) Changes v7: * [Etienne Carriere] extended TA param description, adding info about i2c xfer flags. Applied A-b and R-b tags * [Jens Wiklander] applied R-b tag Changes v6: * [Etienne Carriere] fixed func return code handling * [Etienne Carriere] tee_optee_ta_uuid passing a pointer instead of full struct * [Etienne Carriere] pass additionally i2c control flags in tests * Fixed mispelling in the comments Changes v5: * [Jens Wiklander] Addressed comment about optee_alloc_and_init_page_list(): drop inline, proper return value and comment Changes v4: * [Simon Glass] Reduced amount ifdefs warnings and move to if (IS_ENABLED(CONFIG_*)) where possible * Fixed pointer-sign warnings Changes v3: * [Simon Glass] Added RPC I2C test coverage Changes v2: * [Simon Glass] Adjusted the usage of DM internal api (dev_get_parent_platdata) * [Simon Glass] Added additional comments to functions * [Jens Wiklander] s/tmem/rmem/g Igor Opaniuk (3): test: py: add pygit2 and pyelftools to requirements.txt drivers: tee: sandbox: add rpc test ta emulation test: dm: tee: extend with RPC test Jorge Ramirez-Ortiz (1): drivers: tee: i2c trampoline driver drivers/tee/Makefile | 2 + drivers/tee/optee/Kconfig | 9 ++ drivers/tee/optee/Makefile | 1 + drivers/tee/optee/i2c.c | 90 ++++++++++++++ drivers/tee/optee/optee_msg.h | 21 ++++ drivers/tee/optee/optee_msg_supplicant.h | 5 + drivers/tee/optee/optee_private.h | 17 +++ drivers/tee/optee/supplicant.c | 3 + drivers/tee/sandbox.c | 142 ++++++++++++++++++++++- include/tee/optee_ta_rpc_test.h | 30 +++++ test/dm/tee.c | 116 ++++++++++++++++-- test/py/requirements.txt | 2 + 12 files changed, 427 insertions(+), 11 deletions(-) create mode 100644 drivers/tee/optee/i2c.c create mode 100644 include/tee/optee_ta_rpc_test.h -- 2.25.1

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[PATCH v5 0/9] Introduce DSA Ethernet switch class and Felix driver
by Vladimir Oltean 16 Feb '21

16 Feb '21

From: Vladimir Oltean <vladimir.oltean(a)nxp.com> DSA stands for Distributed Switch Architecture and it is a subsystem introduced in the Linux kernel to support switches that: - have an Ethernet link up to the CPU - use some form of tagging to identify the source/destination port for Rx/Tx - may be cascaded in tree-like structures. DSA is described in depth here: https://www.kernel.org/doc/Documentation/networking/dsa/dsa.txt This patch set introduces a DSA class in U-Boot to support drivers of DSA switches. DSA drivers have to implement the following ops: - enable/disable of switch ports, - insert a tag in frames being transmitted, used by the switch to select the egress port, - parse a tag in frames being received, used for Rx traffic. DSA class code deals with presentation of switch ports as Ethernet interfaces, deals with the master Ethernet device for I/O and helps with parsing of the DT assuming the structure follows the DSA kernel binding. Support for switch cascading is not included yet. In the sandbox environment, the DSA sandbox driver, the switch ports and master eth interface look like this: => dm tree Class Index Probed Driver Name ----------------------------------------------------------- [...] eth 4 [ + ] eth_sandbox |-- dsa-test-eth dsa 0 [ + ] dsa_sandbox |-- dsa-test eth 5 [ + ] dsa-port | |-- lan0 eth 6 [ + ] dsa-port | `-- lan1 => setenv ethact lan1 => ping 1.2.3.5 Using lan1 device host 1.2.3.5 is alive => This patch set also introduces a driver for the Ethernet switch integrated into NXP LS1028A, called Felix. The switch has 4 front panel ports, I/O to/from it is done though an ENETC Ethernet interface and meta-data is carried between the switch and the driver though an additional header pre-pended to the original frame. Network commands like tftp can be used on these front panel ports. The ports are disabled unless used so they do not cause issues on network topologies that include loops. Felix as seen on LS1028A RDB: => dm tree Class Index Probed Driver Name ----------------------------------------------------------- [...] dsa 0 [ + ] felix-switch | |-- felix-switch eth 4 [ + ] dsa-port | | |-- swp0 eth 5 [ + ] dsa-port | | |-- swp1 eth 6 [ + ] dsa-port | | |-- swp2 eth 7 [ + ] dsa-port | | `-- swp3 => mdio list [...] 10 - Vitesse VSC8514 <--> swp0 11 - Vitesse VSC8514 <--> swp1 12 - Vitesse VSC8514 <--> swp2 13 - Vitesse VSC8514 <--> swp3 NOTE: This patchset is a major rework of the dsa-class code since the last submission from May 5th: https://patchwork.ozlabs.org/project/uboot/cover/1588700588-8587-1-git-send… The basic concepts and data path operation (tagging) in the DSA class code remain the same as in the initial patchset from Alex, however the external API has been changed significantly (simplified), the driver model integration has been improved to the point that the DSA class code no longer needs to allocate extra memory internally (via malloc), reduced memory footprint, internal state data moved from the external API and internalized, cleaner external API, internal code reworked, completely reworked DSA sandbox driver and unit tests for better coverage and to integrate better with the eth sandbox driver and tests, etc. v5: Fix the DSA driver not probing in the sandbox, and the net_retry test failing due to that: - Made PHY_FIXED work with live OF. - Made DSA user ports [ not just CPU ports as before ], and any other callers of dm_eth_phy_connect, work with fixed-link. v4: - Implemented the TODO for having a phy_device on the CPU port. - Enabled CONFIG_PHY_FIXED which is a new dependency of CONFIG_DM_DSA. v3: - Removed all infrastructure associated with dsa_foreach_port, which is no longer needed. - Only inherit the DSA master's MAC address if the environment does not already have a specific MAC address that should be used for the DSA port. - Be compatible with the new "ethernet-ports" container name which has been introduced in the Linux kernel as commit 85e05d263ed2 ("net: dsa: of: Allow ethernet-ports as encapsulating node") in v5.9. - Fixed the felix driver not getting its ports initialized, due to dsa_foreach_port() being actually unusable when called from the probe function of the DSA udevice - the eth port udevices are _not_ yet probed at that point. We are now initializing all ports from the .port_enable() callback of each eth udevice. - Deleted the unit tests associated with the infrastructure for dsa_foreach_port, since that function no longer exists. - Enabled the config options for the Kontron LS1028A board too. v2: Switch node structure defined in dtsi now consistent with the Linux switch node definition. Moved aliases from dtsi to the RDB dts to minimize impact on other boards (and for improved flexibility). Alex Marginean (3): drivers: net: add Felix DSA switch driver arm: dts: ls1028a: add Ethernet switch node and dependencies configs: ls1028a: enable the Ethernet switch driver Claudiu Manoil (2): net: introduce DSA class for Ethernet switches sandbox: add a DSA sandbox driver and unit test Vladimir Oltean (4): net: phy: fixed: be compatible with live OF tree net: phy: fixed: support speeds of 2500 and 10000 net: phy: introduce fixed_phy_create for DSA CPU ports net: mdio: teach dm_eth_connect_phy_handle to connect to fixed PHY arch/Kconfig | 2 + arch/arm/dts/fsl-ls1028a-rdb.dts | 64 +++ arch/arm/dts/fsl-ls1028a.dtsi | 55 ++- arch/sandbox/dts/test.dts | 48 ++ configs/kontron_sl28_defconfig | 3 + configs/ls1028aqds_tfa_SECURE_BOOT_defconfig | 3 + configs/ls1028aqds_tfa_defconfig | 3 + configs/ls1028ardb_tfa_SECURE_BOOT_defconfig | 3 + configs/ls1028ardb_tfa_defconfig | 3 + drivers/net/Kconfig | 24 + drivers/net/Makefile | 1 + drivers/net/dsa_sandbox.c | 179 +++++++ drivers/net/fsl_enetc.h | 5 + drivers/net/mscc_eswitch/Kconfig | 8 + drivers/net/mscc_eswitch/Makefile | 1 + drivers/net/mscc_eswitch/felix_switch.c | 414 ++++++++++++++++ drivers/net/phy/fixed.c | 34 +- drivers/net/phy/phy.c | 59 ++- include/configs/sandbox.h | 2 + include/dm/uclass-id.h | 1 + include/net.h | 6 + include/net/dsa.h | 165 +++++++ include/phy.h | 21 + net/Makefile | 1 + net/dsa-uclass.c | 478 +++++++++++++++++++ net/mdio-uclass.c | 12 +- test/dm/Makefile | 1 + test/dm/dsa.c | 82 ++++ test/dm/eth.c | 10 +- 29 files changed, 1660 insertions(+), 28 deletions(-) create mode 100644 drivers/net/dsa_sandbox.c create mode 100644 drivers/net/mscc_eswitch/felix_switch.c create mode 100644 include/net/dsa.h create mode 100644 net/dsa-uclass.c create mode 100644 test/dm/dsa.c -- 2.25.1

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[PATCH v5] timer: imx-gpt: Add timer support for i.MX SoCs family
by Jesse 16 Feb '21

16 Feb '21

From: Jesse Taube <mr.bossman075(a)gmail.com> This timer driver is using GPT Timer (General Purpose Timer) available on most i.MX SoCs. Since this driver is only meant to provide u-boot's timer and counter, and most of the i.MX* SoCs use a 24Mhz crystal, let's focus on that specific source. Signed-off-by: Giulio Benetti <giulio.benetti(a)benettiengineering.com> Signed-off-by: Jesse Taube <mr.bossman075(a)gmail.com> --- V1->V2: * Fixed indentation * Fixed capitals * Made timer work on only 24MHz clock V2->V3: * Fixed indentation * Made implementation imatate the Linux kernel * Fix wrong definition V3->V4: * Fixed indentation * Made bit manipluation into its own function. V4->V5: * Fixed indentation * Made commit message 75 char * Moved prescaler code into sub funcions drivers/timer/Kconfig | 7 ++ drivers/timer/Makefile | 1 + drivers/timer/imx-gpt-timer.c | 160 ++++++++++++++++++++++++++++++++++ 3 files changed, 168 insertions(+) create mode 100644 drivers/timer/imx-gpt-timer.c diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig index 80743a2551..ee81dfa776 100644 --- a/drivers/timer/Kconfig +++ b/drivers/timer/Kconfig @@ -227,4 +227,11 @@ config MCHP_PIT64B_TIMER Select this to enable support for Microchip 64-bit periodic interval timer. +config IMX_GPT_TIMER + bool "NXP i.MX GPT timer support" + depends on TIMER + help + Select this to enable support for the timer found on + NXP i.MX devices. + endmenu diff --git a/drivers/timer/Makefile b/drivers/timer/Makefile index eb5c48cc6c..e214ba7268 100644 --- a/drivers/timer/Makefile +++ b/drivers/timer/Makefile @@ -25,3 +25,4 @@ obj-$(CONFIG_STM32_TIMER) += stm32_timer.o obj-$(CONFIG_X86_TSC_TIMER) += tsc_timer.o obj-$(CONFIG_MTK_TIMER) += mtk_timer.o obj-$(CONFIG_MCHP_PIT64B_TIMER) += mchp-pit64b-timer.o +obj-$(CONFIG_IMX_GPT_TIMER) += imx-gpt-timer.o diff --git a/drivers/timer/imx-gpt-timer.c b/drivers/timer/imx-gpt-timer.c new file mode 100644 index 0000000000..1607a2fbcb --- /dev/null +++ b/drivers/timer/imx-gpt-timer.c @@ -0,0 +1,160 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2020 + * Author(s): Giulio Benetti <giulio.benetti(a)benettiengineering.com> + */ + +#include <common.h> +#include <clk.h> +#include <dm.h> +#include <fdtdec.h> +#include <timer.h> +#include <dm/device_compat.h> + +#include <asm/io.h> + +#define GPT_CR_SWR 0x00008000 +#define GPT_CR_EN_24M 0x00000400 +#define GPT_CR_EN 0x00000001 +#define GPT_PR_PRESCALER 0x00000FFF + +#define GPT_CLKSRC_IPG_CLK (1 << 6) +#define GPT_CLKSRC_IPG_CLK_24M (5 << 6) + +struct imx_gpt_timer_regs { + u32 cr; + u32 pr; + u32 sr; + u32 ir; + u32 ocr1; + u32 ocr2; + u32 ocr3; + u32 icr1; + u32 icr2; + u32 cnt; +}; + +struct imx_gpt_timer_priv { + struct imx_gpt_timer_regs *base; +}; + +static u64 imx_gpt_timer_get_count(struct udevice *dev) +{ + struct imx_gpt_timer_priv *priv = dev_get_priv(dev); + struct imx_gpt_timer_regs *regs = priv->base; + + return readl(&regs->cnt); +} + +static int imx_gpt_setup_24M(struct imx_gpt_timer_regs *regs) +{ + u32 prescaler; + + /* Set timer frequency to 1MHz */ + prescaler = (24000000UL / CONFIG_SYS_HZ_CLOCK) - 1; + if (prescaler > GPT_PR_PRESCALER) + return -EINVAL; + /* We set timer prescaler to obtain a 1MHz timer counter frequency */ + writel(prescaler, &regs->pr); + + writel(GPT_CLKSRC_IPG_CLK_24M | GPT_CR_EN_24M, &regs->cr); + return 0; +} + +static int imx_gpt_setup_per(u32 rate, struct imx_gpt_timer_regs *regs) +{ + u32 prescaler; + + /* Set timer frequency to 1MHz */ + prescaler = (rate / CONFIG_SYS_HZ_CLOCK) - 1; + if (prescaler > GPT_PR_PRESCALER) + return -EINVAL; + /* We set timer prescaler to obtain a 1MHz timer counter frequency */ + writel(prescaler, &regs->pr); + + writel(GPT_CLKSRC_IPG_CLK, &regs->cr); + return 0; +} + +static int imx_gpt_setup(u32 rate, struct imx_gpt_timer_regs *regs) +{ + int ret; + + /* Reset the timer */ + setbits_le32(&regs->cr, GPT_CR_SWR); + + /* Wait for timer to finish reset */ + while (readl(&regs->cr) & GPT_CR_SWR) + ; + + if (rate != 24000000UL) + ret = imx_gpt_setup_per(rate, regs); + else + ret = imx_gpt_setup_24M(regs); + + /* Start timer */ + setbits_le32(&regs->cr, GPT_CR_EN); + + return ret; +} + +static int imx_gpt_timer_probe(struct udevice *dev) +{ + struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev); + struct imx_gpt_timer_priv *priv = dev_get_priv(dev); + struct imx_gpt_timer_regs *regs; + struct clk clk; + fdt_addr_t addr; + u32 rate; + int ret; + + addr = dev_read_addr(dev); + if (addr == FDT_ADDR_T_NONE) + return -EINVAL; + + priv->base = (struct imx_gpt_timer_regs *)addr; + regs = priv->base; + + uc_priv->clock_rate = CONFIG_SYS_HZ_CLOCK; + + ret = clk_get_by_index(dev, 0, &clk); + if (ret < 0) + return ret; + + ret = clk_enable(&clk); + if (ret) { + dev_err(dev, "Failed to enable clock\n"); + return ret; + } + /* Get timer clock rate */ + rate = clk_get_rate(&clk); + if (rate <= 0) { + dev_err(dev, "Could not get clock rate...\n"); + return -EINVAL; + } + + ret = imx_gpt_setup(rate, regs); + if (ret) { + dev_err(dev, "Could not setup timer\n"); + return ret; + } + return 0; +} + +static const struct timer_ops imx_gpt_timer_ops = { + .get_count = imx_gpt_timer_get_count, +}; + +static const struct udevice_id imx_gpt_timer_ids[] = { + { .compatible = "fsl,imxrt-gpt" }, + {} +}; + +U_BOOT_DRIVER(imx_gpt_timer) = { + .name = "imx_gpt_timer", + .id = UCLASS_TIMER, + .of_match = imx_gpt_timer_ids, + .priv_auto = sizeof(struct imx_gpt_timer_priv), + .probe = imx_gpt_timer_probe, + .ops = &imx_gpt_timer_ops, +}; -- 2.30.0

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[PATCH v3] mmc: mmc_spi: Print verbose debug output when crc16 check fails
by Bin Meng 16 Feb '21

16 Feb '21

Add some verbose debug output when crc16 check fails. Signed-off-by: Bin Meng <bmeng.cn(a)gmail.com> Reviewed-by: Jaehoon Chung <jh80.chung(a)samsung.com> --- Changes in v3: - use expected/got instead of expect/get Changes in v2: - do the crc_ok assignment at the the same line where it's defined drivers/mmc/mmc_spi.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/mmc_spi.c b/drivers/mmc/mmc_spi.c index 46800bb..23b9073 100644 --- a/drivers/mmc/mmc_spi.c +++ b/drivers/mmc/mmc_spi.c @@ -181,8 +181,10 @@ static int mmc_spi_readdata(struct udevice *dev, if (ret) return ret; #ifdef CONFIG_MMC_SPI_CRC_ON - if (be16_to_cpu(crc16_ccitt(0, buf, bsize)) != crc) { - debug("%s: data crc error\n", __func__); + u16 crc_ok = be16_to_cpu(crc16_ccitt(0, buf, bsize)); + if (crc_ok != crc) { + debug("%s: data crc error, expected %04x got %04x\n", + __func__, crc_ok, crc); r1 = R1_SPI_COM_CRC; break; } -- 2.7.4

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[PATCH 0/1] Allow last block to be read
by Jesper Schmitz Mouridsen 16 Feb '21

16 Feb '21

The last block could not be read by FreeBSD loader.efi (the gpt backup block) Jesper Schmitz Mouridsen (1): Allow last block to be read lib/efi_loader/efi_disk.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.30.0

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[ANN] U-Boot v2021.04-rc2 released
by Tom Rini 16 Feb '21

16 Feb '21

Hey all, It's release day, and here's v2021.04-rc2. It's later in the day than I like to do these, but as you can also see from the patches I just applied, there's a security issue we need to patch as well. I hope these patches are easily backportable as needed, and there is a testcase for them included. Aside from that, there are a few other outstanding things in my patchwork queue I do want to get to, as well as likely pushing more board removals, prior to v2021.04 release itself. In terms of a changelog, git log --merges v2021.04-rc1..v2021.04-rc2 contains what I've pulled but as always, better PR messages and tags will provide better results here. I do have my reminders setup for doing -rc releases every other Monday from here on out and final release on April 5th, 2021. Thanks all! -- Tom

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[PATCH v5] dm: core: Add of_match_node helper function
by Biju Das 15 Feb '21

15 Feb '21

Add of_match_node() helper function to iterate over the device tree and tell if a device_node has a matching of_match structure. Signed-off-by: Biju Das <biju.das.jz(a)bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj(a)bp.renesas.com> Reviewed-by: Simon Glass <sjg(a)chromium.org> --- v4->v5: * Rebased to latest master v3->v4: No change * Added Simon's Rb tag. v2->v3: * Added a test case for of_match_node helper function. (Ref: https://patchwork.ozlabs.org/project/uboot/patch/20201102150959.4793-2-biju…) v1->v2: * No Change v1: * New Patch --- drivers/core/device.c | 21 +++++++++++++++++++++ include/dm/device.h | 13 +++++++++++++ test/dm/core.c | 31 +++++++++++++++++++++++++++++++ 3 files changed, 65 insertions(+) diff --git a/drivers/core/device.c b/drivers/core/device.c index aeab3836ed..4ff708fd38 100644 --- a/drivers/core/device.c +++ b/drivers/core/device.c @@ -1022,6 +1022,27 @@ bool of_machine_is_compatible(const char *compat) return !fdt_node_check_compatible(fdt, 0, compat); } +static +const struct udevice_id *__of_match_node(const struct udevice_id *matches, + const ofnode node) +{ + if (!matches) + return NULL; + + for (; matches->compatible; matches++) { + if (ofnode_device_is_compatible(node, matches->compatible)) + return matches; + } + + return NULL; +} + +const struct udevice_id *of_match_node(const struct udevice_id *matches, + const ofnode node) +{ + return __of_match_node(matches, node); +} + int dev_disable_by_path(const char *path) { struct uclass *uc; diff --git a/include/dm/device.h b/include/dm/device.h index f5b4cd6876..950fc78184 100644 --- a/include/dm/device.h +++ b/include/dm/device.h @@ -802,6 +802,19 @@ bool device_is_compatible(const struct udevice *dev, const char *compat); */ bool of_machine_is_compatible(const char *compat); +/** + * of_match_node() - Tell if a device_node has a matching of_match structure + * + * + * Low level utility function used by device matching. + * + * @matches: array of of device match structures to search in + * @node: the of device structure to match against + * @return matching structure on success, NULL if the match is not found + */ +const struct udevice_id *of_match_node(const struct udevice_id *matches, + const ofnode node); + /** * dev_disable_by_path() - Disable a device given its device tree path * diff --git a/test/dm/core.c b/test/dm/core.c index 1f5ca570dc..aae4d8427d 100644 --- a/test/dm/core.c +++ b/test/dm/core.c @@ -11,6 +11,7 @@ #include <fdtdec.h> #include <log.h> #include <malloc.h> +#include <dm/device.h> #include <dm/device-internal.h> #include <dm/root.h> #include <dm/util.h> @@ -1067,6 +1068,36 @@ static int dm_test_inactive_child(struct unit_test_state *uts) } DM_TEST(dm_test_inactive_child, UT_TESTF_SCAN_PDATA); +static int dm_test_of_match_node(struct unit_test_state *uts) +{ + const ulong test_data_expected = 0x1234; + ofnode root_node = ofnode_path("/"); + const struct udevice_id *match; + unsigned long match_data; + + const struct udevice_id soc_device_ids[] = { + { .compatible = "sandbox", .data = test_data_expected, }, + { /* sentinel */ } + }; + + const struct udevice_id soc_device_nomatch_ids[] = { + { .compatible = "sandbox123", .data = test_data_expected, }, + { /* sentinel */ } + }; + + match = of_match_node(soc_device_ids, root_node); + ut_assert(match); + + match_data = match->data; + ut_asserteq(match_data, test_data_expected); + + match = of_match_node(soc_device_nomatch_ids, root_node); + ut_asserteq_ptr(match, NULL); + + return 0; +} +DM_TEST(dm_test_of_match_node, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); + /* Make sure all bound devices have a sequence number */ static int dm_test_all_have_seq(struct unit_test_state *uts) { -- 2.17.1

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[PATCH 0/4] common: Drop remaining includes in common.h (part A)
by Simon Glass 15 Feb '21

15 Feb '21

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[PATCH 1/6] sh: Remove MigoR board
by Tom Rini 15 Feb '21

15 Feb '21

This board has not been converted to CONFIG_DM by the deadline of v2020.01 and is missing other conversions which depend on this as well. Remove it. Signed-off-by: Tom Rini <trini(a)konsulko.com> --- arch/sh/Kconfig | 5 - board/renesas/MigoR/Kconfig | 12 -- board/renesas/MigoR/MAINTAINERS | 6 - board/renesas/MigoR/Makefile | 13 -- board/renesas/MigoR/lowlevel_init.S | 193 ---------------------------- board/renesas/MigoR/migo_r.c | 43 ------- configs/MigoR_defconfig | 34 ----- include/configs/MigoR.h | 82 ------------ 8 files changed, 388 deletions(-) delete mode 100644 board/renesas/MigoR/Kconfig delete mode 100644 board/renesas/MigoR/MAINTAINERS delete mode 100644 board/renesas/MigoR/Makefile delete mode 100644 board/renesas/MigoR/lowlevel_init.S delete mode 100644 board/renesas/MigoR/migo_r.c delete mode 100644 configs/MigoR_defconfig delete mode 100644 include/configs/MigoR.h diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index 91002a9be08f..2cd153fbac0d 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig @@ -21,10 +21,6 @@ choice prompt "Target select" optional -config TARGET_MIGOR - bool "Migo-R" - select CPU_SH4 - config TARGET_R2DPLUS bool "Renesas R2D-PLUS" select CPU_SH4 @@ -59,7 +55,6 @@ config SYS_CPU source "arch/sh/lib/Kconfig" -source "board/renesas/MigoR/Kconfig" source "board/renesas/r2dplus/Kconfig" source "board/renesas/r7780mp/Kconfig" source "board/renesas/sh7752evb/Kconfig" diff --git a/board/renesas/MigoR/Kconfig b/board/renesas/MigoR/Kconfig deleted file mode 100644 index 25b170ac0712..000000000000 --- a/board/renesas/MigoR/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if TARGET_MIGOR - -config SYS_BOARD - default "MigoR" - -config SYS_VENDOR - default "renesas" - -config SYS_CONFIG_NAME - default "MigoR" - -endif diff --git a/board/renesas/MigoR/MAINTAINERS b/board/renesas/MigoR/MAINTAINERS deleted file mode 100644 index 21ee5e275483..000000000000 --- a/board/renesas/MigoR/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -MIGOR BOARD -#M: - -S: Maintained -F: board/renesas/MigoR/ -F: include/configs/MigoR.h -F: configs/MigoR_defconfig diff --git a/board/renesas/MigoR/Makefile b/board/renesas/MigoR/Makefile deleted file mode 100644 index 944a3bfe2cf6..000000000000 --- a/board/renesas/MigoR/Makefile +++ /dev/null @@ -1,13 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (C) 2007 -# Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> -# -# Copyright (C) 2007 -# Kenati Technologies, Inc. -# -# board/MigoR/Makefile -# - -obj-y := migo_r.o -extra-y += lowlevel_init.o diff --git a/board/renesas/MigoR/lowlevel_init.S b/board/renesas/MigoR/lowlevel_init.S deleted file mode 100644 index 1b494faeb0e2..000000000000 --- a/board/renesas/MigoR/lowlevel_init.S +++ /dev/null @@ -1,193 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2007-2008 - * Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> - * - * Copyright (C) 2007 - * Kenati Technologies, Inc. - * - * board/MigoR/lowlevel_init.S - */ - -#include <config.h> - -#include <asm/processor.h> -#include <asm/macro.h> - -/* - * Board specific low level init code, called _very_ early in the - * startup sequence. Relocation to SDRAM has not happened yet, no - * stack is available, bss section has not been initialised, etc. - * - * (Note: As no stack is available, no subroutines can be called...). - */ - - .global lowlevel_init - - .text - .align 2 - -lowlevel_init: - write32 CCR_A, CCR_D ! Address of Cache Control Register - ! Instruction Cache Invalidate - - write32 MMUCR_A, MMUCR_D ! Address of MMU Control Register - ! TI == TLB Invalidate bit - - write32 MSTPCR0_A, MSTPCR0_D ! Address of Power Control Register 0 - - write32 MSTPCR2_A, MSTPCR2_D ! Address of Power Control Register 2 - - write16 PFC_PULCR_A, PFC_PULCR_D - - write16 PFC_DRVCR_A, PFC_DRVCR_D - - write16 SBSCR_A, SBSCR_D - - write16 PSCR_A, PSCR_D - - write16 RWTCSR_A, RWTCSR_D_1 ! 0xA4520004 (Watchdog Control / Status Register) - ! 0xA507 -> timer_STOP / WDT_CLK = max - - write16 RWTCNT_A, RWTCNT_D ! 0xA4520000 (Watchdog Count Register) - ! 0x5A00 -> Clear - - write16 RWTCSR_A, RWTCSR_D_2 ! 0xA4520004 (Watchdog Control / Status Register) - ! 0xA504 -> timer_STOP / CLK = 500ms - - write32 DLLFRQ_A, DLLFRQ_D ! 20080115 - ! 20080115 - - write32 FRQCR_A, FRQCR_D ! 0xA4150000 Frequency control register - ! 20080115 - - write32 CCR_A, CCR_D_2 ! Address of Cache Control Register - ! ?? - -bsc_init: - write32 CMNCR_A, CMNCR_D - - write32 CS0BCR_A, CS0BCR_D - - write32 CS4BCR_A, CS4BCR_D - - write32 CS5ABCR_A, CS5ABCR_D - - write32 CS5BBCR_A, CS5BBCR_D - - write32 CS6ABCR_A, CS6ABCR_D - - write32 CS0WCR_A, CS0WCR_D - - write32 CS4WCR_A, CS4WCR_D - - write32 CS5AWCR_A, CS5AWCR_D - - write32 CS5BWCR_A, CS5BWCR_D - - write32 CS6AWCR_A, CS6AWCR_D - - ! SDRAM initialization - write32 SDCR_A, SDCR_D - - write32 SDWCR_A, SDWCR_D - - write32 SDPCR_A, SDPCR_D - - write32 RTCOR_A, RTCOR_D - - write32 RTCNT_A, RTCNT_D - - write32 RTCSR_A, RTCSR_D - - write32 RFCR_A, RFCR_D - - write8 SDMR3_A, SDMR3_D - - ! BL bit off (init = ON) (?!?) - - stc sr, r0 ! BL bit off(init=ON) - mov.l SR_MASK_D, r1 - and r1, r0 - ldc r0, sr - - rts - mov #0, r0 - - .align 4 - -CCR_A: .long CCR -MMUCR_A: .long MMUCR -MSTPCR0_A: .long MSTPCR0 -MSTPCR2_A: .long MSTPCR2 -PFC_PULCR_A: .long PULCR -PFC_DRVCR_A: .long DRVCR -SBSCR_A: .long SBSCR -PSCR_A: .long PSCR -RWTCSR_A: .long RWTCSR -RWTCNT_A: .long RWTCNT -FRQCR_A: .long FRQCR -PLLCR_A: .long PLLCR -DLLFRQ_A: .long DLLFRQ - -CCR_D: .long 0x00000800 -CCR_D_2: .long 0x00000103 -MMUCR_D: .long 0x00000004 -MSTPCR0_D: .long 0x00001001 -MSTPCR2_D: .long 0xffffffff -PFC_PULCR_D: .long 0x6000 -PFC_DRVCR_D: .long 0x0464 -FRQCR_D: .long 0x07033639 -PLLCR_D: .long 0x00005000 -DLLFRQ_D: .long 0x000004F6 - -CMNCR_A: .long CMNCR -CMNCR_D: .long 0x0000001B -CS0BCR_A: .long CS0BCR -CS0BCR_D: .long 0x24920400 -CS4BCR_A: .long CS4BCR -CS4BCR_D: .long 0x00003400 -CS5ABCR_A: .long CS5ABCR -CS5ABCR_D: .long 0x24920400 -CS5BBCR_A: .long CS5BBCR -CS5BBCR_D: .long 0x24920400 -CS6ABCR_A: .long CS6ABCR -CS6ABCR_D: .long 0x24920400 - -CS0WCR_A: .long CS0WCR -CS0WCR_D: .long 0x00000380 -CS4WCR_A: .long CS4WCR -CS4WCR_D: .long 0x00110080 -CS5AWCR_A: .long CS5AWCR -CS5AWCR_D: .long 0x00000300 -CS5BWCR_A: .long CS5BWCR -CS5BWCR_D: .long 0x00000300 -CS6AWCR_A: .long CS6AWCR -CS6AWCR_D: .long 0x00000300 - -SDCR_A: .long SBSC_SDCR -SDCR_D: .long 0x80160809 -SDWCR_A: .long SBSC_SDWCR -SDWCR_D: .long 0x0014450C -SDPCR_A: .long SBSC_SDPCR -SDPCR_D: .long 0x00000087 -RTCOR_A: .long SBSC_RTCOR -RTCNT_A: .long SBSC_RTCNT -RTCNT_D: .long 0xA55A0012 -RTCOR_D: .long 0xA55A001C -RTCSR_A: .long SBSC_RTCSR -RFCR_A: .long SBSC_RFCR -RFCR_D: .long 0xA55A0221 -RTCSR_D: .long 0xA55A009a -SDMR3_A: .long 0xFE581180 -SDMR3_D: .long 0x0 - -SR_MASK_D: .long 0xEFFFFF0F - - .align 2 - -SBSCR_D: .word 0x0044 -PSCR_D: .word 0x0000 -RWTCSR_D_1: .word 0xA507 -RWTCSR_D_2: .word 0xA504 -RWTCNT_D: .word 0x5A00 diff --git a/board/renesas/MigoR/migo_r.c b/board/renesas/MigoR/migo_r.c deleted file mode 100644 index f2f4c657534f..000000000000 --- a/board/renesas/MigoR/migo_r.c +++ /dev/null @@ -1,43 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2007 - * Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> - * - * Copyright (C) 2007 - * Kenati Technologies, Inc. - * - * board/MigoR/migo_r.c - */ - -#include <common.h> -#include <init.h> -#include <net.h> -#include <netdev.h> -#include <asm/io.h> -#include <asm/processor.h> - -int checkboard(void) -{ - puts("BOARD: Renesas MigoR\n"); - return 0; -} - -int board_init(void) -{ - return 0; -} - -void led_set_state (unsigned short value) -{ -} - -#ifdef CONFIG_CMD_NET -int board_eth_init(struct bd_info *bis) -{ - int rc = 0; -#ifdef CONFIG_SMC91111 - rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); -#endif - return rc; -} -#endif diff --git a/configs/MigoR_defconfig b/configs/MigoR_defconfig deleted file mode 100644 index f29f1ec1f332..000000000000 --- a/configs/MigoR_defconfig +++ /dev/null @@ -1,34 +0,0 @@ -CONFIG_SH=y -CONFIG_SYS_TEXT_BASE=0x8FFC0000 -CONFIG_ENV_SIZE=0x20000 -CONFIG_ENV_SECT_SIZE=0x20000 -CONFIG_TARGET_MIGOR=y -CONFIG_BOOTDELAY=3 -CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttySC0,115200 root=1f01" -# CONFIG_CMDLINE_EDITING is not set -# CONFIG_AUTO_COMPLETE is not set -# CONFIG_CMD_BDI is not set -# CONFIG_CMD_CONSOLE is not set -# CONFIG_CMD_BOOTD is not set -# CONFIG_CMD_RUN is not set -# CONFIG_CMD_IMI is not set -# CONFIG_CMD_XIMG is not set -# CONFIG_CMD_EDITENV is not set -# CONFIG_CMD_ENV_EXISTS is not set -CONFIG_CMD_SDRAM=y -# CONFIG_CMD_ECHO is not set -# CONFIG_CMD_ITEST is not set -# CONFIG_CMD_SOURCE is not set -# CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_PING=y -# CONFIG_CMD_SLEEP is not set -CONFIG_ENV_OVERWRITE=y -CONFIG_ENV_IS_IN_FLASH=y -CONFIG_ENV_ADDR=0xA0020000 -CONFIG_VERSION_VARIABLE=y -CONFIG_MTD_NOR_FLASH=y -CONFIG_FLASH_CFI_DRIVER=y -CONFIG_SYS_FLASH_CFI=y -CONFIG_SCIF_CONSOLE=y -CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/include/configs/MigoR.h b/include/configs/MigoR.h deleted file mode 100644 index 026ffbeb6c7b..000000000000 --- a/include/configs/MigoR.h +++ /dev/null @@ -1,82 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Configuation settings for the Renesas Solutions Migo-R board - * - * Copyright (C) 2007 Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> - */ - -#ifndef __MIGO_R_H -#define __MIGO_R_H - -#define CONFIG_CPU_SH7722 1 - -#define CONFIG_DISPLAY_BOARDINFO - -/* SMC9111 */ -#define CONFIG_SMC91111 -#define CONFIG_SMC91111_BASE (0xB0000000) - -/* MEMORY */ -#define MIGO_R_SDRAM_BASE (0x8C000000) -#define MIGO_R_FLASH_BASE_1 (0xA0000000) -#define MIGO_R_FLASH_BANK_SIZE (64 * 1024 * 1024) - -#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */ -#define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate settings for this board */ - -/* SCIF */ -#define CONFIG_CONS_SCIF0 1 - -/* Enable alternate, more extensive, memory test */ -/* Scratch address used by the alternate memory test */ - -/* Enable temporary baudrate change while serial download */ -#undef CONFIG_SYS_LOADS_BAUD_CHANGE - -#define CONFIG_SYS_SDRAM_BASE (MIGO_R_SDRAM_BASE) -/* maybe more, but if so u-boot doesn't know about it... */ -#define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) -/* default load address for scripts ?!? */ -#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024) - -/* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */ -#define CONFIG_SYS_MONITOR_BASE (MIGO_R_FLASH_BASE_1) -/* Monitor size */ -#define CONFIG_SYS_MONITOR_LEN (128 * 1024) -/* Size of DRAM reserved for malloc() use */ -#define CONFIG_SYS_MALLOC_LEN (256 * 1024) -#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) - -/* FLASH */ -#undef CONFIG_SYS_FLASH_QUIET_TEST -/* print 'E' for empty sector on flinfo */ -#define CONFIG_SYS_FLASH_EMPTY_INFO -/* Physical start address of Flash memory */ -#define CONFIG_SYS_FLASH_BASE (MIGO_R_FLASH_BASE_1) -/* Max number of sectors on each Flash chip */ -#define CONFIG_SYS_MAX_FLASH_SECT 512 - -/* if you use all NOR Flash , you change dip-switch. Please see MIGO_R01 Manual. */ -#define CONFIG_SYS_MAX_FLASH_BANKS 1 -#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE + (0 * MIGO_R_FLASH_BANK_SIZE) } - -/* Timeout for Flash erase operations (in ms) */ -#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) -/* Timeout for Flash write operations (in ms) */ -#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) -/* Timeout for Flash set sector lock bit operations (in ms) */ -#define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) -/* Timeout for Flash clear lock bit operations (in ms) */ -#define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) - -/* Use hardware flash sectors protection instead of U-Boot software protection */ -#undef CONFIG_SYS_DIRECT_FLASH_TFTP - -/* ENV setting */ -/* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */ - -/* Board Clock */ -#define CONFIG_SYS_CLK_FREQ 33333333 -#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ - -#endif /* __MIGO_R_H */ -- 2.17.1

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