November 2021 - U-Boot

[PATCH] board: ls1046ardb: force PCI device enumeration
by Martin Schiller 17 Nov '21

17 Nov '21

Commit 045ecf899252 ("configs: enable DM_ETH support for LS1046ARDB") resulted in the PCI bus no longer being implicitly enumerated. However, this is necessary for the fdt pcie fixups to work. Therefore, similar to commit 8b6558bd4187 ("board: ls1088ardb: transition to DM_ETH"), pci_init() is now called in the board_init() routine when CONFIG_DM_ETH is active. Signed-off-by: Martin Schiller <ms(a)dev.tdt.de> CC: Priyanka Jain <priyanka.jain(a)nxp.com> --- board/freescale/ls1046ardb/ls1046ardb.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/board/freescale/ls1046ardb/ls1046ardb.c b/board/freescale/ls1046ardb/ls1046ardb.c index 93ef903f29..d0abfe8869 100644 --- a/board/freescale/ls1046ardb/ls1046ardb.c +++ b/board/freescale/ls1046ardb/ls1046ardb.c @@ -93,6 +93,10 @@ int board_init(void) ppa_init(); #endif +#if !defined(CONFIG_SYS_EARLY_PCI_INIT) && defined(CONFIG_DM_ETH) + pci_init(); +#endif + /* invert AQR105 IRQ pins polarity */ out_be32(&scfg->intpcr, AQR105_IRQ_MASK); -- 2.20.1

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RE: Your message to U-Boot awaits moderator approval
by Sahil Malhotra (OSS) 17 Nov '21

17 Nov '21

Hi, I am trying to send some patches on u-boot(a)lists.denx.de but every time I am getting reply "Your message to U-Boot awaits moderator approval". Created account on http://patchwork.ozlabs.org/user/, Also subscribed to the list u-boot(a)lists.denx.de. Tried multiple times, but always getting this reply. Any help regarding this is really appreciated. Regards, Sahil Malhotra -----Original Message----- From: U-Boot <u-boot-bounces(a)lists.denx.de> On Behalf Of u-boot-owner(a)lists.denx.de Sent: Tuesday, November 16, 2021 3:47 PM To: Sahil Malhotra (OSS) <sahil.malhotra(a)oss.nxp.com> Subject: Your message to U-Boot awaits moderator approval Your mail to 'U-Boot' with the subject [PATCH 1/2] fsl-layerscape: add dtb overlay feature Is being held until the list moderator can review it for approval. The reason it is being held: Post to moderated list Either the message will get posted to the list, or you will receive notification of the moderator's decision. If you would like to cancel this posting, please visit the following URL: https://lists.denx.de/confirm/u-boot/1d3c54aafb0ee9f189c3cef4f19bfd29f25cf5…

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[PATCH] net: eqos: connect and config PHY from probe stage instead of starting EQOS
by Joakim Zhang 17 Nov '21

17 Nov '21

For EQOS ethernet, it will do phy_connect() and phy_config() when start the ethernet (eqos_srart()), users need wait seconds for PHY auto negotiation to complete when do tftp boot. phy_config() -> board_phy_config() -> phydev->drv->config() // i.MX8MP/DXL use realtek PHY -> rtl8211f_config() -> genphy_config_aneg() -> genphy_restart_aneg() // restart auto-nego, then need seconds to complete To avoid wasting time, we can move PHY connection and configuration from eqos_start() to eqos_probe(). This patch also moves clock setting from eqos_start() to eqos_probe() as MDIO access need CSR clock, there is no function change. Tested-on: i.MX8MP & i.MX8DXL Before: u-boot=> run netboot Booting from net ... ethernet@30bf0000 Waiting for PHY auto negotiation to complete....... done BOOTP broadcast 1 DHCP client bound to address 10.193.102.192 (313 ms) Using ethernet@30bf0000 device TFTP from server 10.193.108.176; our IP address is 10.193.102.192; sending through gateway 10.193.102.254 After: u-boot=> run netboot Booting from net ... BOOTP broadcast 1 DHCP client bound to address 10.193.102.192 (454 ms) Using ethernet@30bf0000 device TFTP from server 10.193.108.176; our IP address is 10.193.102.192; sending through gateway 10.193.102.254 Signed-off-by: Joakim Zhang <qiangqing.zhang(a)nxp.com> --- drivers/net/dwc_eth_qos.c | 132 +++++++++++++++++++------------------- 1 file changed, 67 insertions(+), 65 deletions(-) diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c index 585101804d..c1923fbe6b 100644 --- a/drivers/net/dwc_eth_qos.c +++ b/drivers/net/dwc_eth_qos.c @@ -1045,20 +1045,6 @@ static int eqos_start(struct udevice *dev) eqos->tx_desc_idx = 0; eqos->rx_desc_idx = 0; - ret = eqos->config->ops->eqos_start_clks(dev); - if (ret < 0) { - pr_err("eqos_start_clks() failed: %d", ret); - goto err; - } - - ret = eqos->config->ops->eqos_start_resets(dev); - if (ret < 0) { - pr_err("eqos_start_resets() failed: %d", ret); - goto err_stop_clks; - } - - udelay(10); - eqos->reg_access_ok = true; ret = wait_for_bit_le32(&eqos->dma_regs->mode, @@ -1066,68 +1052,34 @@ static int eqos_start(struct udevice *dev) eqos->config->swr_wait, false); if (ret) { pr_err("EQOS_DMA_MODE_SWR stuck"); - goto err_stop_resets; + goto err; } ret = eqos->config->ops->eqos_calibrate_pads(dev); if (ret < 0) { pr_err("eqos_calibrate_pads() failed: %d", ret); - goto err_stop_resets; + goto err; } rate = eqos->config->ops->eqos_get_tick_clk_rate(dev); val = (rate / 1000000) - 1; writel(val, &eqos->mac_regs->us_tic_counter); - /* - * if PHY was already connected and configured, - * don't need to reconnect/reconfigure again - */ - if (!eqos->phy) { - int addr = -1; -#ifdef CONFIG_DM_ETH_PHY - addr = eth_phy_get_addr(dev); -#endif -#ifdef DWC_NET_PHYADDR - addr = DWC_NET_PHYADDR; -#endif - eqos->phy = phy_connect(eqos->mii, addr, dev, - eqos->config->interface(dev)); - if (!eqos->phy) { - pr_err("phy_connect() failed"); - goto err_stop_resets; - } - - if (eqos->max_speed) { - ret = phy_set_supported(eqos->phy, eqos->max_speed); - if (ret) { - pr_err("phy_set_supported() failed: %d", ret); - goto err_shutdown_phy; - } - } - - ret = phy_config(eqos->phy); - if (ret < 0) { - pr_err("phy_config() failed: %d", ret); - goto err_shutdown_phy; - } - } - ret = phy_startup(eqos->phy); if (ret < 0) { pr_err("phy_startup() failed: %d", ret); - goto err_shutdown_phy; + goto err; } if (!eqos->phy->link) { pr_err("No link"); - goto err_shutdown_phy; + goto err; } ret = eqos_adjust_link(dev); if (ret < 0) { pr_err("eqos_adjust_link() failed: %d", ret); - goto err_shutdown_phy; + goto err; } /* Configure MTL */ @@ -1356,12 +1308,6 @@ static int eqos_start(struct udevice *dev) debug("%s: OK\n", __func__); return 0; -err_shutdown_phy: - phy_shutdown(eqos->phy); -err_stop_resets: - eqos->config->ops->eqos_stop_resets(dev); -err_stop_clks: - eqos->config->ops->eqos_stop_clks(dev); err: pr_err("FAILED: %d", ret); return ret; @@ -1412,12 +1358,6 @@ static void eqos_stop(struct udevice *dev) clrbits_le32(&eqos->dma_regs->ch0_rx_control, EQOS_DMA_CH0_RX_CONTROL_SR); - if (eqos->phy) { - phy_shutdown(eqos->phy); - } - eqos->config->ops->eqos_stop_resets(dev); - eqos->config->ops->eqos_stop_clks(dev); - debug("%s: OK\n", __func__); } @@ -1888,9 +1828,65 @@ static int eqos_probe(struct udevice *dev) eth_phy_set_mdio_bus(dev, eqos->mii); #endif + ret = eqos->config->ops->eqos_start_clks(dev); + if (ret < 0) { + pr_err("eqos_start_clks() failed: %d", ret); + goto err_unregister_mdio; + } + + ret = eqos->config->ops->eqos_start_resets(dev); + if (ret < 0) { + pr_err("eqos_start_resets() failed: %d", ret); + goto err_stop_clks; + } + + udelay(10); + + /* + * if PHY was already connected and configured, + * don't need to reconnect/reconfigure again + */ + if (!eqos->phy) { + int addr = -1; +#ifdef CONFIG_DM_ETH_PHY + addr = eth_phy_get_addr(dev); +#endif +#ifdef DWC_NET_PHYADDR + addr = DWC_NET_PHYADDR; +#endif + eqos->phy = phy_connect(eqos->mii, addr, dev, + eqos->config->interface(dev)); + if (!eqos->phy) { + pr_err("phy_connect() failed"); + goto err_stop_resets; + } + + if (eqos->max_speed) { + ret = phy_set_supported(eqos->phy, eqos->max_speed); + if (ret) { + pr_err("phy_set_supported() failed: %d", ret); + goto err_shutdown_phy; + } + } + + ret = phy_config(eqos->phy); + if (ret < 0) { + pr_err("phy_config() failed: %d", ret); + goto err_shutdown_phy; + } + } + debug("%s: OK\n", __func__); return 0; +err_shutdown_phy: + phy_shutdown(eqos->phy); +err_stop_resets: + eqos->config->ops->eqos_stop_resets(dev); +err_stop_clks: + eqos->config->ops->eqos_stop_clks(dev); +err_unregister_mdio: + mdio_unregister(eqos->mii); err_free_mdio: mdio_free(eqos->mii); err_remove_resources_tegra: @@ -1908,6 +1904,12 @@ static int eqos_remove(struct udevice *dev) debug("%s(dev=%p):\n", __func__, dev); + if (eqos->phy) { + phy_shutdown(eqos->phy); + } + eqos->config->ops->eqos_stop_resets(dev); + eqos->config->ops->eqos_stop_clks(dev); + mdio_unregister(eqos->mii); mdio_free(eqos->mii); eqos->config->ops->eqos_remove_resources(dev); -- 2.17.1

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[PATCH 1/1] doc: fix typos in trace.rst
by Heinrich Schuchardt 17 Nov '21

17 Nov '21

Fix obvious typos. Use US spelling consistently. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt(a)canonical.com> --- doc/develop/trace.rst | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/doc/develop/trace.rst b/doc/develop/trace.rst index 7776c48428..09f5745a90 100644 --- a/doc/develop/trace.rst +++ b/doc/develop/trace.rst @@ -4,7 +4,7 @@ Tracing in U-Boot ================= -U-Boot supports a simple tracing feature which allows a record of excecution +U-Boot supports a simple tracing feature which allows a record of execution to be collected and sent to a host machine for analysis. At present the main use for this is to profile boot time. @@ -161,10 +161,10 @@ limit of the trace buffer size you have specified. Once that is exhausted no more data will be collected. Collecting trace data has an affect on execution time/performance. You -will notice this particularly with trvial functions - the overhead of +will notice this particularly with trivial functions - the overhead of recording their execution may even exceed their normal execution time. In practice this doesn't matter much so long as you are aware of the -effect. Once you have done your optimisations, turn off tracing before +effect. Once you have done your optimizations, turn off tracing before doing end-to-end timing. The best time to start tracing is right at the beginning of U-Boot. The @@ -184,7 +184,7 @@ the OS. In practical terms, U-Boot runs the 'fakegocmd' environment variable at this point. This variable should have a short script which collects the trace data and writes it somewhere. -Trace data collection relies on a microsecond timer, accesed through +Trace data collection relies on a microsecond timer, accessed through timer_get_us(). So the first think you should do is make sure that this produces sensible results for your board. Suitable sources for this timer include high resolution timers, PWMs or profile timers if @@ -285,7 +285,7 @@ Options Specify U-Boot map file -p <trace_file> - Specifiy profile/trace file + Specify profile/trace file Commands: @@ -315,11 +315,11 @@ time: 2. Build U-Boot with tracing and run it. Note the difference in boot time (it is common for tracing to add 10% to the time) -3. Collect the trace information as descibed above. Use this to find where +3. Collect the trace information as described above. Use this to find where all the time is being spent. -4. Take a look at that code and see if you can optimise it. Perhaps it is - possible to speed up the initialisation of a device, or remove an unused +4. Take a look at that code and see if you can optimize it. Perhaps it is + possible to speed up the initialization of a device, or remove an unused feature. 5. Rebuild, run and collect again. Compare your results. -- 2.32.0

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[PATCH 1/1] test: test truncation in snprintf()
by Heinrich Schuchardt 17 Nov '21

17 Nov '21

Test that the return value of snprintf() is correct in the case of truncation. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt(a)canonical.com> --- test/print_ut.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/test/print_ut.c b/test/print_ut.c index 152a8c3334..7b2e7bb152 100644 --- a/test/print_ut.c +++ b/test/print_ut.c @@ -31,6 +31,7 @@ static int print_guid(struct unit_test_state *uts) 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16 }; char str[40]; + int ret; sprintf(str, "%pUb", guid); ut_assertok(strcmp("01020304-0506-0708-090a-0b0c0d0e0f10", str)); @@ -40,6 +41,9 @@ static int print_guid(struct unit_test_state *uts) ut_assertok(strcmp("04030201-0605-0807-090a-0b0c0d0e0f10", str)); sprintf(str, "%pUL", guid); ut_assertok(strcmp("04030201-0605-0807-090A-0B0C0D0E0F10", str)); + ret = snprintf(str, 4, "%pUL", guid); + ut_asserteq(0, str[3]); + ut_asserteq(36, ret); return 0; } @@ -349,6 +353,20 @@ static int print_itoa(struct unit_test_state *uts) } PRINT_TEST(print_itoa, 0); +static int snprint(struct unit_test_state *uts) +{ + char buf[10] = "xxxxxxxxx"; + int ret; + + ret = snprintf(buf, 4, "%s:%s", "abc", "def"); + ut_asserteq(0, buf[3]); + ut_asserteq(7, ret); + ret = snprintf(buf, 4, "%s:%d", "abc", 9999); + ut_asserteq(8, ret); + return 0; +} +PRINT_TEST(snprint, 0); + static int print_xtoa(struct unit_test_state *uts) { ut_asserteq_str("7f", simple_xtoa(127)); -- 2.32.0

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[PATCH v2] sf: Querying write-protect status before operating the flash
by chaochao2021666＠163.com 16 Nov '21

16 Nov '21

From: chao zeng <chao.zeng(a)siemens.com> When operating the write-protection flash,spi_flash_std_write() and spi_flash_std_erase() would return wrong result.The flash is protected, but write or erase the flash would show "OK". Check the flash write protection state before operating the flash and give a prompt to show it has been locked if the write-protection has enbale Signed-off-by: chao zeng <chao.zeng(a)siemens.com> --- Changes for V2: - Return 0 not ENOPROTOOPT to refelect the flash feature - Output prompt information --- drivers/mtd/spi/sf_probe.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c index f461082e03..995801817d 100644 --- a/drivers/mtd/spi/sf_probe.c +++ b/drivers/mtd/spi/sf_probe.c @@ -109,6 +109,11 @@ static int spi_flash_std_write(struct udevice *dev, u32 offset, size_t len, struct mtd_info *mtd = &flash->mtd; size_t retlen; + if (flash->flash_is_locked && flash->flash_is_locked(flash, offset, len)) { + printf("SF: Flash is locked\n"); + return 0; + } + return mtd->_write(mtd, offset, len, &retlen, buf); } @@ -127,6 +132,11 @@ static int spi_flash_std_erase(struct udevice *dev, u32 offset, size_t len) instr.addr = offset; instr.len = len; + if (flash->flash_is_locked && flash->flash_is_locked(flash, offset, len)) { + printf("SF: Flash is locked\n"); + return 0; + } + return mtd->_erase(mtd, &instr); } -- 2.33.1

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U-Boot CPU clock slower than it is in OS?
by Kyle Woolsey 16 Nov '21

16 Nov '21

I’m doing some development on an AM335x ARM CPU and want to run applications in the U-Boot command prompt. My problem: the code is much slower in U-Boot than it is in Linux. I was wondering if U-Boot is able to set clock settings and if there's a way that I can tweak them to improve performance of programs that run from the U-Boot command prompt. Kyle

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[GIT PULL] xilinx patches for v2022.01-rc3
by Michal Simek 16 Nov '21

16 Nov '21

Hi Tom, Please pull these changes to your tree. CI loop doesn't show any issue with these patches. Thanks, Michal The following changes since commit fb1018106a7bbb1a0d723029f6760b1b1b4d306d: Merge branch '2021-10-19-assorted-changes' (2021-10-19 20:45:12 -0400) are available in the Git repository at: git@source.denx.de:u-boot/custodians/u-boot-microblaze.git tags/xilinx-for-v2022.01-rc3 for you to fetch changes up to 11c0255cd8a7177e2b714040efcfd51844cb5d8e: xilinx: zynqmp: fix ZYNQMP_RESTORE_JTAG check (2021-11-15 15:59:33 +0100) ---------------------------------------------------------------- Xilinx changes for v2022.01-rc3 sdhci: - Fix emmc mini case with missing firmware interface zynqmp: - Restore JTAG interface if required - Allow overriding board name - Add support for DLC21 - Fix one fallthrought statement description - Use config macro instead of name duplication - Save multiboot to variable firmware: - Handle ipi_req errors better - Use local buffer in case user doesn't need it instead of NULL/0 location spi: - gqsi: Fix write issue at low frequencies net: - gem: Disable broadcasts ---------------------------------------------------------------- Ashok Reddy Soma (1): spi: zynqmp_gqspi: Fix write issue at low frequencies Jorge Ramirez-Ortiz (1): zynqmp: restore the jtag interface Liam Beguin (1): arm64: zynqmp: allow overriding board name Michal Simek (9): arm64: zynqmp: Add support for DLC21 (Smartlynq+) board arm64: zynqmp: Fix sgmii clock input freq for p-a2197 net: gem: Disable broadcast setting firmware: zynqmp: Handle errors from ipi_req properly firmware: zynqmp: fix write to an uninitialised pointer in ipi_req() xilinx: zynqmp: Handle fallthrough statement properly xilinx: zynqmp: Use CONFIG_SPL_FS_LOAD_PAYLOAD_NAME xilinx: zynqmp: Save multiboot as variable arm64: zynqmp: Replace comma by semicolon Ricardo Salveti (1): xilinx: zynqmp: fix ZYNQMP_RESTORE_JTAG check T Karthik Reddy (1): mmc: zynq_sdhci: Add xilinx_pm_request weak function arch/arm/dts/Makefile | 1 + arch/arm/dts/zynqmp-dlc21-revA.dts | 221 ++++++++++++++++++++++ arch/arm/dts/zynqmp-p-a2197-00-revA.dts | 2 +- arch/arm/mach-zynqmp/Kconfig | 9 + arch/arm/mach-zynqmp/include/mach/hardware.h | 31 +++- board/xilinx/zynqmp/zynqmp-dlc21-revA/psu_init_gpl.c | 922 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ board/xilinx/zynqmp/zynqmp.c | 48 ++++- configs/xilinx_zynqmp_virt_defconfig | 2 +- drivers/firmware/firmware-zynqmp.c | 10 +- drivers/mmc/zynq_sdhci.c | 6 + drivers/net/zynq_gem.c | 2 + drivers/spi/zynqmp_gqspi.c | 11 +- 12 files changed, 1243 insertions(+), 22 deletions(-) create mode 100644 arch/arm/dts/zynqmp-dlc21-revA.dts create mode 100644 board/xilinx/zynqmp/zynqmp-dlc21-revA/psu_init_gpl.c

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[PATCH v1 1/1] usb: doc: Fix spelling issues in README.usb
by Andy Shevchenko 16 Nov '21

16 Nov '21

Fix spelling issues in README.usb. Signed-off-by: Andy Shevchenko <andriy.shevchenko(a)linux.intel.com> --- doc/README.usb | 23 +++++++++++------------ 1 file changed, 11 insertions(+), 12 deletions(-) diff --git a/doc/README.usb b/doc/README.usb index 05c62c3413c5..650a6daae0a5 100644 --- a/doc/README.usb +++ b/doc/README.usb @@ -18,8 +18,8 @@ How it works: ------------- The USB (at least the USB UHCI) needs a frame list (4k), transfer -descripor and queue headers which are all located in the main memory. -The UHCI allocates every milisecond the PCI bus and reads the current +descriptor and queue headers which are all located in the main memory. +The UHCI allocates every millisecond the PCI bus and reads the current frame pointer. This may cause to crash the OS during boot. So the USB _MUST_ be stopped during OS boot. This is the reason, why the USB is NOT automatically started during start-up. If someone needs the USB @@ -27,10 +27,10 @@ he has to start it and should therefore be aware that he had to stop it before booting the OS. For USB keyboards this can be done by a script which is automatically -started after the U-Boot is up and running. To boot an OS with a an +started after the U-Boot is up and running. To boot an OS with a USB keyboard another script is necessary, which first disables the USB and then executes the boot command. If the boot command fails, -the script can reenable the USB kbd. +the script can re-enable the USB keyboard. Common USB Commands: - usb start: @@ -40,10 +40,10 @@ Common USB Commands: - usb info [dev]: shows all USB infos of the device dev, or of all the devices - usb stop [f]: stops the USB. If f==1 the USB will also stop if - an USB keyboard is assigned as stdin. The stdin + a USB keyboard is assigned as stdin. The stdin is then switched to serial input. Storage USB Commands: -- usb scan: scans the USB for storage devices.The USB must be +- usb scan: scans the USB for storage devices. The USB must be running for this command (usb start) - usb device [dev]: show or set current USB storage device - usb part [dev]: print partition table of one or all USB storage @@ -57,7 +57,7 @@ Storage USB Commands: Config Switches: ---------------- CONFIG_CMD_USB enables basic USB support and the usb command -CONFIG_USB_UHCI defines the lowlevel part.A lowlevel part must be defined +CONFIG_USB_UHCI defines the lowlevel part. A lowlevel part must be defined if using CONFIG_CMD_USB CONFIG_USB_KEYBOARD enables the USB Keyboard CONFIG_USB_STORAGE enables the USB storage devices @@ -124,7 +124,7 @@ bootp To enable USB Host Ethernet in U-Boot, your platform must of course support USB with CONFIG_CMD_USB enabled and working. You will need to -add some config settings to your board config: +add some settings to your board configuration: CONFIG_CMD_USB=y /* the 'usb' interactive command */ CONFIG_USB_HOST_ETHER=y /* Enable USB Ethernet adapters */ @@ -158,7 +158,7 @@ settings should start you off: You can also set the default IP address of your board and the server as well as the default file to load when a 'bootp' command is issued. However note that encoding these individual network settings into a -common exectuable is discouraged, as it leads to potential conflicts, +common executable is discouraged, as it leads to potential conflicts, and all the parameters can either get stored in the board's external environment, or get obtained from the bootp server if not set. @@ -166,7 +166,6 @@ environment, or get obtained from the bootp server if not set. #define CONFIG_SERVERIP 10.0.0.1 (replace with your value) #define CONFIG_BOOTFILE "uImage" - The 'usb start' command should identify the adapter something like this: CrOS> usb start @@ -211,8 +210,8 @@ MAC Addresses Most Ethernet dongles have a built-in MAC address which is unique in the world. This is important so that devices on the network can be -distinguised from each other. MAC address conflicts are evil and -generally result in strange and eratic behaviour. +distinguished from each other. MAC address conflicts are evil and +generally result in strange and erratic behaviour. Some boards have USB Ethernet chips on-board, and these sometimes do not have an assigned MAC address. In this case it is up to you to assign -- 2.33.0

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[PATCH] arm: Fix bad memcpy.S str8w macro argument count
by Pierre-Clément Tosi 16 Nov '21

16 Nov '21

Remove the extra (empty) argument passed to str8w, causing the following error: <instantiation>:40:47: error: too many positional arguments str8w r0, r3, r4, r5, r6, r7, r8, r9, ip, , abort=19f ^ u-boot/arch/arm/lib/memcpy.S:240:5: note: while in macro instantiation 17: forward_copy_shift pull=16 push=16 ^ Note: no functional change intended. Fixes: d8834a1323af ("arm: Use optimized memcpy and memset from linux") Signed-off-by: Pierre-Clément Tosi <ptosi(a)google.com> --- arch/arm/lib/memcpy.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/lib/memcpy.S b/arch/arm/lib/memcpy.S index f7fb77235c..eee7a219ce 100644 --- a/arch/arm/lib/memcpy.S +++ b/arch/arm/lib/memcpy.S @@ -210,7 +210,7 @@ ENTRY(memcpy) orr r9, r9, ip, lspush #\push mov ip, ip, lspull #\pull orr ip, ip, lr, lspush #\push - str8w r0, r3, r4, r5, r6, r7, r8, r9, ip, , abort=19f + str8w r0, r3, r4, r5, r6, r7, r8, r9, ip, abort=19f bge 12b PLD( cmn r2, #96 ) PLD( bge 13b ) -- 2.34.0.rc0.344.g81b53c2807-goog

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