October 2021 - U-Boot

[PATCH] sunxi: h3: enable clock support for r_pio gpios
by Manuel Dipolt 05 Oct '21

05 Oct '21

This patch enables clock for the r_pio gpios for the h3 Signed-off-by: Manuel Dipolt <manuel.dipolt(a)robart.cc> --- drivers/clk/sunxi/Makefile | 1 + drivers/clk/sunxi/clk_h3-r.c | 51 ++++++++++++++++++++++++++++++++++++ drivers/gpio/sunxi_gpio.c | 9 +++++++ 3 files changed, 61 insertions(+) create mode 100644 drivers/clk/sunxi/clk_h3-r.c diff --git a/drivers/clk/sunxi/Makefile b/drivers/clk/sunxi/Makefile index 36fb2aeb56..e93fe3c2f3 100644 --- a/drivers/clk/sunxi/Makefile +++ b/drivers/clk/sunxi/Makefile @@ -15,5 +15,6 @@ obj-$(CONFIG_CLK_SUN8I_R40) += clk_r40.o obj-$(CONFIG_CLK_SUN8I_V3S) += clk_v3s.o obj-$(CONFIG_CLK_SUN9I_A80) += clk_a80.o obj-$(CONFIG_CLK_SUN8I_H3) += clk_h3.o +obj-$(CONFIG_CLK_SUN8I_H3) += clk_h3-r.o obj-$(CONFIG_CLK_SUN50I_H6) += clk_h6.o obj-$(CONFIG_CLK_SUN50I_A64) += clk_a64.o diff --git a/drivers/clk/sunxi/clk_h3-r.c b/drivers/clk/sunxi/clk_h3-r.c new file mode 100644 index 0000000000..a314e37b87 --- /dev/null +++ b/drivers/clk/sunxi/clk_h3-r.c @@ -0,0 +1,51 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (C) 2021 RobArt GmbH + * Author: Manuel Dipolt <manuel.dipolt(a)robart.cc> + */ + +#include <common.h> +#include <clk-uclass.h> +#include <dm.h> +#include <errno.h> +#include <asm/arch/ccu.h> +#include <dt-bindings/clock/sun8i-r-ccu.h> +#include <dt-bindings/reset/sun8i-r-ccu.h> + +static struct ccu_clk_gate h3_r_gates[] = { + [CLK_APB0_PIO] = GATE(0x28, BIT(0)), +}; + +static struct ccu_reset h3_r_resets[] = { + [RST_APB0_IR] = RESET(0x0b0, BIT(2)), + [RST_APB0_TIMER] = RESET(0x0b0, BIT(3)), + [RST_APB0_UART] = RESET(0x0b0, BIT(4)), + [RST_APB0_I2C] = RESET(0x0b0, BIT(6)), +}; + +static const struct ccu_desc h3_r_ccu_desc = { + .gates = h3_r_gates, + .resets = h3_r_resets, +}; + +static int h3_r_clk_bind(struct udevice *dev) +{ + return sunxi_reset_bind(dev, ARRAY_SIZE(h3_r_resets)); +} + +static const struct udevice_id h3_r_ccu_ids[] = { + { .compatible = "allwinner,sun8i-h3-r-ccu", + .data = (ulong)&h3_r_ccu_desc }, + { } +}; + +U_BOOT_DRIVER(clk_sun8i_h3_r) = { + .name = "sun8i_h3-r_ccu", + .id = UCLASS_CLK, + .of_match = h3_r_ccu_ids, + .priv_auto_alloc_size = sizeof(struct ccu_priv), + .ops = &sunxi_clk_ops, + .probe = sunxi_clk_probe, + .bind = h3_r_clk_bind, +}; + diff --git a/drivers/gpio/sunxi_gpio.c b/drivers/gpio/sunxi_gpio.c index cbed8d42b7..b505be4065 100644 --- a/drivers/gpio/sunxi_gpio.c +++ b/drivers/gpio/sunxi_gpio.c @@ -14,6 +14,7 @@ #include <errno.h> #include <fdtdec.h> #include <malloc.h> +#include <clk.h> #include <asm/arch/gpio.h> #include <asm/io.h> #include <asm/gpio.h> @@ -262,6 +263,14 @@ static int gpio_sunxi_probe(struct udevice *dev) { struct sunxi_gpio_platdata *plat = dev_get_platdata(dev); struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); + struct clk gate_clk; + int ret; + + ret = clk_get_by_name(dev, "apb", &gate_clk); + + if (!ret) + clk_enable(&gate_clk); + /* Tell the uclass how many GPIOs we have */ if (plat) { -- 2.20.1

2 1

[PATCH 1/2] docs: dt: Fix a few grammar nits in the binding/schema docs
by Simon Glass 04 Oct '21

04 Oct '21

Add missing hyphens and reword one sentence for clarity. Signed-off-by: Simon Glass <sjg(a)chromium.org> --- .../devicetree/bindings/example-schema.yaml | 14 ++++----- .../devicetree/bindings/writing-bindings.rst | 2 +- .../devicetree/bindings/writing-schema.rst | 29 ++++++++++--------- 3 files changed, 23 insertions(+), 22 deletions(-) diff --git a/Documentation/devicetree/bindings/example-schema.yaml b/Documentation/devicetree/bindings/example-schema.yaml index ff6ec65145cf13..c078796ae1b556 100644 --- a/Documentation/devicetree/bindings/example-schema.yaml +++ b/Documentation/devicetree/bindings/example-schema.yaml @@ -119,7 +119,7 @@ properties: # valid for this binding. clock-frequency: - # The type is set in the core schema. Per device schema only need to set + # The type is set in the core schema. Per-device schema only need to set # constraints on the possible values. minimum: 100 maximum: 400000 @@ -133,24 +133,24 @@ properties: # *-supply is always a single phandle, so nothing more to define. foo-supply: true - # Vendor specific properties + # Vendor-specific properties # - # Vendor specific properties have slightly different schema requirements than + # Vendor-specific properties have slightly different schema requirements than # common properties. They must have at least a type definition and # 'description'. vendor,int-property: - description: Vendor specific properties must have a description + description: Vendor-specific properties must have a description $ref: /schemas/types.yaml#/definitions/uint32 enum: [2, 4, 6, 8, 10] vendor,bool-property: - description: Vendor specific properties must have a description. Boolean + description: Vendor-specific properties must have a description. Boolean properties are one case where the json-schema 'type' keyword can be used directly. type: boolean vendor,string-array-property: - description: Vendor specific properties should reference a type in the + description: Vendor-specific properties should reference a type in the core schema. $ref: /schemas/types.yaml#/definitions/string-array items: @@ -158,7 +158,7 @@ properties: - enum: [baz, boo] vendor,property-in-standard-units-microvolt: - description: Vendor specific properties having a standard unit suffix + description: Vendor-specific properties having a standard unit suffix don't need a type. enum: [ 100, 200, 300 ] diff --git a/Documentation/devicetree/bindings/writing-bindings.rst b/Documentation/devicetree/bindings/writing-bindings.rst index f7dfb98c156ee5..18d9e0689d4993 100644 --- a/Documentation/devicetree/bindings/writing-bindings.rst +++ b/Documentation/devicetree/bindings/writing-bindings.rst @@ -44,7 +44,7 @@ Properties of prior implementations. DO add new compatibles in case there are new features or bugs. -- DO use a vendor prefix on device specific property names. Consider if +- DO use a vendor prefix on device-specific property names. Consider if properties could be common among devices of the same class. Check other existing bindings for similar devices. diff --git a/Documentation/devicetree/bindings/writing-schema.rst b/Documentation/devicetree/bindings/writing-schema.rst index 23d6579aea2c26..ea21c72aeb37a6 100644 --- a/Documentation/devicetree/bindings/writing-schema.rst +++ b/Documentation/devicetree/bindings/writing-schema.rst @@ -4,7 +4,7 @@ Writing Devicetree Bindings in json-schema ========================================== Devicetree bindings are written using json-schema vocabulary. Schema files are -written in a JSON compatible subset of YAML. YAML is used instead of JSON as it +written in a JSON-compatible subset of YAML. YAML is used instead of JSON as it is considered more human readable and has some advantages such as allowing comments (Prefixed with '#'). @@ -22,16 +22,16 @@ $id URI typically containing the binding's filename and path. For DT schema, it must begin with "http://devicetree.org/schemas/". The URL is used in constructing references to other files specified in schema "$ref" properties. A $ref value - with a leading '/' will have the hostname prepended. A $ref value a relative - path or filename only will be prepended with the hostname and path components - of the current schema file's '$id' value. A URL is used even for local files, - but there may not actually be files present at those locations. + with a leading '/' will have the hostname prepended. A $ref value with only a + relative path or filename will be prepended with the hostname and path + components of the current schema file's '$id' value. A URL is used even for + local files, but there may not actually be files present at those locations. $schema Indicates the meta-schema the schema file adheres to. title - A one line description on the contents of the binding schema. + A one-line description on the contents of the binding schema. maintainers A DT specific property. Contains a list of email address(es) @@ -45,8 +45,8 @@ description select Optional. A json-schema used to match nodes for applying the - schema. By default without 'select', nodes are matched against their possible - compatible string values or node name. Most bindings should not need select. + schema. By default, without 'select', nodes are matched against their possible + compatible-string values or node name. Most bindings should not need select. allOf Optional. A list of other schemas to include. This is used to @@ -56,7 +56,8 @@ allOf properties A set of sub-schema defining all the DT properties for the binding. The exact schema syntax depends on whether properties are known, - common properties (e.g. 'interrupts') or are binding/vendor specific properties. + common properties (e.g. 'interrupts') or are binding/vendor-specific + properties. A property can also define a child DT node with child properties defined under it. @@ -81,23 +82,23 @@ Property Schema The 'properties' section of the schema contains all the DT properties for a binding. Each property contains a set of constraints using json-schema -vocabulary for that property. The properties schemas are what is used for +vocabulary for that property. The properties schemas are what are used for validation of DT files. -For common properties, only additional constraints not covered by the common +For common properties, only additional constraints not covered by the common, binding schema need to be defined such as how many values are valid or what possible values are valid. -Vendor specific properties will typically need more detailed schema. With the +Vendor-specific properties will typically need more detailed schema. With the exception of boolean properties, they should have a reference to a type in schemas/types.yaml. A "description" property is always required. -The Devicetree schemas don't exactly match the YAML encoded DT data produced by +The Devicetree schemas don't exactly match the YAML-encoded DT data produced by dtc. They are simplified to make them more compact and avoid a bunch of boilerplate. The tools process the schema files to produce the final schema for validation. There are currently 2 transformations the tools perform. -The default for arrays in json-schema is they are variable sized and allow more +The default for arrays in json-schema is they are variable-sized and allow more entries than explicitly defined. This can be restricted by defining 'minItems', 'maxItems', and 'additionalItems'. However, for DeviceTree Schemas, a fixed size is desired in most cases, so these properties are added based on the -- 2.33.0.800.g4c38ced690-goog

3 2

[PATCH v8 0/5] Add SIMATIC IOT2050 board support
by Jan Kiszka 04 Oct '21

04 Oct '21

This is the baseline support for the SIMATIC IOT2050 devices. Changes in v8: - rebased - added support for product generation 2 board - align device trees with upstream [pending] kernel version - only warn on missing watchdog firmware binary - removed bits only needed for incomplete prueth support Changes in v7: - rebased - registered board doc with index Changes in v6: - rebased - converted board README to docs/board/siemens/iot2050.rst Changes in v5: - rebased - use DEFAULT_LINUX_BOOT_ENV from ti_armv7_common.h, rather than home-grown values - avoids misaligned kernel load address - no longer exposes issue around LMB reservations Changes in v4: - rebased - make rtd-wdt firmware a "loadable" inside U-Boot proper fit image, avoiding controversial embedding as object - improved mmc1 removal from boot_targets - fixed various build issues Changes in v3: - rebased - addressed several checkpatch warnings - a few #ifdef -> IS_ENABLED conversions - comment marker for SPDK identifier in .S file - trailing whitespaces - factored out rti_wdt_load_fw (less #ifdef) Changes in v2: - rebased - sync with upstream-accepted DT - add boot switch - include watchdog support Allows to boot mainline kernels and the BSP-derived kernel we currently ship as reference. Note that this baseline support lacks Ethernet drivers. We are working closely with TI to ensure that the to-be-upstreamed icssg-prueth driver will work both with new SR2.0 AM65x silicon as well as with SR1.0 which is used in the currently shipped IOT2050 devices. A staging tree for complete IOT2050 support can be found at [1]. Full image integration is available via [2]. Jan [1] https://github.com/siemens/u-boot/commits/jan/iot2050 [2] https://github.com/siemens/meta-iot2050 Jan Kiszka (5): arm: dts: Add IOT2050 device tree files board: siemens: Add support for SIMATIC IOT2050 devices arm64: dts: ti: k3-am65-mcu: Add RTI watchdog entry watchdog: rti_wdt: Add support for loading firmware iot2050: Enable watchdog support, but do not auto-start it arch/arm/dts/Makefile | 9 +- arch/arm/dts/k3-am65-iot2050-boot-image.dtsi | 173 +++++ arch/arm/dts/k3-am65-iot2050-common-pg1.dtsi | 46 ++ arch/arm/dts/k3-am65-iot2050-common-pg2.dtsi | 51 ++ .../dts/k3-am65-iot2050-common-u-boot.dtsi | 99 +++ arch/arm/dts/k3-am65-iot2050-common.dtsi | 733 ++++++++++++++++++ arch/arm/dts/k3-am65-iot2050-spl.dts | 17 + arch/arm/dts/k3-am65-mcu.dtsi | 9 + .../dts/k3-am6528-iot2050-basic-common.dtsi | 63 ++ arch/arm/dts/k3-am6528-iot2050-basic-pg2.dts | 24 + arch/arm/dts/k3-am6528-iot2050-basic.dts | 24 + .../k3-am6548-iot2050-advanced-common.dtsi | 59 ++ .../dts/k3-am6548-iot2050-advanced-pg2.dts | 29 + arch/arm/dts/k3-am6548-iot2050-advanced.dts | 24 + arch/arm/mach-k3/Kconfig | 1 + board/siemens/iot2050/Kconfig | 32 + board/siemens/iot2050/MAINTAINERS | 9 + board/siemens/iot2050/Makefile | 10 + board/siemens/iot2050/board.c | 272 +++++++ board/siemens/iot2050/config.mk | 8 + configs/iot2050_defconfig | 136 ++++ doc/board/index.rst | 1 + doc/board/siemens/index.rst | 9 + doc/board/siemens/iot2050.rst | 78 ++ drivers/watchdog/Kconfig | 20 + drivers/watchdog/rti_wdt.c | 88 +++ include/configs/iot2050.h | 62 ++ tools/binman/missing-blob-help | 5 + 28 files changed, 2090 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/k3-am65-iot2050-boot-image.dtsi create mode 100644 arch/arm/dts/k3-am65-iot2050-common-pg1.dtsi create mode 100644 arch/arm/dts/k3-am65-iot2050-common-pg2.dtsi create mode 100644 arch/arm/dts/k3-am65-iot2050-common-u-boot.dtsi create mode 100644 arch/arm/dts/k3-am65-iot2050-common.dtsi create mode 100644 arch/arm/dts/k3-am65-iot2050-spl.dts create mode 100644 arch/arm/dts/k3-am6528-iot2050-basic-common.dtsi create mode 100644 arch/arm/dts/k3-am6528-iot2050-basic-pg2.dts create mode 100644 arch/arm/dts/k3-am6528-iot2050-basic.dts create mode 100644 arch/arm/dts/k3-am6548-iot2050-advanced-common.dtsi create mode 100644 arch/arm/dts/k3-am6548-iot2050-advanced-pg2.dts create mode 100644 arch/arm/dts/k3-am6548-iot2050-advanced.dts create mode 100644 board/siemens/iot2050/Kconfig create mode 100644 board/siemens/iot2050/MAINTAINERS create mode 100644 board/siemens/iot2050/Makefile create mode 100644 board/siemens/iot2050/board.c create mode 100644 board/siemens/iot2050/config.mk create mode 100644 configs/iot2050_defconfig create mode 100644 doc/board/siemens/index.rst create mode 100644 doc/board/siemens/iot2050.rst create mode 100644 include/configs/iot2050.h -- 2.31.1

2 14

[PATCH] mmc: zynq_sdhci: Add xilinx_pm_request weak function
by T Karthik Reddy 04 Oct '21

04 Oct '21

Mini emmc does not use any pmufw and ZYNQMP_FIRMWARE is disabled. xilinx_pm_request() will not be compiled and causes undefined reference to `xilinx_pm_request' error. So add a weak function in zynq_sdhci.c file. Signed-off-by: T Karthik Reddy <t.karthik.reddy(a)xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma(a)xilinx.com> --- drivers/mmc/zynq_sdhci.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c index c94825dceb..5cea4c695e 100644 --- a/drivers/mmc/zynq_sdhci.c +++ b/drivers/mmc/zynq_sdhci.c @@ -69,6 +69,12 @@ __weak int zynqmp_mmio_write(const u32 address, const u32 mask, const u32 value) return 0; } +__weak int xilinx_pm_request(u32 api_id, u32 arg0, u32 arg1, u32 arg2, + u32 arg3, u32 *ret_payload) +{ + return 0; +} + #if defined(CONFIG_ARCH_ZYNQMP) || defined(CONFIG_ARCH_VERSAL) /* Default settings for ZynqMP Clock Phases */ static const u32 zynqmp_iclk_phases[] = {0, 63, 63, 0, 63, 0, -- 2.17.1

2 1

[PATCH] mtd: cqspi: Fix division by zero
by Marek Vasut 04 Oct '21

04 Oct '21

Both dummy.nbytes and dummy.buswidth may be zero. By not checking the later, it is possible to trigger division by zero and a crash. This does happen with tiny SPI NOR framework in SPL. Fix this by adding the check and returning zero dummy bytes in such a case. Fixes: 38b0852b0ea ("spi: cadence-qspi: Add support for octal DTR flashes") Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Jagan Teki <jagan(a)amarulasolutions.com> Cc: Vignesh R <vigneshr(a)ti.com> Cc: Pratyush Yadav <p.yadav(a)ti.com> --- drivers/spi/cadence_qspi_apb.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c index c36a652211a..429ee335db6 100644 --- a/drivers/spi/cadence_qspi_apb.c +++ b/drivers/spi/cadence_qspi_apb.c @@ -219,6 +219,9 @@ static unsigned int cadence_qspi_calc_dummy(const struct spi_mem_op *op, { unsigned int dummy_clk; + if (!op->dummy.nbytes || !op->dummy.buswidth) + return 0; + dummy_clk = op->dummy.nbytes * (8 / op->dummy.buswidth); if (dtr) dummy_clk /= 2; -- 2.33.0

3 3

[PATCH] cmd: sf: Support unaligned flash updates with 'sf update'
by Frieder Schrempf 04 Oct '21

04 Oct '21

From: Frieder Schrempf <frieder.schrempf(a)kontron.de> Currently 'sf update' supports only offsets that are aligned to the erase block size of the serial flash. Unaligned offsets result in something like: => sf update ${kernel_addr_r} 0x400 ${filesize} device 0 offset 0x400, size 0x11f758 SPI flash failed in erase step In order to support unaligned updates, we simply read the first full block and check only the requested part of the block for changes. If necessary, the block is erased, the first (unchanged) part of the block is written back together with the second part of the block (updated data). Signed-off-by: Frieder Schrempf <frieder.schrempf(a)kontron.de> --- cmd/sf.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/cmd/sf.c b/cmd/sf.c index eac27ed2d7..c54b4b10bb 100644 --- a/cmd/sf.c +++ b/cmd/sf.c @@ -171,30 +171,32 @@ static int do_spi_flash_probe(int argc, char *const argv[]) static const char *spi_flash_update_block(struct spi_flash *flash, u32 offset, size_t len, const char *buf, char *cmp_buf, size_t *skipped) { + u32 offset_aligned = ALIGN_DOWN(offset, flash->sector_size); + u32 sector_offset = offset - offset_aligned; char *ptr = (char *)buf; debug("offset=%#x, sector_size=%#x, len=%#zx\n", offset, flash->sector_size, len); /* Read the entire sector so to allow for rewriting */ - if (spi_flash_read(flash, offset, flash->sector_size, cmp_buf)) + if (spi_flash_read(flash, offset_aligned, flash->sector_size, cmp_buf)) return "read"; /* Compare only what is meaningful (len) */ - if (memcmp(cmp_buf, buf, len) == 0) { + if (memcmp(cmp_buf + sector_offset, buf, len) == 0) { debug("Skip region %x size %zx: no change\n", offset, len); *skipped += len; return NULL; } /* Erase the entire sector */ - if (spi_flash_erase(flash, offset, flash->sector_size)) + if (spi_flash_erase(flash, offset_aligned, flash->sector_size)) return "erase"; /* If it's a partial sector, copy the data into the temp-buffer */ if (len != flash->sector_size) { - memcpy(cmp_buf, buf, len); + memcpy(cmp_buf + sector_offset, buf, len); ptr = cmp_buf; } /* Write one complete sector */ - if (spi_flash_write(flash, offset, flash->sector_size, ptr)) + if (spi_flash_write(flash, offset_aligned, flash->sector_size, ptr)) return "write"; return NULL; @@ -230,7 +232,10 @@ static int spi_flash_update(struct spi_flash *flash, u32 offset, ulong last_update = get_timer(0); for (; buf < end && !err_oper; buf += todo, offset += todo) { - todo = min_t(size_t, end - buf, flash->sector_size); + if (offset % flash->sector_size) + todo = flash->sector_size - (offset % flash->sector_size); + else + todo = min_t(size_t, end - buf, flash->sector_size); if (get_timer(last_update) > 100) { printf(" \rUpdating, %zu%% %lu B/s", 100 - (end - buf) / scale, -- 2.33.0

4 8

[PATCH v2 0/4] Add reset support to HiFive Unmatched
by Alexandre Ghiti 04 Oct '21

04 Oct '21

As there is no GPIO to reset the HiFive Unmatched board, we must directly ask the da9063 PMIC for a reset: this small patchset adds the corresponding sysreset driver and enables it for this board. As the probing of this new device depends on a device-tree node, this series also adds the device tree bindings documentation for the da9063 device. Changes in v2: - Add device tree probing as suggested by Heinrich - Rebased onto master Alexandre Ghiti (4): dt-bindings: power: Add da9063 PMIC device bindings dt-bindings: power: Add new da9063 sysreset subdevice bindings drivers: pmic: Add sysreset driver for da9063 PMIC riscv: Enable da9063 sysreset driver on HiFive Unmatched arch/riscv/dts/hifive-unmatched-a00.dts | 4 ++ configs/sifive_unmatched_defconfig | 2 + doc/device-tree-bindings/power/da9063.txt | 68 +++++++++++++++++++++++ drivers/power/pmic/da9063.c | 51 ++++++++++++++++- include/power/da9063_pmic.h | 1 + 5 files changed, 125 insertions(+), 1 deletion(-) create mode 100644 doc/device-tree-bindings/power/da9063.txt -- 2.30.2

1 5

[PATCH] nvme: invalidate correct memory range after read
by Stefan Agner 04 Oct '21

04 Oct '21

The current code invalidates the range after the read buffer since the buffer pointer gets incremented in the read loop. Use a temporary pointer to make sure we have a pristine pointer to invalidate the correct memory range after read. Fixes: 704e040a51d2 ("nvme: Apply cache operations on the DMA buffers") Signed-off-by: Stefan Agner <stefan(a)agner.ch> --- drivers/nvme/nvme.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c index f6465ea7f4..354513ad30 100644 --- a/drivers/nvme/nvme.c +++ b/drivers/nvme/nvme.c @@ -743,6 +743,7 @@ static ulong nvme_blk_rw(struct udevice *udev, lbaint_t blknr, u64 prp2; u64 total_len = blkcnt << desc->log2blksz; u64 temp_len = total_len; + void *temp_buffer = buffer; u64 slba = blknr; u16 lbas = 1 << (dev->max_transfer_shift - ns->lba_shift); @@ -770,19 +771,19 @@ static ulong nvme_blk_rw(struct udevice *udev, lbaint_t blknr, } if (nvme_setup_prps(dev, &prp2, - lbas << ns->lba_shift, (ulong)buffer)) + lbas << ns->lba_shift, (ulong)temp_buffer)) return -EIO; c.rw.slba = cpu_to_le64(slba); slba += lbas; c.rw.length = cpu_to_le16(lbas - 1); - c.rw.prp1 = cpu_to_le64((ulong)buffer); + c.rw.prp1 = cpu_to_le64((ulong)temp_buffer); c.rw.prp2 = cpu_to_le64(prp2); status = nvme_submit_sync_cmd(dev->queues[NVME_IO_Q], &c, NULL, IO_TIMEOUT); if (status) break; temp_len -= (u32)lbas << ns->lba_shift; - buffer += lbas << ns->lba_shift; + temp_buffer += lbas << ns->lba_shift; } if (read) -- 2.33.0

2 2

[PATCH 0/3] efi_selftest: Update SIMPLE_NETWORK_PROTOCOL selftest
by Masami Hiramatsu 04 Oct '21

04 Oct '21

Hello Heinrich, Here is a series of patches to update the SIMPLE_NETWORK_PROTOCOL according to the explanation in the previous thread [1]. [1] https://lists.denx.de/pipermail/u-boot/2021-September/460711.html So basically this seires modifies the SNP testcase as I said in the previous mail [1]. ---- net->get_status(); if (!net->mode.MediaPresent) { error(no link up!) return; } submit_dhcp_discover() for (;;) { wait_for_event(net) while (net->receive() != EFI_NOT_READY) { // check dhcp reply } } ---- I removed EFI_SIMPLE_NETWORK_RECEIVE_INTERRUPT check because that is just expectation what the received packet avaiability is meaning that the EFI_SIMPLE_NETWORK_RECEIVE_INTERRUPT flag bit is set. Of course U-Boot EFI SNP implementation does it, but that is not ensured in the UEFI spec. The spec said that the get_status() should update the MediaPresent flag (which means the network link up or down). So I added the get_status() test case before starting the network test so that it can test the link status. BTW, actually the mode->media_present is not supported yet. Is there any way to get the network link status? Thank you, --- Masami Hiramatsu (3): efi_selftest: Use EFI_SIMPLE_NETWORK_PROTOCOL::GetStatus() for media check efi_selftest: Do not check EFI_SIMPLE_NETWORK_RECEIVE_INTERRUPT efi_selftest: Recieve the packets until the receive buffer is empty lib/efi_selftest/efi_selftest_snp.c | 90 +++++++++++++++++++---------------- 1 file changed, 49 insertions(+), 41 deletions(-) -- Masami Hiramatsu <masami.hiramatsu(a)linaro.org>

2 10

[PATCH next v4 00/11] aspeed: Support secure boot chain with FIT image verification
by Chia-Wei Wang 04 Oct '21

04 Oct '21

This patch series intends to provide a secure boot chain from SPL to Linux kernel based on the hash and signature verification of FIT image paradigm. To improve the performance and save code size (SPL is limited to 64KB due to HW-RoT), the drviers of two HW crypto engine HACE and ACRY are also added for AST26xx SoCs. As HACE and ACRY can only access to DRAM space, additional configuration and boot command are also updated according to move each FIT image before its booting. In addition, the common code of FIT image hash algorithm lookup is also revised to leverage the HW accelerated calculation. v4: - add new DM_HASH based driver for Aspeed HACE - remove SPL board init, which was originally used to probe non-DM HACE driver - fix typo of ARCY to ACRY - refactor defconfig based on the new Kconfig of U-Boot next branch v3: - add SW work around for HACE HW DMA issue by resetting HACE - add reset control for HACE device tree node - sync all of the HACE error message to use debug() v2: - update commit authors Chia-Wei Wang (8): aspeed: ast2600: Enlarge SRAM size clk: ast2600: Add RSACLK control for ACRY crypto: aspeed: Add AST2600 ACRY support ARM: dts: ast2600: Add ACRY to device tree ast2600: spl: Locate load buffer in DRAM space configs: ast2600-evb: Enable SPL FIT support configs: aspeed: Make EXTRA_ENV_SETTINGS board specific configs: ast2600: Boot kernel FIT in DRAM Joel Stanley (2): clk: ast2600: Add YCLK control for HACE ARM: dts: ast2600: Add HACE to device tree Johnny Huang (1): crypto: aspeed: Add AST2600 HACE support arch/arm/dts/ast2600-evb.dts | 10 + arch/arm/dts/ast2600.dtsi | 17 + arch/arm/include/asm/arch-aspeed/platform.h | 2 +- .../arm/include/asm/arch-aspeed/scu_ast2600.h | 6 +- arch/arm/mach-aspeed/ast2600/spl.c | 9 +- configs/evb-ast2600_defconfig | 22 +- drivers/clk/aspeed/clk_ast2600.c | 38 ++ drivers/crypto/Kconfig | 2 + drivers/crypto/Makefile | 1 + drivers/crypto/aspeed/Kconfig | 20 + drivers/crypto/aspeed/Makefile | 2 + drivers/crypto/aspeed/aspeed_acry.c | 182 +++++++++ drivers/crypto/aspeed/aspeed_hace.c | 381 ++++++++++++++++++ drivers/crypto/hash/Kconfig | 8 + include/configs/aspeed-common.h | 9 - include/configs/evb_ast2500.h | 9 + include/configs/evb_ast2600.h | 16 + lib/rsa/Kconfig | 10 +- 18 files changed, 719 insertions(+), 25 deletions(-) create mode 100644 drivers/crypto/aspeed/Kconfig create mode 100644 drivers/crypto/aspeed/Makefile create mode 100644 drivers/crypto/aspeed/aspeed_acry.c create mode 100644 drivers/crypto/aspeed/aspeed_hace.c -- 2.17.1

3 13