January 2021 - U-Boot

[PATCH V3] net: dwc_eth_qos: Pad descriptors to cacheline size
by Marek Vasut 19 Jan '21

19 Jan '21

The DWMAC4 IP has the possibility to skip up to 7 AXI bus width size words after the descriptor. Use this to pad the descriptors to cacheline size and remove the need for noncached memory altogether. Moreover, this lets Tegra use the generic cache flush / invalidate operations. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Joe Hershberger <joe.hershberger(a)ni.com> Cc: Patrice Chotard <patrice.chotard(a)st.com> Cc: Patrick Delaunay <patrick.delaunay(a)st.com> Cc: Ramon Fried <rfried.dev(a)gmail.com> Cc: Stephen Warren <swarren(a)nvidia.com> --- V2: Consider AXI bus width, disable noncached memory on STM32MP1 and Tegra V3: - Replace max() with ALIGN() - Keep noncached memory enabled on tegra for r8169 --- drivers/net/dwc_eth_qos.c | 129 +++++++++++++++---------------------- include/configs/stm32mp1.h | 1 - 2 files changed, 51 insertions(+), 79 deletions(-) diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c index db1102562f6..dd0d64f7772 100644 --- a/drivers/net/dwc_eth_qos.c +++ b/drivers/net/dwc_eth_qos.c @@ -209,6 +209,7 @@ struct eqos_dma_regs { #define EQOS_DMA_SYSBUS_MODE_BLEN8 BIT(2) #define EQOS_DMA_SYSBUS_MODE_BLEN4 BIT(1) +#define EQOS_DMA_CH0_CONTROL_DSL_SHIFT 18 #define EQOS_DMA_CH0_CONTROL_PBLX8 BIT(16) #define EQOS_DMA_CH0_TX_CONTROL_TXPBL_SHIFT 16 @@ -239,37 +240,15 @@ struct eqos_tegra186_regs { #define EQOS_AUTO_CAL_STATUS_ACTIVE BIT(31) /* Descriptors */ - -#define EQOS_DESCRIPTOR_WORDS 4 -#define EQOS_DESCRIPTOR_SIZE (EQOS_DESCRIPTOR_WORDS * 4) /* We assume ARCH_DMA_MINALIGN >= 16; 16 is the EQOS HW minimum */ #define EQOS_DESCRIPTOR_ALIGN ARCH_DMA_MINALIGN #define EQOS_DESCRIPTORS_TX 4 #define EQOS_DESCRIPTORS_RX 4 #define EQOS_DESCRIPTORS_NUM (EQOS_DESCRIPTORS_TX + EQOS_DESCRIPTORS_RX) -#define EQOS_DESCRIPTORS_SIZE ALIGN(EQOS_DESCRIPTORS_NUM * \ - EQOS_DESCRIPTOR_SIZE, ARCH_DMA_MINALIGN) #define EQOS_BUFFER_ALIGN ARCH_DMA_MINALIGN #define EQOS_MAX_PACKET_SIZE ALIGN(1568, ARCH_DMA_MINALIGN) #define EQOS_RX_BUFFER_SIZE (EQOS_DESCRIPTORS_RX * EQOS_MAX_PACKET_SIZE) -/* - * Warn if the cache-line size is larger than the descriptor size. In such - * cases the driver will likely fail because the CPU needs to flush the cache - * when requeuing RX buffers, therefore descriptors written by the hardware - * may be discarded. Architectures with full IO coherence, such as x86, do not - * experience this issue, and hence are excluded from this condition. - * - * This can be fixed by defining CONFIG_SYS_NONCACHED_MEMORY which will cause - * the driver to allocate descriptors from a pool of non-cached memory. - */ -#if EQOS_DESCRIPTOR_SIZE < ARCH_DMA_MINALIGN -#if !defined(CONFIG_SYS_NONCACHED_MEMORY) && \ - !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) && !defined(CONFIG_X86) -#warning Cache line size is larger than descriptor size -#endif -#endif - struct eqos_desc { u32 des0; u32 des1; @@ -282,12 +261,17 @@ struct eqos_desc { #define EQOS_DESC3_LD BIT(28) #define EQOS_DESC3_BUF1V BIT(24) +#define EQOS_AXI_WIDTH_32 4 +#define EQOS_AXI_WIDTH_64 8 +#define EQOS_AXI_WIDTH_128 16 + struct eqos_config { bool reg_access_always_ok; int mdio_wait; int swr_wait; int config_mac; int config_mac_mdio; + unsigned int axi_bus_width; phy_interface_t (*interface)(struct udevice *dev); struct eqos_ops *ops; }; @@ -330,9 +314,8 @@ struct eqos_priv { int phyaddr; u32 max_speed; void *descs; - struct eqos_desc *tx_descs; - struct eqos_desc *rx_descs; int tx_desc_idx, rx_desc_idx; + unsigned int desc_size; void *tx_dma_buf; void *rx_dma_buf; void *rx_pkt; @@ -358,63 +341,42 @@ struct eqos_priv { * not have the same constraints since they are 1536 bytes large, so they * are unlikely to share cache-lines. */ -static void *eqos_alloc_descs(unsigned int num) +static void *eqos_alloc_descs(struct eqos_priv *eqos, unsigned int num) { -#ifdef CONFIG_SYS_NONCACHED_MEMORY - return (void *)noncached_alloc(EQOS_DESCRIPTORS_SIZE, - EQOS_DESCRIPTOR_ALIGN); -#else - return memalign(EQOS_DESCRIPTOR_ALIGN, EQOS_DESCRIPTORS_SIZE); -#endif + eqos->desc_size = ALIGN(sizeof(struct eqos_desc), + (unsigned int)ARCH_DMA_MINALIGN); + + return memalign(eqos->desc_size, num * eqos->desc_size); } static void eqos_free_descs(void *descs) { -#ifdef CONFIG_SYS_NONCACHED_MEMORY - /* FIXME: noncached_alloc() has no opposite */ -#else free(descs); -#endif } -static void eqos_inval_desc_tegra186(void *desc) +static struct eqos_desc *eqos_get_desc(struct eqos_priv *eqos, + unsigned int num, bool rx) { -#ifndef CONFIG_SYS_NONCACHED_MEMORY - unsigned long start = (unsigned long)desc & ~(ARCH_DMA_MINALIGN - 1); - unsigned long end = ALIGN(start + EQOS_DESCRIPTOR_SIZE, - ARCH_DMA_MINALIGN); - - invalidate_dcache_range(start, end); -#endif + return eqos->descs + + ((rx ? EQOS_DESCRIPTORS_TX : 0) + num) * eqos->desc_size; } static void eqos_inval_desc_generic(void *desc) { -#ifndef CONFIG_SYS_NONCACHED_MEMORY - unsigned long start = rounddown((unsigned long)desc, ARCH_DMA_MINALIGN); - unsigned long end = roundup((unsigned long)desc + EQOS_DESCRIPTOR_SIZE, - ARCH_DMA_MINALIGN); + unsigned long start = (unsigned long)desc; + unsigned long end = ALIGN(start + sizeof(struct eqos_desc), + ARCH_DMA_MINALIGN); invalidate_dcache_range(start, end); -#endif -} - -static void eqos_flush_desc_tegra186(void *desc) -{ -#ifndef CONFIG_SYS_NONCACHED_MEMORY - flush_cache((unsigned long)desc, EQOS_DESCRIPTOR_SIZE); -#endif } static void eqos_flush_desc_generic(void *desc) { -#ifndef CONFIG_SYS_NONCACHED_MEMORY - unsigned long start = rounddown((unsigned long)desc, ARCH_DMA_MINALIGN); - unsigned long end = roundup((unsigned long)desc + EQOS_DESCRIPTOR_SIZE, - ARCH_DMA_MINALIGN); + unsigned long start = (unsigned long)desc; + unsigned long end = ALIGN(start + sizeof(struct eqos_desc), + ARCH_DMA_MINALIGN); flush_dcache_range(start, end); -#endif } static void eqos_inval_buffer_tegra186(void *buf, size_t size) @@ -1167,6 +1129,7 @@ static int eqos_start(struct udevice *dev) ulong rate; u32 val, tx_fifo_sz, rx_fifo_sz, tqs, rqs, pbl; ulong last_rx_desc; + ulong desc_pad; debug("%s(dev=%p):\n", __func__, dev); @@ -1405,8 +1368,12 @@ static int eqos_start(struct udevice *dev) EQOS_MAX_PACKET_SIZE << EQOS_DMA_CH0_RX_CONTROL_RBSZ_SHIFT); + desc_pad = (eqos->desc_size - sizeof(struct eqos_desc)) / + eqos->config->axi_bus_width; + setbits_le32(&eqos->dma_regs->ch0_control, - EQOS_DMA_CH0_CONTROL_PBLX8); + EQOS_DMA_CH0_CONTROL_PBLX8 | + (desc_pad << EQOS_DMA_CH0_CONTROL_DSL_SHIFT)); /* * Burst length must be < 1/2 FIFO size. @@ -1435,9 +1402,15 @@ static int eqos_start(struct udevice *dev) /* Set up descriptors */ - memset(eqos->descs, 0, EQOS_DESCRIPTORS_SIZE); + memset(eqos->descs, 0, eqos->desc_size * EQOS_DESCRIPTORS_NUM); + + for (i = 0; i < EQOS_DESCRIPTORS_TX; i++) { + struct eqos_desc *tx_desc = eqos_get_desc(eqos, i, false); + eqos->config->ops->eqos_flush_desc(tx_desc); + } + for (i = 0; i < EQOS_DESCRIPTORS_RX; i++) { - struct eqos_desc *rx_desc = &(eqos->rx_descs[i]); + struct eqos_desc *rx_desc = eqos_get_desc(eqos, i, true); rx_desc->des0 = (u32)(ulong)(eqos->rx_dma_buf + (i * EQOS_MAX_PACKET_SIZE)); rx_desc->des3 = EQOS_DESC3_OWN | EQOS_DESC3_BUF1V; @@ -1449,12 +1422,14 @@ static int eqos_start(struct udevice *dev) } writel(0, &eqos->dma_regs->ch0_txdesc_list_haddress); - writel((ulong)eqos->tx_descs, &eqos->dma_regs->ch0_txdesc_list_address); + writel((ulong)eqos_get_desc(eqos, 0, false), + &eqos->dma_regs->ch0_txdesc_list_address); writel(EQOS_DESCRIPTORS_TX - 1, &eqos->dma_regs->ch0_txdesc_ring_length); writel(0, &eqos->dma_regs->ch0_rxdesc_list_haddress); - writel((ulong)eqos->rx_descs, &eqos->dma_regs->ch0_rxdesc_list_address); + writel((ulong)eqos_get_desc(eqos, 0, true), + &eqos->dma_regs->ch0_rxdesc_list_address); writel(EQOS_DESCRIPTORS_RX - 1, &eqos->dma_regs->ch0_rxdesc_ring_length); @@ -1473,7 +1448,7 @@ static int eqos_start(struct udevice *dev) * that's not distinguishable from none of the descriptors being * available. */ - last_rx_desc = (ulong)&(eqos->rx_descs[(EQOS_DESCRIPTORS_RX - 1)]); + last_rx_desc = (ulong)eqos_get_desc(eqos, EQOS_DESCRIPTORS_RX - 1, true); writel(last_rx_desc, &eqos->dma_regs->ch0_rxdesc_tail_pointer); eqos->started = true; @@ -1558,7 +1533,7 @@ static int eqos_send(struct udevice *dev, void *packet, int length) memcpy(eqos->tx_dma_buf, packet, length); eqos->config->ops->eqos_flush_buffer(eqos->tx_dma_buf, length); - tx_desc = &(eqos->tx_descs[eqos->tx_desc_idx]); + tx_desc = eqos_get_desc(eqos, eqos->tx_desc_idx, false); eqos->tx_desc_idx++; eqos->tx_desc_idx %= EQOS_DESCRIPTORS_TX; @@ -1573,7 +1548,7 @@ static int eqos_send(struct udevice *dev, void *packet, int length) tx_desc->des3 = EQOS_DESC3_OWN | EQOS_DESC3_FD | EQOS_DESC3_LD | length; eqos->config->ops->eqos_flush_desc(tx_desc); - writel((ulong)(&(eqos->tx_descs[eqos->tx_desc_idx])), + writel((ulong)eqos_get_desc(eqos, eqos->tx_desc_idx, false), &eqos->dma_regs->ch0_txdesc_tail_pointer); for (i = 0; i < 1000000; i++) { @@ -1596,7 +1571,7 @@ static int eqos_recv(struct udevice *dev, int flags, uchar **packetp) debug("%s(dev=%p, flags=%x):\n", __func__, dev, flags); - rx_desc = &(eqos->rx_descs[eqos->rx_desc_idx]); + rx_desc = eqos_get_desc(eqos, eqos->rx_desc_idx, true); eqos->config->ops->eqos_inval_desc(rx_desc); if (rx_desc->des3 & EQOS_DESC3_OWN) { debug("%s: RX packet not available\n", __func__); @@ -1631,7 +1606,7 @@ static int eqos_free_pkt(struct udevice *dev, uchar *packet, int length) eqos->config->ops->eqos_inval_buffer(packet, length); - rx_desc = &(eqos->rx_descs[eqos->rx_desc_idx]); + rx_desc = eqos_get_desc(eqos, eqos->rx_desc_idx, true); rx_desc->des0 = 0; mb(); @@ -1663,17 +1638,12 @@ static int eqos_probe_resources_core(struct udevice *dev) debug("%s(dev=%p):\n", __func__, dev); - eqos->descs = eqos_alloc_descs(EQOS_DESCRIPTORS_TX + - EQOS_DESCRIPTORS_RX); + eqos->descs = eqos_alloc_descs(eqos, EQOS_DESCRIPTORS_NUM); if (!eqos->descs) { debug("%s: eqos_alloc_descs() failed\n", __func__); ret = -ENOMEM; goto err; } - eqos->tx_descs = (struct eqos_desc *)eqos->descs; - eqos->rx_descs = (eqos->tx_descs + EQOS_DESCRIPTORS_TX); - debug("%s: tx_descs=%p, rx_descs=%p\n", __func__, eqos->tx_descs, - eqos->rx_descs); eqos->tx_dma_buf = memalign(EQOS_BUFFER_ALIGN, EQOS_MAX_PACKET_SIZE); if (!eqos->tx_dma_buf) { @@ -2083,8 +2053,8 @@ static const struct eth_ops eqos_ops = { }; static struct eqos_ops eqos_tegra186_ops = { - .eqos_inval_desc = eqos_inval_desc_tegra186, - .eqos_flush_desc = eqos_flush_desc_tegra186, + .eqos_inval_desc = eqos_inval_desc_generic, + .eqos_flush_desc = eqos_flush_desc_generic, .eqos_inval_buffer = eqos_inval_buffer_tegra186, .eqos_flush_buffer = eqos_flush_buffer_tegra186, .eqos_probe_resources = eqos_probe_resources_tegra186, @@ -2105,6 +2075,7 @@ static const struct eqos_config __maybe_unused eqos_tegra186_config = { .swr_wait = 10, .config_mac = EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_DCB, .config_mac_mdio = EQOS_MAC_MDIO_ADDRESS_CR_20_35, + .axi_bus_width = EQOS_AXI_WIDTH_128, .interface = eqos_get_interface_tegra186, .ops = &eqos_tegra186_ops }; @@ -2132,6 +2103,7 @@ static const struct eqos_config __maybe_unused eqos_stm32_config = { .swr_wait = 50, .config_mac = EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_AV, .config_mac_mdio = EQOS_MAC_MDIO_ADDRESS_CR_250_300, + .axi_bus_width = EQOS_AXI_WIDTH_64, .interface = eqos_get_interface_stm32, .ops = &eqos_stm32_ops }; @@ -2159,6 +2131,7 @@ struct eqos_config __maybe_unused eqos_imx_config = { .swr_wait = 50, .config_mac = EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_DCB, .config_mac_mdio = EQOS_MAC_MDIO_ADDRESS_CR_250_300, + .axi_bus_width = EQOS_AXI_WIDTH_64, .interface = eqos_get_interface_imx, .ops = &eqos_imx_ops }; diff --git a/include/configs/stm32mp1.h b/include/configs/stm32mp1.h index 1f6cb2919b5..43b6d7d8afc 100644 --- a/include/configs/stm32mp1.h +++ b/include/configs/stm32mp1.h @@ -69,7 +69,6 @@ /* Ethernet need */ #ifdef CONFIG_DWC_ETH_QOS -#define CONFIG_SYS_NONCACHED_MEMORY (1 * SZ_1M) /* 1M */ #define CONFIG_SERVERIP 192.168.1.1 #define CONFIG_BOOTP_SERVERIP #define CONFIG_SYS_AUTOLOAD "no" -- 2.29.2

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[PATCH] net: ks8851: Reset internal RXFC count on bad packet
by Marek Vasut 19 Jan '21

19 Jan '21

A sporadic condition occurs when the "bad packet" error is triggered repeatedly, which results in "bad packet" messages scrolling on the console during transfer. To avoid triggering this, reset the internal RXFC count on the first occurance of the "bad packet", which forces the code to re-read the RX packet count from the MAC, and prevents any additional "bad packet" messages if there are no more packets in the MAC. Also print better debug information if this condition occurs. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Eugen Hristev <eugen.hristev(a)microchip.com> Cc: Joe Hershberger <joe.hershberger(a)ni.com> Cc: Tom Rini <trini(a)konsulko.com> --- NOTE: This should likely also be applied to 2021.01 drivers/net/ks8851_mll.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/ks8851_mll.c b/drivers/net/ks8851_mll.c index 58e065cdcc2..48c8d499cf4 100644 --- a/drivers/net/ks8851_mll.c +++ b/drivers/net/ks8851_mll.c @@ -251,7 +251,8 @@ static int ks_rcv(struct ks_net *ks, uchar *data) } ks_wrreg16(ks, KS_RXQCR, RXQCR_CMD_CNTL | RXQCR_RRXEF); - printf(DRIVERNAME ": bad packet\n"); + printf(DRIVERNAME ": bad packet (sts=0x%04x len=0x%04x)\n", sts, len); + ks->rxfc = 0; return 0; } -- 2.29.2

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[v2019.04-aspeed, v1 0/1] net: ftgmac100: Read and retain MAC address
by Hongwei Zhang 19 Jan '21

19 Jan '21

Dear Reviewer, Add ftgmac100_get_mac() so the driver read and retain MAC address accross flash and QEMU support. Hongwei Zhang (1): net: ftgmac100: Read and retain MAC address drivers/net/ftgmac100.c | 32 ++++++++++++++++++++++++++++++++ net/eth-uclass.c | 2 +- 2 files changed, 33 insertions(+), 1 deletion(-) -- 2.17.1

2 2

[PATCH] net: eth_legacy - fix build CMD_PCAP
by Jorge Ramirez-Ortiz 19 Jan '21

19 Jan '21

Fix typo which would cause a build error. Fixes: 3eaac6307df ("net: introduce packet capture support") Signed-off-by: Jorge Ramirez-Ortiz <jorge(a)foundries.io> --- net/eth_legacy.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/net/eth_legacy.c b/net/eth_legacy.c index 6e0c058761..6870afb505 100644 --- a/net/eth_legacy.c +++ b/net/eth_legacy.c @@ -365,7 +365,7 @@ int eth_send(void *packet, int length) ret = eth_current->send(eth_current, packet, length); #if defined(CONFIG_CMD_PCAP) if (ret >= 0) - pcap_post(packet, lengeth, true); + pcap_post(packet, length, true); #endif return ret; } -- 2.17.1

2 1

[PATCH] net: tftp: Fix incorrect tftp_next_ack on no OACK
by Harm Berntsen 19 Jan '21

19 Jan '21

When the tftp server did not send any OACK, the tftp_next_ack variable was not set to the correct value . As the server was transmitting blocks we generated a lot of 'Received unexpected block: $n, expected $n+1' error messages. Depending on the timeout setting the transfer could still complete though. Signed-off-by: Harm Berntsen <harm.berntsen(a)nedap.com> CC: Ramon Fried <rfried.dev(a)gmail.com> --- net/tftp.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/net/tftp.c b/net/tftp.c index 6fdb1a821a..9371d7ef2c 100644 --- a/net/tftp.c +++ b/net/tftp.c @@ -624,8 +624,10 @@ static void tftp_handler(uchar *pkt, unsigned dest, struct in_addr sip, tftp_cur_block++; tftp_cur_block %= TFTP_SEQUENCE_SIZE; - if (tftp_state == STATE_SEND_RRQ) + if (tftp_state == STATE_SEND_RRQ) { debug("Server did not acknowledge any options!\n"); + tftp_next_ack = tftp_windowsize; + } if (tftp_state == STATE_SEND_RRQ || tftp_state == STATE_OACK || tftp_state == STATE_RECV_WRQ) { -- 2.29.2

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[PATCH] net: Do not respond to ICMP_ECHO_REQUEST if we do not have an IP address
by David Rivshin 19 Jan '21

19 Jan '21

From: David Rivshin <DRivshin(a)allworx.com> While doing DHCP the interface IP is set to 0.0.0.0. This causes the check in net.c on dst_ip to be effectively skipped, and all IP datagrams are accepted up the IP stack. In the case of an ICMP_ECHO_REQUEST for the matching MAC address (regardless of destination IP), the result is that an ICMP_ECHO_REPLY is sent. The source address of the ICMP_ECHO_REPLY is 0.0.0.0, which is an illegal source address. This can happen in common practice with the following sequence: DHCP (U-Boot or OS) acquires IP address 10.0.0.1 System reboots U-Boot starts DHCP and send DHCP DISCOVER DHCP server decides to OFFER 10.0.0.1 again (perhaps because of existing lease or manual configuration) DHCP server tries to PING 10.0.0.1 to see if anyone is squatting on it DHCP server still has our MAC address in its ARP table for 10.0.0.1 U-Boot receives PING, and responds with an illegal source address This may further result in a the DHCP server seeing the response as confirmation that someone is squatting on 10.0.0.1, and picking a new IP address from the pool to try again Signed-off-by: David Rivshin <drivshin(a)allworx.com> --- net/ping.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/net/ping.c b/net/ping.c index 0e33660f6c..075df3663f 100644 --- a/net/ping.c +++ b/net/ping.c @@ -90,6 +90,9 @@ void ping_receive(struct ethernet_hdr *et, struct ip_udp_hdr *ip, int len) net_set_state(NETLOOP_SUCCESS); return; case ICMP_ECHO_REQUEST: + if (net_ip.s_addr == 0) + return; + eth_hdr_size = net_update_ether(et, et->et_src, PROT_IP); debug_cond(DEBUG_DEV_PKT, base-commit: 050acee119b3757fee3bd128f55d720fdd9bb890 -- 2.26.2

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[PATCH] net: e1000: implement eth_write_hwaddr for DM_ETH
by Sebastian Reichel 19 Jan '21

19 Jan '21

From: Ian Ray <ian.ray(a)ge.com> Implement programming MAC address to the hardware also for device model configuration. Fixes: b565b18a294f ("board: ge: bx50v3: Enable DM for PCI and ethernet") Signed-off-by: Ian Ray <ian.ray(a)ge.com> Signed-off-by: Sebastian Reichel <sebastian.reichel(a)collabora.com> --- drivers/net/e1000.c | 17 ++++++++++++++--- 1 file changed, 14 insertions(+), 3 deletions(-) diff --git a/drivers/net/e1000.c b/drivers/net/e1000.c index 8e6c755f6416..4e81b89220ae 100644 --- a/drivers/net/e1000.c +++ b/drivers/net/e1000.c @@ -869,7 +869,6 @@ e1000_read_eeprom(struct e1000_hw *hw, uint16_t offset, return E1000_SUCCESS; } -#ifndef CONFIG_DM_ETH /****************************************************************************** * e1000_write_eeprom_srwr - Write to Shadow Ram using EEWR * @hw: pointer to the HW structure @@ -1035,7 +1034,6 @@ static int32_t e1000_update_eeprom_checksum_i210(struct e1000_hw *hw) out: return ret_val; } -#endif /****************************************************************************** * Verifies that the EEPROM has a valid checksum @@ -5660,13 +5658,24 @@ e1000_poll(struct eth_device *nic) return len ? 1 : 0; } +#endif /* !CONFIG_DM_ETH */ +#ifdef CONFIG_DM_ETH +static int e1000_write_hwaddr(struct udevice *dev) +#else static int e1000_write_hwaddr(struct eth_device *dev) +#endif { #ifndef CONFIG_E1000_NO_NVM - unsigned char *mac = dev->enetaddr; unsigned char current_mac[6]; +#ifdef CONFIG_DM_ETH + struct eth_pdata *plat = dev_get_platdata(dev); + struct e1000_hw *hw = dev_get_priv(dev); + u8 *mac = plat->enetaddr; +#else struct e1000_hw *hw = dev->priv; + u8 *mac = dev->enetaddr; +#endif uint16_t data[3]; int ret_val, i; @@ -5700,6 +5709,7 @@ static int e1000_write_hwaddr(struct eth_device *dev) #endif } +#ifndef CONFIG_DM_ETH /************************************************************************** PROBE - Look for an adapter, this routine's visible to the outside You should omit the last argument struct pci_device * for a non-PCI NIC @@ -5926,6 +5936,7 @@ static const struct eth_ops e1000_eth_ops = { .recv = e1000_eth_recv, .stop = e1000_eth_stop, .free_pkt = e1000_free_pkt, + .write_hwaddr = e1000_write_hwaddr, }; static const struct udevice_id e1000_eth_ids[] = { -- 2.28.0

2 1

[PATCH] net: eth-uclass: avoid running start() twice without stop()
by Matthias Schiffer 19 Jan '21

19 Jan '21

Running the start() handler twice without a stop() inbetween completely breaks communication for some ethernet drivers like fec_mxc. eth_halt() is called before each eth_init(). Due to the switch to eth_is_active() in commit 68acb51f442f ("net: Only call halt on a driver that has been init'ed"), this is not sufficient anymore when netconsole is active: eth_init_state_only()/eth_halt_state_only() manipulate the state check that is performed by eth_is_active() without actually calling into the driver. The issue can be triggered by starting a network operation (e.g. ping or tftp) while netconsole is active. Add an additional "running" flag that reflects the actual state of the driver and use it to ensure that eth_halt() actually stops the device as it is supposed to. Fixes: 68acb51f442f ("net: Only call halt on a driver that has been init'ed") Signed-off-by: Matthias Schiffer <matthias.schiffer(a)ew.tq-group.com> --- net/eth-uclass.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/net/eth-uclass.c b/net/eth-uclass.c index e14695c0f1..7c9278f3a9 100644 --- a/net/eth-uclass.c +++ b/net/eth-uclass.c @@ -26,6 +26,7 @@ DECLARE_GLOBAL_DATA_PTR; */ struct eth_device_priv { enum eth_state_t state; + bool running; }; /** @@ -293,6 +294,7 @@ int eth_init(void) current->uclass_priv; priv->state = ETH_STATE_ACTIVE; + priv->running = true; return 0; } } else { @@ -322,13 +324,16 @@ void eth_halt(void) struct eth_device_priv *priv; current = eth_get_dev(); - if (!current || !eth_is_active(current)) + if (!current) return; - eth_get_ops(current)->stop(current); priv = current->uclass_priv; - if (priv) - priv->state = ETH_STATE_PASSIVE; + if (!priv || !priv->running) + return; + + eth_get_ops(current)->stop(current); + priv->state = ETH_STATE_PASSIVE; + priv->running = false; } int eth_is_active(struct udevice *dev) @@ -537,6 +542,7 @@ static int eth_post_probe(struct udevice *dev) #endif priv->state = ETH_STATE_INIT; + priv->running = false; /* Check if the device has a valid MAC address in device tree */ if (!eth_dev_get_mac_address(dev, pdata->enetaddr) || -- 2.17.1

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[NXP-IMX] please pull nxp-imx-2021-1-16
by Peng Fan 19 Jan '21

19 Jan '21

Hi Stefano, Please pull nxp-imx-2021-1-16 --------------------------------------- nandbcb update/fix sync i.MX8M dts from Linux kernel add i.MX8MN LPDDR4 evk board eth support for i.MX8MP evk ddr fix for i.MX8M --------------------------------------- CI: My github ci not work. I run buildman local and not see failure. Thanks, Peng. The following changes since commit 21e1cae7902e6a9b1d7cf47cf4764e6fe7d3452a: Merge tag 'efi-2021-01-rc5-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi (2020-12-29 10:23:58 -0500) are available in the Git repository at: https://github.com/MrVan/u-boot.git tags/nxp-imx-2021-1-16 for you to fetch changes up to e02b2ca34b58131cb64b19887af007adb389f7bd: imx: timer: Modify GPT timer driver for mx7 (2021-01-15 18:22:44 +0800) ---------------------------------------------------------------- Han Xu (1): nandbcb: nand support for i.MX8MP Peng Fan (12): imx: imx8mp_evk: enable eth support imx: imx8mn_ddr4_evk: Use CONFIG_TARGET_IMX8MN_DDR4_EVK for DDR4 EVK board imx: imx8mn_evk: correct stack/malloc adress arm: dts: imx8mn: sync dts from Linux Kernel imx: imx8mn: add i.MX8MN LPDDR4 EVK support imx8m: clock: add type of set_clk_eqos arm: dts: imx8mp: sync dts from Linux Kernel arm: dts: imx8mm: sync dts from Linux Kernel arm: dts: imx8mq: sync dts from Linux Kernel imx8m: lowlevel_init: tune alignment imx: imx8mn/p: drop CONFIG_SYS_[I,D]CACHE_OFF imx8m: add QSPI boot dev Ye Li (9): imx: ddr: imx8m: Move selfref_en after DDR scrub nandbcb: Fix uninitialized variable imx: nandbcb: Fix resource leak imx: nandbcb: Fix resource leak in read_fcb imx: nandbcb: Fix potential overflow in fill_dbbt_data imx: nandbcb: Fix potential overflow in nandbcb_set_boot_config imx: Fix market segment fuse offset on iMX8MP imx6: Remove AHCI device before boot OS imx: timer: Modify GPT timer driver for mx7 arch/arm/dts/Makefile | 1 + arch/arm/dts/imx8mm-evk.dts | 534 ++++++------------------------------------ arch/arm/dts/imx8mm-evk.dtsi | 489 ++++++++++++++++++++++++++++++++++++++ arch/arm/dts/imx8mm.dtsi | 53 ++++- arch/arm/dts/imx8mn-ddr4-evk.dts | 321 ++++++++++--------------- arch/arm/dts/imx8mn-evk-u-boot.dtsi | 6 + arch/arm/dts/imx8mn-evk.dts | 128 ++++++++++ arch/arm/dts/imx8mn-evk.dtsi | 360 ++++++++++++++++++++++++++++ arch/arm/dts/imx8mn-pinfunc.h | 1266 +++++++++++++++++++++++++++++++++++++++++++++++++------------------------------------------------- arch/arm/dts/imx8mn.dtsi | 411 +++++++++++++++++++++++++++----- arch/arm/dts/imx8mp-evk-u-boot.dtsi | 4 + arch/arm/dts/imx8mp-evk.dts | 117 +++++++++- arch/arm/dts/imx8mp-pinfunc.h | 360 +++++++++------------------- arch/arm/dts/imx8mp.dtsi | 234 +++++++++++++++++-- arch/arm/dts/imx8mq-evk.dts | 186 ++++++++++++--- arch/arm/dts/imx8mq-pinfunc.h | 623 ++++++++++++++++++++++++++++++++++++++++++++++++ arch/arm/dts/imx8mq.dtsi | 302 ++++++++++++++++++++++-- arch/arm/include/asm/arch-imx8m/clock.h | 1 + arch/arm/include/asm/arch-imx8m/imx-regs.h | 2 + arch/arm/mach-imx/cmd_nandbcb.c | 34 +-- arch/arm/mach-imx/cpu.c | 30 ++- arch/arm/mach-imx/imx8m/Kconfig | 6 + arch/arm/mach-imx/imx8m/imximage-8mn-lpddr4.cfg | 17 ++ arch/arm/mach-imx/imx8m/lowlevel_init.S | 2 +- arch/arm/mach-imx/spl.c | 2 + arch/arm/mach-imx/timer.c | 16 +- board/freescale/imx8mn_evk/Kconfig | 2 +- board/freescale/imx8mn_evk/Makefile | 1 + board/freescale/imx8mn_evk/lpddr4_timing.c | 1585 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ board/freescale/imx8mp_evk/imx8mp_evk.c | 65 +++++- configs/imx8mn_ddr4_evk_defconfig | 2 +- configs/imx8mn_evk_defconfig | 80 +++++++ configs/imx8mp_evk_defconfig | 9 +- doc/board/freescale/imx8mn_evk.rst | 20 +- drivers/ddr/imx/imx8m/ddr_init.c | 5 +- drivers/power/power_i2c.c | 8 +- include/configs/imx8mn_evk.h | 9 +- include/configs/imx8mp_evk.h | 18 +- include/dt-bindings/clock/imx8mn-clock.h | 30 ++- include/dt-bindings/clock/imx8mp-clock.h | 95 +++++++- include/dt-bindings/clock/imx8mq-clock.h | 31 ++- 41 files changed, 5743 insertions(+), 1722 deletions(-) create mode 100644 arch/arm/dts/imx8mm-evk.dtsi create mode 100644 arch/arm/dts/imx8mn-evk-u-boot.dtsi create mode 100644 arch/arm/dts/imx8mn-evk.dts create mode 100644 arch/arm/dts/imx8mn-evk.dtsi create mode 100644 arch/arm/dts/imx8mq-pinfunc.h create mode 100644 arch/arm/mach-imx/imx8m/imximage-8mn-lpddr4.cfg create mode 100644 board/freescale/imx8mn_evk/lpddr4_timing.c create mode 100644 configs/imx8mn_evk_defconfig

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[PATCH 1/1] doc: document sbi command
by Heinrich Schuchardt 19 Jan '21

19 Jan '21

Add a man-page for the sbi command. Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- MAINTAINERS | 1 + doc/usage/index.rst | 1 + doc/usage/sbi.rst | 49 +++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 51 insertions(+) create mode 100644 doc/usage/sbi.rst diff --git a/MAINTAINERS b/MAINTAINERS index a7a62dff81..e7a6dd9ce2 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -951,6 +951,7 @@ S: Maintained T: git https://gitlab.denx.de/u-boot/custodians/u-boot-riscv.git F: arch/riscv/ F: cmd/riscv/ +F: doc/usage/sbi.rst F: drivers/timer/andes_plmt_timer.c F: drivers/timer/sifive_clint_timer.c F: tools/prelink-riscv.c diff --git a/doc/usage/index.rst b/doc/usage/index.rst index 6def250766..eedcdb110b 100644 --- a/doc/usage/index.rst +++ b/doc/usage/index.rst @@ -19,3 +19,4 @@ Shell commands button mbr pstore + sbi diff --git a/doc/usage/sbi.rst b/doc/usage/sbi.rst new file mode 100644 index 0000000000..66bf4f634d --- /dev/null +++ b/doc/usage/sbi.rst @@ -0,0 +1,49 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +sbi command +=========== + +Synopsis +-------- + +:: + + sbi + +Description +----------- + +The sbi command is used to display information about the SBI (Supervisor Binary +Interface) implementation on RISC-V systems. + +The output may look like: + +:: + + => sbi + SBI 0.2 + OpenSBI + Extensions: + sbi_set_timer + sbi_console_putchar + sbi_console_getchar + sbi_clear_ipi + sbi_send_ipi + sbi_remote_fence_i + sbi_remote_sfence_vma + sbi_remote_sfence_vma_asid + sbi_shutdown + SBI Base Functionality + Timer Extension + IPI Extension + RFENCE Extension + Hart State Management Extension + +The first line indicates the version of the RISC-V SBI specification. +The second line indicates the implementation. +The further lines enumerate the implemented extensions. + +Configuration +------------- + +To use the sbi command you must specify CONFIG_CMD_SBI=y. -- 2.29.2

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