September 2020 - U-Boot

[PATCH 0/5] arm: dts: k3-j7200: Add PMIC node for CPU AVS
by Gowtham Tammana 15 Sep '20

15 Sep '20

The J7200 EVM has PMIC LP876441 for supporting CPU AVS, addding nodes, compatible string, and configs to enable the corresponding driver to support AVS. Gowtham Tammana (5): power: pmic: tps65941: Add compatible for LP876441 arm/dts: k3-j7200-r5-common: Add pmic lp876441 node arm/dts: k3-j7200-r5-common: Hook buck1_reg to vtm supply arm/dts: k3-j7200-r5-common: Add VTM node configs: j7200_evm_r5_defconfig: Enable AVS, PMIC and dependent configs .../arm/dts/k3-j7200-r5-common-proc-board.dts | 38 +++++++++++++++++++ configs/j7200_evm_r5_defconfig | 6 +++ drivers/power/pmic/tps65941.c | 1 + include/power/tps65941.h | 1 + 4 files changed, 46 insertions(+) -- 2.28.0

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[PATCH 0/5] mtd: pxa3xx_nand: add support for Armada 8k
by Baruch Siach 15 Sep '20

15 Sep '20

This series adds NAND flash support to Aramda 8k systems. Patches make the necessary changes to the pxa3xx_nand driver and DT files. Baruch Siach (2): arm: dts: armada-cp110-master: update nand-controller mtd: pxa3xx_nand: remove dead code Shmuel Hazan (3): arm: dts: armada-cp110-slave: add missing cps_nand mtd: pxa3xx_nand: port to use driver model mtd: nand: pxa3xx: enable NAND controller if the SoC needs it arch/arm/dts/armada-cp110-master.dtsi | 15 ++- arch/arm/dts/armada-cp110-slave.dtsi | 16 +++ drivers/mtd/nand/raw/Kconfig | 2 + drivers/mtd/nand/raw/pxa3xx_nand.c | 176 ++++++++++++++------------ 4 files changed, 123 insertions(+), 86 deletions(-) -- 2.28.0

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[RFC PATCH 0/3] Start of MStar/SigmaStar Arm v7 SoC support
by Daniel Palmer 15 Sep '20

15 Sep '20

The initial very basic support for MStar/SigmaStar's Arm v7 SoCs should land in Linux 5.9 so I want to start the ball rolling on the u-boot side of things. This series does almost nothing aside from define the header needed for the binaries to boot. In my tree everything is working to the point that booting from SPI NOR, ethernet, SD etc work and for one chip it's even possible to have a completely u-boot boot flow. I'm working on cleaning those patches up but I'm not sure how much I need for this very first series. So I've put the bare minimum here and will pull more parts in based on feedback. Daniel Palmer (3): arm: mstar: Initial MStar/SigmaStar Armv7 SoC support arm: mstar: Add option for loading the SPL from the IPL arm: mstar: Add boot0 header MAINTAINERS | 6 +++++ arch/arm/Kconfig | 9 +++++++ arch/arm/Makefile | 1 + arch/arm/include/asm/arch-mstarv7/boot0.h | 29 ++++++++++++++++++++ arch/arm/mach-mstar/Kconfig | 32 +++++++++++++++++++++++ 5 files changed, 77 insertions(+) create mode 100644 arch/arm/include/asm/arch-mstarv7/boot0.h create mode 100644 arch/arm/mach-mstar/Kconfig -- 2.27.0

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[PATCH v4 0/8] riscv: Clean up timer drivers
by Sean Anderson 15 Sep '20

15 Sep '20

This series cleans up the timer drivers in RISC-V and converts them to DM. This series needs to be tested! I have only tested it on QEMU and the K210. Notably, this means that the HiFive and anything Andes is completely untested. Changes in v4: - Both the Andes PMLT and Sifive CLINT now fall back on timebase-frequency, per discussion with Anup Patel - Introduce helper function for falling back on timebase-frequency - Modify RISCV_TIMER KConfig - Now depends on RISCV - Implied by S-Mode (with or without SPL) - Rebase - Remove clock-frequency property from k210 clint binding because we fall back on timebase-frequency Changes in v3: - Don't initialize the IPI in spl_invoke_opensbi. Further testing has revealed it to be unnecessary. - Rebase Changes in v2: - Fix SiFive CLINT not getting tick-rate from rtcclk - Remove RISCV_RDTIME KConfig option - Split Kendryte binding changes into their own commit Sean Anderson (8): riscv: Rework riscv timer driver to only support S-mode timer: Add helper for drivers using timebase fallback riscv: Rework Andes PLMT as a UCLASS_TIMER driver riscv: Clean up initialization in Andes PLIC riscv: Rework Sifive CLINT as UCLASS_TIMER driver riscv: clk: Add CLINT clock to kendryte clock driver riscv: Update Kendryte device tree for new CLINT driver riscv: Update SiFive device tree for new CLINT driver arch/riscv/Kconfig | 16 ----- arch/riscv/cpu/ax25/Kconfig | 2 +- arch/riscv/cpu/fu540/Kconfig | 2 +- arch/riscv/cpu/generic/Kconfig | 2 +- arch/riscv/dts/ae350_32.dts | 1 + arch/riscv/dts/ae350_64.dts | 1 + arch/riscv/dts/fu540-c000-u-boot.dtsi | 8 ++- .../dts/hifive-unleashed-a00-u-boot.dtsi | 4 ++ arch/riscv/dts/k210.dtsi | 7 +- arch/riscv/include/asm/global_data.h | 3 - arch/riscv/lib/Makefile | 1 - arch/riscv/lib/andes_plic.c | 58 +++++++--------- arch/riscv/lib/andes_plmt.c | 44 ++++++------- arch/riscv/lib/rdtime.c | 38 ----------- arch/riscv/lib/sifive_clint.c | 66 ++++++++++--------- drivers/clk/kendryte/clk.c | 4 ++ drivers/ram/sifive/Kconfig | 2 + drivers/timer/Kconfig | 4 +- drivers/timer/riscv_timer.c | 39 +++++------ drivers/timer/timer-uclass.c | 25 +++++++ include/dt-bindings/clock/k210-sysctl.h | 1 + include/timer.h | 15 +++++ 22 files changed, 170 insertions(+), 173 deletions(-) delete mode 100644 arch/riscv/lib/rdtime.c -- 2.28.0

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U-Boot fails dfu on edison
by Simon Glass 15 Sep '20

15 Sep '20

Hi, I'd like to get edison running in my lab but it has resisted two attempts so far. My latest problem is that when I try the latest U-Boot, I get: U-Boot 2020.10-rc3-00012-g9f04a634ef3 (Sep 03 2020 - 07:06:30 -0600) CPU: Genuine Intel(R) CPU 4000 @ 500MHz DRAM: 980.6 MiB WDT: Started with servicing (60s timeout) MMC: mmc@ff3fc000: 0, mmc@ff3fa000: 1 Loading Environment from MMC... OK In: serial Out: serial Err: serial Net: No ethernet found. Hit any key to stop autoboot: 0 Target:blank Partitioning already done... Flashing already done... Memory layout (mmc) not supported! DFU entities configuration failed! (partition table does not match dfu_alt_info?) dfu - Device Firmware Upgrade Usage: dfu <USB_controller> [<interface> <dev>] [<timeout>] [list] - device firmware upgrade via <USB_controller> on device <dev>, attached to interface <interface> [<timeout>] - specify inactivity timeout in seconds [list] - list available alt settings I tried resetting the environment, but then it seems to just clear the environment. => env default -a ## Resetting to default environment ## Error: Can't force access to "bootdelay" ## Error: Can't force access to "baudrate" Then I rebooted and tried the instructions in edison.rst : run do_force_flash_os Saving Environment to MMC... Writing to MMC(0)... OK Memory layout (mmc) not supported! DFU entities configuration failed! (partition table does not match dfu_alt_info?) dfu - Device Firmware Upgrade Usage: dfu <USB_controller> [<interface> <dev>] [<timeout>] [list] - device firmware upgrade via <USB_controller> on device <dev>, attached to interface <interface> [<timeout>] - specify inactivity timeout in seconds [list] - list available alt settings Any ideas please? Regards, Simon

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SPL FIT configuration signature verification
by Andrii Voloshyn 14 Sep '20

14 Sep '20

Hi there, Is it possible to make SPL U-Boot to verify signature located in configuration section of FIT image, and do not continue in case the signature is missing or doesn't match? Asking because I couldn't find any configuration option for that, and I have FIT image with signature but SPL U-boot doesn't check it at all, it only checks signatures for images if present. Thanks Cheers, Andy

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[PATCH] RFC: tegra: xhci: Allocate from non-cached memory
by twarren＠nvidia.com 14 Sep '20

14 Sep '20

From: Tom Warren <twarren(a)nvidia.com> This fixes the XHCI driver on T210 boards (TX1, Nano). I was seeing that Set_Address wasn't completing, returning with a Context Parameter error. Examining the slot context, etc. showed that the correct info was there in RAM. Once I set 'dcache off' globally, it started working. This patch was created to force the TRB, etc. allocation to be in non-cached memory, which resulted in XHCI working on Nano/TX1 w/o the need for a global dcache disable. Thierry Reding pointed to a similar fix he'd done for the rtl6189 driver. Sending this to the list for comment, as this should have affected other XHCI implementations on other SoCs. Note that Tegra X1 (T210) has a 64-byte cache line size (64-bit ARMv8), and I do see the flush_cache/inval_cache ARM code being called via xhci_cache_flash/xhci_inval_cache. Change-Id: I591fd232425bf444b93be3695ee639d528d6713b Signed-off-by: Tom Warren <twarren(a)nvidia.com> --- drivers/usb/host/xhci-mem.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c index ed649c0..d52fe6c 100644 --- a/drivers/usb/host/xhci-mem.c +++ b/drivers/usb/host/xhci-mem.c @@ -193,7 +193,11 @@ static void *xhci_malloc(unsigned int size) void *ptr; size_t cacheline_size = max(XHCI_ALIGNMENT, CACHELINE_SIZE); +#ifdef CONFIG_SYS_NONCACHED_MEMORY + ptr = (void *)noncached_alloc(ALIGN(size, cacheline_size), cacheline_size); +#else ptr = memalign(cacheline_size, ALIGN(size, cacheline_size)); +#endif BUG_ON(!ptr); memset(ptr, '\0', size); -- 1.8.2.1.610.g562af5b

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[PATCH 1/1] test: do no assume hush parser in validate_empty()
by Heinrich Schuchardt 14 Sep '20

14 Sep '20

The environment variable test uses function validate_empty() to check that a variable is not defined. If the hush parser is not enabled, we cannot refer to a variable by $var_name but only by ${var_name}. Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- test/py/tests/test_env.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/test/py/tests/test_env.py b/test/py/tests/test_env.py index 2ae8f25381..940279651d 100644 --- a/test/py/tests/test_env.py +++ b/test/py/tests/test_env.py @@ -151,7 +151,7 @@ def validate_empty(state_test_env, var): Nothing. """ - response = state_test_env.u_boot_console.run_command('echo $%s' % var) + response = state_test_env.u_boot_console.run_command('echo ${%s}' % var) assert response == '' def validate_set(state_test_env, var, value): -- 2.28.0

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[PATCH] Makefile: mrproper shall delete doc/output/
by Heinrich Schuchardt 14 Sep '20

14 Sep '20

HTML documentation is generated in doc/output/. This directory shall be deleted by 'make mrproper' Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 5dd4c6bd40..eb6c47ef00 100644 --- a/Makefile +++ b/Makefile @@ -2025,7 +2025,7 @@ CLEAN_FILES += include/bmp_logo.h include/bmp_logo_data.h tools/version.h \ # Directories & files removed with 'make mrproper' MRPROPER_DIRS += include/config include/generated spl tpl \ - .tmp_objdiff + .tmp_objdiff doc/output MRPROPER_FILES += .config .config.old include/autoconf.mk* include/config.h \ ctags etags tags TAGS cscope* GPATH GTAGS GRTAGS GSYMS \ drivers/video/fonts/*.S -- 2.28.0

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[PATCH 0/2] doc: describe building with GCC
by Heinrich Schuchardt 14 Sep '20

14 Sep '20

Provide a newcomer friendly documentation how to obtain the U-Boot source and how to build U-Boot with GCC. Heinrich Schuchardt (2): doc: describe source repository doc: describe building with GCC doc/build/gcc.rst | 119 +++++++++++++++++++++++++++++++++++++++++++ doc/build/index.rst | 2 + doc/build/source.rst | 30 +++++++++++ 3 files changed, 151 insertions(+) create mode 100644 doc/build/gcc.rst create mode 100644 doc/build/source.rst -- 2.28.0

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