July 2020 - U-Boot

[PATCH] ARM: imx: hab: panic on authentication failure
by Marek Vasut 04 Aug '20

04 Aug '20

Instead of hang()ing the system and thus disallowing any automated recovery possibility from a HAB authentication failure, panic() . The panic() function can be configured to hang() the system after printing an error message, however the default is to reset the system instead. This allows redundant boot to work correctly. In case the primary or secondary image cannot be authenticated, the system reboots and bootrom can try to start the other one. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Fabio Estevam <festevam(a)gmail.com> Cc: NXP i.MX U-Boot Team <uboot-imx(a)nxp.com> Cc: Peng Fan <peng.fan(a)nxp.com> Cc: Stefano Babic <sbabic(a)denx.de> --- arch/arm/mach-imx/spl.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c index 1a231c67f5..76a5f7aca6 100644 --- a/arch/arm/mach-imx/spl.c +++ b/arch/arm/mach-imx/spl.c @@ -293,8 +293,7 @@ __weak void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) CSF_PAD_SIZE, offset)) { image_entry(); } else { - puts("spl: ERROR: image authentication fail\n"); - hang(); + panic("spl: ERROR: image authentication fail\n"); } } } @@ -320,8 +319,7 @@ void board_spl_fit_post_load(ulong load_addr, size_t length) if (imx_hab_authenticate_image(load_addr, offset + IVT_SIZE + CSF_PAD_SIZE, offset)) { - puts("spl: ERROR: image authentication unsuccessful\n"); - hang(); + panic("spl: ERROR: image authentication unsuccessful\n"); } } #endif -- 2.25.1

4 9

[PATCH] board: tbs2910: Fix video output with existing environments
by Soeren Moch 04 Aug '20

04 Aug '20

Migration to DM_VIDEO changed the output device name (in stout, stderr) from 'vga' to 'vidconsole'. This also was adapted in the default environment. However, existing user defined environments still use 'vga'. Enable this workaround to map the 'vga' name to 'vidconsole'. So we get HDMI video output also with existing legacy environments. Signed-off-by: Soeren Moch <smoch(a)web.de> --- Cc: Stefano Babic <sbabic(a)denx.de> Cc: Fabio Estevam <festevam(a)gmail.com> Cc: Anatolij Gustschin <agust(a)denx.de> Cc: u-boot(a)lists.denx.de There was an automatic fix in the original DM_VIDEO conversion for this case. Apparently this fix was lost on the way to v2020.10-rc1. So we need to enable this explicitly here. This patch was created on top of f7d0ae9 ("configs: Resync with savedefconfig"), directly after v2020.10-rc1. --- configs/tbs2910_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig index b4eaf9d162..c15a173d91 100644 --- a/configs/tbs2910_defconfig +++ b/configs/tbs2910_defconfig @@ -100,6 +100,7 @@ CONFIG_DM_VIDEO=y # CONFIG_VIDEO_ANSI is not set CONFIG_SYS_WHITE_ON_BLACK=y # CONFIG_PANEL is not set +CONFIG_VIDCONSOLE_AS_LCD=y CONFIG_I2C_EDID=y CONFIG_VIDEO_IPUV3=y # CONFIG_GZIP is not set -- 2.17.1

2 1

[PATCH 0/6] efi_selftest: allow UEFI testing on MAIX
by Heinrich Schuchardt 04 Aug '20

04 Aug '20

For RISC-V testing on real hardware the Sipeed MAIX boards provides an affordable solution. UEFI testing fails on the MAIX BiT with Mic because the UEFI sub-system reserves 16 MiB for the stack though the board only has 8 MiB. The first two patches make the size of the memory reserved for the stack customizable on all boards defaulting to 16 MiB. The value on the the MAIX BiT with Mic is set to 1 MiB. Missing default load addresses for the MAIX BiT with Mic are added. The sysreset driver is fixed to output the full reset message. The UEFI network and block device unit tests are only built if the configuration provides the prerequisites. Heinrich Schuchardt (6): efi_loader: use CONFIG_STACK_SIZE in the UEFI sub-system configs: reduce stack size of Sipeed MAIX riscv: load addresses for Sipeed MAIX dm: sysreset: wait after reset message efi_selftest: SNP test depends on network efi_selftest: block device test requires CONFIG_DOS_PARTITION Kconfig | 10 ++++++++++ arch/arm/Kconfig | 17 ----------------- arch/microblaze/Kconfig | 8 -------- configs/sipeed_maix_bitm_defconfig | 1 + drivers/sysreset/sysreset-uclass.c | 1 + include/configs/sipeed-maix.h | 9 +++++++++ lib/efi_loader/efi_memory.c | 2 +- lib/efi_selftest/Kconfig | 2 ++ lib/efi_selftest/Makefile | 5 +++-- 9 files changed, 27 insertions(+), 28 deletions(-) -- 2.27.0

3 11

[PATCH 1/1] doc: qemu-mips build instructions
by Heinrich Schuchardt 03 Aug '20

03 Aug '20

Correct the make commands for the defconfigs. Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- doc/board/emulation/qemu-mips.rst | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/doc/board/emulation/qemu-mips.rst b/doc/board/emulation/qemu-mips.rst index f206039f54..d35925126a 100644 --- a/doc/board/emulation/qemu-mips.rst +++ b/doc/board/emulation/qemu-mips.rst @@ -29,28 +29,28 @@ Using u-boot.bin as ROM (replaces Qemu monitor): .. code-block:: bash - make qemu_mips + make qemu_mips_defconfig qemu-system-mips -M mips -bios u-boot.bin -nographic 32 bit, little endian .. code-block:: bash - make qemu_mipsel + make qemu_mipsel_defconfig qemu-system-mipsel -M mips -bios u-boot.bin -nographic 64 bit, big endian .. code-block:: bash - make qemu_mips64 + make qemu_mips64_defconfig qemu-system-mips64 -cpu MIPS64R2-generic -M mips -bios u-boot.bin -nographic 64 bit, little endian .. code-block:: bash - make qemu_mips64el + make qemu_mips64el_defconfig qemu-system-mips64el -cpu MIPS64R2-generic -M mips -bios u-boot.bin -nographic or using u-boot.bin from emulated flash: -- 2.20.1

2 1

[PATCH v4 00/14] env: ext4: corrections and add test for env in ext4
by Patrick Delaunay 03 Aug '20

03 Aug '20

Hi, V4 of the serie [1]: rebase on master branch and solve the SPL size issue for board with SPL_ENV_IS_NOWHERE=y (pointed by Tom Rini in [2]) The buildman result for these boards are: ------------------------------------------------- tools/buildman/buildman -b sssddsqqs T1042RDB_PI_NAND_SECURE_BOOT am335x_guardian am335x_guardian am335x_evm j721e_evm_r5 ls1021atwr_sdcard_ifc_SECURE_BOOT ls1043ardb_nand_SECURE_BOOT ls1043ardb_sdcard_SECURE_BOOT ls1046ardb_qspi_spl ls1088ardb_sdcard_qspi_SECURE_BOOT T1042RDB_PI_NAND_SECURE_BOOT -sS Summary of 25 commits for 13 boards (12 threads, 1 job per thread) 01: Merge https://gitlab.denx.de/u-boot/custodians/u-boot-spi aarch64: w+ ls1043ardb_sdcard_SECURE_BOOT ls1046ardb_sdcard_SECURE_BOOT ls1088ardb_sdcard_qspi_SECURE_BOOT arm: w+ am335x_guardian j721e_evm_r5 ls1021atwr_sdcard_ifc_SECURE_BOOT powerpc: w+ T1042RDB_PI_NAND_SECURE_BOOT 02: env: mmc: allow support of mmc_get_env_dev with OF_CONTROL arm: (for 7/7 boards) all +4534.9 bss -4.6 data +4537.1 text +2.3 03: env: mmc: correct the offset returned by mmc_offset_try_partition arm: (for 7/7 boards) bss +1.1 text -1.1 04: env: mmc: add redundancy support in mmc_offset_try_partition 05: stm32mp1: board: add support of CONFIG_ENV_IS_IN_MMC 06: stm32mp1: use a specific SD/eMMC partition for U-Boot enviromnent 07: configs:stm32mp1: activate env config in SPL aarch64: (for 5/5 boards) all -1.8 rodata -1.8 arm: (for 7/7 boards) all +0.9 bss +3.4 rodata -2.6 08: cmd: env: add option for quiet output on env info aarch64: (for 5/5 boards) all +1.8 rodata +1.8 arm: (for 7/7 boards) all -0.9 bss -3.4 rodata +2.6 09: cmd: env: check real location for env info command 10: configs: sandbox: Enable sub command 'env info' 11: test: env: add test for env info sub-command 12: env: add absolute path at CONFIG_ENV_EXT4_FILE 13: env: ext4: set gd->env_valid 14: env: sf: avoid space in backend name aarch64: (for 5/5 boards) all -0.2 rodata -0.2 15: env: correctly handle env_load_prio aarch64: (for 5/5 boards) all -8.0 spl/u-boot-spl:all -1.6 spl/u-boot-spl:text -1.6 text -8.0 arm: (for 7/7 boards) all -2.3 bss +3.4 spl/u-boot-spl:all -1.7 spl/u-boot-spl:text -1.7 text -5.7 16: env: nowhere: add .load ops 17: env: the ops driver load becomes mandatory in struct env_driver 18: cmd: env: add env load command 19: cmd: env: add env select command 20: configs: sandbox: activate env in ext4 support 21: configs: sandbox: activate command env select and env load 22: test: environment in ext4 23: env: ext4: introduce new function env_ext4_save_buffer 24: env: ext4: add support of command env erase 25: test: sandbox: add test for erase command ------------------------------------------------- In this serie, I add sandbox test with CONFIG_ENV_IS_NOWHERE activated with EXT4 location: load, save and erase. To test this feature, I add 2 new commands to change the ENV location: - env select [target] - env load To be able to test invalid file (bad CRC), I also add the support of the command "env erase" for EXT4 env location. [1] http://patchwork.ozlabs.org/project/uboot/list/?series=185725 [2] http://patchwork.ozlabs.org/project/uboot/patch/20200625075958.9868-6-patri… Regards Patrick Changes in v4: - don't use env_import in SPL to avoid to increase its size as it is only required for 'env load' command Changes in v3: - new - new - new: add load ops in nowhere - new: load operation becomes mandatory - new: add 'env load' command - new: add 'env select' command - change env_get_location to avoid gd->env_load_prio modification - replace specific sandbox command by generic command 'env select' and 'env load' - change title "sandbox: support the change of env location" - replace specific sandbox command by generic command 'env select' and 'env load' - update after Stephen Warren comments - replace sandbox command by generic command 'env load' in test_env Changes in v2: - change cmd_tbl_t to struct cmd_tbl - use CONFIG_IS_ENABLED to set .erase (same as .save) Patrick Delaunay (14): env: add absolute path at CONFIG_ENV_EXT4_FILE env: ext4: set gd->env_valid env: sf: avoid space in backend name env: correctly handle env_load_prio env: nowhere: add .load ops env: the ops driver load becomes mandatory in struct env_driver cmd: env: add env load command cmd: env: add env select command configs: sandbox: activate env in ext4 support configs: sandbox: activate command env select and env load test: environment in ext4 env: ext4: introduce new function env_ext4_save_buffer env: ext4: add support of command env erase test: sandbox: add test for erase command board/sandbox/sandbox.c | 15 ++++ cmd/Kconfig | 11 +++ cmd/nvedit.c | 29 ++++++++ configs/sandbox64_defconfig | 7 ++ configs/sandbox_defconfig | 7 ++ configs/sandbox_flattree_defconfig | 7 ++ configs/sandbox_spl_defconfig | 7 ++ env/Kconfig | 2 +- env/env.c | 80 ++++++++++++++++++-- env/ext4.c | 54 ++++++++++++-- env/nowhere.c | 17 +++++ env/sf.c | 2 +- include/env.h | 15 +++- include/env_internal.h | 3 +- test/py/tests/test_env.py | 113 ++++++++++++++++++++++++++++- 15 files changed, 349 insertions(+), 20 deletions(-) -- 2.17.1

3 32

[PATCH v2] board: Add support for iMX8QXP AI_ML board
by Manivannan Sadhasivam 03 Aug '20

03 Aug '20

This commit adds initial board support for iMX8QXP AI_ML board from Einfochips. This board is one of the 96Boards Consumer Edition and AI boards of the 96Boards family based on i.MX8QXP SoC from NXP/Freescale. This initial supports contains following peripherals which are tested and known to work: 1. Debug serial via UART2 2. SD card 3. Ethernet More information about this board can be found in arrow website: https://www.arrow.com/en/products/imx8-ai-ml/arrow-development-tools Reviewed-by: Peng Fan <peng.fan(a)nxp.com> Reviewed-by: Fabio Estevam <festevam(a)gmail.com> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam(a)linaro.org> --- Changes in v2: * Rebased onto u-boot/master and fixed one build issue * Added review from Fabio arch/arm/mach-imx/imx8/Kconfig | 6 ++ board/einfochips/imx8qxp_ai_ml/Kconfig | 21 ++++ board/einfochips/imx8qxp_ai_ml/MAINTAINERS | 6 ++ board/einfochips/imx8qxp_ai_ml/Makefile | 8 ++ board/einfochips/imx8qxp_ai_ml/README | 49 ++++++++++ .../einfochips/imx8qxp_ai_ml/imx8qxp_ai_ml.c | 78 +++++++++++++++ board/einfochips/imx8qxp_ai_ml/imximage.cfg | 24 +++++ board/einfochips/imx8qxp_ai_ml/spl.c | 39 ++++++++ configs/imx8qxp_ai_ml_defconfig | 83 ++++++++++++++++ include/configs/imx8qxp_ai_ml.h | 95 +++++++++++++++++++ 10 files changed, 409 insertions(+) create mode 100644 board/einfochips/imx8qxp_ai_ml/Kconfig create mode 100644 board/einfochips/imx8qxp_ai_ml/MAINTAINERS create mode 100644 board/einfochips/imx8qxp_ai_ml/Makefile create mode 100644 board/einfochips/imx8qxp_ai_ml/README create mode 100644 board/einfochips/imx8qxp_ai_ml/imx8qxp_ai_ml.c create mode 100644 board/einfochips/imx8qxp_ai_ml/imximage.cfg create mode 100644 board/einfochips/imx8qxp_ai_ml/spl.c create mode 100644 configs/imx8qxp_ai_ml_defconfig create mode 100644 include/configs/imx8qxp_ai_ml.h diff --git a/arch/arm/mach-imx/imx8/Kconfig b/arch/arm/mach-imx/imx8/Kconfig index 9d1f73dfc7..308122d62a 100644 --- a/arch/arm/mach-imx/imx8/Kconfig +++ b/arch/arm/mach-imx/imx8/Kconfig @@ -75,6 +75,11 @@ config TARGET_GIEDI select BOARD_LATE_INIT select IMX8QXP +config TARGET_IMX8QXP_AI_ML + bool "Support i.MX8QXP AI_ML board" + select BOARD_EARLY_INIT_F + select IMX8QXP + config TARGET_IMX8QM_MEK bool "Support i.MX8QM MEK board" select BOARD_LATE_INIT @@ -93,6 +98,7 @@ config TARGET_IMX8QXP_MEK endchoice +source "board/einfochips/imx8qxp_ai_ml/Kconfig" source "board/freescale/imx8qm_mek/Kconfig" source "board/freescale/imx8qxp_mek/Kconfig" source "board/advantech/imx8qm_rom7720_a1/Kconfig" diff --git a/board/einfochips/imx8qxp_ai_ml/Kconfig b/board/einfochips/imx8qxp_ai_ml/Kconfig new file mode 100644 index 0000000000..b6806b8859 --- /dev/null +++ b/board/einfochips/imx8qxp_ai_ml/Kconfig @@ -0,0 +1,21 @@ +if TARGET_IMX8QXP_AI_ML + +config SYS_BOARD + default "imx8qxp_ai_ml" + +config SYS_VENDOR + default "einfochips" + +config SYS_CONFIG_NAME + default "imx8qxp_ai_ml" + +config SYS_MALLOC_LEN + default 0x2400000 + +config ENV_SIZE + default 0x1000 + +config ENV_OFFSET + default 0x400000 + +endif diff --git a/board/einfochips/imx8qxp_ai_ml/MAINTAINERS b/board/einfochips/imx8qxp_ai_ml/MAINTAINERS new file mode 100644 index 0000000000..add0bd9431 --- /dev/null +++ b/board/einfochips/imx8qxp_ai_ml/MAINTAINERS @@ -0,0 +1,6 @@ +i.MX8QXP AI_ML BOARD +M: Manivannan Sadhasivam <manivannan.sadhasivam(a)linaro.org> +S: Maintained +F: board/einfochips/imx8qxp_ai_ml/ +F: include/configs/imx8qxp_ai_ml.h +F: configs/imx8qxp_ai_ml_defconfig diff --git a/board/einfochips/imx8qxp_ai_ml/Makefile b/board/einfochips/imx8qxp_ai_ml/Makefile new file mode 100644 index 0000000000..e08774dc6e --- /dev/null +++ b/board/einfochips/imx8qxp_ai_ml/Makefile @@ -0,0 +1,8 @@ +# +# Copyright 2019 Linaro Ltd. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += imx8qxp_ai_ml.o +obj-$(CONFIG_SPL_BUILD) += spl.o diff --git a/board/einfochips/imx8qxp_ai_ml/README b/board/einfochips/imx8qxp_ai_ml/README new file mode 100644 index 0000000000..488920580f --- /dev/null +++ b/board/einfochips/imx8qxp_ai_ml/README @@ -0,0 +1,49 @@ +U-Boot for the Einfochips i.MX8QXP AI_ML board + +Quick Start +=========== + +- Get and Build the ARM Trusted firmware +- Get scfw_tcm.bin and ahab-container.img +- Build U-Boot +- Flash the binary into the SD card +- Boot + +Get and Build the ARM Trusted firmware +====================================== + +$ git clone https://source.codeaurora.org/external/imx/imx-atf +$ cd imx-atf/ +$ git checkout origin/imx_4.9.88_imx8qxp_beta2 -b imx_4.9.88_imx8qxp_beta2 +$ make PLAT=imx8qxp bl31 + +Get scfw_tcm.bin and ahab-container.img +======================================= + +$ wget https://raw.githubusercontent.com/96boards-ai-ml/binaries/master/mx8qx-aiml… +$ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.1.bin +$ chmod +x firmware-imx-8.1.bin +$ ./firmware-imx-8.1.bin + +Copy the following binaries to U-Boot folder: + +$ cp imx-atf/build/imx8qxp/release/bl31.bin . +$ cp firmware-imx-8.1/firmware/seco/mx8qx-ahab-container.img . + +Build U-Boot +============ + +$ make imx8qxp_ai_ml_defconfig +$ make u-boot-dtb.imx + +Flash the binary into the SD card +================================= + +Burn the u-boot-dtb.imx binary to SD card offset 32KB: + +$ sudo dd if=u-boot-dtb.imx of=/dev/sd[x] bs=1024 seek=32 + +Boot +==== + +Set Boot switch SW2: 1100. diff --git a/board/einfochips/imx8qxp_ai_ml/imx8qxp_ai_ml.c b/board/einfochips/imx8qxp_ai_ml/imx8qxp_ai_ml.c new file mode 100644 index 0000000000..7ba014ac07 --- /dev/null +++ b/board/einfochips/imx8qxp_ai_ml/imx8qxp_ai_ml.c @@ -0,0 +1,78 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2018 NXP + * Copyright 2019 Linaro Ltd. + */ + +#include <common.h> +#include <errno.h> +#include <linux/libfdt.h> +#include <fsl_esdhc.h> +#include <asm/io.h> +#include <asm/arch/clock.h> +#include <asm/arch/sci/sci.h> +#include <asm/arch/imx8-pins.h> +#include <asm/arch/iomux.h> +#include <asm/arch/sys_proto.h> + +DECLARE_GLOBAL_DATA_PTR; + +int board_early_init_f(void) +{ + sc_pm_clock_rate_t rate = SC_80MHZ; + int ret; + + /* Set UART2 clock root to 80 MHz */ + ret = sc_pm_setup_uart(SC_R_UART_2, rate); + if (ret) + return ret; + + return 0; +} + +#if IS_ENABLED(CONFIG_FEC_MXC) +#include <miiphy.h> + +int board_phy_config(struct phy_device *phydev) +{ + phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f); + phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8); + + phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); + phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100); + + if (phydev->drv->config) + phydev->drv->config(phydev); + + return 0; +} +#endif + +int checkboard(void) +{ + puts("Board: iMX8QXP AI_ML\n"); + + build_info(); + print_bootinfo(); + + return 0; +} + +int board_init(void) +{ + return 0; +} + +/* Board specific reset that is system reset */ + +void reset_cpu(ulong addr) +{ + /* TODO */ +} + +#ifdef CONFIG_OF_BOARD_SETUP +int ft_board_setup(void *blob, struct bd_info *bd) +{ + return 0; +} +#endif diff --git a/board/einfochips/imx8qxp_ai_ml/imximage.cfg b/board/einfochips/imx8qxp_ai_ml/imximage.cfg new file mode 100644 index 0000000000..4fc5ade313 --- /dev/null +++ b/board/einfochips/imx8qxp_ai_ml/imximage.cfg @@ -0,0 +1,24 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2018 NXP + * + * Refer doc/README.imx8image for more details about how-to configure + * and create imx8image boot image + */ + +#define __ASSEMBLY__ + +/* Boot from SD, sector size 0x400 */ +BOOT_FROM SD 0x400 +/* SoC type IMX8QX */ +SOC_TYPE IMX8QX +/* Append seco container image */ +APPEND mx8qx-ahab-container.img +/* Create the 2nd container */ +CONTAINER +/* Add scfw image with exec attribute */ +IMAGE SCU mx8qx-aiml-scfw-tcm.bin +/* Add ATF image with exec attribute */ +IMAGE A35 bl31.bin 0x80000000 +/* Add U-Boot image with load attribute */ +DATA A35 u-boot-dtb.bin 0x80020000 diff --git a/board/einfochips/imx8qxp_ai_ml/spl.c b/board/einfochips/imx8qxp_ai_ml/spl.c new file mode 100644 index 0000000000..2e6e0741e5 --- /dev/null +++ b/board/einfochips/imx8qxp_ai_ml/spl.c @@ -0,0 +1,39 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2018 NXP + * Copyright 2019 Linaro Ltd. + * + */ + +#include <common.h> +#include <dm.h> +#include <spl.h> +#include <dm/uclass.h> +#include <dm/device.h> +#include <dm/uclass-internal.h> +#include <dm/device-internal.h> +#include <dm/lists.h> + +DECLARE_GLOBAL_DATA_PTR; + +void spl_board_init(void) +{ + arch_cpu_init(); + + timer_init(); + + preloader_console_init(); + + puts("Normal Boot\n"); +} + +void board_init_f(ulong dummy) +{ + /* Clear global data */ + memset((void *)gd, 0, sizeof(gd_t)); + + /* Clear the BSS. */ + memset(__bss_start, 0, __bss_end - __bss_start); + + board_init_r(NULL, 0); +} diff --git a/configs/imx8qxp_ai_ml_defconfig b/configs/imx8qxp_ai_ml_defconfig new file mode 100644 index 0000000000..e20a0c783e --- /dev/null +++ b/configs/imx8qxp_ai_ml_defconfig @@ -0,0 +1,83 @@ +CONFIG_ARM=y +CONFIG_ARCH_IMX8=y +CONFIG_SYS_TEXT_BASE=0x80020000 +CONFIG_DISTRO_DEFAULTS=y +CONFIG_SPL_GPIO_SUPPORT=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SYS_MALLOC_F_LEN=0x4000 +CONFIG_TARGET_IMX8QXP_AI_ML=y +CONFIG_SPL_MMC_SUPPORT=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_NR_DRAM_BANKS=4 +CONFIG_SPL=y +CONFIG_FIT=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/einfochips/imx8qxp_ai_ml/imximage.cfg" +CONFIG_BOOTDELAY=3 +CONFIG_LOG=y +CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SPL_POWER_SUPPORT=y +CONFIG_SPL_POWER_DOMAIN=y +CONFIG_SPL_WATCHDOG_SUPPORT=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_CPU=y +# CONFIG_CMD_IMPORTENV is not set +CONFIG_CMD_CLK=y +CONFIG_CMD_DM=y +CONFIG_CMD_FUSE=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_FAT_WRITE=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8qxp-ai_ml" +CONFIG_ENV_IS_IN_MMC=y +CONFIG_SPL_DM=y +CONFIG_SPL_CLK=y +CONFIG_CLK_IMX8=y +CONFIG_CPU=y +CONFIG_DM_GPIO=y +CONFIG_MXC_GPIO=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_IMX_LPI2C=y +CONFIG_MISC=y +CONFIG_DM_MMC=y +CONFIG_FSL_ESDHC=y +CONFIG_PHYLIB=y +CONFIG_PHY_ADDR_ENABLE=y +CONFIG_PHY_ATHEROS=y +CONFIG_DM_ETH=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_PHY_GIGE=y +CONFIG_FEC_MXC_SHARE_MDIO=y +CONFIG_FEC_MXC_MDIO_BASE=0x5B040000 +CONFIG_FEC_MXC=y +CONFIG_MII=y +CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y +CONFIG_PINCTRL_IMX8=y +CONFIG_POWER_DOMAIN=y +CONFIG_IMX8_POWER_DOMAIN=y +CONFIG_DM_REGULATOR=y +CONFIG_SPL_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_SPL_DM_REGULATOR_GPIO=y +CONFIG_DM_SERIAL=y +CONFIG_FSL_LPUART=y +CONFIG_SPL_TINY_MEMSET=y +# CONFIG_EFI_LOADER is not set diff --git a/include/configs/imx8qxp_ai_ml.h b/include/configs/imx8qxp_ai_ml.h new file mode 100644 index 0000000000..bdac710103 --- /dev/null +++ b/include/configs/imx8qxp_ai_ml.h @@ -0,0 +1,95 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2018 NXP + * Copyright 2019 Linaro Ltd. + */ + +#ifndef __IMX8QXP_AI_ML_H +#define __IMX8QXP_AI_ML_H + +#include <linux/sizes.h> +#include <asm/arch/imx-regs.h> + +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SPL_MAX_SIZE (124 * SZ_1K) +#define CONFIG_SYS_MONITOR_LEN (SZ_1K * SZ_1K) +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x250 +#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 0 + +#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds" +#define CONFIG_SPL_STACK 0x013E000 +#define CONFIG_SPL_BSS_START_ADDR 0x00128000 +#define CONFIG_SPL_BSS_MAX_SIZE SZ_4K /* 4 KB */ +#define CONFIG_SYS_SPL_MALLOC_START 0x00120000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x3000 /* 12 KB */ +#define CONFIG_SERIAL_LPUART_BASE 0x5a080000 +#define CONFIG_MALLOC_F_ADDR 0x00120000 + +#define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE + +#define CONFIG_SPL_ABORT_ON_RAW_IMAGE + +#define CONFIG_OF_SEPARATE +#endif + +#define CONFIG_REMAKE_ELF + +/* Flat Device Tree Definitions */ +#define CONFIG_OF_BOARD_SETUP + +#define CONFIG_FSL_USDHC + +#define CONFIG_ENV_OVERWRITE + +#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG + +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 1) \ + func(DHCP, dhcp, na) + +#include <config_distro_bootcmd.h> +/* Initial environment variables */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "console=ttyLP2 earlycon\0" \ + "fdt_addr_r=0x83000000\0" \ + "kernel_addr_r=0x81000000\0" \ + "ramdisk_addr_r=0x94400000\0" \ + "scriptaddr=0x89000000\0" \ + "fdtfile=imx8qxp-ai_ml.dtb\0" \ + "fdt_high=0xffffffffffffffff\0" \ + "image=Image\0" \ + "initrd_addr=0x83800000\0" \ + "initrd_high=0xffffffffffffffff\0" \ + "netargs=setenv bootargs console=${console},${baudrate} " \ + "root=/dev/nfs ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp" \ + "\0" \ + "nfsboot=run netargs; dhcp ${loadaddr} ${image}; tftp ${fdt_addr} " \ + "imx8qxp-ai_ml/${fdt_file}; booti ${loadaddr} - ${fdt_addr}\0" \ + BOOTENV + +/* Link Definitions */ +#define CONFIG_LOADADDR 0x80280000 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_SYS_INIT_SP_ADDR 0x80200000 + +/* USDHC2 is the SD card interface */ +#define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */ +#define CONFIG_SYS_FSL_USDHC_NUM 2 + +#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define PHYS_SDRAM_1 0x80000000 +#define PHYS_SDRAM_2 0x880000000 +#define PHYS_SDRAM_1_SIZE SZ_2G /* 2 GB */ +#define PHYS_SDRAM_2_SIZE 0x00000000 /* 0 GB */ + +/* Generic Timer Definitions */ +#define COUNTER_FREQUENCY 8000000 /* 8MHz */ + +/* Networking */ +#define CONFIG_FEC_XCV_TYPE RGMII +#define FEC_QUIRK_ENET_MAC + +#endif /* __IMX8QXP_AI_ML_H */ -- 2.17.1

2 3

[PATCH v5 0/6] ARM: arbitrary virtual-physical mappings for RPi4 XHCI support
by Marek Szyprowski 03 Aug '20

03 Aug '20

Hi All, This patchset adds support for creating a mapping for the arbitrary physical address at the given virtual address. This is needed to enable support for XHCI USB controller on PCIe bridge on Raspberry Pi 4 board, on which the USB controller's MMIO area 0x600000000 has to be remapped somewhere to fit in 4GiB virtual address space when running in ARM 32bit mode. This patchset is a continuation of the Raspberry Pi 4 XHCI/PCIe patchset: https://patchwork.ozlabs.org/project/uboot/list/?series=179078 and the following discussion: https://lists.denx.de/pipermail/u-boot/2020-May/411086.html Best regards Marek Szyprowski Samsung R&D Institute Poland Changelog: v5: - fixed issues pointed by Tom Rini (comments style, ifdefs, spdx) v4: https://lists.denx.de/pipermail/u-boot/2020-June/414531.html - added a patch, which moves ADDR_MAP config entry to Kconfig system as requested by Simon Glass - rebased onto v4 of the "USB host support for Raspberry Pi 4 board (64-bit)" patchset v3: https://lists.denx.de/pipermail/u-boot/2020-May/412427.html - fixed broken RPi3 and lack of the identity mapping for map_physmem (for example for the itest command was broken) - added a patch fixing a new build warning v2: https://lists.denx.de/pipermail/u-boot/2020-May/411765.html - fixed ARM64 build v1: https://lists.denx.de/pipermail/u-boot/2020-May/411765.html - initial RFC Patch summary: Marek Szyprowski (5): powerpc: move ADDR_MAP to Kconfig arm: update comments to the common style arm: provide a function for boards init code to modify MMU virtual-physical map rpi4: add a mapping for the PCIe XHCI controller MMIO registers (ARM 32bit) config: Enable support for the XHCI controller on RPI4 board Seung-Woo Kim (1): mmc: bcm283x: fix int to pointer cast arch/arm/include/asm/mmu.h | 8 +++++ arch/arm/include/asm/system.h | 36 ++++++++++++++++------ arch/arm/lib/cache-cp15.c | 24 +++++++++++---- arch/arm/mach-bcm283x/Kconfig | 1 + arch/arm/mach-bcm283x/include/mach/base.h | 8 +++++ arch/arm/mach-bcm283x/init.c | 21 +++++++++++++ configs/B4420QDS_NAND_defconfig | 2 ++ configs/B4420QDS_SPIFLASH_defconfig | 2 ++ configs/B4420QDS_defconfig | 2 ++ configs/B4860QDS_NAND_defconfig | 2 ++ configs/B4860QDS_SECURE_BOOT_defconfig | 2 ++ configs/B4860QDS_SPIFLASH_defconfig | 2 ++ configs/B4860QDS_SRIO_PCIE_BOOT_defconfig | 2 ++ configs/B4860QDS_defconfig | 2 ++ configs/C29XPCIE_NAND_defconfig | 1 + configs/C29XPCIE_NOR_SECBOOT_defconfig | 1 + configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig | 1 + configs/C29XPCIE_SPIFLASH_defconfig | 1 + configs/C29XPCIE_defconfig | 1 + configs/Cyrus_P5020_defconfig | 2 ++ configs/Cyrus_P5040_defconfig | 2 ++ configs/MPC8536DS_36BIT_defconfig | 1 + configs/MPC8548CDS_36BIT_defconfig | 1 + configs/MPC8572DS_36BIT_defconfig | 1 + configs/MPC8641HPCN_36BIT_defconfig | 2 ++ configs/MPC8641HPCN_defconfig | 2 ++ configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig | 1 + configs/P1010RDB-PA_36BIT_NAND_defconfig | 1 + configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig | 1 + configs/P1010RDB-PA_36BIT_NOR_defconfig | 1 + configs/P1010RDB-PA_36BIT_SDCARD_defconfig | 1 + .../P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig | 1 + configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig | 1 + configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig | 1 + configs/P1010RDB-PB_36BIT_NAND_defconfig | 1 + configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig | 1 + configs/P1010RDB-PB_36BIT_NOR_defconfig | 1 + configs/P1010RDB-PB_36BIT_SDCARD_defconfig | 1 + .../P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig | 1 + configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig | 1 + configs/P1020MBG-PC_36BIT_SDCARD_defconfig | 1 + configs/P1020MBG-PC_36BIT_defconfig | 1 + configs/P1020RDB-PC_36BIT_NAND_defconfig | 1 + configs/P1020RDB-PC_36BIT_SDCARD_defconfig | 1 + configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_36BIT_defconfig | 1 + configs/P1020UTM-PC_36BIT_SDCARD_defconfig | 1 + configs/P1020UTM-PC_36BIT_defconfig | 1 + configs/P1021RDB-PC_36BIT_NAND_defconfig | 1 + configs/P1021RDB-PC_36BIT_SDCARD_defconfig | 1 + configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig | 1 + configs/P1021RDB-PC_36BIT_defconfig | 1 + configs/P1022DS_36BIT_NAND_defconfig | 1 + configs/P1022DS_36BIT_SDCARD_defconfig | 1 + configs/P1022DS_36BIT_SPIFLASH_defconfig | 1 + configs/P1022DS_36BIT_defconfig | 1 + configs/P1024RDB_36BIT_defconfig | 1 + configs/P1025RDB_36BIT_defconfig | 1 + configs/P2020RDB-PC_36BIT_NAND_defconfig | 1 + configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 1 + configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 1 + configs/P2020RDB-PC_36BIT_defconfig | 1 + configs/P2041RDB_NAND_defconfig | 2 ++ configs/P2041RDB_SDCARD_defconfig | 2 ++ configs/P2041RDB_SECURE_BOOT_defconfig | 2 ++ configs/P2041RDB_SPIFLASH_defconfig | 2 ++ configs/P2041RDB_SRIO_PCIE_BOOT_defconfig | 2 ++ configs/P2041RDB_defconfig | 2 ++ configs/P3041DS_NAND_SECURE_BOOT_defconfig | 2 ++ configs/P3041DS_NAND_defconfig | 2 ++ configs/P3041DS_SDCARD_defconfig | 2 ++ configs/P3041DS_SECURE_BOOT_defconfig | 2 ++ configs/P3041DS_SPIFLASH_defconfig | 2 ++ configs/P3041DS_SRIO_PCIE_BOOT_defconfig | 2 ++ configs/P3041DS_defconfig | 2 ++ configs/P4080DS_SDCARD_defconfig | 2 ++ configs/P4080DS_SECURE_BOOT_defconfig | 2 ++ configs/P4080DS_SPIFLASH_defconfig | 2 ++ configs/P4080DS_SRIO_PCIE_BOOT_defconfig | 2 ++ configs/P4080DS_defconfig | 2 ++ configs/P5020DS_NAND_SECURE_BOOT_defconfig | 2 ++ configs/P5020DS_NAND_defconfig | 2 ++ configs/P5020DS_SDCARD_defconfig | 2 ++ configs/P5020DS_SECURE_BOOT_defconfig | 2 ++ configs/P5020DS_SPIFLASH_defconfig | 2 ++ configs/P5020DS_SRIO_PCIE_BOOT_defconfig | 2 ++ configs/P5020DS_defconfig | 2 ++ configs/P5040DS_NAND_SECURE_BOOT_defconfig | 2 ++ configs/P5040DS_NAND_defconfig | 2 ++ configs/P5040DS_SDCARD_defconfig | 2 ++ configs/P5040DS_SECURE_BOOT_defconfig | 2 ++ configs/P5040DS_SPIFLASH_defconfig | 2 ++ configs/P5040DS_defconfig | 2 ++ configs/T1023RDB_NAND_defconfig | 2 ++ configs/T1023RDB_SDCARD_defconfig | 2 ++ configs/T1023RDB_SECURE_BOOT_defconfig | 2 ++ configs/T1023RDB_SPIFLASH_defconfig | 2 ++ configs/T1023RDB_defconfig | 2 ++ configs/T1024QDS_DDR4_SECURE_BOOT_defconfig | 2 ++ configs/T1024QDS_DDR4_defconfig | 2 ++ configs/T1024QDS_NAND_defconfig | 2 ++ configs/T1024QDS_SDCARD_defconfig | 2 ++ configs/T1024QDS_SECURE_BOOT_defconfig | 2 ++ configs/T1024QDS_SPIFLASH_defconfig | 2 ++ configs/T1024QDS_defconfig | 2 ++ configs/T1024RDB_NAND_defconfig | 2 ++ configs/T1024RDB_SDCARD_defconfig | 2 ++ configs/T1024RDB_SECURE_BOOT_defconfig | 2 ++ configs/T1024RDB_SPIFLASH_defconfig | 2 ++ configs/T1024RDB_defconfig | 2 ++ configs/T1040D4RDB_NAND_defconfig | 2 ++ configs/T1040D4RDB_SDCARD_defconfig | 2 ++ configs/T1040D4RDB_SECURE_BOOT_defconfig | 2 ++ configs/T1040D4RDB_SPIFLASH_defconfig | 2 ++ configs/T1040D4RDB_defconfig | 2 ++ configs/T1040QDS_DDR4_defconfig | 2 ++ configs/T1040QDS_SECURE_BOOT_defconfig | 2 ++ configs/T1040QDS_defconfig | 2 ++ configs/T1040RDB_NAND_defconfig | 2 ++ configs/T1040RDB_SDCARD_defconfig | 2 ++ configs/T1040RDB_SECURE_BOOT_defconfig | 2 ++ configs/T1040RDB_SPIFLASH_defconfig | 2 ++ configs/T1040RDB_defconfig | 2 ++ configs/T1042D4RDB_NAND_defconfig | 2 ++ configs/T1042D4RDB_SDCARD_defconfig | 2 ++ configs/T1042D4RDB_SECURE_BOOT_defconfig | 2 ++ configs/T1042D4RDB_SPIFLASH_defconfig | 2 ++ configs/T1042D4RDB_defconfig | 2 ++ configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig | 2 ++ configs/T1042RDB_PI_NAND_defconfig | 2 ++ configs/T1042RDB_PI_SDCARD_defconfig | 2 ++ configs/T1042RDB_PI_SPIFLASH_defconfig | 2 ++ configs/T1042RDB_PI_defconfig | 2 ++ configs/T1042RDB_SECURE_BOOT_defconfig | 2 ++ configs/T1042RDB_defconfig | 2 ++ configs/T2080QDS_NAND_defconfig | 2 ++ configs/T2080QDS_SDCARD_defconfig | 2 ++ configs/T2080QDS_SECURE_BOOT_defconfig | 2 ++ configs/T2080QDS_SPIFLASH_defconfig | 2 ++ configs/T2080QDS_SRIO_PCIE_BOOT_defconfig | 2 ++ configs/T2080QDS_defconfig | 2 ++ configs/T2080RDB_NAND_defconfig | 2 ++ configs/T2080RDB_SDCARD_defconfig | 2 ++ configs/T2080RDB_SECURE_BOOT_defconfig | 2 ++ configs/T2080RDB_SPIFLASH_defconfig | 2 ++ configs/T2080RDB_SRIO_PCIE_BOOT_defconfig | 2 ++ configs/T2080RDB_defconfig | 2 ++ configs/T2081QDS_NAND_defconfig | 2 ++ configs/T2081QDS_SDCARD_defconfig | 2 ++ configs/T2081QDS_SPIFLASH_defconfig | 2 ++ configs/T2081QDS_SRIO_PCIE_BOOT_defconfig | 2 ++ configs/T2081QDS_defconfig | 2 ++ configs/T4160QDS_NAND_defconfig | 2 ++ configs/T4160QDS_SDCARD_defconfig | 2 ++ configs/T4160QDS_SECURE_BOOT_defconfig | 2 ++ configs/T4160QDS_defconfig | 2 ++ configs/T4160RDB_defconfig | 2 ++ configs/T4240QDS_NAND_defconfig | 2 ++ configs/T4240QDS_SDCARD_defconfig | 2 ++ configs/T4240QDS_SECURE_BOOT_defconfig | 2 ++ configs/T4240QDS_SRIO_PCIE_BOOT_defconfig | 2 ++ configs/T4240QDS_defconfig | 2 ++ configs/T4240RDB_SDCARD_defconfig | 2 ++ configs/T4240RDB_defconfig | 2 ++ .../controlcenterd_36BIT_SDCARD_DEVELOP_defconfig | 1 + configs/controlcenterd_36BIT_SDCARD_defconfig | 1 + configs/kmcoge4_defconfig | 2 ++ configs/qemu-ppce500_defconfig | 1 + configs/rpi_4_32b_defconfig | 11 +++++++ drivers/mmc/bcm2835_sdhci.c | 2 +- include/configs/B4860QDS.h | 5 --- include/configs/C29XPCIE.h | 3 -- include/configs/MPC8536DS.h | 5 --- include/configs/MPC8548CDS.h | 5 --- include/configs/MPC8572DS.h | 5 --- include/configs/MPC8641HPCN.h | 2 -- include/configs/P1010RDB.h | 5 --- include/configs/P1022DS.h | 5 --- include/configs/P2041RDB.h | 5 --- include/configs/T102xQDS.h | 5 --- include/configs/T102xRDB.h | 5 --- include/configs/T1040QDS.h | 3 -- include/configs/T104xRDB.h | 3 -- include/configs/T208xQDS.h | 5 --- include/configs/T208xRDB.h | 5 --- include/configs/T4240RDB.h | 3 -- include/configs/controlcenterd.h | 5 --- include/configs/corenet_ds.h | 5 --- include/configs/cyrus.h | 5 --- include/configs/kmp204x.h | 3 -- include/configs/p1_p2_rdb_pc.h | 5 --- include/configs/qemu-ppce500.h | 3 -- include/configs/t4qds.h | 3 -- lib/Kconfig | 13 ++++++++ scripts/config_whitelist.txt | 2 -- 195 files changed, 385 insertions(+), 116 deletions(-) create mode 100644 arch/arm/include/asm/mmu.h -- 1.9.1

4 19

[PATCH 00/13] Add support for USB host and peripheral bootmodes on am65x-idk
by Faiz Abbas 03 Aug '20

03 Aug '20

The following patches add support for USB mass storage and USB dfu bootmodes on am654x-idk. Because of space constrains and the size of the USB stack, there are two different usbmsc and usbdfu defconfigs for building R5 SPL. Fitting both of these into one defconfig requires some changes in the USB subsystem which is a longer term effort Faiz Abbas (13): spl: usb: Create an API spl_usb_load() spl: usb: Only init usb once armv7R: K3: am654: Use full malloc in SPL both pre and post reloc arm: mach-k3: sysfw-loader: Add support to load SYSFW from USB arm: mach-k3: am6_init: Gate mmc related configurations with the appropriate config arm: mach-k3: am6_init: Do USB fixups to facilitate host and device boot modes arm: mach-k3: am6_init: Add support for USB boot mode arm: dts: k3-am654-r5-base-board: Add USB0 nodes arm: dts: k3-am654-base-board: Add support for USB0 in SPL configs: am65x_evm: Add support for DFU related configs configs: am65x_evm_a53: Enable USB Mass storage and DFU boot modes configs: Add new config for supporting USB mass storage boot configs: Add defconfig for USB DFU bootmode arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 27 +++++ arch/arm/dts/k3-am654-r5-base-board.dts | 35 ++++++ arch/arm/mach-k3/am6_init.c | 96 ++++++++++++++- arch/arm/mach-k3/include/mach/am6_hardware.h | 2 + arch/arm/mach-k3/include/mach/am6_spl.h | 3 +- arch/arm/mach-k3/sysfw-loader.c | 11 ++ common/spl/spl_usb.c | 31 +++-- configs/am65x_evm_a53_defconfig | 9 ++ configs/am65x_evm_r5_usbdfu_defconfig | 119 +++++++++++++++++++ configs/am65x_evm_r5_usbmsc_defconfig | 119 +++++++++++++++++++ include/configs/am65x_evm.h | 10 +- include/spl.h | 14 +++ 12 files changed, 461 insertions(+), 15 deletions(-) create mode 100644 configs/am65x_evm_r5_usbdfu_defconfig create mode 100644 configs/am65x_evm_r5_usbmsc_defconfig -- 2.17.1

3 16

[PATCH 1/1] timer: dw-apb: fix compiler warnings
by Heinrich Schuchardt 03 Aug '20

03 Aug '20

readl() and writel() expect void *. Do not pass an integer value. Remove unused include include asm/arch/timer.h. Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- The driver is needed for the timers of the Kendryte K210 (compatible "snps,dw-apb-timer"). --- drivers/timer/dw-apb-timer.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/timer/dw-apb-timer.c b/drivers/timer/dw-apb-timer.c index 35271b20c8..c8be4417fd 100644 --- a/drivers/timer/dw-apb-timer.c +++ b/drivers/timer/dw-apb-timer.c @@ -14,7 +14,6 @@ #include <dm/device_compat.h> #include <asm/io.h> -#include <asm/arch/timer.h> #define DW_APB_LOAD_VAL 0x0 #define DW_APB_CURR_VAL 0x4 @@ -34,7 +33,7 @@ static int dw_apb_timer_get_count(struct udevice *dev, u64 *count) * requires the count to be incrementing. Invert the * result. */ - *count = timer_conv_64(~readl(priv->regs + DW_APB_CURR_VAL)); + *count = timer_conv_64(~readl((void *)(priv->regs + DW_APB_CURR_VAL))); return 0; } @@ -61,8 +60,8 @@ static int dw_apb_timer_probe(struct udevice *dev) clk_free(&clk); /* init timer */ - writel(0xffffffff, priv->regs + DW_APB_LOAD_VAL); - writel(0xffffffff, priv->regs + DW_APB_CURR_VAL); + writel(0xffffffff, (void *)(priv->regs + DW_APB_LOAD_VAL)); + writel(0xffffffff, (void *)(priv->regs + DW_APB_CURR_VAL)); setbits_le32(priv->regs + DW_APB_CTRL, 0x3); return 0; -- 2.27.0

2 1

[PATCH v1 1/2] x86: sipi_vector: Append appropriate suffixes
by Andy Shevchenko 03 Aug '20

03 Aug '20

Assembler is not happy: arch/x86/cpu/sipi_vector.S: Assembler messages: arch/x86/cpu/sipi_vector.S:134: Warning: no instruction mnemonic suffix given and no register operands; using default for `cmp' arch/x86/cpu/sipi_vector.S:139: Warning: no instruction mnemonic suffix given and no register operands; using default for `bts' arch/x86/cpu/sipi_vector.S:157: Warning: no instruction mnemonic suffix given and no register operands; using default for `cmp' Fix this by adding appropriate suffixes to the assembler commands. Fixes: 45b5a37836d5 ("x86: Add multi-processor init") Signed-off-by: Andy Shevchenko <andriy.shevchenko(a)linux.intel.com> --- arch/x86/cpu/sipi_vector.S | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/x86/cpu/sipi_vector.S b/arch/x86/cpu/sipi_vector.S index 40cc27f1e1d0..fa1e6cb19af4 100644 --- a/arch/x86/cpu/sipi_vector.S +++ b/arch/x86/cpu/sipi_vector.S @@ -131,12 +131,12 @@ ap_start: jnz microcode_done /* Determine if parallel microcode loading is allowed */ - cmp $0xffffffff, microcode_lock + cmpl $0xffffffff, microcode_lock je load_microcode /* Protect microcode loading */ lock_microcode: - lock bts $0, microcode_lock + lock btsl $0, microcode_lock jc lock_microcode load_microcode: @@ -154,7 +154,7 @@ load_microcode: popa /* Unconditionally unlock microcode loading */ - cmp $0xffffffff, microcode_lock + cmpl $0xffffffff, microcode_lock je microcode_done xor %eax, %eax -- 2.27.0

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