June 2020 - U-Boot

[GIT PULL] Pull request: u-boot-imx u-boot-imx-20200609
by Stefano Babic 09 Jun '20

09 Jun '20

Hi Tom, Please pull dome fixes for release, thanks ! The following changes since commit 88bd5b1793600b0f5f25c3d236b4d049fb986140: configs: Resync with savedefconfig (2020-06-04 19:29:09 -0400) are available in the Git repository at: https://gitlab.denx.de/u-boot/custodians/u-boot-imx.git tags/u-boot-imx-20200609 for you to fetch changes up to 385429680106f8612386e26564f69dccdd110620: Revert "imx: rom api: fix image offset computation" (2020-06-09 11:19:55 +0200) ---------------------------------------------------------------- Fixes for 2020.07 ----------------- - mx53: mx53menlo Convert to DM_ETH, fix fail boot - imx8mp_evk: fix boot issue - MX6, display5: fix environment - drop warnings (watchdog) for i.MX8mm i.mx8mp - enable bootaux for i.MX8M Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/695929999 ---------------------------------------------------------------- Fabio Estevam (6): imx8mp_evk: Add a README file imx8mm_evk: Select the watchdog driver imx8mn_ddr4_evk: Select the watchdog driver imx8mm_beacon: Select the watchdog driver imx8mp_evk: Select the watchdog driver verdin-imx8mm: Select the watchdog driver Giulio Benetti (1): ARM: dts: imxrt1050: indent lcdif node correctly Lukasz Majewski (1): imx: Update MTD partitions layout for display5 (i.MX6Q) board Marek Vasut (4): power: pmic: Add SPL Kconfig entry for PFUZE100 ARM: imx: ddr: Add missing PHY reset ARM: imx: m53menlo: Do not fail boot on invalid splash screen ARM: dts: imx: m53menlo: Convert to DM_ETH Patrick Wildt (1): imx: move ATF to the back of the FIT to fix loading over yModem Peng Fan (6): imx: Kconfig: enable IMX_BOOTAUX for i.MX8M imx8mp_evk: spl: drop useless code imx8mp_evk: spl: drop timer_init imx8mp_evk: spl: use spl_early_init imx8mp_evk: spl: no need the code since spl framework could do that imx: imx8mp_evk: fix boot issue Stefano Babic (1): Revert "imx: rom api: fix image offset computation" Sébastien Szymanski (1): imx: rom api: fix image offset computation arch/arm/dts/imx53-m53menlo.dts | 11 +++++++++++ arch/arm/dts/imxrt1050.dtsi | 12 ++++++------ arch/arm/include/asm/arch-mx7/imx-regs.h | 1 + arch/arm/mach-imx/Kconfig | 2 +- arch/arm/mach-imx/mkimage_fit_atf.sh | 31 +++++++++++++++++-------------- arch/arm/mach-imx/mx7/ddr.c | 22 +++++++++++++++++++--- board/freescale/imx8mp_evk/README | 41 +++++++++++++++++++++++++++++++++++++++++ board/freescale/imx8mp_evk/spl.c | 28 ++++------------------------ board/menlo/m53menlo/m53menlo.c | 14 +++++++++----- configs/display5_defconfig | 2 +- configs/display5_factory_defconfig | 2 +- configs/imx8mm_beacon_defconfig | 1 - configs/imx8mm_evk_defconfig | 1 - configs/imx8mn_ddr4_evk_defconfig | 1 - configs/imx8mp_evk_defconfig | 4 ++-- configs/m53menlo_defconfig | 3 +++ configs/verdin-imx8mm_defconfig | 1 - drivers/power/pmic/Kconfig | 7 +++++++ include/configs/display5.h | 7 ++++--- include/configs/imx8mp_evk.h | 12 +++++------- 20 files changed, 132 insertions(+), 71 deletions(-) create mode 100644 board/freescale/imx8mp_evk/README Best regards, Stefano -- ===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic(a)denx.de =====================================================================

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[PATCH 1/3] rock-pi-4: Enable USB3 Host
by Jagan Teki 09 Jun '20

09 Jun '20

Enable USB3.0 Host support for RockPI-4 boards. Note that the Upper USB3.0 port is marked as otg and lower USB3.0 port marked as host, so this below log capture when USB3.0 mass storage plug in at lower USB 3.0 port. Log: Bus usb@fe380000: USB EHCI 1.00 Bus usb@fe3c0000: USB EHCI 1.00 Bus dwc3: usb maximum-speed not found Register 2000140 NbrPorts 2 Starting the controller USB XHCI 1.10 Bus dwc3: usb maximum-speed not found Register 2000140 NbrPorts 2 Starting the controller USB XHCI 1.10 scanning bus usb@fe380000 for devices... 1 USB Device(s) found scanning bus usb@fe3c0000 for devices... 1 USB Device(s) found scanning bus dwc3 for devices... 1 USB Device(s) found scanning bus dwc3 for devices... cannot reset port 1!? 2 USB Device(s) found scanning usb for storage devices... 1 Storage Device(s) found => usb tree USB device tree: 1 Hub (480 Mb/s, 0mA) u-boot EHCI Host Controller 1 Hub (480 Mb/s, 0mA) u-boot EHCI Host Controller 1 Hub (5 Gb/s, 0mA) U-Boot XHCI Host Controller 1 Hub (5 Gb/s, 0mA) | U-Boot XHCI Host Controller | +-2 Mass Storage (5 Gb/s, 224mA) SanDisk Dual Drive 040130e3ee554b7078843f4eb331646 Cc: Tom Cubie <tom(a)radxa.com> Signed-off-by: Jagan Teki <jagan(a)amarulasolutions.com> --- configs/rock-pi-4-rk3399_defconfig | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/configs/rock-pi-4-rk3399_defconfig b/configs/rock-pi-4-rk3399_defconfig index 0d86fdc895..2487872219 100644 --- a/configs/rock-pi-4-rk3399_defconfig +++ b/configs/rock-pi-4-rk3399_defconfig @@ -28,6 +28,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_MISC=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y @@ -35,11 +36,14 @@ CONFIG_MMC_SDHCI_ROCKCHIP=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y CONFIG_GMAC_ROCKCHIP=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_TYPEC=y CONFIG_PMIC_RK8XX=y CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM_RK3399_LPDDR4=y +CONFIG_DM_RESET=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYSRESET=y @@ -48,6 +52,8 @@ CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_ASIX88179=y -- 2.25.1

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[PATCH 1/2] riscv: fu540: dts: Remove the unnecessary space in the cpu2_intc node
by Bin Meng 09 Jun '20

09 Jun '20

From: Bin Meng <bin.meng(a)windriver.com> Signed-off-by: Bin Meng <bin.meng(a)windriver.com> --- arch/riscv/dts/fu540-c000-u-boot.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/riscv/dts/fu540-c000-u-boot.dtsi b/arch/riscv/dts/fu540-c000-u-boot.dtsi index 9bba554..0d3f710 100644 --- a/arch/riscv/dts/fu540-c000-u-boot.dtsi +++ b/arch/riscv/dts/fu540-c000-u-boot.dtsi @@ -27,7 +27,7 @@ clocks = <&prci PRCI_CLK_COREPLL>; u-boot,dm-spl; cpu2_intc: interrupt-controller { - u-boot,dm-spl; + u-boot,dm-spl; }; }; cpu3: cpu@3 { -- 2.7.4

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[PATCH] armv8: ls1012a: RGMII ports require internal delay
by Chaitanya Sakinam 09 Jun '20

09 Jun '20

The correct setting for the RGMII ports on LS1012ARDB is to enable delay on both Rx and Tx so the interface mode used should be PHY_INTERFACE_MODE_RGMII_ID Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam(a)nxp.com> Signed-off-by: Anji J <anji.jagarlmudi(a)nxp.com> --- board/freescale/ls1012ardb/eth.c | 2 +- drivers/net/pfe_eth/pfe_eth.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/board/freescale/ls1012ardb/eth.c b/board/freescale/ls1012ardb/eth.c index 5edcfcf..ca15349 100644 --- a/board/freescale/ls1012ardb/eth.c +++ b/board/freescale/ls1012ardb/eth.c @@ -112,7 +112,7 @@ int pfe_eth_board_init(struct udevice *dev) /* MAC2 */ pfe_set_phy_address_mode(priv->gemac_port, CONFIG_PFE_EMAC2_PHY_ADDR, - PHY_INTERFACE_MODE_RGMII_TXID); + PHY_INTERFACE_MODE_RGMII_ID); } break; case 0x2208: diff --git a/drivers/net/pfe_eth/pfe_eth.c b/drivers/net/pfe_eth/pfe_eth.c index 1b5d11e..6e22041 100644 --- a/drivers/net/pfe_eth/pfe_eth.c +++ b/drivers/net/pfe_eth/pfe_eth.c @@ -31,7 +31,7 @@ struct gemac_s gem_info[] = { /* phy iface */ .phy_address = CONFIG_PFE_EMAC2_PHY_ADDR, - .phy_mode = PHY_INTERFACE_MODE_RGMII_TXID, + .phy_mode = PHY_INTERFACE_MODE_RGMII_ID, }, }; -- 2.7.4

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[BUG] ut lib lib_rsa_verify_valid crashes on qemu_arm if RSA_VERIFY_WITH_PKEY=y
by Heinrich Schuchardt 09 Jun '20

09 Jun '20

Hello Takahiro, when trying to execute command ut lib lib_rsa_verify_valid on qemu_arm_defconfig with CONFIG_UNIT_TEST=y and CONFIG_RSA_VERIFY_WITH_PKEY=y it crashes in free((void *)prop->modulus) called from rsa_free_key_prop() called from rsa_verify_key() called from rsa_verify_with_pkey(). Without CONFIG_RSA_VERIFY_WITH_PKEY=y the problem does not occur. On qemu_arm64_defconfig the problem does not occur. Could you, please, have a look. Best regards Heinrich

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[PATCH 0/3] Support for specifying extra IOMMU mappings for PCI
by laurentiu.tudor＠nxp.com 09 Jun '20

09 Jun '20

From: Laurentiu Tudor <laurentiu.tudor(a)nxp.com> In the current implementation, u-boot creates iommu mappings only for PCI devices enumarated at boot time thus does not take into account more dynamic scenarios such as SR-IOV or PCI hot-plug. Add support for specifying extra IOMMU mappings for PCI controllers through a special env var called "pci_iommu_extra" or through a device tree property named "pci-iommu-extra" placed in the node describing the PCI controller. More detailed information can be found in the final patch. Laurentiu Tudor (3): pci: layerscape: move per-pci device fdt fixup in a function pci: layerscape: move pci node search in a common function pci: layerscape: add a way of specifying additional iommu mappings .../fsl-layerscape/doc/README.pci_iommu_extra | 68 ++++ drivers/pci/Kconfig | 12 + drivers/pci/pcie_layerscape_fixup.c | 317 +++++++++++++----- 3 files changed, 318 insertions(+), 79 deletions(-) create mode 100644 arch/arm/cpu/armv8/fsl-layerscape/doc/README.pci_iommu_extra -- 2.17.1

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[PATCH v5 1/8] lib: rsa: distinguish between tpl and spl for CONFIG_RSA_VERIFY
by Heiko Stuebner 09 Jun '20

09 Jun '20

From: Heiko Stuebner <heiko.stuebner(a)theobroma-systems.com> While the SPL may want to do signature checking this won't be the case for TPL in all cases, as TPL is mostly used when the amount of initial memory is not enough for a full SPL. So on a system where SPL uses DM but TPL does not we currently end up with a TPL compile error of: lib/rsa/rsa-verify.c:48:25: error: dereferencing pointer to incomplete type ‘struct checksum_algo’ To prevent that change the $(SPL_) to $(SPL_TPL_) to distinguish between both. If someone really needs FIT signature checking in TPL as well, a new TPL_RSA_VERIFY config symbol needs to be added. Signed-off-by: Heiko Stuebner <heiko.stuebner(a)theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich(a)theobroma-systems.com> --- changes in v5: - drop change that belongs in patch 2/8 changes in v4: - amound -> amount - found another entry to handle changes in v2: - fix typo "distinguis(h)" lib/rsa/Makefile | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/rsa/Makefile b/lib/rsa/Makefile index 14ed3cb401..c61ebfd79e 100644 --- a/lib/rsa/Makefile +++ b/lib/rsa/Makefile @@ -5,6 +5,6 @@ # (C) Copyright 2000-2007 # Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. -obj-$(CONFIG_$(SPL_)RSA_VERIFY) += rsa-verify.o rsa-checksum.o +obj-$(CONFIG_$(SPL_TPL_)RSA_VERIFY) += rsa-verify.o rsa-checksum.o obj-$(CONFIG_RSA_VERIFY_WITH_PKEY) += rsa-keyprop.o obj-$(CONFIG_RSA_SOFTWARE_EXP) += rsa-mod-exp.o -- 2.25.1

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[PATCH] arm: dts: socfpga: cyclone5: Update i2c-scl-falling-time-ns
by Ley Foon Tan 09 Jun '20

09 Jun '20

Commit e71b6f6622d6 ("i2c: designware_i2c: Rewrite timing calculation") change the hcnt and lcnt timing calculation. After this new timing calculation, hcnt will have negative value with i2c-scl-falling-time-ns 5000 that set in socfpga_cyclone5_socdk.dts. This patch overwrite i2c-scl-falling-time-ns to 300ns (default SCL fall time used in Designware i2c driver) for Uboot. Before the fix: => i2c dev 0 Setting bus to 0 Failure changing bus number (-22) After the fix: => i2c dev 0 Setting bus to 0 => i2c probe Valid chip addresses: 17 51 55 5B 5C 5E 66 68 70 Signed-off-by: Ley Foon Tan <ley.foon.tan(a)intel.com> --- arch/arm/dts/socfpga_cyclone5_socdk-u-boot.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/dts/socfpga_cyclone5_socdk-u-boot.dtsi b/arch/arm/dts/socfpga_cyclone5_socdk-u-boot.dtsi index 7d9874cafa0b..d24f621cd669 100644 --- a/arch/arm/dts/socfpga_cyclone5_socdk-u-boot.dtsi +++ b/arch/arm/dts/socfpga_cyclone5_socdk-u-boot.dtsi @@ -68,3 +68,7 @@ &portc { bank-name = "portc"; }; + +&i2c0 { + i2c-scl-falling-time-ns = <300>; +}; -- 2.19.0

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[PATCH] arm: socfpga: gen5: Enable cache driver in SPL
by Ley Foon Tan 09 Jun '20

09 Jun '20

Adding "u-boot,dm-pre-reloc" and enable CONFIG_SPL_CACHE to enable cache driver in SPL. This fixed error below in SPL: cache controller driver NOT found! Signed-off-by: Ley Foon Tan <ley.foon.tan(a)intel.com> --- arch/arm/dts/socfpga-common-u-boot.dtsi | 4 ++++ arch/arm/mach-socfpga/Kconfig | 1 + 2 files changed, 5 insertions(+) diff --git a/arch/arm/dts/socfpga-common-u-boot.dtsi b/arch/arm/dts/socfpga-common-u-boot.dtsi index d55460755fe3..f65aca6ebaba 100644 --- a/arch/arm/dts/socfpga-common-u-boot.dtsi +++ b/arch/arm/dts/socfpga-common-u-boot.dtsi @@ -14,6 +14,10 @@ u-boot,dm-pre-reloc; }; +&L2 { + u-boot,dm-pre-reloc; +}; + &rst { u-boot,dm-pre-reloc; }; diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig index a3699e82a19e..1173422b8f28 100644 --- a/arch/arm/mach-socfpga/Kconfig +++ b/arch/arm/mach-socfpga/Kconfig @@ -67,6 +67,7 @@ config TARGET_SOCFPGA_CYCLONE5 config TARGET_SOCFPGA_GEN5 bool select SPL_ALTERA_SDRAM + select SPL_CACHE if SPL imply FPGA_SOCFPGA imply SPL_SIZE_LIMIT_SUBTRACT_GD imply SPL_SIZE_LIMIT_SUBTRACT_MALLOC -- 2.19.0

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[PATCH v1 0/9] mips: Add Octeon DDR4 init code
by Stefan Roese 09 Jun '20

09 Jun '20

This patch adds the DDR4 init code. It is ported from the 2013 Cavium / Marvell U-Boot version with no functional change. This was done intentionally, as this code is very large and complex and is known to work on many boards "as-is". So any functional change might have introduced (hidden) incompatibilities. Please note that the code has undergone many hours (read many days) of code cleanup and restructuring. Unfortunately its still not 100% checkpatch clean, as some warnings and checks can practically not be removed / addresses, like these here: CHECK: Prefer kernel type 's8' over 'int8_t' -> 's8' can't be used on MIPS platforms, as its a register macro or: WARNING: Too many leading tabs - consider code refactoring + while (xor != 0) { -> I've restructured the code already and its very hard to remove all these "Too many leading tabs" warnings. or other warnings / checks. But compared to the original code in much better shape (checkpatch wise). I would have liked to include a checkpatch summary in this cover- letter, showing the "before" (original code) and "after" (this code) numbers, but unfortunately currently running checkpatch on the really big file (octeon3_lmc.c) leads to many false errors. I can only suspect that checkpatch has an issue handling this big file because of its size. This code is tested on the Octeon3 EBB7304 EVK and works without any known issues with 1 or 2 DDR4 DIMM configurations (8 & 16 GiB). Please note that this patchset requires the following patches to be applied: - [PATCH v2 00/12] mips: Add initial Octeon MIPS64 base support - [PATCH v2] i2c: octeon_i2c: Add I2C controller driver for Octeon Thanks, Stefan Aaron Williams (6): mips: octeon: Add octeon-model.h header mips: octeon Add cvmx/cvmx-lmcx-defs.h header mips: octeon: Add octeon_ddr.h header ram: octeon: Add MIPS Octeon3 DDR4 support (part 1/3) ram: octeon: Add MIPS Octeon3 DDR4 support (part 2/3) ram: octeon: Add MIPS Octeon3 DDR4 support (part 3/3) Stefan Roese (3): mips: octeon: dts: mrvl,cn73xx.dtsi: Add memory controller DT node mips: octeon: dram.c: Add RAM driver support mips: octeon: octeon_ebb7304: Add DDR4 support arch/mips/dts/mrvl,cn73xx.dtsi | 17 + arch/mips/mach-octeon/dram.c | 41 +- .../include/mach/cvmx/cvmx-lmcx-defs.h | 4580 ++++++ .../mach-octeon/include/mach/octeon-model.h | 449 + .../mach-octeon/include/mach/octeon_ddr.h | 988 ++ board/Marvell/octeon_ebb7304/board.c | 22 +- board/Marvell/octeon_ebb7304/board_ddr.h | 447 + configs/octeon_ebb7304_defconfig | 3 + drivers/ram/Kconfig | 1 + drivers/ram/Makefile | 2 + drivers/ram/octeon/Kconfig | 17 + drivers/ram/octeon/Makefile | 8 + drivers/ram/octeon/dimm_spd_eeprom.c | 410 + drivers/ram/octeon/octeon3_lmc.c | 11485 ++++++++++++++++ drivers/ram/octeon/octeon_ddr.c | 2716 ++++ include/configs/octeon_common.h | 11 +- 16 files changed, 21183 insertions(+), 14 deletions(-) create mode 100644 arch/mips/mach-octeon/include/mach/cvmx/cvmx-lmcx-defs.h create mode 100644 arch/mips/mach-octeon/include/mach/octeon-model.h create mode 100644 arch/mips/mach-octeon/include/mach/octeon_ddr.h create mode 100644 board/Marvell/octeon_ebb7304/board_ddr.h create mode 100644 drivers/ram/octeon/Kconfig create mode 100644 drivers/ram/octeon/Makefile create mode 100644 drivers/ram/octeon/dimm_spd_eeprom.c create mode 100644 drivers/ram/octeon/octeon3_lmc.c create mode 100644 drivers/ram/octeon/octeon_ddr.c -- 2.27.0

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