May 2020 - U-Boot

[PATCH] powerpc: dts: p1010: add i2c node
by Biwen Li 06 May '20

06 May '20

From: Biwen Li <biwen.li(a)nxp.com> Add i2c node of p1010 Signed-off-by: Biwen Li <biwen.li(a)nxp.com> --- arch/powerpc/dts/p1010rdb-pb.dts | 1 + arch/powerpc/dts/p1010rdb-pb_36b.dts | 1 + arch/powerpc/dts/p1010rdb.dtsi | 14 ++++++++++++++ arch/powerpc/dts/p1010si-post.dtsi | 2 ++ 4 files changed, 18 insertions(+) create mode 100644 arch/powerpc/dts/p1010rdb.dtsi diff --git a/arch/powerpc/dts/p1010rdb-pb.dts b/arch/powerpc/dts/p1010rdb-pb.dts index 2675d5d92b..9ca562534f 100644 --- a/arch/powerpc/dts/p1010rdb-pb.dts +++ b/arch/powerpc/dts/p1010rdb-pb.dts @@ -15,3 +15,4 @@ }; /include/ "p1010si-post.dtsi" +/include/ "p1010rdb.dtsi" diff --git a/arch/powerpc/dts/p1010rdb-pb_36b.dts b/arch/powerpc/dts/p1010rdb-pb_36b.dts index 45ccf91c41..eeff2a8704 100644 --- a/arch/powerpc/dts/p1010rdb-pb_36b.dts +++ b/arch/powerpc/dts/p1010rdb-pb_36b.dts @@ -15,3 +15,4 @@ }; /include/ "p1010si-post.dtsi" +/include/ "p1010rdb.dtsi" diff --git a/arch/powerpc/dts/p1010rdb.dtsi b/arch/powerpc/dts/p1010rdb.dtsi new file mode 100644 index 0000000000..4f58ee2446 --- /dev/null +++ b/arch/powerpc/dts/p1010rdb.dtsi @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * P1010RDB Device Tree Source + * + * Copyright 2020 NXP + */ +&soc { + i2c@3000 { + rtc@68 { + compatible = "pericom,pt7c4338"; + reg = <0x68>; + }; + }; +}; diff --git a/arch/powerpc/dts/p1010si-post.dtsi b/arch/powerpc/dts/p1010si-post.dtsi index e24b5e4063..0289441381 100644 --- a/arch/powerpc/dts/p1010si-post.dtsi +++ b/arch/powerpc/dts/p1010si-post.dtsi @@ -23,6 +23,8 @@ single-cpu-affinity; last-interrupt-source = <255>; }; +/include/ "pq3-i2c-0.dtsi" +/include/ "pq3-i2c-1.dtsi" }; /* controller at 0x9000 */ -- 2.17.1

4 3

[PATCH v10 00/21] riscv: Add Sipeed Maix support
by Sean Anderson 06 May '20

06 May '20

This patch series adds support for Sipeed Maix boards and the Kendryte K210 CPU. Currently, only the Maix Bit V2.0 is supported, however other models are similar. The travis build [1] is incomplete as of this writing, but I've manually ran the jobs which failed last time [2], and they passed. As an aside, the travis output is seriously lacking. *Any* warning will cause the build to fail, and *no* output (such as *what warning caused the failure*) is present in the output. [1] https://travis-ci.org/github/Forty-Bot/u-boot/builds/682474410 [2] https://travis-ci.org/github/Forty-Bot/u-boot/builds/678437924 Known Bugs/Limitations: - Accessing the AI ram hangs, limiting available ram to 6M - Trying to boot an image with bootm fails with ERROR: Failed to allocate 0x7d60 bytes below 0x80000000. To flash u-boot to a maix bit, run kflash -tp /dev/<your tty here> -B bit_mic u-boot-dtb.bin Boot output should look like the following: U-Boot 2020.04-rc2-00087-g2221cc09c1-dirty (Feb 28 2020 - 13:53:09 -0500) DRAM: 8 MiB In: serial@38000000 Out: serial@38000000 Err: serial@38000000 => Changes for v10: - Fix warnings when casting fdt_addr_t - Fix warnings about const functions Changes for v9: - Fix error in Andes PLIC - Update MAINTAINERS - Mark dts blocks in documentation as "none" highlighting Changes for v8: - Removed dependency on the patch "clk: Add functions to register CCF clock structs". Hopefully this will make reviewing easier. Changes for v7: - Split documentation from other board support - Split IPI clear from other IPI cleanup - Rebased onto a clean upstream. Hopefully this fixes any patching problems. Changes for v6: - Remove spi, pinmux, gpio, led, and wdt support --- to be added in separate patches - Rebase onto master - Clear IPIs before enabling them - Reorganize code so checkpatch errors less Changes for v5: - Rebase onto master - Add pinconf support - Add gpio support - Store environment in spi flash - Group patches by prefix - Add additional documentation - Add SMP support - Add WDT support Changes for v4: - Linted several patches - Updated the copyright year for several files - Added tests for syscon-reset, simple-pm-bus, and the pll calc_rate function - Added/updated documentation - Fixed SPI for the nor flash - Fixed PLLs not enabling/setting rate properly - RISCV_PRIV_1_9_1 now (un)defines all diferring CSRs, and also disables VM - More devicetree changes Changes for v3: - Remove patch to set RV64I as default - Remove patch for a separate sysctl driver - Split off cpu frequency patch into its own series - Reorder support/devicetree patches to come last - Add patch for reset driver - Add simple-pm-bus for busses with their own clocks - Add additional documentation - Reword mcounteren patch to refer to the RISC-V priv spec 1.9.1 - Many devicetree changes - Switch to "make savedefconfig" to generate the config Changes for v2: - Many bugfixes for the device tree - Modify the config to build without errors - Add support for keeping internal PLL frequencies in-range - Fix several rebase-induced artifacts Sean Anderson (21): clk: Always use the supplied struct clk clk: Check that ops of composite clock components exist before calling clk: Unconditionally recursively en-/dis-able clocks clk: Fix clk_get_by_* handling of index clk: Add K210 pll support clk: Add a bypass clock for K210 clk: Add K210 clock support dm: Add support for simple-pm-bus dm: Fix error handling for dev_read_addr_ptr reset: Add generic reset driver lib: Always set errno in hcreate_r riscv: Add headers for asm/global_data.h riscv: Clear pending interrupts before enabling IPIs riscv: Clean up IPI initialization code riscv: Add option to support RISC-V privileged spec 1.9 riscv: Allow use of reset drivers riscv: Try to get cpu frequency from a "clocks" node if it exists riscv: Enable cpu clock if it is present riscv: Add device tree for K210 and Sipeed Maix BitM doc: riscv: Add documentation for Sipeed Maix Bit riscv: Add Sipeed Maix support MAINTAINERS | 7 + arch/riscv/Kconfig | 14 + arch/riscv/cpu/cpu.c | 15 + arch/riscv/cpu/start.S | 2 + arch/riscv/dts/Makefile | 1 + arch/riscv/dts/k210-maix-bit.dts | 47 ++ arch/riscv/dts/k210.dtsi | 594 ++++++++++++++++ arch/riscv/include/asm/csr.h | 40 ++ arch/riscv/include/asm/global_data.h | 2 + arch/riscv/include/asm/smp.h | 43 ++ arch/riscv/lib/andes_plic.c | 34 +- arch/riscv/lib/reset.c | 2 + arch/riscv/lib/sbi_ipi.c | 5 + arch/riscv/lib/sifive_clint.c | 33 +- arch/riscv/lib/smp.c | 56 +- arch/sandbox/dts/test.dts | 21 + arch/sandbox/include/asm/clk.h | 1 + board/sipeed/maix/Kconfig | 47 ++ board/sipeed/maix/MAINTAINERS | 11 + board/sipeed/maix/Makefile | 5 + board/sipeed/maix/maix.c | 41 ++ configs/sandbox_defconfig | 3 + configs/sipeed_maix_bitm_defconfig | 8 + doc/board/index.rst | 1 + doc/board/sipeed/index.rst | 9 + doc/board/sipeed/maix.rst | 298 ++++++++ .../bus/simple-pm-bus.txt | 44 ++ .../mfd/kendryte,k210-sysctl.txt | 33 + .../reset/syscon-reset.txt | 36 + doc/imx/clk/ccf.txt | 63 +- drivers/clk/Kconfig | 1 + drivers/clk/Makefile | 1 + drivers/clk/clk-composite.c | 64 +- drivers/clk/clk-divider.c | 6 +- drivers/clk/clk-fixed-factor.c | 3 +- drivers/clk/clk-gate.c | 6 +- drivers/clk/clk-mux.c | 12 +- drivers/clk/clk-uclass.c | 68 +- drivers/clk/imx/clk-gate2.c | 4 +- drivers/clk/imx/clk-imx8mp.c | 2 +- drivers/clk/kendryte/Kconfig | 12 + drivers/clk/kendryte/Makefile | 1 + drivers/clk/kendryte/bypass.c | 270 +++++++ drivers/clk/kendryte/clk.c | 663 ++++++++++++++++++ drivers/clk/kendryte/pll.c | 601 ++++++++++++++++ drivers/core/Kconfig | 7 + drivers/core/Makefile | 1 + drivers/core/read.c | 2 +- drivers/core/simple-pm-bus.c | 56 ++ drivers/cpu/riscv_cpu.c | 39 +- drivers/pinctrl/broadcom/pinctrl-bcm283x.c | 2 +- drivers/pinctrl/mediatek/pinctrl-mtk-common.c | 2 +- drivers/reset/Kconfig | 5 + drivers/reset/Makefile | 1 + drivers/reset/reset-syscon.c | 80 +++ include/configs/sipeed-maix.h | 24 + include/dm/read.h | 4 +- include/dt-bindings/clock/k210-sysctl.h | 59 ++ include/dt-bindings/mfd/k210-sysctl.h | 38 + include/dt-bindings/reset/k210-sysctl.h | 38 + include/kendryte/bypass.h | 31 + include/kendryte/clk.h | 35 + include/kendryte/pll.h | 57 ++ include/test/export.h | 16 + lib/hashtable.c | 8 +- test/dm/Makefile | 3 + test/dm/k210_pll.c | 96 +++ test/dm/simple-pm-bus.c | 45 ++ test/dm/syscon-reset.c | 58 ++ 69 files changed, 3732 insertions(+), 205 deletions(-) create mode 100644 arch/riscv/dts/k210-maix-bit.dts create mode 100644 arch/riscv/dts/k210.dtsi create mode 100644 board/sipeed/maix/Kconfig create mode 100644 board/sipeed/maix/MAINTAINERS create mode 100644 board/sipeed/maix/Makefile create mode 100644 board/sipeed/maix/maix.c create mode 100644 configs/sipeed_maix_bitm_defconfig create mode 100644 doc/board/sipeed/index.rst create mode 100644 doc/board/sipeed/maix.rst create mode 100644 doc/device-tree-bindings/bus/simple-pm-bus.txt create mode 100644 doc/device-tree-bindings/mfd/kendryte,k210-sysctl.txt create mode 100644 doc/device-tree-bindings/reset/syscon-reset.txt create mode 100644 drivers/clk/kendryte/Kconfig create mode 100644 drivers/clk/kendryte/Makefile create mode 100644 drivers/clk/kendryte/bypass.c create mode 100644 drivers/clk/kendryte/clk.c create mode 100644 drivers/clk/kendryte/pll.c create mode 100644 drivers/core/simple-pm-bus.c create mode 100644 drivers/reset/reset-syscon.c create mode 100644 include/configs/sipeed-maix.h create mode 100644 include/dt-bindings/clock/k210-sysctl.h create mode 100644 include/dt-bindings/mfd/k210-sysctl.h create mode 100644 include/dt-bindings/reset/k210-sysctl.h create mode 100644 include/kendryte/bypass.h create mode 100644 include/kendryte/clk.h create mode 100644 include/kendryte/pll.h create mode 100644 include/test/export.h create mode 100644 test/dm/k210_pll.c create mode 100644 test/dm/simple-pm-bus.c create mode 100644 test/dm/syscon-reset.c -- 2.26.2

2 27

[v2 1/4] powerpc: Enable device tree support for P1010RDB
by Biwen Li 06 May '20

06 May '20

From: Hou Zhiqiang <Zhiqiang.Hou(a)nxp.com> Add device tree for P1010RDB boards and enable CONFIG_OF_CONTROL so that device tree can be compiled. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou(a)nxp.com> --- V2: - Rebase the patch without functionality change. arch/powerpc/dts/Makefile | 2 + arch/powerpc/dts/p1010rdb-pa.dts | 17 ++++++++ arch/powerpc/dts/p1010rdb-pa_36b.dts | 17 ++++++++ arch/powerpc/dts/p1010rdb-pb.dts | 17 ++++++++ arch/powerpc/dts/p1010rdb-pb_36b.dts | 17 ++++++++ arch/powerpc/dts/p1010rdb_32b.dtsi | 22 ++++++++++ arch/powerpc/dts/p1010rdb_36b.dtsi | 22 ++++++++++ arch/powerpc/dts/p1010si-post.dtsi | 46 ++++++++++++++++++++ arch/powerpc/dts/p1010si-pre.dtsi | 27 ++++++++++++ configs/P1010RDB-PA_36BIT_NAND_defconfig | 3 +- configs/P1010RDB-PA_36BIT_NOR_defconfig | 4 +- configs/P1010RDB-PA_36BIT_SDCARD_defconfig | 3 +- configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig | 3 +- configs/P1010RDB-PA_NAND_defconfig | 3 +- configs/P1010RDB-PA_NOR_defconfig | 4 +- configs/P1010RDB-PA_SDCARD_defconfig | 3 +- configs/P1010RDB-PA_SPIFLASH_defconfig | 3 +- configs/P1010RDB-PB_36BIT_NAND_defconfig | 3 +- configs/P1010RDB-PB_36BIT_NOR_defconfig | 4 +- configs/P1010RDB-PB_36BIT_SDCARD_defconfig | 3 +- configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig | 3 +- configs/P1010RDB-PB_NAND_defconfig | 3 +- configs/P1010RDB-PB_NOR_defconfig | 4 +- configs/P1010RDB-PB_SDCARD_defconfig | 3 +- configs/P1010RDB-PB_SPIFLASH_defconfig | 3 +- 25 files changed, 223 insertions(+), 16 deletions(-) create mode 100644 arch/powerpc/dts/p1010rdb-pa.dts create mode 100644 arch/powerpc/dts/p1010rdb-pa_36b.dts create mode 100644 arch/powerpc/dts/p1010rdb-pb.dts create mode 100644 arch/powerpc/dts/p1010rdb-pb_36b.dts create mode 100644 arch/powerpc/dts/p1010rdb_32b.dtsi create mode 100644 arch/powerpc/dts/p1010rdb_36b.dtsi create mode 100644 arch/powerpc/dts/p1010si-post.dtsi create mode 100644 arch/powerpc/dts/p1010si-pre.dtsi diff --git a/arch/powerpc/dts/Makefile b/arch/powerpc/dts/Makefile index 3195351c9c..7eb005f450 100644 --- a/arch/powerpc/dts/Makefile +++ b/arch/powerpc/dts/Makefile @@ -1,6 +1,8 @@ # SPDX-License-Identifier: GPL-2.0+ dtb-$(CONFIG_TARGET_MPC8548CDS) += mpc8548cds.dtb mpc8548cds_36b.dtb +dtb-$(CONFIG_TARGET_P1010RDB_PA) += p1010rdb-pa.dtb p1010rdb-pa_36b.dtb +dtb-$(CONFIG_TARGET_P1010RDB_PB) += p1010rdb-pb.dtb p1010rdb-pb_36b.dtb dtb-$(CONFIG_TARGET_P1020RDB_PC) += p1020rdb-pc.dtb p1020rdb-pc_36b.dtb dtb-$(CONFIG_TARGET_P1020RDB_PD) += p1020rdb-pd.dtb dtb-$(CONFIG_TARGET_P2020RDB) += p2020rdb-pc.dtb p2020rdb-pc_36b.dtb diff --git a/arch/powerpc/dts/p1010rdb-pa.dts b/arch/powerpc/dts/p1010rdb-pa.dts new file mode 100644 index 0000000000..c66c4923ac --- /dev/null +++ b/arch/powerpc/dts/p1010rdb-pa.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * P1010 RDB Device Tree Source + * + * Copyright 2020 NXP + */ + +/include/ "p1010si-pre.dtsi" + +/ { + model = "fsl,P1010RDB"; + compatible = "fsl,P1010RDB"; + + /include/ "p1010rdb_32b.dtsi" +}; + +/include/ "p1010si-post.dtsi" diff --git a/arch/powerpc/dts/p1010rdb-pa_36b.dts b/arch/powerpc/dts/p1010rdb-pa_36b.dts new file mode 100644 index 0000000000..b943de7cbb --- /dev/null +++ b/arch/powerpc/dts/p1010rdb-pa_36b.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * P1010 RDB Device Tree Source (36-bit address map) + * + * Copyright 2020 NXP + */ + +/include/ "p1010si-pre.dtsi" + +/ { + model = "fsl,P1010RDB"; + compatible = "fsl,P1010RDB"; + + /include/ "p1010rdb_36b.dtsi" +}; + +/include/ "p1010si-post.dtsi" diff --git a/arch/powerpc/dts/p1010rdb-pb.dts b/arch/powerpc/dts/p1010rdb-pb.dts new file mode 100644 index 0000000000..2675d5d92b --- /dev/null +++ b/arch/powerpc/dts/p1010rdb-pb.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * P1010RDB Device Tree Source + * + * Copyright 2020 NXP + */ + +/include/ "p1010si-pre.dtsi" + +/ { + model = "fsl,P1010RDB-PB"; + compatible = "fsl,P1010RDB-PB"; + + /include/ "p1010rdb_32b.dtsi" +}; + +/include/ "p1010si-post.dtsi" diff --git a/arch/powerpc/dts/p1010rdb-pb_36b.dts b/arch/powerpc/dts/p1010rdb-pb_36b.dts new file mode 100644 index 0000000000..45ccf91c41 --- /dev/null +++ b/arch/powerpc/dts/p1010rdb-pb_36b.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * P1010 RDB Device Tree Source (36-bit address map) + * + * Copyright 2020 NXP + */ + +/include/ "p1010si-pre.dtsi" + +/ { + model = "fsl,P1010RDB-PB"; + compatible = "fsl,P1010RDB-PB"; + + /include/ "p1010rdb_36b.dtsi" +}; + +/include/ "p1010si-post.dtsi" diff --git a/arch/powerpc/dts/p1010rdb_32b.dtsi b/arch/powerpc/dts/p1010rdb_32b.dtsi new file mode 100644 index 0000000000..5da790da5e --- /dev/null +++ b/arch/powerpc/dts/p1010rdb_32b.dtsi @@ -0,0 +1,22 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * P1010RDB Device Tree Source + * + * Copyright 2020 NXP + */ + +soc: soc@ffe00000 { + ranges = <0x0 0x0 0xffe00000 0x100000>; +}; + +pci1: pcie@ffe09000 { + reg = <0 0xffe09000 0 0x1000>; + ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 + 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; +}; + +pci0: pcie@ffe0a000 { + reg = <0 0xffe0a000 0 0x1000>; + ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 + 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; +}; diff --git a/arch/powerpc/dts/p1010rdb_36b.dtsi b/arch/powerpc/dts/p1010rdb_36b.dtsi new file mode 100644 index 0000000000..54dd16e43b --- /dev/null +++ b/arch/powerpc/dts/p1010rdb_36b.dtsi @@ -0,0 +1,22 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * P1010RDB Device Tree Source (36-bit address map) + * + * Copyright 2020 NXP + */ + +soc: soc@fffe00000 { + ranges = <0x0 0xf 0xffe00000 0x100000>; +}; + +pci1: pcie@fffe09000 { + reg = <0xf 0xffe09000 0 0x1000>; + ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000 + 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>; +}; + +pci0: pcie@fffe0a000 { + reg = <0xf 0xffe0a000 0 0x1000>; + ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000 + 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>; +}; diff --git a/arch/powerpc/dts/p1010si-post.dtsi b/arch/powerpc/dts/p1010si-post.dtsi new file mode 100644 index 0000000000..e24b5e4063 --- /dev/null +++ b/arch/powerpc/dts/p1010si-post.dtsi @@ -0,0 +1,46 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * P1010 Silicon/SoC Device Tree Source (post include) + * + * Copyright 2020 NXP + */ + +&soc { + #address-cells = <1>; + #size-cells = <1>; + device_type = "soc"; + compatible = "fsl,p1010-immr", "simple-bus"; + bus-frequency = <0>; + + mpic: pic@40000 { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <4>; + reg = <0x40000 0x40000>; + compatible = "fsl,mpic"; + device_type = "open-pic"; + big-endian; + single-cpu-affinity; + last-interrupt-source = <255>; + }; +}; + +/* controller at 0x9000 */ +&pci1 { + compatible = "fsl,pcie-p1_p2", "fsl,pcie-fsl-qoriq"; + law_trgt_if = <1>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0x0 0xff>; +}; + +/* controller at 0xa000 */ +&pci0 { + compatible = "fsl,pcie-p1_p2", "fsl,pcie-fsl-qoriq"; + law_trgt_if = <2>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0x0 0xff>; +}; diff --git a/arch/powerpc/dts/p1010si-pre.dtsi b/arch/powerpc/dts/p1010si-pre.dtsi new file mode 100644 index 0000000000..9d7bb6c95d --- /dev/null +++ b/arch/powerpc/dts/p1010si-pre.dtsi @@ -0,0 +1,27 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * P1010 Silicon/SoC Device Tree Source (pre include) + * + * Copyright 2020 NXP + */ + +/dts-v1/; + +/include/ "e500v2_power_isa.dtsi" + +/ { + compatible = "fsl,P1010"; + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&mpic>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + PowerPC,P1010@0 { + device_type = "cpu"; + reg = <0x0>; + }; + }; +}; diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig index 85b97d1e15..b0dd5f8f7e 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig @@ -10,6 +10,8 @@ CONFIG_SPL=y CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa_36b" +CONFIG_OF_CONTROL=y CONFIG_PHYS_64BIT=y CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" @@ -76,6 +78,5 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y CONFIG_DM_I2C=y CONFIG_DM_RTC=y diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig index e1109637c1..93042f8cc8 100644 --- a/configs/P1010RDB-PA_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig @@ -3,7 +3,10 @@ CONFIG_SYS_TEXT_BASE=0xEFF40000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_MPC85xx=y +CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_TARGET_P1010RDB_PA=y +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa_36b" +CONFIG_OF_CONTROL=y CONFIG_PHYS_64BIT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -57,6 +60,5 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y CONFIG_DM_I2C=y CONFIG_DM_RTC=y diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig index 4b8ddd997c..657b10033b 100644 --- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig @@ -11,6 +11,8 @@ CONFIG_SPL=y CONFIG_SPL_TEXT_BASE=0xD0001000 CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa_36b" +CONFIG_OF_CONTROL=y CONFIG_PHYS_64BIT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -70,6 +72,5 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y CONFIG_DM_I2C=y CONFIG_DM_RTC=y diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig index 2975f404fc..396921722d 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig @@ -13,6 +13,8 @@ CONFIG_SPL_SPI_SUPPORT=y CONFIG_SPL_TEXT_BASE=0xD0001000 CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa_36b" +CONFIG_OF_CONTROL=y CONFIG_PHYS_64BIT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -72,6 +74,5 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y CONFIG_DM_I2C=y CONFIG_DM_RTC=y diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig index 632ecd7af5..b080bb726b 100644 --- a/configs/P1010RDB-PA_NAND_defconfig +++ b/configs/P1010RDB-PA_NAND_defconfig @@ -10,6 +10,8 @@ CONFIG_SPL=y CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa" +CONFIG_OF_CONTROL=y CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" CONFIG_FIT=y @@ -75,6 +77,5 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y CONFIG_DM_I2C=y CONFIG_DM_RTC=y diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig index 037fe0ab89..a5296a53a5 100644 --- a/configs/P1010RDB-PA_NOR_defconfig +++ b/configs/P1010RDB-PA_NOR_defconfig @@ -3,7 +3,10 @@ CONFIG_SYS_TEXT_BASE=0xEFF40000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_MPC85xx=y +CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_TARGET_P1010RDB_PA=y +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa" +CONFIG_OF_CONTROL=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -56,6 +59,5 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y CONFIG_DM_I2C=y CONFIG_DM_RTC=y diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig index 48a1d34cc9..1df83cefe3 100644 --- a/configs/P1010RDB-PA_SDCARD_defconfig +++ b/configs/P1010RDB-PA_SDCARD_defconfig @@ -11,6 +11,8 @@ CONFIG_SPL=y CONFIG_SPL_TEXT_BASE=0xD0001000 CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa" +CONFIG_OF_CONTROL=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -69,6 +71,5 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y CONFIG_DM_I2C=y CONFIG_DM_RTC=y diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig index f43c60011c..6bff366f81 100644 --- a/configs/P1010RDB-PA_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_defconfig @@ -13,6 +13,8 @@ CONFIG_SPL_SPI_SUPPORT=y CONFIG_SPL_TEXT_BASE=0xD0001000 CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa" +CONFIG_OF_CONTROL=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -71,6 +73,5 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y CONFIG_DM_I2C=y CONFIG_DM_RTC=y diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig index dd7d689163..abf8882f21 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig @@ -10,6 +10,8 @@ CONFIG_SPL=y CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb_36b" +CONFIG_OF_CONTROL=y CONFIG_PHYS_64BIT=y CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" @@ -76,6 +78,5 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y CONFIG_DM_I2C=y CONFIG_DM_RTC=y diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig index 7e8c150603..beb8f098c4 100644 --- a/configs/P1010RDB-PB_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig @@ -3,7 +3,10 @@ CONFIG_SYS_TEXT_BASE=0xEFF40000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_MPC85xx=y +CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_TARGET_P1010RDB_PB=y +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb_36b" +CONFIG_OF_CONTROL=y CONFIG_PHYS_64BIT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -57,6 +60,5 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y CONFIG_DM_I2C=y CONFIG_DM_RTC=y diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig index 7996490e93..7244dacec0 100644 --- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig @@ -11,6 +11,8 @@ CONFIG_SPL=y CONFIG_SPL_TEXT_BASE=0xD0001000 CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb_36b" +CONFIG_OF_CONTROL=y CONFIG_PHYS_64BIT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -70,6 +72,5 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y CONFIG_DM_I2C=y CONFIG_DM_RTC=y diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig index 4291002d34..1d40aa054b 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig @@ -13,6 +13,8 @@ CONFIG_SPL_SPI_SUPPORT=y CONFIG_SPL_TEXT_BASE=0xD0001000 CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb_36b" +CONFIG_OF_CONTROL=y CONFIG_PHYS_64BIT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -72,6 +74,5 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y CONFIG_DM_I2C=y CONFIG_DM_RTC=y diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig index 4a216dd55b..0d9df36ea1 100644 --- a/configs/P1010RDB-PB_NAND_defconfig +++ b/configs/P1010RDB-PB_NAND_defconfig @@ -10,6 +10,8 @@ CONFIG_SPL=y CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb" +CONFIG_OF_CONTROL=y CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" CONFIG_FIT=y @@ -75,6 +77,5 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y CONFIG_DM_I2C=y CONFIG_DM_RTC=y diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig index 2cc52ed76d..653c89bfdd 100644 --- a/configs/P1010RDB-PB_NOR_defconfig +++ b/configs/P1010RDB-PB_NOR_defconfig @@ -3,7 +3,10 @@ CONFIG_SYS_TEXT_BASE=0xEFF40000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_MPC85xx=y +CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_TARGET_P1010RDB_PB=y +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb" +CONFIG_OF_CONTROL=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -56,6 +59,5 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y CONFIG_DM_I2C=y CONFIG_DM_RTC=y diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig index d90cc8e7bb..7bc05e57ba 100644 --- a/configs/P1010RDB-PB_SDCARD_defconfig +++ b/configs/P1010RDB-PB_SDCARD_defconfig @@ -11,6 +11,8 @@ CONFIG_SPL=y CONFIG_SPL_TEXT_BASE=0xD0001000 CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb" +CONFIG_OF_CONTROL=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -69,6 +71,5 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y CONFIG_DM_I2C=y CONFIG_DM_RTC=y diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig index e6833d43e3..16976e4a88 100644 --- a/configs/P1010RDB-PB_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_defconfig @@ -13,6 +13,8 @@ CONFIG_SPL_SPI_SUPPORT=y CONFIG_SPL_TEXT_BASE=0xD0001000 CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb" +CONFIG_OF_CONTROL=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -71,6 +73,5 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y CONFIG_DM_I2C=y CONFIG_DM_RTC=y -- 2.17.1

2 4

[v3 01/27] rtc: ds1337: Add driver model support
by Biwen Li 06 May '20

06 May '20

From: Biwen Li <biwen.li(a)nxp.com> Add support of driver model of ds1337 Signed-off-by: Biwen Li <biwen.li(a)nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain(a)nxp.com> --- Change in v3: - fix checkpatch warning Change in v2: - none drivers/rtc/ds1337.c | 128 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 128 insertions(+) diff --git a/drivers/rtc/ds1337.c b/drivers/rtc/ds1337.c index 9b31048e97..af94bcfdf4 100644 --- a/drivers/rtc/ds1337.c +++ b/drivers/rtc/ds1337.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * (C) Copyright 2001-2008 + * Copyright 2020 NXP * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. * Keith Outwater, keith_outwater(a)mvis.com` */ @@ -12,6 +13,7 @@ #include <common.h> #include <command.h> +#include <dm.h> #include <rtc.h> #include <i2c.h> @@ -60,6 +62,7 @@ #define RTC_STAT_BIT_OSF 0x80 /* Oscillator stop flag */ +#if !CONFIG_IS_ENABLED(DM_RTC) static uchar rtc_read (uchar reg); static void rtc_write (uchar reg, uchar val); @@ -188,3 +191,128 @@ static void rtc_write (uchar reg, uchar val) { i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val); } +#else +static uchar rtc_read(struct udevice *dev, uchar reg) +{ + return dm_i2c_reg_read(dev, reg); +} + +static void rtc_write(struct udevice *dev, uchar reg, uchar val) +{ + dm_i2c_reg_write(dev, reg, val); +} + +static int ds1337_rtc_get(struct udevice *dev, struct rtc_time *tmp) +{ + int rel = 0; + uchar sec, min, hour, mday, wday, mon_cent, year, control, status; + + control = rtc_read(dev, RTC_CTL_REG_ADDR); + status = rtc_read(dev, RTC_STAT_REG_ADDR); + sec = rtc_read(dev, RTC_SEC_REG_ADDR); + min = rtc_read(dev, RTC_MIN_REG_ADDR); + hour = rtc_read(dev, RTC_HR_REG_ADDR); + wday = rtc_read(dev, RTC_DAY_REG_ADDR); + mday = rtc_read(dev, RTC_DATE_REG_ADDR); + mon_cent = rtc_read(dev, RTC_MON_REG_ADDR); + year = rtc_read(dev, RTC_YR_REG_ADDR); + + /* No century bit, assume year 2000 */ +#ifdef CONFIG_RTC_DS1388 + mon_cent |= 0x80; +#endif + + debug("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x\n", + year, mon_cent, mday, wday); + debug("hr: %02x min: %02x sec: %02x control: %02x status: %02x\n", + hour, min, sec, control, status); + + if (status & RTC_STAT_BIT_OSF) { + printf("### Warning: RTC oscillator has stopped\n"); + /* clear the OSF flag */ + rtc_write(dev, RTC_STAT_REG_ADDR, + rtc_read(dev, RTC_STAT_REG_ADDR) & ~RTC_STAT_BIT_OSF); + rel = -1; + } + + tmp->tm_sec = bcd2bin(sec & 0x7F); + tmp->tm_min = bcd2bin(min & 0x7F); + tmp->tm_hour = bcd2bin(hour & 0x3F); + tmp->tm_mday = bcd2bin(mday & 0x3F); + tmp->tm_mon = bcd2bin(mon_cent & 0x1F); + tmp->tm_year = bcd2bin(year) + ((mon_cent & 0x80) ? 2000 : 1900); + tmp->tm_wday = bcd2bin((wday - 1) & 0x07); + tmp->tm_yday = 0; + tmp->tm_isdst = 0; + + debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, + tmp->tm_hour, tmp->tm_min, tmp->tm_sec); + + return rel; +} + +static int ds1337_rtc_set(struct udevice *dev, const struct rtc_time *tmp) +{ + uchar century; + + debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, + tmp->tm_hour, tmp->tm_min, tmp->tm_sec); + + rtc_write(dev, RTC_YR_REG_ADDR, bin2bcd(tmp->tm_year % 100)); + + century = (tmp->tm_year >= 2000) ? 0x80 : 0; + rtc_write(dev, RTC_MON_REG_ADDR, bin2bcd(tmp->tm_mon) | century); + + rtc_write(dev, RTC_DAY_REG_ADDR, bin2bcd(tmp->tm_wday + 1)); + rtc_write(dev, RTC_DATE_REG_ADDR, bin2bcd(tmp->tm_mday)); + rtc_write(dev, RTC_HR_REG_ADDR, bin2bcd(tmp->tm_hour)); + rtc_write(dev, RTC_MIN_REG_ADDR, bin2bcd(tmp->tm_min)); + rtc_write(dev, RTC_SEC_REG_ADDR, bin2bcd(tmp->tm_sec)); + + return 0; +} + +#ifdef CONFIG_RTC_DS1337_NOOSC + #define RTC_DS1337_RESET_VAL \ + (RTC_CTL_BIT_INTCN | RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2) +#else + #define RTC_DS1337_RESET_VAL (RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2) +#endif +static int ds1337_rtc_reset(struct udevice *dev) +{ +#ifdef CONFIG_RTC_DS1337 + rtc_write(dev, RTC_CTL_REG_ADDR, RTC_DS1337_RESET_VAL); +#elif defined CONFIG_RTC_DS1388 + rtc_write(dev, RTC_CTL_REG_ADDR, 0x0); /* hw default */ +#endif +#ifdef CONFIG_RTC_DS1339_TCR_VAL + rtc_write(dev, RTC_TC_REG_ADDR, CONFIG_RTC_DS1339_TCR_VAL); +#endif +#ifdef CONFIG_RTC_DS1388_TCR_VAL + rtc_write(dev, RTC_TC_REG_ADDR, CONFIG_RTC_DS1388_TCR_VAL); +#endif + return 0; +} + +static const struct rtc_ops ds1337_rtc_ops = { + .get = ds1337_rtc_get, + .set = ds1337_rtc_set, + .reset = ds1337_rtc_reset, +}; + +static const struct udevice_id ds1337_rtc_ids[] = { + { .compatible = "ds1337" }, + { .compatible = "ds1338" }, + { .compatible = "ds1338" }, + { } +}; + +U_BOOT_DRIVER(rtc_ds1337) = { + .name = "rtc-ds1337", + .id = UCLASS_RTC, + .of_match = ds1337_rtc_ids, + .ops = &ds1337_rtc_ops, +}; +#endif -- 2.17.1

2 27

[PATCH v5 0/6] log: syslog logging driver
by Heinrich Schuchardt 06 May '20

06 May '20

This patch series provides a logging driver to send syslog messages via UDP port 514 to a syslog server and a unit test for the syslog driver. For testing LOG_SYSLOG is enabled on the sandbox. For CONFIG_LOG=n a patch enables printf() or debug() output for log_* functions. A unit test for this use case is provided. v5: do not build syslog driver in SPL v4: correct syslog test (expect 'uboot:' not 'uboot[1]:') provide more comments for syslog test *** BLURB HERE *** Heinrich Schuchardt (6): log: correct CONFIG_LOG_TEST prerequisites log: syslog driver log: output for CONFIG_LOG=n test: log functions with CONFIG_LOG=n test: log: test syslog logging driver configs: sandbox: enable LOG_SYSLOG MAINTAINERS | 4 +- common/Kconfig | 9 +- common/Makefile | 1 + common/log_syslog.c | 117 ++++++++++++ configs/sandbox64_defconfig | 1 + configs/sandbox_defconfig | 1 + configs/sandbox_flattree_defconfig | 1 + doc/README.log | 3 + include/log.h | 10 +- include/test/log.h | 16 ++ include/test/suites.h | 1 + test/Kconfig | 9 + test/Makefile | 2 +- test/cmd_ut.c | 6 + test/log/Makefile | 14 ++ test/log/nolog_test.c | 135 ++++++++++++++ test/log/syslog_test.c | 280 +++++++++++++++++++++++++++++ test/log/test-main.c | 20 +++ 18 files changed, 621 insertions(+), 9 deletions(-) create mode 100644 common/log_syslog.c create mode 100644 include/test/log.h create mode 100644 test/log/nolog_test.c create mode 100644 test/log/syslog_test.c create mode 100644 test/log/test-main.c -- 2.25.0

5 18

[PATCH v2 0/9] Add Rockchip RK3399 USB3.0 Host support
by Frank Wang 06 May '20

06 May '20

This series add quirks for DWC3 and add Rockchip RK3399 USB3.0 host support. For V2 update: - Amend type-c driver followed Jagan's comments for [PATCH 5/8]. - Fix dts commit for [PATCH 7/8]. - Split RK3399 default config for [PATCH 8/8]. - Add 'Reviewed-by' tag for [PATCH 1/8], [PATCH 2/8] and [PATCH 3/8]. Frank Wang (9): usb: dwc3: add dis_enblslpm_quirk usb: dwc3: add dis_u2_freeclk_exists_quirk usb: dwc3: amend UTMI/UTMIW phy interface setup usb: dwc3: add make compatible for rockchip platform phy: rockchip: add a new driver for type-c phy driver: usb: drop legacy rockchip xhci driver ARM: dts: rk3399: amend dwc3 related nodes configs: evb-rk3399: slect type-c phy support configs: evb-rk3399: update support usb3.0 host arch/arm/dts/rk3399-evb.dts | 16 + arch/arm/dts/rk3399.dtsi | 54 ++- configs/evb-rk3399_defconfig | 5 + drivers/phy/Kconfig | 7 + drivers/phy/Makefile | 1 + drivers/phy/phy-rockchip-typec.c | 523 +++++++++++++++++++++++++ drivers/usb/common/common.c | 25 ++ drivers/usb/dwc3/core.c | 77 ++-- drivers/usb/dwc3/core.h | 8 + drivers/usb/dwc3/dwc3-generic.c | 33 +- drivers/usb/host/Kconfig | 9 - drivers/usb/host/Makefile | 1 - drivers/usb/host/xhci-rockchip.c | 196 --------- include/dwc3-uboot.h | 2 + include/linux/usb/phy.h | 18 + include/linux/usb/rockchip_phy_typec.h | 52 +++ 16 files changed, 763 insertions(+), 264 deletions(-) create mode 100644 drivers/phy/phy-rockchip-typec.c delete mode 100644 drivers/usb/host/xhci-rockchip.c create mode 100644 include/linux/usb/rockchip_phy_typec.h -- 2.17.1

2 16

[PATCH v7 00/14] Add support for MediaTek xHCI host controller
by Chunfeng Yun 06 May '20

06 May '20

The series of patches are used to support xHCI host controller on MediaTek SoCs which has a glue layer IPPC (IP Port Control), and add USB function on T-PHY including T-PHY V1 and V2; Finally add USB related nodes for MT7629 platform. The files of xhci-mtk.* and phy-mtk-tphy.* are ported from Linux Kenrel 5.6-rc1 v7 changes: 1. add @index for nodes with reg property suggested by Fabio 2. provide phy bulk init/exit/power on/off suggested by Jagan v6 changes: 1. add Reviewed-by Simon & Weijie v5 changes: 1. print error number suggested by Marek 2. support interrupt transfer 3. update MAINTAINER about MediaTek v4 changes: 1. add phy_bulk API 2. use phy_bulk in xhci-mtk driver, also include dwc3/dwc2 drivers v3 changes: 1. provide non/inline edev_get_child_count() suggested by Simon 2. squash [PATCH v2 02/10] into [PATCH v2 03/10] suggested by Simon 3. use macros to access IPPC registers suggested by Marek v2 changes: 1. move ofnode_get_child_count() into ofnode.c suggested by Simon 2. add a test item for ofnode_get_child_count() suggested by Simon 3. use clk_bulk to get clocks suggested by Marek 4. use clrsetbits_le32() etc suggeseted by Marek 5. get the count of phys by dev_get_child_count() 6. drop reference to fixed clock clk20m Chunfeng Yun (14): dm: core: Add function to get child count of ofnode or device test: dm: add test item for ofnode_get_child_count() phy: Add API for a bulk of phys test: dm: phy: add a test item for the phy_bulk API usb: dwc3: use the phy bulk API to get phys usb: dwc2_udc_otg: use the phy bulk API to get phys phy: phy-mtk-tphy: add support USB phys phy: phy-mtk-tphy: add support new version phy: phy-mtk-tphy: add a new reference clock xhci: mediatek: Add support for MTK xHCI host controller arm: dts: mt7629: add usb related nodes dt-bindings: phy-mtk-tphy: add properties of address mapping and clocks dt-bindings: usb: mtk-xhci: Add binding for MediaTek xHCI host controller MAINTAINERS: MediaTek: add USB related files MAINTAINERS | 3 + arch/arm/dts/mt7629-rfb.dts | 8 + arch/arm/dts/mt7629.dtsi | 41 +++ arch/sandbox/dts/test.dts | 29 ++ doc/device-tree-bindings/phy/phy-mtk-tphy.txt | 78 ++++- .../usb/mediatek,mtk-xhci.txt | 40 +++ drivers/core/ofnode.c | 11 + drivers/core/read.c | 5 + drivers/phy/phy-mtk-tphy.c | 316 +++++++++++++++++- drivers/phy/phy-uclass.c | 97 ++++++ drivers/usb/dwc3/core.c | 87 +---- drivers/usb/dwc3/dwc3-generic.c | 7 +- drivers/usb/gadget/dwc2_udc_otg.c | 93 +----- drivers/usb/host/Kconfig | 6 + drivers/usb/host/Makefile | 1 + drivers/usb/host/xhci-mtk.c | 303 +++++++++++++++++ drivers/usb/host/xhci.c | 10 + include/dm/ofnode.h | 8 + include/dm/read.h | 13 + include/dwc3-uboot.h | 11 +- include/generic-phy.h | 92 +++++ include/usb/xhci.h | 3 + test/dm/ofnode.c | 21 ++ test/dm/phy.c | 33 ++ 24 files changed, 1132 insertions(+), 184 deletions(-) create mode 100644 doc/device-tree-bindings/usb/mediatek,mtk-xhci.txt create mode 100644 drivers/usb/host/xhci-mtk.c -- 2.25.1

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[PATCH 0/1] fw_setenv always locks flash whenever it tries to write
by Ivan Mikhaylov 06 May '20

06 May '20

From: Ivan Mikhaylov <i.mikhaylov(a)yadro.com> fw_setenv usage always locks u-boot-env mtd device without questions. Locking of flash can be disruptive and may affect not only u-boot-env region due to different problems with chips and lock callbacks on kernel side. I'm not sure if my fix is right, but also I thought about possible option in fw_env config about locking/unlocking or even option into fw_setenv/printenv. Any ideas? Ivan Mikhaylov (1): fw_setenv: lock the flash only if it's already locked before tools/env/fw_env.c | 24 +++++++++++++++++++++----- 1 file changed, 19 insertions(+), 5 deletions(-) -- 2.21.1

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[PATCH 1/1] efi_loader: use logical and in do_env_print_efi()
by Heinrich Schuchardt 06 May '20

06 May '20

If we want to check if two booleans are true, we should use a logical conjunction (&&) and not a bitwise and-operator (&). Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- cmd/nvedit_efi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/cmd/nvedit_efi.c b/cmd/nvedit_efi.c index 837e39e021..6f69a84fea 100644 --- a/cmd/nvedit_efi.c +++ b/cmd/nvedit_efi.c @@ -298,7 +298,7 @@ int do_env_print_efi(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) return CMD_RET_USAGE; /* -a already specified */ - if (!default_guid & guid_any) + if (!default_guid && guid_any) return CMD_RET_USAGE; argc--; -- 2.26.2

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[PATCH 1/1] efi_loader: error handling in efi_set_variable_common().
by Heinrich Schuchardt 06 May '20

06 May '20

Fix unreachable code. Free memory on error. Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- lib/efi_loader/efi_variable.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/efi_loader/efi_variable.c b/lib/efi_loader/efi_variable.c index 58f8fae358..33df52e663 100644 --- a/lib/efi_loader/efi_variable.c +++ b/lib/efi_loader/efi_variable.c @@ -981,7 +981,7 @@ static efi_status_t efi_set_variable_common(u16 *variable_name, if (append) { old_data = malloc(old_size); if (!old_data) { - return EFI_OUT_OF_RESOURCES; + ret = EFI_OUT_OF_RESOURCES; goto err; } ret = EFI_CALL(efi_get_variable(variable_name, vendor, -- 2.26.2

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