May 2020 - U-Boot

[PATCH 0/4] Making veyrons boot, 2020 edition
by Urja Rannikko 15 May '20

15 May '20

Hi, This is a series to make veyrons (tested on a veyron speedy), boot atleast to the u-boot prompt, the first 3 patches are necessary and the 4th one kinda just managed to catch this patch train ;) PS. Thanks to swiftgeek on IRC for some bisecting & testing, thus getting me curious enough to investigate these myself. Urja Rannikko (4): rockchip: spl: veyron speedy boots from SPI rockchip: veyron: move board_early_init_f to _r (after reloc) rockchip: spl-boot-order: do not attempt to access fdt if OF_PLATDATA defconfig: veyron: no need for CONFIG_SPL_PINCTRL_FULL arch/arm/mach-rockchip/spl-boot-order.c | 6 ++++++ arch/arm/mach-rockchip/spl.c | 3 ++- board/google/veyron/veyron.c | 2 +- configs/chromebit_mickey_defconfig | 4 ++-- configs/chromebook_jerry_defconfig | 5 ++--- configs/chromebook_minnie_defconfig | 4 ++-- configs/chromebook_speedy_defconfig | 3 ++- 7 files changed, 17 insertions(+), 10 deletions(-) -- 2.26.2

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[PATCH v5 0/4] of-platdata: Avoid building libfdt
by Simon Glass 14 May '20

14 May '20

The original patch of this series was sent in September but unfortunately caused build problems on some boards, since they don't comply with the of-platdata rules. With of-platdata, the idea is to compile the device tree into C structures to save space and avoid needing to use libfdt. But some boards use of-platdata while also using libfdt in a few areas, thus defeating the purpose of of-platdata. This series includes the original two patches http://patchwork.ozlabs.org/patch/1167420/ http://patchwork.ozlabs.org/patch/1167367/ as well as a few other patches to fix the build errors. Overall this reduces code size and provides better error messages when unavailable functions are used. Board maintainers should still take a look at the result, adjusting the of-platdata support as needed. Changes in v5: - Drop one rockchip patch as that issue has been fixed Changes in v4: - Add new patch for rockchip build errors - Add new patch for omap MMC build errors - Add new patch for rockchip chromebook build errors - Pull out patches into a new series - Add new patches to handle build failures Changes in v3: - Fix eth_dev_get_mac_address() call dev_read...() only when available Simon Glass (4): omap: mmc: Avoid using libfdt with of-platdata rockchip: pinctrl: Disable full pinctrl for SPL spl: Allow SPL/TPL to use of-platdata without libfdt dm: core: Don't include ofnode functions with of-platdata configs/chromebit_mickey_defconfig | 1 + configs/chromebook_jerry_defconfig | 1 + configs/chromebook_minnie_defconfig | 1 + configs/chromebook_speedy_defconfig | 1 + drivers/core/Makefile | 4 +++- drivers/mmc/davinci_mmc.c | 6 ++++++ include/dm/read.h | 3 +-- lib/Kconfig | 4 ++-- net/eth-uclass.c | 2 +- 9 files changed, 17 insertions(+), 6 deletions(-) -- 2.26.2.303.gf8c07b1a785-goog

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[PULL] Pull request: u-boot-stm/master =u-boot-stm32-20200514
by Patrick DELAUNAY 14 May '20

14 May '20

Hi Tom, Please pull the STM32 related fixes for v2020.07-rc3 = u-boot-stm32-20200514 With the following changes: - stm32mp1: migrate MTD and DFU configuration in Kconfig - stm32mp1: add command stm32prog - stm32mp1: several board and arch updates - stm32mp1: activate data cache in SPL and before relocation - Many improvement for AV96 board and DHCOR SoM (add new defconfig, DDR3 coding on DHCOR SoM, split between board and SOM Synchronize DDR setttings on DH SoMs, setting for I2C EEPROM) - clk: stm32mp1: fix CK_MPU calculation - DT alignment of stm32mp1 device tree with Linux 5.7-rc2 CI status: https://gitlab.denx.de/u-boot/custodians/u-boot-stm/pipelines/3238> Thanks, Patrick The following changes since commit 10bca13ea6d9d4b85f80f02c8795227f63240f59: Merge https://gitlab.denx.de/u-boot/custodians/u-boot-usb (2020-05-12 16:20:10 -0400) are available in the Git repository at: https://gitlab.denx.de/u-boot/custodians/u-boot-stm.git tags/u-boot-stm32-20200514 for you to fetch changes up to 1b28a5e2b00a9bf3523cc63694baa03f23604619: ARM: dts: stm32mp1: DT alignment with Linux 5.7-rc2 (2020-05-14 09:02:12 +0200) ---------------------------------------------------------------- - stm32mp1: migrate MTD and DFU configuration in Kconfig - stm32mp1: add command stm32prog - stm32mp1: several board and arch updates - stm32mp1: activate data cache in SPL and before relocation - Many improvment for AV96 board and DHCOR SoM (add new defconfig, DDR3 coding on DHCOR SoM, split between board and SOM Synchronize DDR setttings on DH SoMs, setting for I2C EEPROM) - clk: stm32mp1: fix CK_MPU calculation - DT alignment of stm32mp1 device tree with Linux 5.7-rc2 ---------------------------------------------------------------- Christophe Roullier (1): configs: stm32mp1: activate Ethernet PHY Realtek Lionel Debieve (1): clk: stm32mp1: fix CK_MPU calculation Marek Vasut (10): ARM: stm32: Add default config for DHCOR ARM: stm32: Add board_early_init_f() to SPL ARM: stm32: Implement board coding on AV96 ram: stm32mp1: Add support for multiple configs ARM: dts: stm32: Rework DDR DT inclusion ARM: stm32: Implement DDR3 coding on DHCOR SoM ARM: dts: stm32: Fix AV96 and DHCOR split ARM: dts: stm32: Synchronize DDR setttings on DH SoMs ARM: stm32: Define I2C EEPROM bus and address on DHCOM ARM: stm32: Hog GPIO PF7 high on DHCOM to unlock SPI NOR nWP Patrice Chotard (2): board: stm32mp1: Keep error led ON in case of low power detection stm32mp1: Fix warning display when 1.5A power supply is used Patrick Delaunay (43): board: stm32mp1: move board_get_mtdparts in st common directory board: stm32mp1: move set_dfu_alt_info in st common directory stm32mp1: dynamically build DFU_ALT_INFO stm32mp1: move MTDPART configuration in Kconfig board: stm32mp1: reserve memory for OP-TEE in device tree stm32mp1: dynamically detect op-tee presence board: stm32mp1: use FDT address provided by TF-A at boot time configs: stm32mp1: remove optee defconfig board: stm32mp1: support boot from spi-nand board: stm32mp1: adapt MTD partition for BOOT from NOR or NAND doc: stm32mp1: update DFU support example usb: gadget: g_dnl: add function g_dnl_set_product dfu: add prototype for dfu_transaction_initiate/cleanup stm32mp: add function get_cpu_dev stm32mp: add the command stm32prog stm32mp: stm32prog: add flash layout parsing stm32mp: stm32prog: add MMC device stm32mp: stm32prog: add support of boot partition for eMMC device stm32mp: stm32prog: add upport of partial update stm32mp: stm32prog: add MTD devices support stm32mp: stm32prog: adapt the MTD partitions stm32mp: stm32prog: add support of ssbl copy stm32mp: stm32prog: add support for delete option in flashlayout stm32mp: stm32prog: add otp update support stm32mp: stm32prog: add pmic NVM update support stm32mp: stm32prog: add serial link support stm32mp: stm32prog: enable videoconsole stm32mp: stm32prog: support for script stm32mp: stm32prog: add support of RAM target arm: stm32mp: remove dependency for STM32KEY arm: stm32mp: spl: update error management in board_init_f board: stm32mp1: update management of boot-led board: stm32mp1: gt9147 IRQ before reset on EV1 board: stm32mp1: set environment variable fdtfile board: stm32mp1: remove bootdelay configuration for usb or serial boot board: stm32mp1: add timeout for I/O compensation ready gpio: stm32: support gpio ops in SPL ARM: dts: stm32mp15: use DDR3 files generated by STM32CubeMX configs: stm32mp1: activate CONFIG_ERRNO_STR arm: stm32mp: activate data cache in SPL and before relocation arm: stm32mp: activate data cache on DDR in SPL mmc: stm32_sdmmc2: change the displayed config name ARM: dts: stm32mp1: DT alignment with Linux 5.7-rc2 arch/arm/dts/stm32mp15-ddr.dtsi | 358 ++++--- arch/arm/dts/stm32mp15-ddr3-1x4Gb-1066-binG.dtsi | 49 +- arch/arm/dts/stm32mp15-ddr3-2x4Gb-1066-binG.dtsi | 49 +- arch/arm/dts/stm32mp15-ddr3-dhsom-2x1Gb-1066-binG.dtsi | 120 +++ arch/arm/dts/stm32mp15-ddr3-dhsom-2x2Gb-1066-binG.dtsi | 120 +++ arch/arm/dts/stm32mp15-ddr3-dhsom-2x4Gb-1066-binG.dtsi | 120 +++ arch/arm/dts/stm32mp15-pinctrl.dtsi | 92 ++ arch/arm/dts/stm32mp15-u-boot.dtsi | 25 + arch/arm/dts/stm32mp151.dtsi | 13 +- arch/arm/dts/stm32mp153.dtsi | 1 + arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi | 4 - arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi | 4 - arch/arm/dts/stm32mp157c-ed1.dts | 17 +- arch/arm/dts/stm32mp157c-ev1.dts | 13 +- arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi | 15 +- arch/arm/dts/stm32mp15xx-dhcom.dtsi | 3 +- arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi | 1 + arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts | 2 +- arch/arm/dts/stm32mp15xx-dhcor-io1v8.dtsi | 24 + arch/arm/dts/{stm32mp15xx-dhcor.dtsi => stm32mp15xx-dhcor-io3v3.dtsi} | 21 +- arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi | 12 +- arch/arm/dts/stm32mp15xx-dkx.dtsi | 15 +- arch/arm/mach-stm32mp/Kconfig | 29 +- arch/arm/mach-stm32mp/Makefile | 2 + arch/arm/mach-stm32mp/boot_params.c | 45 + arch/arm/mach-stm32mp/cmd_stm32prog/Makefile | 9 + arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c | 192 ++++ arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c | 1745 +++++++++++++++++++++++++++++++++++ arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.h | 185 ++++ arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_serial.c | 993 ++++++++++++++++++++ arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_usb.c | 230 +++++ arch/arm/mach-stm32mp/cpu.c | 58 +- arch/arm/mach-stm32mp/dram_init.c | 18 + arch/arm/mach-stm32mp/fdt.c | 25 + arch/arm/mach-stm32mp/include/mach/stm32.h | 3 + arch/arm/mach-stm32mp/include/mach/stm32prog.h | 16 + arch/arm/mach-stm32mp/include/mach/sys_proto.h | 5 + arch/arm/mach-stm32mp/spl.c | 38 +- board/dhelectronics/dh_stm32mp1/Kconfig | 3 +- board/dhelectronics/dh_stm32mp1/MAINTAINERS | 1 + board/dhelectronics/dh_stm32mp1/Makefile | 3 + board/dhelectronics/dh_stm32mp1/board.c | 232 ++--- board/dhelectronics/dh_stm32mp1/u-boot-dhcom.its | 39 + board/dhelectronics/dh_stm32mp1/u-boot-dhcor.its | 39 + board/st/common/Kconfig | 64 ++ board/st/common/Makefile | 5 + board/st/common/stm32mp_dfu.c | 245 +++++ board/st/common/stm32mp_mtdparts.c | 167 ++++ board/st/stm32mp1/MAINTAINERS | 1 - board/st/stm32mp1/stm32mp1.c | 357 ++----- configs/stm32mp15_basic_defconfig | 9 +- configs/stm32mp15_dhcom_basic_defconfig | 7 + configs/{stm32mp15_optee_defconfig => stm32mp15_dhcor_basic_defconfig} | 85 +- configs/stm32mp15_trusted_defconfig | 12 +- doc/board/st/stm32mp1.rst | 147 ++- drivers/clk/clk_stm32mp1.c | 7 +- drivers/gpio/stm32_gpio.c | 7 +- drivers/mmc/stm32_sdmmc2.c | 2 +- drivers/ram/stm32mp1/stm32mp1_ram.c | 33 +- drivers/usb/gadget/g_dnl.c | 8 + include/configs/dh_stm32mp1.h | 15 + include/configs/stm32mp1.h | 64 +- include/dfu.h | 3 + include/g_dnl.h | 1 + 64 files changed, 5334 insertions(+), 893 deletions(-) create mode 100644 arch/arm/dts/stm32mp15-ddr3-dhsom-2x1Gb-1066-binG.dtsi create mode 100644 arch/arm/dts/stm32mp15-ddr3-dhsom-2x2Gb-1066-binG.dtsi create mode 100644 arch/arm/dts/stm32mp15-ddr3-dhsom-2x4Gb-1066-binG.dtsi create mode 100644 arch/arm/dts/stm32mp15xx-dhcor-io1v8.dtsi rename arch/arm/dts/{stm32mp15xx-dhcor.dtsi => stm32mp15xx-dhcor-io3v3.dtsi} (89%) create mode 100644 arch/arm/mach-stm32mp/boot_params.c create mode 100644 arch/arm/mach-stm32mp/cmd_stm32prog/Makefile create mode 100644 arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c create mode 100644 arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c create mode 100644 arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.h create mode 100644 arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_serial.c create mode 100644 arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_usb.c create mode 100644 arch/arm/mach-stm32mp/include/mach/stm32prog.h create mode 100644 board/dhelectronics/dh_stm32mp1/u-boot-dhcom.its create mode 100644 board/dhelectronics/dh_stm32mp1/u-boot-dhcor.its create mode 100644 board/st/common/stm32mp_dfu.c create mode 100644 board/st/common/stm32mp_mtdparts.c rename configs/{stm32mp15_optee_defconfig => stm32mp15_dhcor_basic_defconfig} (58%) create mode 100644 include/configs/dh_stm32mp1.h

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[GIT PULL] rpi: updates for v2020.07
by Matthias Brugger 14 May '20

14 May '20

Hi Tom, Please have a look at the updates for RPi below. I know I'm a bit late in the cycle. I'll try to send my pull requests earlier next time, sorry for that. I just pushed the tag, so the CI is not green yet: https://travis-ci.org/github/mbgg/u-boot/builds/686914330 https://gitlab.denx.de/u-boot/custodians/u-boot-raspberrypi/pipelines/3241 But the tag actually refers to the same commit as my rpi-next branch, which is all green here: https://travis-ci.org/github/mbgg/u-boot/builds/686541087 https://gitlab.denx.de/u-boot/custodians/u-boot-raspberrypi/pipelines/3227 Regards and stay safe and healthy, Matthias --- The following changes since commit 2a38d2239d0bb4d128b00886bf097ab247a0b1a7: Prepare v2020.07-rc2 (2020-05-11 18:28:19 -0400) are available in the Git repository at: https://gitlab.denx.de/u-boot/custodians/u-boot-raspberrypi.git tags/rpi-next-2020.07 for you to fetch changes up to 82aef6c6f8a74a0595501bfbb2f6f763c786324f: rpi: use the newly-added RPI_EFI_NR_SPIN_PAGES (2020-05-13 14:04:50 +0200) ---------------------------------------------------------------- - fix phy configuration for RPi4's bcmgenet - sync RPi4's env size with other RPi configs - add kconfig option to reserver more pages in the EFI mem map - add support for SDMA which is used by RPi4 - fix corner case boot bug for RPi3 32-bit ---------------------------------------------------------------- Jaehoon Chung (3): mmc: sdhci: use phys2bus macro when dma address is accessed mmc: sdhci: not return error when SDMA is not supported configs: rpi_4 : enable SDHCI_SDMA config Kyle Evans (2): rpi: Kconfig option for initial page reservation rpi: use the newly-added RPI_EFI_NR_SPIN_PAGES Marek Szyprowski (1): configs: rpi_arm64: sync env size with rpi_{3,4}_defconfig Matthias Brugger (2): mmc: sdhci: Use debug for not supported SDMA info message configs: rpi_arm64: enable SDHCI SDMA support Nicolas Saenz Julienne (1): net: bcmgenet: Don't set ID_MODE_DIS when not using RGMII Simon Glass (2): arm: dts: bcm283x: Allow UARTs to work before relocation arm: bcm283x: serial: Move ofdata reading to probe() method arch/arm/dts/bcm283x-u-boot.dtsi | 8 ++++++++ arch/arm/mach-bcm283x/Kconfig | 2 ++ board/raspberrypi/rpi/Kconfig | 10 ++++++++++ board/raspberrypi/rpi/rpi.c | 3 ++- configs/rpi_4_32b_defconfig | 1 + configs/rpi_4_defconfig | 1 + configs/rpi_arm64_defconfig | 2 ++ drivers/mmc/sdhci.c | 17 +++++++++-------- drivers/net/bcmgenet.c | 5 ++++- drivers/serial/serial_bcm283x_mu.c | 21 +++++++++------------ drivers/serial/serial_bcm283x_pl011.c | 12 ++++++++---- 11 files changed, 56 insertions(+), 26 deletions(-) create mode 100644 board/raspberrypi/rpi/Kconfig

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[U-Boot] Please pull ARC fixes for v2020.07-rc3
by Alexey Brodkin 14 May '20

14 May '20

Hi Tom, The following changes since commit 10bca13ea6d9d4b85f80f02c8795227f63240f59: Merge https://gitlab.denx.de/u-boot/custodians/u-boot-usb (2020-05-12 16:20:10 -0400) are available in the Git repository at: git@gitlab.denx.de:u-boot/custodians/u-boot-arc.git tags/arc-fixes-for-2020.07-rc3 for you to fetch changes up to bed6481940b1b9a2f3b48afeeced550dd84e2932: ARC: HSDK: add reset for EHCI (2020-05-13 18:18:09 +0300) ---------------------------------------------------------------- Here we improve clock support for recently introduced HSDK-4xD board as well as finally enable external reset for the USB controller, which is needed to recover USB functionality after "usb reset". ---------------------------------------------------------------- Eugeniy Paltsev (11): CLK: ARC: HSDK: avoid code duplication CLK: ARC: HSDK: drop unused offset CLK: ARC: HSDK: use appropriate config data types CLK: ARC: HSDK: driver cleanup CLK: ARC: HSDK: prepare for multiple clock maps support CLK: ARC: HSDK: make set_clock optional CLK: ARC: HSDK: define clock map with DT binding constants CLK: ARC: HSDK: add separate clock map for HSDK-4xD ARC: DTS: cleanup USB node names ARC: HSDK: anounce state of BIM switch ARC: HSDK: add reset for EHCI arch/arc/dts/axs10x_mb.dtsi | 4 +-- arch/arc/dts/hsdk-common.dtsi | 11 +++++-- board/synopsys/hsdk/hsdk.c | 7 ++++ drivers/clk/Kconfig | 7 ++-- drivers/clk/clk-hsdk-cgu.c | 355 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++---------------------------------------------------------------------------------------- 5 files changed, 220 insertions(+), 164 deletions(-) Regards, Alexey

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[PATCH v3 0/9] rockchip: rk3328: sync dts and add ROC-RK3328-CC board
by Chen-Yu Tsai 14 May '20

14 May '20

From: Chen-Yu Tsai <wens(a)csie.org> Hi everyone, This is v3 of my ROC-RK3328-CC series. Changes from v2 are mainly fixing USB functionality on RK3328 in U-boot. This includes restoring the U-Boot specific "hnp-srp-disable" property for dwc2, moving the dwc2 device node after the ehci/ohci ones, and making vbus controllable and tied only to the XHCI controller. Because of this, I dropped review and tested tags from the DTS sync and new board patches. Changes from v1 are mainly dropping the custom board target, and dealing with the pinmuxing through proper use of DM regulators / GPIO / pinctrl in SPL. This series adds proper support for Firefly / Libre Computer ROC-RK3328-CC single board computer. The ROC-RK3328-CC from Firefly and Libre Computer Project is a credit card size development board based on the Rockchip RK3328 SoC, with: - 1/2/4 GB DDR4 DRAM - eMMC connector for optional module - micro SD card slot - 1 x USB 3.0 host port - 2 x USB 2.0 host port - 1 x USB 2.0 OTG port - HDMI video output - TRRS connector with audio and composite video output - gigabit Ethernet - consumer IR receiver - debug UART pins Originally I started with Loic's patches, and syncing the device tree files from Linux. That didn't get very far, with SPL failing to detect the SD card. Examining the schematics and internal state of GRF and GPIOs, I realized that the logic for the SD card power enable switch is opposite that of what the SD card controller's SDMMC0_PWREN pin would use. Instead, directly using the GPIO is required. To deal with this, DM regulator and GPIO are enabled in SPL, and various device nodes are marked with u-boot,dm-spl to have them work. pinctrl properties are not stripped, so as to have the SDMMC0_PWREN pin muxed over to GPIO. Along the way, there are some clean-ups of existing dts files, moving U-boot only features to -u-boot.dtsi files, and then a wholesale sync from Linux. Only boards already existing in U-boot are synced. DT binding header files are synced separately as there is already one patch floating around. The DT sync also includes clean-up changes only recently posted, and likely won't make it in for at least a few weeks. Please have a look, and test if possible. I cc-ed a couple people that showed interest in this board on mailing lists recently. Regards ChenYu Chen-Yu Tsai (9): rockchip: dts: rk3328-evb: Move vcc5v0-host-xhci-drv to -u-boot.dtsi rockchip: dts: rk3328-evb: Move gmac2io related nodes to -u-boot.dtsi rockchip: dts: rk3328: Move OTG node's hnp-srp-disable to rk3328-u-boot.dtsi dt-bindings: clock: rk3328: sync from upstream Linux kernel dt-bindings: power: rk3328-power: sync from upstream Linux kernel rockchip: rk3328: Disable generic PHY support rockchip: dts: rk3328: Sync device tree files from Linux rockchip: rk3328: Add support for ROC-RK3328-CC board rockchip: dts: rock64: Fix XHCI usage arch/arm/dts/Makefile | 1 + arch/arm/dts/rk3328-evb-u-boot.dtsi | 39 + arch/arm/dts/rk3328-evb.dts | 220 +-- arch/arm/dts/rk3328-roc-cc-u-boot.dtsi | 47 + .../{rk3328-rock64.dts => rk3328-roc-cc.dts} | 135 +- arch/arm/dts/rk3328-rock64-u-boot.dtsi | 11 + arch/arm/dts/rk3328-rock64.dts | 132 +- arch/arm/dts/rk3328-u-boot.dtsi | 4 + arch/arm/dts/rk3328.dtsi | 1415 +++++++++++------ board/rockchip/evb_rk3328/MAINTAINERS | 7 + configs/evb-rk3328_defconfig | 1 - ...3328_defconfig => roc-cc-rk3328_defconfig} | 19 +- configs/rock64-rk3328_defconfig | 1 - doc/README.rockchip | 4 +- include/dt-bindings/clock/rk3328-cru.h | 212 +-- include/dt-bindings/power/rk3328-power.h | 19 + 16 files changed, 1514 insertions(+), 753 deletions(-) create mode 100644 arch/arm/dts/rk3328-roc-cc-u-boot.dtsi copy arch/arm/dts/{rk3328-rock64.dts => rk3328-roc-cc.dts} (68%) copy configs/{rock64-rk3328_defconfig => roc-cc-rk3328_defconfig} (81%) create mode 100644 include/dt-bindings/power/rk3328-power.h -- 2.26.0

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[RESEND PATCH] net: dwc_eth_qos: update the compatible supported for STM32
by Patrick Delaunay 14 May '20

14 May '20

Update the compatible associated with the STM32 MPU glue in the DWC ethernet driver. The supported compatible is the specific "st,stm32mp1-dwmac" as indicated in Linux binding Documentation/devicetree/bindings/net/stm32-dwmac.txt and not the "snps,dwmac-4.20a" only used to the select IP version. This glue is implemented in Linux kernel in: drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c For information in stm32mp151.dtsi, the 2 compatibles are supported: ethernet0: ethernet@5800a000 { compatible = "st,stm32mp1-dwmac", "snps,dwmac-4.20a"; ... }; Signed-off-by: Patrick Delaunay <patrick.delaunay(a)st.com> --- RESEND with fix patman on Series-cc drivers/net/dwc_eth_qos.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c index f67c5f4570..5e7ad6c658 100644 --- a/drivers/net/dwc_eth_qos.c +++ b/drivers/net/dwc_eth_qos.c @@ -2166,7 +2166,7 @@ static const struct udevice_id eqos_ids[] = { .data = (ulong)&eqos_tegra186_config }, { - .compatible = "snps,dwmac-4.20a", + .compatible = "st,stm32mp1-dwmac", .data = (ulong)&eqos_stm32_config }, { -- 2.17.1

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[PATCH] dm: core: Reorder include files in read.c
by Stefan Roese 14 May '20

14 May '20

Including the assembler headers before including common.h etc leads to compilation errors upon MIPS64 based platforms using OF_LIVE. This patch reorders the include files to the "correct" oder. Signed-off-by: Stefan Roese <sr(a)denx.de> Cc: Simon Glass <sjg(a)chromium.org> --- drivers/core/read.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/core/read.c b/drivers/core/read.c index 47b8e03446..8e65dd2d50 100644 --- a/drivers/core/read.c +++ b/drivers/core/read.c @@ -4,12 +4,12 @@ * Written by Simon Glass <sjg(a)chromium.org> */ -#include <asm/types.h> -#include <asm/io.h> #include <common.h> #include <dm.h> -#include <mapmem.h> #include <dm/of_access.h> +#include <mapmem.h> +#include <asm/types.h> +#include <asm/io.h> int dev_read_u32(const struct udevice *dev, const char *propname, u32 *outp) { -- 2.26.2

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[PATCH] net: dwc_eth_qos: update the compatible supported for STM32
by Patrick Delaunay 14 May '20

14 May '20

Update the compatible associated with the STM32 MPU glue in the DWC ethernet driver. The supported compatible is the specific "st,stm32mp1-dwmac" as indicated in Linux binding Documentation/devicetree/bindings/net/stm32-dwmac.txt and not the "snps,dwmac-4.20a" only used to the select IP version. This glue is implemented in Linux kernel in: drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c For information in stm32mp151.dtsi, the 2 compatibles are supported: ethernet0: ethernet@5800a000 { compatible = "st,stm32mp1-dwmac", "snps,dwmac-4.20a"; ... }; Serie-cc: Christophe ROULLIER <christophe.roullier(a)st.com> Serie-cc: David Wu <david.wu(a)rock-chips.com> Serie-cc: marex Signed-off-by: Patrick Delaunay <patrick.delaunay(a)st.com> --- drivers/net/dwc_eth_qos.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c index f67c5f4570..5e7ad6c658 100644 --- a/drivers/net/dwc_eth_qos.c +++ b/drivers/net/dwc_eth_qos.c @@ -2166,7 +2166,7 @@ static const struct udevice_id eqos_ids[] = { .data = (ulong)&eqos_tegra186_config }, { - .compatible = "snps,dwmac-4.20a", + .compatible = "st,stm32mp1-dwmac", .data = (ulong)&eqos_stm32_config }, { -- 2.17.1

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[PATCH] armv8: ls1012a: Pass PPFE firmware to Linux through FDT.
by Chaitanya Sakinam 14 May '20

14 May '20

Read Linux PPFE firmware from flash partition and pass it to Linux through FDT entry. So that we can avoid placing PPFE firmware in Linux rootfs. Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam(a)nxp.com> Signed-off-by: Anji J <anji.jagarlmudi(a)nxp.com> --- arch/arm/cpu/armv8/fsl-layerscape/fdt.c | 148 ++++++++++++++++++++++++++++++++ drivers/net/pfe_eth/pfe_firmware.c | 58 ++++++++++++- 2 files changed, 205 insertions(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c index a1d5dc6..f874b1f 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c @@ -427,6 +427,151 @@ __weak void fdt_fixup_ecam(void *blob) } #endif +#ifdef CONFIG_FSL_PFE +void pfe_set_firmware_in_fdt(void *blob, int pfenode, void *pfw, char *pename, + unsigned int len) +{ + int rc, fwnode; + unsigned int phandle; + char subnode_str[32], prop_str[32], phandle_str[32], s[64]; + + sprintf(subnode_str, "pfe-%s-firmware", pename); + sprintf(prop_str, "fsl,pfe-%s-firmware", pename); + sprintf(phandle_str, "fsl,%s-firmware", pename); + + /*Add PE FW to fdt.*/ + /* Increase the size of the fdt to make room for the node. */ + rc = fdt_increase_size(blob, len); + if (rc < 0) { + printf("Unable to make room for %s firmware: %s\n", pename, + fdt_strerror(rc)); + return; + } + + /* Create the firmware node. */ + fwnode = fdt_add_subnode(blob, pfenode, subnode_str); + if (fwnode < 0) { + fdt_get_path(blob, pfenode, s, sizeof(s)); + printf("Could not add firmware node to %s: %s\n", s, + fdt_strerror(fwnode)); + return; + } + + rc = fdt_setprop_string(blob, fwnode, "compatible", prop_str); + if (rc < 0) { + fdt_get_path(blob, fwnode, s, sizeof(s)); + printf("Could not add compatible property to node %s: %s\n", s, + fdt_strerror(rc)); + return; + } + + rc = fdt_setprop_u32(blob, fwnode, "length", len); + if (rc < 0) { + fdt_get_path(blob, fwnode, s, sizeof(s)); + printf("Could not add compatible property to node %s: %s\n", s, + fdt_strerror(rc)); + return; + } + + /*create phandle and set the property*/ + phandle = fdt_create_phandle(blob, fwnode); + if (!phandle) { + fdt_get_path(blob, fwnode, s, sizeof(s)); + printf("Could not add phandle property to node %s: %s\n", s, + fdt_strerror(rc)); + return; + } + + rc = fdt_setprop(blob, fwnode, phandle_str, pfw, len); + if (rc < 0) { + fdt_get_path(blob, fwnode, s, sizeof(s)); + printf("Could not add firmware property to node %s: %s\n", s, + fdt_strerror(rc)); + return; + } +} + +void fdt_fixup_pfe_firmware(void *blob) +{ + int pfenode; + unsigned int len_class = 0, len_tmu = 0, len_util = 0; + const char *p; + void *pclassfw, *ptmufw, *putilfw; + + /* The first PFE we find, will contain the actual firmware. */ + pfenode = fdt_node_offset_by_compatible(blob, -1, "fsl,pfe"); + if (pfenode < 0) + /* Exit silently if there are no PFE devices */ + return; + + /* If we already have a firmware node, then also exit silently. */ + if (fdt_node_offset_by_compatible(blob, -1, + "fsl,pfe-class-firmware") > 0) + return; + + /* If the environment variable is not set, then exit silently */ + p = env_get("class_elf_firmware"); + if (!p) + return; + + pclassfw = (void *)simple_strtoul(p, NULL, 16); + if (!pclassfw) + return; + + p = env_get("class_elf_size"); + if (!p) + return; + len_class = simple_strtoul(p, NULL, 16); + + /* If the environment variable is not set, then exit silently */ + p = env_get("tmu_elf_firmware"); + if (!p) + return; + + ptmufw = (void *)simple_strtoul(p, NULL, 16); + if (!ptmufw) + return; + + p = env_get("tmu_elf_size"); + if (!p) + return; + len_tmu = simple_strtoul(p, NULL, 16); + + if (len_class == 0 || len_tmu == 0) { + printf("PFE FW corrupted. CLASS FW size %d, TMU FW size %d\n", + len_class, len_tmu); + return; + } + + /*Add CLASS FW to fdt.*/ + pfe_set_firmware_in_fdt(blob, pfenode, pclassfw, "class", len_class); + + /*Add TMU FW to fdt.*/ + pfe_set_firmware_in_fdt(blob, pfenode, ptmufw, "tmu", len_tmu); + + /* Util PE firmware is handled separately as it is not a usual case*/ + p = env_get("util_elf_firmware"); + if (!p) + return; + + putilfw = (void *)simple_strtoul(p, NULL, 16); + if (!putilfw) + return; + + p = env_get("util_elf_size"); + if (!p) + return; + len_util = simple_strtoul(p, NULL, 16); + + if (len_util) { + printf("PFE Util PE firmware is not added to FDT.\n"); + return; + } + + pfe_set_firmware_in_fdt(blob, pfenode, putilfw, "util", len_util); +} +#endif + void ft_cpu_setup(void *blob, bd_t *bd) { struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); @@ -479,6 +624,9 @@ void ft_cpu_setup(void *blob, bd_t *bd) #ifdef CONFIG_SYS_DPAA_FMAN fdt_fixup_fman_firmware(blob); #endif +#ifdef CONFIG_FSL_PFE + fdt_fixup_pfe_firmware(blob); +#endif #ifndef CONFIG_ARCH_LS1012A fsl_fdt_disable_usb(blob); #endif diff --git a/drivers/net/pfe_eth/pfe_firmware.c b/drivers/net/pfe_eth/pfe_firmware.c index adb2d06..947e2cd 100644 --- a/drivers/net/pfe_eth/pfe_firmware.c +++ b/drivers/net/pfe_eth/pfe_firmware.c @@ -181,7 +181,8 @@ int pfe_firmware_init(void) uintptr_t pfe_img_addr = 0; #endif int ret = 0; - int fw_count; + int fw_count, max_fw_count; + const char *p; ret = pfe_fit_check(); if (ret) @@ -208,6 +209,61 @@ int pfe_firmware_init(void) } #endif + p = env_get("load_util"); + if (!p) { + max_fw_count = 2; + } else { + max_fw_count = simple_strtoul(p, NULL, 10); + if (max_fw_count) + max_fw_count = 3; + else + max_fw_count = 2; + } + + for (fw_count = 0; fw_count < max_fw_count; fw_count++) { + switch (fw_count) { + case 0: + pfe_firmware_name = "class_slowpath"; + break; + case 1: + pfe_firmware_name = "tmu_slowpath"; + break; + case 2: + pfe_firmware_name = "util_slowpath"; + break; + } + + if (pfe_get_fw(&raw_image_addr, &raw_image_size, + pfe_firmware_name)) { + printf("%s firmware couldn't be found in FIT image\n", + pfe_firmware_name); + break; + } + pfe_firmware = malloc(raw_image_size); + if (!pfe_firmware) + return -ENOMEM; + memcpy((void *)pfe_firmware, (void *)raw_image_addr, + raw_image_size); + + switch (fw_count) { + case 0: + env_set_addr("class_elf_firmware", pfe_firmware); + env_set_addr("class_elf_size", (void *)raw_image_size); + break; + case 1: + env_set_addr("tmu_elf_firmware", pfe_firmware); + env_set_addr("tmu_elf_size", (void *)raw_image_size); + break; + case 2: + env_set_addr("util_elf_firmware", pfe_firmware); + env_set_addr("util_elf_size", (void *)raw_image_size); + break; + } + } + + raw_image_addr = NULL; + pfe_firmware = NULL; + raw_image_size = 0; for (fw_count = 0; fw_count < 2; fw_count++) { if (fw_count == 0) pfe_firmware_name = "class"; -- 2.7.4

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