April 2020 - U-Boot

[PATCH] board: fsl: lx2160a: define gic_lpi_base with CONFIG_GIC_V3_ITS support
by Wasim Khan 16 Apr '20

16 Apr '20

define gic_lpi_base variable when CONFIG_GIC_V3_ITS support is enable. This avoids compilation warnings when CONFIG_GIC_V3_ITS is not enabled. Signed-off-by: Wasim Khan <wasim.khan(a)nxp.com> --- board/freescale/lx2160a/lx2160a.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c index 4b20bb4..a8c45b9 100644 --- a/board/freescale/lx2160a/lx2160a.c +++ b/board/freescale/lx2160a/lx2160a.c @@ -670,7 +670,9 @@ int ft_board_setup(void *blob, bd_t *bd) u64 mc_memory_base = 0; u64 mc_memory_size = 0; u16 total_memory_banks; +#ifdef CONFIG_GIC_V3_ITS u64 gic_lpi_base; +#endif ft_cpu_setup(blob, bd); -- 2.7.4

2 1

[PATCH] configs: ls1012afrwy: drop env qspi_bootcmd
by Biwen Li 16 Apr '20

16 Apr '20

From: Biwen Li <biwen.li(a)nxp.com> Drop useless environment variable installer and qspi_bootcmd for ls1012afrwy Signed-off-by: Biwen Li <biwen.li(a)nxp.com> --- include/configs/ls1012afrwy.h | 9 --------- 1 file changed, 9 deletions(-) diff --git a/include/configs/ls1012afrwy.h b/include/configs/ls1012afrwy.h index 9007249804..ec071d0606 100644 --- a/include/configs/ls1012afrwy.h +++ b/include/configs/ls1012afrwy.h @@ -107,15 +107,6 @@ "env exists secureboot " \ "&& esbc_validate ${scripthdraddr};" \ "source ${scriptaddr}\0" \ - "installer=load mmc 0:2 $load_addr " \ - "/flex_installer_arm64.itb; " \ - "bootm $load_addr#$board\0" \ - "qspi_bootcmd=pfe stop; echo Trying load from qspi..;" \ - "sf probe && sf read $load_addr " \ - "$kernel_addr $kernel_size; env exists secureboot " \ - "&& sf read $kernelheader_addr_r $kernelheader_addr " \ - "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \ - "bootm $load_addr#$board\0" \ "sd_bootcmd=pfe stop; echo Trying load from sd card..;" \ "mmcinfo; mmc read $load_addr " \ "$kernel_addr_sd $kernel_size_sd ;" \ -- 2.17.1

3 3

[PATCH v6 00/12] ClearFog Base static variant support
by Joel Johnson 16 Apr '20

16 Apr '20

This patch series adds support for ClearFog Base static configuration, as well as updating and fixing the ClearFog support for MMC and SPI booting. v2 changes: - updated against, and dependent on, https://patchwork.ozlabs.org/cover/1200324 v3 changes: - rebased against ClearFog runtime TLV EEPROM changes merged into mvebu/master v4 - adjust static SerDes configuration at runtime instead of #ifdef v5 - distinguish build-only config changes (SFP and PCIe/SATA) from runtime detectable config changes - retested SATA mode in PCIe slot with swap rx changes, confirmed working as presently patched. Only tested with ClearFog Base which only provides single channel, but Pro mechanism is parallel. v6 - address minor review feedback Joel Johnson (12): arm: mvebu: fix SerDes table alignment arm: mvebu: solidrun: remove hardcoded DTS MAC address arm: mvebu: clearfog: use Pro name by default arm: mvebu: clearfog: initial ClearFog Base variant arm: mvebu: clearfog: Add option for 2.5 Gbps SFP arm: mvebu: clearfog: Add SATA mode flags arm: mvebu: clearfog: Unify DT selection paths arm: mvebu: clearfog: add SPI offsets arm: mvebu: enable working default boot support arm: mvebu: clearfog: move ENV params to Kconfig arm: mvebu: clearfog: don't always use SPL MMC arm: mvebu: clearfog: Use Pro DT by default .../arm/dts/armada-38x-solidrun-microsom.dtsi | 1 - arch/arm/mach-mvebu/Kconfig | 13 ++++ .../serdes/a38x/high_speed_env_spec.c | 6 +- board/solidrun/clearfog/Kconfig | 62 +++++++++++++++++++ board/solidrun/clearfog/clearfog.c | 61 +++++++++++++++--- configs/clearfog_defconfig | 4 -- include/configs/clearfog.h | 1 - 7 files changed, 132 insertions(+), 16 deletions(-) create mode 100644 board/solidrun/clearfog/Kconfig -- 2.25.0

2 17

[PATCH v6 10/29] pci: Adjust dm_pci_read_bar32() to return errors correctly
by Simon Glass 16 Apr '20

16 Apr '20

At present if reading a BAR returns 0xffffffff then the value is masked and a different value is returned. This makes it harder to detect the problem when debugging. Update the function to avoid masking in this case. Signed-off-by: Simon Glass <sjg(a)chromium.org> Reviewed-by: Bin Meng <bmeng.cn(a)gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner(a)br-automation.com> --- Changes in v6: - Rework commit message to avoid mention of missing device Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None drivers/pci/pci-uclass.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c index 213381da6bd..7f46e901fb2 100644 --- a/drivers/pci/pci-uclass.c +++ b/drivers/pci/pci-uclass.c @@ -1213,7 +1213,14 @@ u32 dm_pci_read_bar32(const struct udevice *dev, int barnum) bar = PCI_BASE_ADDRESS_0 + barnum * 4; dm_pci_read_config32(dev, bar, &addr); - if (addr & PCI_BASE_ADDRESS_SPACE_IO) + + /* + * If we get an invalid address, return this so that comparisons with + * FDT_ADDR_T_NONE work correctly + */ + if (addr == 0xffffffff) + return addr; + else if (addr & PCI_BASE_ADDRESS_SPACE_IO) return addr & PCI_BASE_ADDRESS_IO_MASK; else return addr & PCI_BASE_ADDRESS_MEM_MASK; -- 2.26.0.292.g33ef6b2f38-goog

3 9

Re: [PATCH] rockchip: rk3328: add rock-pi-e-rk3328_defconfig
by Kever Yang 16 Apr '20

16 Apr '20

Hi banglang, Does this board dts also upstream to kernel? If yes, please split the dts as a separate patch and add the commit info in the message. On 2020/4/13 下午4:23, banglang.huang wrote: > The ROCK-PI-E is a credit card size SBC based on Rockchip RK3328 > Quad-Core ARM Cortex A53. > > Net - Dual ethernet port, 1 X Gbe, 1 X 100M > USB - USB 3.0 > DC - USB-Type C, 5V 2A > Storage - TF card, eMMC > > Just build u-boot-dtb.bin for Rockpi E board and follow the blow > steps to replace the relevant partition. > > ./rkbin/tools/loaderimage --pack --uboot u-boot-dtb.bin \ > uboot.img 0x200000 --size 1024 1 > dd if=uboot.img of=/dev/sdcard seek=16384 conv=notrunc RK3328 has enable the TPL support for dram init, could you enable TPL/SPL for this board? Thanks, - Kever > > Signed-off-by: banglang.huang <banglang.huang(a)foxmail.com> > --- > > Changes for v3 > > - rename to rock-pi-e > > Changes for v2 > > - add introduction for rockpie in doc/README.rockchip > - enable CONFIG_MISC_INIT_R, CONFIG_SMBIOS_MANUFACTURER, > and CONFIG_SMBIOS_PRODUCT_NAME > > arch/arm/dts/Makefile | 3 +- > arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi | 12 + > arch/arm/dts/rk3328-rock-pi-e.dts | 256 ++++++++++++++++++++++ > board/rockchip/evb_rk3328/MAINTAINERS | 7 + > configs/rock-pi-e-rk3328_defconfig | 99 +++++++++ > doc/README.rockchip | 3 +- > 6 files changed, 378 insertions(+), 2 deletions(-) > create mode 100644 arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi > create mode 100644 arch/arm/dts/rk3328-rock-pi-e.dts > create mode 100644 configs/rock-pi-e-rk3328_defconfig > > diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile > index 820ee9733a..f0897f2928 100644 > --- a/arch/arm/dts/Makefile > +++ b/arch/arm/dts/Makefile > @@ -104,7 +104,8 @@ dtb-$(CONFIG_ROCKCHIP_RK3308) += \ > > dtb-$(CONFIG_ROCKCHIP_RK3328) += \ > rk3328-evb.dtb \ > - rk3328-rock64.dtb > + rk3328-rock64.dtb \ > + rk3328-rock-pi-e.dtb > > dtb-$(CONFIG_ROCKCHIP_RK3368) += \ > rk3368-lion.dtb \ > diff --git a/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi b/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi > new file mode 100644 > index 0000000000..012209110a > --- /dev/null > +++ b/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi > @@ -0,0 +1,12 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +/* > + * (C) Copyright 2020 Radxa > + */ > + > +#include "rk3328-u-boot.dtsi" > +#include "rk3328-sdram-ddr3-666.dtsi" > + > +&usb_host0_xhci { > + vbus-supply = <&vcc5v0_host_xhci>; > + status = "okay"; > +}; > diff --git a/arch/arm/dts/rk3328-rock-pi-e.dts b/arch/arm/dts/rk3328-rock-pi-e.dts > new file mode 100644 > index 0000000000..56b8c3f1e6 > --- /dev/null > +++ b/arch/arm/dts/rk3328-rock-pi-e.dts > @@ -0,0 +1,256 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +/* > + * (C) Copyright 2020 Radxa > + */ > + > +/dts-v1/; > +#include "rk3328.dtsi" > + > +/ { > + model = "Radxa Rockpi E"; > + compatible = "radxa,rockpie", "rockchip,rk3328"; > + > + chosen { > + stdout-path = &uart2; > + }; > + > + gmac_clkin: external-gmac-clock { > + compatible = "fixed-clock"; > + clock-frequency = <125000000>; > + clock-output-names = "gmac_clkin"; > + #clock-cells = <0>; > + }; > + > + vcc3v3_sdmmc: sdmmc-pwren { > + compatible = "regulator-fixed"; > + regulator-name = "vcc3v3"; > + gpio = <&gpio0 30 GPIO_ACTIVE_LOW>; > + pinctrl-names = "default"; > + pinctrl-0 = <&sdmmc0m1_gpio>; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + vin-supply = <&vcc_io>; > + }; > + > + vcc5v0_host_xhci: vcc5v0-host-xhci-drv { > + compatible = "regulator-fixed"; > + enable-active-high; > + regulator-name = "vcc5v0_host_xhci"; > + gpio = <&gpio3 7 GPIO_ACTIVE_HIGH>; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + }; > +}; > + > +&cpu0 { > + cpu-supply = <&vdd_arm>; > +}; > + > +&cpu1 { > + cpu-supply = <&vdd_arm>; > +}; > + > +&cpu2 { > + cpu-supply = <&vdd_arm>; > +}; > + > +&cpu3 { > + cpu-supply = <&vdd_arm>; > +}; > + > +&saradc { > + status = "okay"; > +}; > + > +&uart2 { > + status = "okay"; > +}; > + > +&sdmmc { > + bus-width = <4>; > + cap-mmc-highspeed; > + cap-sd-highspeed; > + card-detect-delay = <200>; > + disable-wp; > + max-frequency = <150000000>; > + num-slots = <1>; > + pinctrl-names = "default"; > + pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>; > + supports-sd; > + vmmc-supply = <&vcc3v3_sdmmc>; > + status = "okay"; > +}; > + > +&emmc { > + bus-width = <8>; > + cap-mmc-highspeed; > + mmc-hs200-1_8v; > + supports-emmc; > + disable-wp; > + non-removable; > + num-slots = <1>; > + pinctrl-names = "default"; > + pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; > + vmmc-supply = <&vcc_io>; > + vqmmc-supply = <&vcc_18emmc>; > + status = "okay"; > +}; > + > +&gmac2io { > + phy-supply = <&vcc_io>; > + phy-mode = "rgmii"; > + clock_in_out = "input"; > + snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; > + snps,reset-active-low; > + snps,reset-delays-us = <0 10000 50000>; > + assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; > + assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>; > + pinctrl-names = "default"; > + pinctrl-0 = <&rgmiim1_pins>; > + tx_delay = <0x26>; > + rx_delay = <0x11>; > + status = "okay"; > +}; > + > +&usb_host0_ehci { > + status = "okay"; > +}; > + > +&usb_host0_ohci { > + status = "okay"; > +}; > + > +&usb20_otg { > + status = "okay"; > +}; > + > +&i2c1 { > + clock-frequency = <400000>; > + i2c-scl-rising-time-ns = <168>; > + i2c-scl-falling-time-ns = <4>; > + status = "okay"; > + > + rk805: pmic@18 { > + compatible = "rockchip,rk805"; > + status = "okay"; > + reg = <0x18>; > + interrupt-parent = <&gpio2>; > + interrupts = <6 IRQ_TYPE_LEVEL_LOW>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pmic_int_l>; > + rockchip,system-power-controller; > + wakeup-source; > + gpio-controller; > + #gpio-cells = <2>; > + #clock-cells = <1>; > + clock-output-names = "xin32k", "rk805-clkout2"; > + > + regulators { > + vdd_logic: DCDC_REG1 { > + regulator-name = "vdd_logic"; > + regulator-min-microvolt = <712500>; > + regulator-max-microvolt = <1450000>; > + regulator-ramp-delay = <6001>; > + regulator-boot-on; > + regulator-always-on; > + regulator-state-mem { > + regulator-on-in-suspend; > + regulator-suspend-microvolt = <1000000>; > + }; > + }; > + > + vdd_arm: DCDC_REG2 { > + regulator-name = "vdd_arm"; > + regulator-min-microvolt = <712500>; > + regulator-max-microvolt = <1450000>; > + regulator-ramp-delay = <6001>; > + regulator-boot-on; > + regulator-always-on; > + regulator-state-mem { > + regulator-on-in-suspend; > + regulator-suspend-microvolt = <1000000>; > + }; > + }; > + > + vcc_ddr: DCDC_REG3 { > + regulator-name = "vcc_ddr"; > + regulator-boot-on; > + regulator-always-on; > + regulator-state-mem { > + regulator-on-in-suspend; > + }; > + }; > + > + vcc_io: DCDC_REG4 { > + regulator-name = "vcc_io"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-boot-on; > + regulator-always-on; > + regulator-state-mem { > + regulator-on-in-suspend; > + regulator-suspend-microvolt = <3300000>; > + }; > + }; > + > + vdd_18: LDO_REG1 { > + regulator-name = "vdd_18"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-boot-on; > + regulator-always-on; > + regulator-state-mem { > + regulator-on-in-suspend; > + regulator-suspend-microvolt = <1800000>; > + }; > + }; > + > + vcc_18emmc: LDO_REG2 { > + regulator-name = "vcc_18emmc"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-boot-on; > + regulator-always-on; > + regulator-state-mem { > + regulator-on-in-suspend; > + regulator-suspend-microvolt = <1800000>; > + }; > + }; > + > + vdd_10: LDO_REG3 { > + regulator-name = "vdd_10"; > + regulator-min-microvolt = <1000000>; > + regulator-max-microvolt = <1000000>; > + regulator-boot-on; > + regulator-always-on; > + regulator-state-mem { > + regulator-on-in-suspend; > + regulator-suspend-microvolt = <1000000>; > + }; > + }; > + }; > + }; > +}; > + > +&io_domains { > + status = "okay"; > + vccio1-supply = <&vcc_io>; > + vccio2-supply = <&vcc_18emmc>; > + vccio3-supply = <&vcc_io>; > + vccio4-supply = <&vcc_io>; > + vccio5-supply = <&vcc_io>; > + vccio6-supply = <&vcc_io>; > + pmuio-supply = <&vcc_io>; > +}; > + > +&pinctrl { > + pmic { > + pmic_int_l: pmic-int-l { > + rockchip,pins = > + <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; /* gpio2_a6 */ > + }; > + }; > +}; > + > diff --git a/board/rockchip/evb_rk3328/MAINTAINERS b/board/rockchip/evb_rk3328/MAINTAINERS > index c661d2e06a..77191f8e2e 100644 > --- a/board/rockchip/evb_rk3328/MAINTAINERS > +++ b/board/rockchip/evb_rk3328/MAINTAINERS > @@ -10,3 +10,10 @@ M: Matwey V. Kornilov <matwey.kornilov(a)gmail.com> > S: Maintained > F: configs/rock64-rk3328_defconfig > F: arch/arm/dts/rk3328-rock64-u-boot.dtsi > + > +ROCK-PI-E-RK3328 > +M: Banglang Huang <banglang.huang(a)foxmail.com> > +S: Maintained > +F: configs/rock-pi-e-rk3328_defconfig > +F: arch/arm/dts/rk3328-rock-pi-e.dts > +F: arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi > diff --git a/configs/rock-pi-e-rk3328_defconfig b/configs/rock-pi-e-rk3328_defconfig > new file mode 100644 > index 0000000000..8c1ad28e92 > --- /dev/null > +++ b/configs/rock-pi-e-rk3328_defconfig > @@ -0,0 +1,99 @@ > +CONFIG_ARM=y > +CONFIG_ARCH_ROCKCHIP=y > +CONFIG_SYS_TEXT_BASE=0x00200000 > +CONFIG_ENV_OFFSET=0x3F8000 > +CONFIG_ROCKCHIP_RK3328=y > +CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y > +CONFIG_TPL_LIBCOMMON_SUPPORT=y > +CONFIG_TPL_LIBGENERIC_SUPPORT=y > +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y > +CONFIG_SPL_STACK_R_ADDR=0x4000000 > +CONFIG_SPL_SYS_MALLOC_F_LEN=0x4000 > +CONFIG_NR_DRAM_BANKS=1 > +CONFIG_DEBUG_UART_BASE=0xFF130000 > +CONFIG_DEBUG_UART_CLOCK=24000000 > +CONFIG_SMBIOS_PRODUCT_NAME="rock-pi-e_rk3328" > +CONFIG_DEBUG_UART=y > +CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 > +# CONFIG_ANDROID_BOOT_IMAGE is not set > +CONFIG_FIT=y > +CONFIG_FIT_VERBOSE=y > +CONFIG_SPL_LOAD_FIT=y > +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-rock-pi-e.dtb" > +CONFIG_MISC_INIT_R=y > +# CONFIG_DISPLAY_CPUINFO is not set > +CONFIG_DISPLAY_BOARDINFO_LATE=y > +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set > +CONFIG_TPL_SYS_MALLOC_SIMPLE=y > +CONFIG_SPL_STACK_R=y > +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 > +CONFIG_SPL_ATF=y > +CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y > +CONFIG_TPL_DRIVERS_MISC_SUPPORT=y > +CONFIG_CMD_BOOTZ=y > +CONFIG_CMD_GPT=y > +CONFIG_CMD_MMC=y > +CONFIG_CMD_USB=y > +# CONFIG_CMD_SETEXPR is not set > +CONFIG_CMD_TIME=y > +CONFIG_SPL_OF_CONTROL=y > +CONFIG_TPL_OF_CONTROL=y > +CONFIG_DEFAULT_DEVICE_TREE="rk3328-rock-pi-e" > +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" > +CONFIG_TPL_OF_PLATDATA=y > +CONFIG_ENV_IS_IN_MMC=y > +CONFIG_SYS_RELOC_GD_ENV_ADDR=y > +CONFIG_NET_RANDOM_ETHADDR=y > +CONFIG_TPL_DM=y > +CONFIG_REGMAP=y > +CONFIG_SPL_REGMAP=y > +CONFIG_TPL_REGMAP=y > +CONFIG_SYSCON=y > +CONFIG_SPL_SYSCON=y > +CONFIG_TPL_SYSCON=y > +CONFIG_CLK=y > +CONFIG_SPL_CLK=y > +CONFIG_FASTBOOT_BUF_ADDR=0x800800 > +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y > +CONFIG_ROCKCHIP_GPIO=y > +CONFIG_SYS_I2C_ROCKCHIP=y > +CONFIG_MMC_DW=y > +CONFIG_MMC_DW_ROCKCHIP=y > +CONFIG_SF_DEFAULT_SPEED=20000000 > +CONFIG_DM_ETH=y > +CONFIG_ETH_DESIGNWARE=y > +CONFIG_GMAC_ROCKCHIP=y > +CONFIG_PHY=y > +CONFIG_PINCTRL=y > +CONFIG_SPL_PINCTRL=y > +CONFIG_DM_PMIC=y > +CONFIG_PMIC_RK8XX=y > +CONFIG_REGULATOR_PWM=y > +CONFIG_DM_REGULATOR_FIXED=y > +CONFIG_REGULATOR_RK8XX=y > +CONFIG_PWM_ROCKCHIP=y > +CONFIG_RAM=y > +CONFIG_SPL_RAM=y > +CONFIG_TPL_RAM=y > +CONFIG_BAUDRATE=1500000 > +CONFIG_DEBUG_UART_SHIFT=2 > +CONFIG_DEBUG_UART_ANNOUNCE=y > +CONFIG_DEBUG_UART_SKIP_INIT=y > +CONFIG_SYSRESET=y > +# CONFIG_TPL_SYSRESET is not set > +CONFIG_USB=y > +CONFIG_USB_XHCI_HCD=y > +CONFIG_USB_XHCI_DWC3=y > +CONFIG_USB_EHCI_HCD=y > +CONFIG_USB_EHCI_GENERIC=y > +CONFIG_USB_OHCI_HCD=y > +CONFIG_USB_OHCI_GENERIC=y > +CONFIG_USB_DWC2=y > +CONFIG_USB_DWC3=y > +# CONFIG_USB_DWC3_GADGET is not set > +CONFIG_USB_GADGET=y > +CONFIG_USB_GADGET_DWC2_OTG=y > +CONFIG_SPL_TINY_MEMSET=y > +CONFIG_TPL_TINY_MEMSET=y > +CONFIG_ERRNO_STR=y > +CONFIG_SMBIOS_MANUFACTURER="radxa" > diff --git a/doc/README.rockchip b/doc/README.rockchip > index 9b699b9ae5..d963698a3f 100644 > --- a/doc/README.rockchip > +++ b/doc/README.rockchip > @@ -52,10 +52,11 @@ Two RK3308 boards are supported: > - EVB RK3308 - use evb-rk3308 configuration > - ROC-CC-RK3308 - use roc-cc-rk3308 configuration > > -Two RK3328 board are supported: > +Three RK3328 board are supported: > > - EVB RK3328 - use evb-rk3328_defconfig > - Pine64 Rock64 board - use rock64-rk3328_defconfig > + - Radxa Rockpi E board - use rock-pi-e-rk3328_defconfig > > Size RK3399 boards are supported (aarch64): >

2 1

[PATCH] drivers: mmc: rpmb: do not build for SPL
by Heinrich Schuchardt 16 Apr '20

16 Apr '20

RPMB support is used by the 'mmc rpmb' command and by the OP-TEE support. We do not need it in SPL. Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- drivers/mmc/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index 615b724bf0..e84c792999 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -38,7 +38,7 @@ obj-$(CONFIG_MMC_MXC) += mxcmmc.o obj-$(CONFIG_MMC_MXS) += mxsmmc.o obj-$(CONFIG_MMC_PCI) += pci_mmc.o obj-$(CONFIG_PXA_MMC_GENERIC) += pxa_mmc_gen.o -obj-$(CONFIG_SUPPORT_EMMC_RPMB) += rpmb.o +obj-$(CONFIG_$(SPL_TPL_)SUPPORT_EMMC_RPMB) += rpmb.o obj-$(CONFIG_MMC_SANDBOX) += sandbox_mmc.o obj-$(CONFIG_SH_MMCIF) += sh_mmcif.o obj-$(CONFIG_SH_SDHI) += sh_sdhi.o -- 2.25.1

3 2

[PATCH] armv8: ls1046ardb: add new 16GB udimm memory support
by andy.tang＠nxp.com 16 Apr '20

16 Apr '20

From: Yuantian Tang <andy.tang(a)nxp.com> Add this udimm memory support on ls1046ardb board. Signed-off-by: Yuantian Tang <andy.tang(a)nxp.com> --- board/freescale/ls1046ardb/ddr.h | 1 + 1 file changed, 1 insertion(+) diff --git a/board/freescale/ls1046ardb/ddr.h b/board/freescale/ls1046ardb/ddr.h index 3b4d44d465..d401daa776 100644 --- a/board/freescale/ls1046ardb/ddr.h +++ b/board/freescale/ls1046ardb/ddr.h @@ -32,6 +32,7 @@ static const struct board_specific_parameters udimm0[] = { {2, 1350, 0, 8, 6, 0x0708090B, 0x0C0D0E09,}, {2, 1666, 0, 8, 7, 0x08090A0C, 0x0D0F100B,}, {2, 1900, 0, 8, 7, 0x09090B0D, 0x0E10120B,}, + {2, 2133, 0, 4, 7, 0x08090A0E, 0x1011120C,}, {2, 2300, 0, 8, 9, 0x0A0B0C10, 0x1213140E,}, {} }; -- 2.17.1

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[PULL] Pull request: u-boot-stm/next =u-boot-stm32-20200415
by Patrice CHOTARD 15 Apr '20

15 Apr '20

Hi Tom Please pull the u-boot-stm next branch. CI status: https://gitlab.denx.de/u-boot/custodians/u-boot-stm/pipelines/2759 Thanks Patrice The following changes since commit 142a07f2a44262d76fec609e1fcde51794a456eb: Merge branch 'master' of git://git.denx.de/u-boot-marvell (2020-04-14 08:47:07 -0400) are available in the Git repository at: https://gitlab.denx.de/u-boot/custodians/u-boot-stm tags/u-boot-stm32-20200415 for you to fetch changes up to 71ba2cb0d678d2c29dadd5fcca61ce3942876ee6: board: stm32mp1: correct CONFIG_IS_ENABLED usage for LED (2020-04-15 09:10:12 +0200) ---------------------------------------------------------------- - Replace STM32MP1_TRUSTED by TFABOOT flag - Enable bootd, iminfo, imxtract on ST defconfig - Rename LEDs to match silkscreen on AV96 - Add KS8851-16MLL ethernet on FMC2 - Define FMC2 base address - net: dwc_eth_qos: implement reset-gpios for stm32 - net: dwc_eth_qos: implement phy reg and max-speed for stm32 ---------------------------------------------------------------- Christophe Roullier (1): net: dwc_eth_qos: implement reset-gpios for stm32 Marek Vasut (3): ARM: dts: stm32: Define FMC2 base address ARM: dts: stm32: Add KS8851-16MLL ethernet on FMC2 ARM: dts: stm32: Rename LEDs to match silkscreen on AV96 Patrick Delaunay (4): net: dwc_eth_qos: implement phy reg and max-speed for stm32 configs: stm32mp1: replace STM32MP1_TRUSTED by TFABOOT ARM: stm32: Enable bootd, iminfo, imxtract on ST defconfig board: stm32mp1: correct CONFIG_IS_ENABLED usage for LED arch/arm/Kconfig | 1 + arch/arm/dts/stm32mp157a-avenger96.dts | 6 +-- arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi | 68 ++++++++++++++++++++++++++++ arch/arm/mach-stm32mp/Kconfig | 21 +++------ arch/arm/mach-stm32mp/bsec.c | 18 ++++---- arch/arm/mach-stm32mp/cpu.c | 10 ++--- arch/arm/mach-stm32mp/include/mach/stm32.h | 1 + board/dhelectronics/dh_stm32mp1/board.c | 58 ++++++++++++++++++++++-- board/st/stm32mp1/stm32mp1.c | 6 +-- configs/stm32mp15_basic_defconfig | 3 -- configs/stm32mp15_dhcom_basic_defconfig | 1 + configs/stm32mp15_optee_defconfig | 1 + configs/stm32mp15_trusted_defconfig | 4 +- drivers/clk/clk_stm32mp1.c | 2 +- drivers/net/dwc_eth_qos.c | 72 +++++++++++++++++++++++++++++- drivers/ram/stm32mp1/stm32mp1_ram.c | 2 +- include/configs/stm32mp1.h | 2 +- 17 files changed, 228 insertions(+), 48 deletions(-)

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[PATCH] ARM: imx6: DHCOM i.MX6 PDK: Convert to DM_ETH
by Harald Seiler 15 Apr '20

15 Apr '20

Use DM_ETH instead of legacy networking. Signed-off-by: Harald Seiler <hws(a)denx.de> --- Notes: I am unsure whether I converted 'enough' of the board_eth_init() function to DM. I think the reset GPIO in particular could be handled by the DM driver if I add the following to the device-tree (did not try it yet): phy-reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; phy-reset-duration = <1>; phy-reset-post-delay = <10>; Is it preferred to change the device-tree here or should I keep the reset from board_init() like I have it now? If I should use the dt, is there a similar way for dealing with VIO? board/dhelectronics/dh_imx6/dh_imx6.c | 26 +++++--------------------- configs/dh_imx6_defconfig | 2 ++ 2 files changed, 7 insertions(+), 21 deletions(-) diff --git a/board/dhelectronics/dh_imx6/dh_imx6.c b/board/dhelectronics/dh_imx6/dh_imx6.c index 33ce7e8ff115..aafb9f1b341f 100644 --- a/board/dhelectronics/dh_imx6/dh_imx6.c +++ b/board/dhelectronics/dh_imx6/dh_imx6.c @@ -28,10 +28,7 @@ #include <fsl_esdhc_imx.h> #include <fuse.h> #include <i2c_eeprom.h> -#include <miiphy.h> #include <mmc.h> -#include <net.h> -#include <netdev.h> #include <usb.h> #include <usb/ehci-ci.h> @@ -80,31 +77,14 @@ static int setup_fec_clock(void) return enable_fec_anatop_clock(0, ENET_50MHZ); } -int board_eth_init(bd_t *bis) +static void setup_fec(void) { - uint32_t base = IMX_FEC_BASE; - struct mii_dev *bus = NULL; - struct phy_device *phydev = NULL; - gpio_request(IMX_GPIO_NR(5, 0), "PHY-reset"); gpio_request(IMX_GPIO_NR(1, 7), "VIO"); setup_fec_clock(); eth_phy_reset(); - - bus = fec_get_miibus(base, -1); - if (!bus) - return -EINVAL; - - /* Scan PHY 0 */ - phydev = phy_find_by_mask(bus, 0xf, PHY_INTERFACE_MODE_RGMII); - if (!phydev) { - printf("Ethernet PHY not found!\n"); - return -EINVAL; - } - - return fec_probe(bis, -1, base, bus, phydev); } #endif @@ -190,6 +170,10 @@ int board_init(void) setup_dhcom_mac_from_fuse(); +#ifdef CONFIG_FEC_MXC + setup_fec(); +#endif + return 0; } diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig index cbfc3c394e7d..40de1d82031b 100644 --- a/configs/dh_imx6_defconfig +++ b/configs/dh_imx6_defconfig @@ -74,6 +74,8 @@ CONFIG_SPI_FLASH_MTD=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PINCTRL=y -- 2.26.0

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Please pull u-boot-marvell/master (watchdog related)
by Stefan Roese 15 Apr '20

15 Apr '20

Hi Tom, please pull the following watchdog related patches: ---------------------------------------------------------------- - Common: honour hw_margin_ms property (Rasmus) - sp805_wdt: get platform clock from dt (Rayagonda) ---------------------------------------------------------------- Here the Azure build, without any issues: https://dev.azure.com/sr0718/u-boot/_build/results?buildId=4&view=results Thanks, Stefan The following changes since commit 142a07f2a44262d76fec609e1fcde51794a456eb: Merge branch 'master' of git://git.denx.de/u-boot-marvell (2020-04-14 08:47:07 -0400) are available in the Git repository at: git@gitlab.denx.de:u-boot/custodians/u-boot-marvell.git for you to fetch changes up to 19a159f94ac1532ec12cf14a96c9daf172ade988: watchdog: sp805_wdt: get platform clock from dt file (2020-04-15 08:54:07 +0200) ---------------------------------------------------------------- Rasmus Villemoes (3): watchdog: remove stale ifndef CONFIG_WATCHDOG_TIMEOUT_MSECS from wdt.h watchdog: move initr_watchdog() to wdt-uclass.c watchdog: honour hw_margin_ms DT property Rayagonda Kokatanur (1): watchdog: sp805_wdt: get platform clock from dt file drivers/watchdog/sp805_wdt.c | 15 +++++++++++++-- drivers/watchdog/wdt-uclass.c | 44 ++++++++++++++++++++++++++++++++++++++++++- include/wdt.h | 37 +----------------------------------- 3 files changed, 57 insertions(+), 39 deletions(-)

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