April 2020 - U-Boot

[PATCH v2] fs: btrfs: support sparse extents
by Marek Behún 21 Apr '20

21 Apr '20

When logical address of a regular extent is 0, the extent is sparse and consists of all zeros. Without this when sparse extents are used in a file reading fails with Cannot map logical address 0 to physical Signed-off-by: Marek Behún <marek.behun(a)nic.cz> --- fs/btrfs/extent-io.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/fs/btrfs/extent-io.c b/fs/btrfs/extent-io.c index 66d0e1c7d6..2e4599cf64 100644 --- a/fs/btrfs/extent-io.c +++ b/fs/btrfs/extent-io.c @@ -78,6 +78,12 @@ u64 btrfs_read_extent_reg(struct btrfs_path *path, if (size > dlen - offset) size = dlen - offset; + /* sparse extent */ + if (extent->disk_bytenr == 0) { + memset(out, 0, size); + return size; + } + physical = btrfs_map_logical_to_physical(extent->disk_bytenr); if (physical == -1ULL) return -1ULL; -- 2.24.1

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[PATCH] clk: meson: g12a: add missing SD_EMMC_A controller gates
by Neil Armstrong 21 Apr '20

21 Apr '20

Add missing SD_EMMC_A controller gates needed for probe of the A controller, otherwise leading to a freeze of the SoC after b3d69aa596. Fixes: b3d69aa596 ("clk: meson: reset mmc clock on probe") Signed-off-by: Neil Armstrong <narmstrong(a)baylibre.com> --- drivers/clk/meson/g12a.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c index c1976aa1ef..6089f8474e 100644 --- a/drivers/clk/meson/g12a.c +++ b/drivers/clk/meson/g12a.c @@ -112,6 +112,7 @@ static struct meson_gate gates[NUM_CLKS] = { MESON_GATE(CLKID_I2C, HHI_GCLK_MPEG0, 9), MESON_GATE(CLKID_UART0, HHI_GCLK_MPEG0, 13), MESON_GATE(CLKID_SPICC1, HHI_GCLK_MPEG0, 14), + MESON_GATE(CLKID_SD_EMMC_A, HHI_GCLK_MPEG0, 4), MESON_GATE(CLKID_SD_EMMC_B, HHI_GCLK_MPEG0, 25), MESON_GATE(CLKID_SD_EMMC_C, HHI_GCLK_MPEG0, 26), MESON_GATE(CLKID_ETH, HHI_GCLK_MPEG1, 3), @@ -127,6 +128,7 @@ static struct meson_gate gates[NUM_CLKS] = { MESON_GATE(CLKID_FCLK_DIV4, HHI_FIX_PLL_CNTL1, 21), MESON_GATE(CLKID_FCLK_DIV5, HHI_FIX_PLL_CNTL1, 22), MESON_GATE(CLKID_FCLK_DIV7, HHI_FIX_PLL_CNTL1, 23), + MESON_GATE(CLKID_SD_EMMC_A_CLK0, HHI_SD_EMMC_CLK_CNTL, 7), MESON_GATE(CLKID_SD_EMMC_B_CLK0, HHI_SD_EMMC_CLK_CNTL, 23), MESON_GATE(CLKID_SD_EMMC_C_CLK0, HHI_NAND_CLK_CNTL, 7), MESON_GATE(CLKID_VPU_0, HHI_VPU_CLK_CNTL, 8), -- 2.22.0

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[PATCH] armv8: ls1028a: define esdhc_status_fixup
by Xiaowei Bao 21 Apr '20

21 Apr '20

From: Yinbo Zhu <yinbo.zhu(a)nxp.com> This patch is to define esdhc_status_fixup function for ls1028a to disable SDHC1/SDHC2 status in device tree node if not selected. Signed-off-by: Yinbo Zhu <yinbo.zhu(a)nxp.com> Signed-off-by: Xiaowei Bao <xiaowei.bao(a)nxp.com> Signed-off-by: Yangbo Lu <yangbo.lu(a)nxp.com> --- .../include/asm/arch-fsl-layerscape/immap_lsch3.h | 5 +++ board/freescale/ls1028a/ls1028a.c | 40 ++++++++++++++++++++++ 2 files changed, 45 insertions(+) diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h index 299201b..c2fbc23 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h @@ -232,7 +232,12 @@ #define DCFG_PORSR1 0x000 #define DCFG_PORSR1_RCW_SRC 0xff800000 #define DCFG_PORSR1_RCW_SRC_NOR 0x12f00000 +#define DCFG_RCWSR12 0x12c +#define DCFG_RCWSR12_SDHC_SHIFT 24 +#define DCFG_RCWSR12_SDHC_MASK 0x7 #define DCFG_RCWSR13 0x130 +#define DCFG_RCWSR13_SDHC_SHIFT 3 +#define DCFG_RCWSR13_SDHC_MASK 0x7 #define DCFG_RCWSR13_DSPI (0 << 8) #define DCFG_RCWSR15 0x138 #define DCFG_RCWSR15_IFCGRPABASE_QSPI 0x3 diff --git a/board/freescale/ls1028a/ls1028a.c b/board/freescale/ls1028a/ls1028a.c index aa93534..a8bdd12 100644 --- a/board/freescale/ls1028a/ls1028a.c +++ b/board/freescale/ls1028a/ls1028a.c @@ -135,6 +135,46 @@ void detail_board_ddr_info(void) print_ddr_info(0); } +int esdhc_status_fixup(void *blob, const char *compat) +{ + void __iomem *dcfg_ccsr = (void __iomem *)DCFG_BASE; + char esdhc1_path[] = "/soc/mmc@2140000"; + char esdhc2_path[] = "/soc/mmc@2150000"; + char dspi1_path[] = "/soc/spi@2100000"; + char dspi2_path[] = "/soc/spi@2110000"; + u32 mux_sdhc1, mux_sdhc2; + u32 io = 0; + + /* + * The PMUX IO-expander for mux select is used to control + * the muxing of various onboard interfaces. + */ + + io = in_le32(dcfg_ccsr + DCFG_RCWSR12); + mux_sdhc1 = (io >> DCFG_RCWSR12_SDHC_SHIFT) & DCFG_RCWSR12_SDHC_MASK; + + /* Disable esdhc1/dspi1 if not selected. */ + if (mux_sdhc1 != 0) + do_fixup_by_path(blob, esdhc1_path, "status", "disabled", + sizeof("disabled"), 1); + if (mux_sdhc1 != 2) + do_fixup_by_path(blob, dspi1_path, "status", "disabled", + sizeof("disabled"), 1); + + io = in_le32(dcfg_ccsr + DCFG_RCWSR13); + mux_sdhc2 = (io >> DCFG_RCWSR13_SDHC_SHIFT) & DCFG_RCWSR13_SDHC_MASK; + + /* Disable esdhc2/dspi2 if not selected. */ + if (mux_sdhc2 != 0) + do_fixup_by_path(blob, esdhc2_path, "status", "disabled", + sizeof("disabled"), 1); + if (mux_sdhc2 != 2) + do_fixup_by_path(blob, dspi2_path, "status", "disabled", + sizeof("disabled"), 1); + + return 0; +} + #ifdef CONFIG_OF_BOARD_SETUP int ft_board_setup(void *blob, bd_t *bd) { -- 2.9.5

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[PATCH 1/1] board: fsl: lx2160a: unused variable gic_lpi_base
by Heinrich Schuchardt 21 Apr '20

21 Apr '20

If the board is configured without CONFIG_GIC_V3_ITS, an error occurs: board/freescale/lx2160a/lx2160a.c: In function ‘ft_board_setup’: board/freescale/lx2160a/lx2160a.c:673:6: error: unused variable ‘gic_lpi_base’ [-Werror=unused-variable] 673 | u64 gic_lpi_base; | ^~~~~~~~~~~~ Let's define the variable as __maybe_unused. Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- board/freescale/lx2160a/lx2160a.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c index 4b20bb440f..23ea1b6f16 100644 --- a/board/freescale/lx2160a/lx2160a.c +++ b/board/freescale/lx2160a/lx2160a.c @@ -670,7 +670,7 @@ int ft_board_setup(void *blob, bd_t *bd) u64 mc_memory_base = 0; u64 mc_memory_size = 0; u16 total_memory_banks; - u64 gic_lpi_base; + u64 __maybe_unused gic_lpi_base; ft_cpu_setup(blob, bd); -- 2.25.1

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[PATCH 1/1] net: fm: fix build error when not using nand
by Francois Gervais 21 Apr '20

21 Apr '20

If CONFIG_CMD_NAND is disabled, get_nand_dev_by_index() is not accessible. This fix allows the build to succeed in this case. Signed-off-by: Francois Gervais <fgervais(a)distech-controls.com> --- drivers/net/fm/fm.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/net/fm/fm.c b/drivers/net/fm/fm.c index 926cf81a07..7a081b9d03 100644 --- a/drivers/net/fm/fm.c +++ b/drivers/net/fm/fm.c @@ -360,6 +360,7 @@ int fm_init_common(int index, struct ccsr_fman *reg) if (src == BOOT_SOURCE_IFC_NOR) { addr = (void *)(CONFIG_SYS_FMAN_FW_ADDR + CONFIG_SYS_FSL_IFC_BASE); +#ifdef CONFIG_CMD_NAND } else if (src == BOOT_SOURCE_IFC_NAND) { size_t fw_length = CONFIG_SYS_QE_FMAN_FW_LENGTH; @@ -372,6 +373,7 @@ int fm_init_common(int index, struct ccsr_fman *reg) printf("NAND read of FMAN firmware at offset 0x%x failed %d\n", CONFIG_SYS_FMAN_FW_ADDR, rc); } +#endif } else if (src == BOOT_SOURCE_QSPI_NOR) { struct spi_flash *ucode_flash; -- 2.17.1

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[PATCH 0/4] Backplane KR support
by Florinel Iordache 21 Apr '20

21 Apr '20

Add phy support for Ethernet Backplane KR modes: 10gbase-kr, 40gbase-kr4 and remove fixups (platform generic and board specific) for phy interfaces specified in device tree as supported backplane mode Florinel Iordache (4): phy: add support for backplane kr mode ls1046aqds: add support for backplane kr lx2160aqds: add support for backplane kr t208xqds: add support for backplane kr arch/arm/cpu/armv8/fsl-layerscape/fdt.c | 9 +++++++++ arch/powerpc/cpu/mpc8xxx/fdt.c | 9 +++++++++ board/freescale/ls1046aqds/eth.c | 19 +++++++------------ board/freescale/lx2160a/eth_lx2160aqds.c | 9 ++++++++- board/freescale/t208xqds/eth_t208xqds.c | 29 ++++++++++++++++++++--------- include/phy_interface.h | 23 +++++++++++++++++++++++ 6 files changed, 76 insertions(+), 22 deletions(-) -- 1.9.1

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[PATCH] configs: ls1012afrwy: fix board name
by Biwen Li 21 Apr '20

21 Apr '20

Fix board name for ls1012afrwy Signed-off-by: Biwen Li <biwen.li(a)nxp.com> --- include/configs/ls1012afrwy.h | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/include/configs/ls1012afrwy.h b/include/configs/ls1012afrwy.h index 9007249804..e53249e4ed 100644 --- a/include/configs/ls1012afrwy.h +++ b/include/configs/ls1012afrwy.h @@ -78,6 +78,7 @@ "kernel_size=0x2800000\0" \ "kernelheader_size=0x40000\0" \ "console=ttyS0,115200\0" \ + "BOARD=ls1012afrwy\0" \ BOOTENV \ "boot_scripts=ls1012afrwy_boot.scr\0" \ "boot_script_hdr=hdr_ls1012afrwy_bs.out\0" \ @@ -109,20 +110,20 @@ "source ${scriptaddr}\0" \ "installer=load mmc 0:2 $load_addr " \ "/flex_installer_arm64.itb; " \ - "bootm $load_addr#$board\0" \ + "bootm $load_addr#$BOARD\0" \ "qspi_bootcmd=pfe stop; echo Trying load from qspi..;" \ "sf probe && sf read $load_addr " \ "$kernel_addr $kernel_size; env exists secureboot " \ "&& sf read $kernelheader_addr_r $kernelheader_addr " \ "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \ - "bootm $load_addr#$board\0" \ + "bootm $load_addr#$BOARD\0" \ "sd_bootcmd=pfe stop; echo Trying load from sd card..;" \ "mmcinfo; mmc read $load_addr " \ "$kernel_addr_sd $kernel_size_sd ;" \ "env exists secureboot && mmc read $kernelheader_addr_r "\ "$kernelhdr_addr_sd $kernelhdr_size_sd " \ " && esbc_validate ${kernelheader_addr_r};" \ - "bootm $load_addr#$board\0" + "bootm $load_addr#$BOARD\0" #undef CONFIG_BOOTCOMMAND #ifdef CONFIG_TFABOOT -- 2.17.1

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[PATCH v2] usb: dwc3-meson-g12a: add power-on/off of the PHYs
by Neil Armstrong 21 Apr '20

21 Apr '20

Power on/off the PHYs to enable power to the USB ports, fixing USB support on Khadas VIM3/VIM3L boards. The G12A USB complex has at least 2 USB2 PHYs, but one is muxed between the DWC2 and DWC3 controller and the other one directly connected to the DWC3 controller. The USB3+PCIe combo PHY is muxed between the DWC3 controller and a DW-PCIE controller. All PHYs are optional, but it's type (usb2/usb3) and position are important to determine it's capabilities, thus they are stored in a fixed size array and the phy-name determines it's position, it's position determining it's type and functionnalities. This is why we need to loop over the array to power on all the DT provided PHYs. Signed-off-by: Neil Armstrong <narmstrong(a)baylibre.com> --- Changes since v1: - removed extra space before semicolon - added clarification in commit message drivers/usb/dwc3/dwc3-meson-g12a.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/usb/dwc3/dwc3-meson-g12a.c b/drivers/usb/dwc3/dwc3-meson-g12a.c index d4453f8784..de964d6c10 100644 --- a/drivers/usb/dwc3/dwc3-meson-g12a.c +++ b/drivers/usb/dwc3/dwc3-meson-g12a.c @@ -408,6 +408,15 @@ static int dwc3_meson_g12a_probe(struct udevice *dev) goto err_phy_init; } + for (i = 0; i < PHY_COUNT; ++i) { + if (!priv->phys[i].dev) + continue; + + ret = generic_phy_power_on(&priv->phys[i]); + if (ret) + goto err_phy_init; + } + return 0; err_phy_init: @@ -430,6 +439,13 @@ static int dwc3_meson_g12a_remove(struct udevice *dev) clk_release_all(&priv->clk, 1); + for (i = 0; i < PHY_COUNT; ++i) { + if (!priv->phys[i].dev) + continue; + + generic_phy_power_off(&priv->phys[i]); + } + for (i = 0 ; i < PHY_COUNT ; ++i) { if (!priv->phys[i].dev) continue; -- 2.22.0

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[PATCH 0/3] mtd: spi-nor: add support for locking on Macronix nor flashes
by Rasmus Villemoes 21 Apr '20

21 Apr '20

Here's an attempt at implementing locking support for Macronix flashes. I've tested that it works on the chip used on our boards, and reading data sheets for various other Macronix chips suggest they behave in the same way. I'm still not entirely sure about the best way to hook up these functions in spi_nor_scan. Also, I'm ignoring the UI/UX issue of automatically setting a OTP bit without some "force" or "yes, I'm sure" opt-in - maybe I'm simply overthinking it and it's not a problem in practice (at least for our use case at hand, we will use bottom protect, so we can't really shoot ourselves in the foot). Rasmus Villemoes (3): mtd: spi-nor: don't guard stm_*lock* family by preprocessor conditionals mtd: spi-nor: add support for locking on Macronix nor flashes mtd: spi-nor: set SPI_NOR_HAS_LOCK for Macronix mx25l3205d drivers/mtd/spi/spi-nor-core.c | 268 ++++++++++++++++++++++++++++----- drivers/mtd/spi/spi-nor-ids.c | 2 +- include/linux/mtd/spi-nor.h | 3 + 3 files changed, 236 insertions(+), 37 deletions(-) -- 2.23.0

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[PATCH] usb: dwc3-meson-g12a: add power-on/off of the PHYs
by Neil Armstrong 21 Apr '20

21 Apr '20

Power on/off the PHYs to enable power to the USB ports, fixing USB support on Khadas VIM3/VIM3L boards. Signed-off-by: Neil Armstrong <narmstrong(a)baylibre.com> --- drivers/usb/dwc3/dwc3-meson-g12a.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/usb/dwc3/dwc3-meson-g12a.c b/drivers/usb/dwc3/dwc3-meson-g12a.c index d4453f8784..8f4a2f3f82 100644 --- a/drivers/usb/dwc3/dwc3-meson-g12a.c +++ b/drivers/usb/dwc3/dwc3-meson-g12a.c @@ -408,6 +408,15 @@ static int dwc3_meson_g12a_probe(struct udevice *dev) goto err_phy_init; } + for (i = 0 ; i < PHY_COUNT ; ++i) { + if (!priv->phys[i].dev) + continue; + + ret = generic_phy_power_on(&priv->phys[i]); + if (ret) + goto err_phy_init; + } + return 0; err_phy_init: @@ -430,6 +439,13 @@ static int dwc3_meson_g12a_remove(struct udevice *dev) clk_release_all(&priv->clk, 1); + for (i = 0 ; i < PHY_COUNT ; ++i) { + if (!priv->phys[i].dev) + continue; + + generic_phy_power_off(&priv->phys[i]); + } + for (i = 0 ; i < PHY_COUNT ; ++i) { if (!priv->phys[i].dev) continue; -- 2.22.0

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