April 2020 - U-Boot

Build error in u-boot-dm/master
by Stephen Warren 28 Apr '20

28 Apr '20

Simon, All 32-bit Tegra builds of u-boot-dm/master are failing with the following (this log is from Harmony): > CC spl/common/spl/spl.o > CC spl/lib/display_options.o > LD spl/common/spl/built-in.o > LD spl/lib/built-in.o > LD spl/u-boot-spl > OBJCOPY spl/u-boot-spl-nodtb.bin > COPY spl/u-boot-spl.bin > BINMAN u-boot-tegra.bin > binman: bad magic number in 'binman.etype': b'\x03\xf3\r\n' > /var/lib/jenkins/workspace/u-boot-denx_uboot_dm-master-build/src/u-boot/Makefile:1619: recipe for target 'u-boot-tegra.bin' failed > make[1]: *** [u-boot-tegra.bin] Error 1

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[PATCH 1/3] [RFC] dm: core: Add late driver remove option
by Marek Vasut 28 Apr '20

28 Apr '20

Add another flag to the DM core which could be assigned to drivers and which makes those drivers call their remove callbacks last, just before booting OS and after all the other drivers finished with their remove callbacks. This is necessary for things like clock drivers, where the other drivers might depend on the clock driver in their remove callbacks. Prime example is the mmc subsystem, which can reconfigure a card from HS mode to slower modes in the remove callback and for that it needs to reconfigure the controller clock. Signed-off-by: Marek Vasut <marek.vasut+renesas(a)gmail.com> Cc: Simon Glass <sjg(a)chromium.org> Cc: Tom Rini <trini(a)konsulko.com> --- arch/arm/lib/bootm.c | 1 + drivers/core/device-remove.c | 11 ++++++++--- drivers/core/root.c | 2 ++ include/dm/device.h | 4 ++++ 4 files changed, 15 insertions(+), 3 deletions(-) diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c index f4b5ca6de0..1d247128b7 100644 --- a/arch/arm/lib/bootm.c +++ b/arch/arm/lib/bootm.c @@ -116,6 +116,7 @@ static void announce_and_cleanup(int fake) * of DMA operation or releasing device internal buffers. */ dm_remove_devices_flags(DM_REMOVE_ACTIVE_ALL); + dm_remove_devices_flags(DM_REMOVE_ACTIVE_ALL | DM_REMOVE_LATE); cleanup_before_linux(); } diff --git a/drivers/core/device-remove.c b/drivers/core/device-remove.c index efdb0f2905..07b241b6bb 100644 --- a/drivers/core/device-remove.c +++ b/drivers/core/device-remove.c @@ -172,14 +172,19 @@ int device_remove(struct udevice *dev, uint flags) drv = dev->driver; assert(drv); - ret = uclass_pre_remove_device(dev); - if (ret) - return ret; + if (!(flags & DM_REMOVE_LATE)) { + ret = uclass_pre_remove_device(dev); + if (ret) + return ret; + } ret = device_chld_remove(dev, NULL, flags); if (ret) goto err; + if (!(flags & DM_REMOVE_LATE) && (drv->flags & DM_FLAG_REMOVE_LATE)) + return 0; + /* * Remove the device if called with the "normal" remove flag set, * or if the remove flag matches any of the drivers remove flags diff --git a/drivers/core/root.c b/drivers/core/root.c index 14df16c280..fcb1dfddf5 100644 --- a/drivers/core/root.c +++ b/drivers/core/root.c @@ -166,6 +166,7 @@ int dm_init(bool of_live) int dm_uninit(void) { device_remove(dm_root(), DM_REMOVE_NORMAL); + device_remove(dm_root(), DM_REMOVE_LATE); device_unbind(dm_root()); gd->dm_root = NULL; @@ -376,6 +377,7 @@ int dm_init_and_scan(bool pre_reloc_only) U_BOOT_DRIVER(root_driver) = { .name = "root_driver", .id = UCLASS_ROOT, + .flags = DM_FLAG_REMOVE_LATE, }; /* This is the root uclass */ diff --git a/include/dm/device.h b/include/dm/device.h index 975eec5d0e..e7c1c343fe 100644 --- a/include/dm/device.h +++ b/include/dm/device.h @@ -73,6 +73,8 @@ struct driver_info; */ #define DM_FLAG_REMOVE_WITH_PD_ON (1 << 13) +#define DM_FLAG_REMOVE_LATE (1 << 14) + /* * One or multiple of these flags are passed to device_remove() so that * a selective device removal as specified by the remove-stage and the @@ -95,6 +97,8 @@ enum { /* Don't power down any attached power domains */ DM_REMOVE_NO_PD = 1 << 1, + + DM_REMOVE_LATE = 1 << 2, }; /** -- 2.25.1

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[PATCH] sandbox: drop CONFIG_SYS_RELOC_GD_ENV_ADDR
by AKASHI Takahiro 28 Apr '20

28 Apr '20

As we discussed in [1], this option is not needed for sandbox build. [1] https://lists.denx.de/pipermail/u-boot/2020-February/400182.html Signed-off-by: AKASHI Takahiro <takahiro.akashi(a)linaro.org> --- configs/sandbox64_defconfig | 1 - configs/sandbox_defconfig | 1 - configs/sandbox_flattree_defconfig | 1 - configs/sandbox_spl_defconfig | 1 - 4 files changed, 4 deletions(-) diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig index 9d092330efe2..687b492eda7a 100644 --- a/configs/sandbox64_defconfig +++ b/configs/sandbox64_defconfig @@ -78,7 +78,6 @@ CONFIG_OF_CONTROL=y CONFIG_OF_LIVE=y CONFIG_OF_HOSTFILE=y CONFIG_DEFAULT_DEVICE_TREE="sandbox64" -CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NETCONSOLE=y CONFIG_IP_DEFRAG=y CONFIG_REGMAP=y diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index cc3831586838..d99a64e3a562 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -87,7 +87,6 @@ CONFIG_OF_CONTROL=y CONFIG_OF_LIVE=y CONFIG_OF_HOSTFILE=y CONFIG_DEFAULT_DEVICE_TREE="sandbox" -CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NETCONSOLE=y CONFIG_IP_DEFRAG=y CONFIG_REGMAP=y diff --git a/configs/sandbox_flattree_defconfig b/configs/sandbox_flattree_defconfig index 00d9359f197c..82190934b74a 100644 --- a/configs/sandbox_flattree_defconfig +++ b/configs/sandbox_flattree_defconfig @@ -61,7 +61,6 @@ CONFIG_AMIGA_PARTITION=y CONFIG_OF_CONTROL=y CONFIG_OF_HOSTFILE=y CONFIG_DEFAULT_DEVICE_TREE="sandbox" -CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NETCONSOLE=y CONFIG_IP_DEFRAG=y CONFIG_REGMAP=y diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig index 18c6a4760295..849e36d64ab9 100644 --- a/configs/sandbox_spl_defconfig +++ b/configs/sandbox_spl_defconfig @@ -77,7 +77,6 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_OF_HOSTFILE=y CONFIG_DEFAULT_DEVICE_TREE="sandbox" CONFIG_SPL_OF_PLATDATA=y -CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NETCONSOLE=y CONFIG_IP_DEFRAG=y CONFIG_SPL_DM=y -- 2.25.2

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[PATCH] sandbox: update documents regarding spi_sf
by AKASHI Takahiro 28 Apr '20

28 Apr '20

Since the commit 1289e96797bf ("sandbox: spi: Drop command-line SPI option"), "--spi_sf" command line option is no longer supported. So update the following documents to sync them up with the change. doc/arch/sandbox.rst doc/SPI/README.sandbox-spi Signed-off-by: AKASHI Takahiro <takahiro.akashi(a)linaro.org> --- doc/SPI/README.sandbox-spi | 58 ++++++++++++-------------------------- doc/arch/sandbox.rst | 52 +++++++++++++++------------------- 2 files changed, 41 insertions(+), 69 deletions(-) diff --git a/doc/SPI/README.sandbox-spi b/doc/SPI/README.sandbox-spi index dfa845cc8274..f6a55fe78002 100644 --- a/doc/SPI/README.sandbox-spi +++ b/doc/SPI/README.sandbox-spi @@ -2,59 +2,37 @@ Sandbox SPI/SPI Flash Implementation ==================================== U-Boot supports SPI and SPI flash emulation in sandbox. This must be enabled -using the --spi_sf paramter when starting U-Boot. +via a device tree. For example: -$ make O=sandbox sandbox_config -$ make O=sandbox -$ ./sandbox/u-boot --spi_sf 0:0:W25Q128:b/chromeos_peach/out/image.bin - -The four parameters to spi_sf are: - - SPI bus number (typically 0) - SPI chip select number (typically 0) - SPI chip to emulate - File containing emulated data + spi@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0 1>; + compatible = "sandbox,spi"; + cs-gpios = <0>, <&gpio_a 0>; + spi.bin@0 { + reg = <0>; + compatible = "spansion,m25p16", "jedec,spi-nor"; + spi-max-frequency = <40000000>; + sandbox,filename = "spi.bin"; + }; + }; Supported chips are W25Q16 (2MB), W25Q32 (4MB) and W25Q128 (16MB). Once U-Boot it started you can use 'sf' commands as normal. For example: -$ ./b/sandbox/u-boot --spi_sf 0:0:W25Q128:b/chromeos_peach/out/image.bin \ - -c "sf probe; sf test 0 100000; sf read 0 1000 1000; \ - sf erase 1000 1000; sf write 0 1000 1000" - - -U-Boot 2013.10-00237-gd4e0fdb (Nov 07 2013 - 20:08:15) - -DRAM: 128 MiB -Using default environment - -In: serial -Out: serial -Err: serial -SF: Detected W25Q128BV with page size 256 Bytes, erase size 4 KiB, total 16 MiB -SPI flash test: -0 erase: 1 ticks, 1024000 KiB/s 8192.000 Mbps -1 check: 2 ticks, 512000 KiB/s 4096.000 Mbps -2 write: 6 ticks, 170666 KiB/s 1365.328 Mbps -3 read: 0 ticks, 1048576000 KiB/s -201326.-592 Mbps -Test passed -0 erase: 1 ticks, 1024000 KiB/s 8192.000 Mbps -1 check: 2 ticks, 512000 KiB/s 4096.000 Mbps -2 write: 6 ticks, 170666 KiB/s 1365.328 Mbps -3 read: 0 ticks, 1048576000 KiB/s -201326.-592 Mbps -SF: 4096 bytes @ 0x1000 Read: OK -SF: 4096 bytes @ 0x1000 Erased: OK -SF: 4096 bytes @ 0x1000 Written: OK - +$ dd if=/dev/zero of=spi.bin bs=1M count=2 +$ u-boot -T Since the SPI bus is fully implemented as well as the SPI flash connected to it, you can also use low-level SPI commands to access the flash. For example this reads the device ID from the emulated chip: => sspi 0 32 9f -FFEF4018 +SF: Detected m25p16 with page size 256 Bytes, erase size 64 KiB, total 2 MiB +FF202015 Simon Glass diff --git a/doc/arch/sandbox.rst b/doc/arch/sandbox.rst index 6a1c6fc552b1..360f22461a7d 100644 --- a/doc/arch/sandbox.rst +++ b/doc/arch/sandbox.rst @@ -316,19 +316,29 @@ SPI Emulation Sandbox supports SPI and SPI flash emulation. -This is controlled by the spi_sf argument, the format of which is:: - - bus:cs:device:file - - bus - SPI bus number - cs - SPI chip select number - device - SPI device emulation name - file - File on disk containing the data - -For example:: - - dd if=/dev/zero of=spi.bin bs=1M count=4 - ./u-boot --spi_sf 0:0:M25P16:spi.bin +The device can be enabled via a device tree, for example:: + + spi@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0 1>; + compatible = "sandbox,spi"; + cs-gpios = <0>, <&gpio_a 0>; + spi.bin@0 { + reg = <0>; + compatible = "spansion,m25p16", "jedec,spi-nor"; + spi-max-frequency = <40000000>; + sandbox,filename = "spi.bin"; + }; + }; + +The file must be created in advance:: + + $ dd if=/dev/zero of=spi.bin bs=1M count=2 + $ u-boot -T + +Here, you can use "-T" or "-D" option to specify test.dtb or u-boot.dtb, +respectively, or "-d <file>" for your own dtb. With this setup you can issue SPI flash commands as normal:: @@ -346,22 +356,6 @@ also use low-level SPI commands:: This is issuing a READ_ID command and getting back 20 (ST Micro) part 0x2015 (the M25P16). -Drivers are connected to a particular bus/cs using sandbox's state -structure (see the 'spi' member). A set of operations must be provided -for each driver. - - -Configuration settings for the curious are: - -CONFIG_SANDBOX_SPI_MAX_BUS: - The maximum number of SPI buses supported by the driver (default 1). - -CONFIG_SANDBOX_SPI_MAX_CS: - The maximum number of chip selects supported by the driver (default 10). - -CONFIG_SPI_IDLE_VAL: - The idle value on the SPI bus - Block Device Emulation ---------------------- -- 2.25.2

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[PATCH v1 00/49] add support for broadcom NS3 soc
by Rayagonda Kokatanur 28 Apr '20

28 Apr '20

This patch series adds support for Broadcom Northstar 3 SoC. NS3 is a octo-core 64-bit ARMv8 Cortex-A72 processors targeting a broad range of networking applications. Abhishek Shah (1): board: ns3: add api to save boot parameters passed from BL31 Bharat Gooty (2): include/configs: ns3: add env variables for Linux boot include/configs: ns3: add support for flashing images Bharat Kumar Reddy Gooty (3): board: ns3: program GIC LPI tables board: ns3: limit U-boot relocation within 16MB memory cmd: bcm: add command for chimp hand shake Corneliu Doban (1): cmd: gpt: add eMMC and GPT support Pramod Kumar (4): arm: dts: ns3: add emmc node arm: dts: ns3: add sp805 watchdog node board: ns3: add FIT image its file board: ns3: add development keys used in FIT Rajesh Ravi (1): board: ns3: default reset type to L3 Ray Jui (1): board: ns3: define ddr memory layout Rayagonda Kokatanur (27): board: ns3: add support for Broadcom Northstar 3 arm: cpu: armv8: add L3 memory flush support configs: ns3: enable clock subsystem arm: dts: ns3: add clock dt node configs: ns3: enable pinctrl driver dt-bindings: pinctrl: add ns3 pads definition arm: dts: ns3: add pinctrl node arm: dts: ns3: add gpio node gpio: do not include <asm/arch/gpio.h> on TARGET_BCMNS3 configs: ns3: enable BCM IPROC mmc driver configs: ns3: enable mmc commands arm: dts: ns3: add qspi node dt-bindings: memory: ns3: add memory definitions arm: dts: ns3: add i2c node configs: ns3: enable gpt commands configs: ns3: enable EXT4 and FAT fs support configs: ns3: enable sp805 watchdog driver board: ns3: start sp805 watchdog service dt-bindings: memory: ns3: update GIC LPI address configs: ns3: enable GIC ITS LPI table programing dt-bindings: memory: ns3: add ddr memory definition configs: ns3: enable FIT config configs: ns3: enable PXE boot command configs: ns3: enable RPMB configs: ns3: enable tee and optee driver configs: ns3: env in mmc board: ns3: check chimp handshake status Sheetal Tigadoli (1): common: ns3: add error logging support Srinath Mannam (1): arm: dts: ns3: add PAXB PCIe host and phy node Trac Hoang (2): board: ns3: add generic MCU IPC command send API cmd: bcm: add nitro boot command Vikas Gupta (3): board: ns3: add optee based bnxt fw load driver arm: dts: ns3: add optee node cmd: bcm: add nitro image load commands Vladimir Olovyannikov (2): board: ns3: kconfig: extend board kconfig with specific commands cmd: bcm: add broadcom error log setup command arch/arm/Kconfig | 10 + arch/arm/cpu/armv8/Makefile | 1 + arch/arm/cpu/armv8/bcmns3/Makefile | 5 + arch/arm/cpu/armv8/bcmns3/lowlevel.S | 99 ++ arch/arm/dts/Makefile | 2 + arch/arm/dts/ns3-board.dts | 105 ++ arch/arm/dts/ns3-clock.dtsi | 34 + arch/arm/dts/ns3-pinctrl.dtsi | 321 +++++++ arch/arm/dts/ns3.dtsi | 265 ++++++ arch/arm/include/asm/arch-bcmns3/bl33_info.h | 26 + arch/arm/include/asm/gpio.h | 2 +- board/broadcom/bcmns3/Kconfig | 25 + board/broadcom/bcmns3/Makefile | 7 + board/broadcom/bcmns3/chimp_optee.c | 154 +++ board/broadcom/bcmns3/fit/keys/dev.crt | 21 + board/broadcom/bcmns3/fit/keys/dev.key | 28 + board/broadcom/bcmns3/fit/multi.its | 59 ++ board/broadcom/bcmns3/mcu_cmd.c | 49 + board/broadcom/bcmns3/mcu_cmd.h | 13 + board/broadcom/bcmns3/ns3.c | 263 +++++ cmd/Kconfig | 2 + cmd/Makefile | 2 + cmd/bcm/Kconfig | 12 + cmd/bcm/Makefile | 7 + cmd/bcm/chimp_boot.c | 36 + cmd/bcm/chimp_handshake.c | 32 + cmd/bcm/elog.h | 64 ++ cmd/bcm/logsetup.c | 432 +++++++++ cmd/bcm/nitro_image_load.c | 99 ++ cmd/gpt.c | 95 ++ common/Kconfig | 8 + common/Makefile | 1 + common/bcm_elog.c | 49 + common/console.c | 22 + configs/bcm_ns3_defconfig | 57 ++ include/bcm_elog.h | 37 + include/brcm/chimp.h | 48 + include/configs/bcm_ns3.h | 901 ++++++++++++++++++ include/dt-bindings/memory/bcm-ns3-mc.h | 65 ++ .../dt-bindings/pinctrl/brcm,pinctrl-ns3.h | 41 + 40 files changed, 3498 insertions(+), 1 deletion(-) create mode 100644 arch/arm/cpu/armv8/bcmns3/Makefile create mode 100644 arch/arm/cpu/armv8/bcmns3/lowlevel.S create mode 100644 arch/arm/dts/ns3-board.dts create mode 100644 arch/arm/dts/ns3-clock.dtsi create mode 100644 arch/arm/dts/ns3-pinctrl.dtsi create mode 100644 arch/arm/dts/ns3.dtsi create mode 100644 arch/arm/include/asm/arch-bcmns3/bl33_info.h create mode 100644 board/broadcom/bcmns3/Kconfig create mode 100644 board/broadcom/bcmns3/Makefile create mode 100644 board/broadcom/bcmns3/chimp_optee.c create mode 100644 board/broadcom/bcmns3/fit/keys/dev.crt create mode 100644 board/broadcom/bcmns3/fit/keys/dev.key create mode 100644 board/broadcom/bcmns3/fit/multi.its create mode 100644 board/broadcom/bcmns3/mcu_cmd.c create mode 100644 board/broadcom/bcmns3/mcu_cmd.h create mode 100644 board/broadcom/bcmns3/ns3.c create mode 100644 cmd/bcm/Kconfig create mode 100644 cmd/bcm/Makefile create mode 100644 cmd/bcm/chimp_boot.c create mode 100644 cmd/bcm/chimp_handshake.c create mode 100644 cmd/bcm/elog.h create mode 100644 cmd/bcm/logsetup.c create mode 100644 cmd/bcm/nitro_image_load.c create mode 100644 common/bcm_elog.c create mode 100644 configs/bcm_ns3_defconfig create mode 100644 include/bcm_elog.h create mode 100644 include/brcm/chimp.h create mode 100644 include/configs/bcm_ns3.h create mode 100644 include/dt-bindings/memory/bcm-ns3-mc.h create mode 100644 include/dt-bindings/pinctrl/brcm,pinctrl-ns3.h -- 2.17.1

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Please pull u-boot-video
by Anatolij Gustschin 27 Apr '20

27 Apr '20

Hi Tom, The following changes since commit d202f67db0771247de562af5d6a5df778702857b: Merge branch '2020-04-25-master-imports' (2020-04-25 08:20:22 -0400) are available in the Git repository at: https://gitlab.denx.de/u-boot/custodians/u-boot-video.git tags/video-for-v2020.07-rc1 for you to fetch changes up to ea16637525ad6a49626de3fbf01e29e1af08d29f: video: simple_panel: add boe,nv140fhmn49 display (2020-04-26 23:04:49 +0200) ---------------------------------------------------------------- - simple panel 'nv140fhmn49' compatible - rockchip eDP and LVDS drivers build fix ---------------------------------------------------------------- Peter Robinson (2): drivers: video: rockchip: fix building eDP and LVDS drivers video: simple_panel: add boe,nv140fhmn49 display drivers/video/rockchip/rk_edp.c | 1 + drivers/video/rockchip/rk_lvds.c | 3 ++- drivers/video/simple_panel.c | 1 + 3 files changed, 4 insertions(+), 1 deletion(-) gitlab build test passed: https://gitlab.denx.de/u-boot/custodians/u-boot-video/pipelines/2941 Thanks, Anatolij

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[PATCH v2 0/4] Various i.MXRT bug/typo fixes
by Giulio Benetti 27 Apr '20

27 Apr '20

Hi Anatolij, Lukasz, Stefano, Fabio, All, this patchset fix 2 bugs preventing from LCDIF to work when booting from sd-card. There are also 2 little typo fixes for boards READMEs. V1->V2: * modify mxfsb.c patch as suggested by Fabio Giulio Benetti (4): imxrt1050-evk: README: fix dd command destination imxrt1020-evk: README: fix dd command destination video: mxsfb: add clk_enable() clk: imx: clk-imxrt1050: fix lcdif clock gate board/freescale/imxrt1020-evk/README | 2 +- board/freescale/imxrt1050-evk/README | 2 +- drivers/clk/imx/clk-imxrt1050.c | 2 +- drivers/video/mxsfb.c | 6 ++++++ 4 files changed, 9 insertions(+), 3 deletions(-) -- 2.20.1

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[PATCH 0/4] Various i.MXRT bug/typo fixes
by Giulio Benetti 27 Apr '20

27 Apr '20

Hi Anatolij, Stefano, Fabio, All, this patchset fix 2 bugs preventing from LCDIF to work when booting from sd-card. There are also 2 little typo fixes for boards READMEs. Giulio Benetti (4): imxrt1050-evk: README: fix dd command destination imxrt1020-evk: README: fix dd command destination video: mxsfb: add clk_enable() clk: imx: clk-imxrt1050: fix lcdif clock gate board/freescale/imxrt1020-evk/README | 2 +- board/freescale/imxrt1050-evk/README | 2 +- drivers/clk/imx/clk-imxrt1050.c | 2 +- drivers/video/mxsfb.c | 6 ++++++ 4 files changed, 9 insertions(+), 3 deletions(-) -- 2.20.1

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[PATCH] cmd: cache: Fix non-cached memory cachability
by Patrice Chotard 27 Apr '20

27 Apr '20

If dcache is switched OFF to ON state and if non-cached memory is used, this non-cached memory must be re-declared as uncached to mmu each time dcache is set ON. Issue found on STM32MP1 platform using dwc_eth_qos ethernet driver, when going from dcache OFF to dcache ON state, ethernet driver issued TX timeout errors when performing dhcp or ping. It can be reproduced with the following sequence: dhcp while true ; do ping 192.168.1.300 ; dcache off ; ping 192.168.1.300 ; dcache on ; done Signed-off-by: Patrice Chotard <patrice.chotard(a)st.com> Cc: Marek Vasut <marex(a)denx.de> Cc: Joe Hershberger <joe.hershberger(a)ni.com> Cc: Ramon Fried <rfried.dev(a)gmail.com> Cc: Stephen Warren <swarren(a)nvidia.com> --- arch/arm/include/asm/system.h | 1 + arch/arm/lib/cache.c | 13 ++++++++++--- cmd/cache.c | 3 +++ 3 files changed, 14 insertions(+), 3 deletions(-) diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index 81ccead112..06fb458301 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h @@ -584,6 +584,7 @@ void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size, #ifdef CONFIG_SYS_NONCACHED_MEMORY void noncached_init(void); +void noncached_set_region(void); phys_addr_t noncached_alloc(size_t size, size_t align); #endif /* CONFIG_SYS_NONCACHED_MEMORY */ diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c index 007d4ebc49..7f3cfb407c 100644 --- a/arch/arm/lib/cache.c +++ b/arch/arm/lib/cache.c @@ -73,6 +73,15 @@ static unsigned long noncached_start; static unsigned long noncached_end; static unsigned long noncached_next; +void noncached_set_region(void) +{ +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) + mmu_set_region_dcache_behaviour(noncached_start, + noncached_end - noncached_start, + DCACHE_OFF); +#endif +} + void noncached_init(void) { phys_addr_t start, end; @@ -89,9 +98,7 @@ void noncached_init(void) noncached_end = end; noncached_next = start; -#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) - mmu_set_region_dcache_behaviour(noncached_start, size, DCACHE_OFF); -#endif + noncached_set_region(); } phys_addr_t noncached_alloc(size_t size, size_t align) diff --git a/cmd/cache.c b/cmd/cache.c index 27dcec0931..86fbaf8dd6 100644 --- a/cmd/cache.c +++ b/cmd/cache.c @@ -64,6 +64,9 @@ static int do_dcache(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) break; case 1: dcache_enable(); +#ifdef CONFIG_SYS_NONCACHED_MEMORY + noncached_set_region(); +#endif break; case 2: flush_dcache_all(); -- 2.17.1

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[PATCH V3 00/14] ARM: stm32: Fix Avenger96
by Marek Vasut 27 Apr '20

27 Apr '20

This series fixes the Avenger96 board. Since there are way too many patches floating around on the ML and because I found various other details that needed fixing, I decided to bundle the whole set of fixes into this series. This should go into current release, otherwise the board doesn't even boot. This V2 is also roughly synchronized with the Linux V2 series fixing very much the same issues. Marek Vasut (14): ARM: dts: stm32: Repair SD1 pre-reloc pinmux DT node on AV96 ARM: dts: stm32: Add alternate pinmux for SDMMC1 direction pins ARM: dts: stm32: Repair SDMMC1 operation on AV96 ARM: dts: stm32: Add alternate pinmux for SDMMC2 pins 4-7 ARM: dts: stm32: Repair SDMMC2 operation ARM: dts: stm32: Add QSPI NOR on AV96 ARM: dts: stm32: Use DT alias for the configuration EEPROM ARM: dts: stm32: Add configuration EEPROM on AV96 ARM: dts: stm32: Add alternate pinmux for ethernet RGMII ARM: dts: stm32: Repair ethernet operation on AV96 ARM: dts: stm32: Add missing ethernet PHY reset on AV96 ARM: dts: stm32: Repair PMIC configuration on AV96 ARM: dts: stm32: Adjust PLL4 settings on AV96 ARM: dts: stm32: Split AV96 into DHCOR SoM and AV96 board arch/arm/dts/Makefile | 3 +- arch/arm/dts/stm32mp157-pinctrl.dtsi | 96 +++++ arch/arm/dts/stm32mp157a-avenger96.dts | 365 +----------------- arch/arm/dts/stm32mp15xx-dhcom.dtsi | 6 +- .../stm32mp15xx-dhcor-avenger96-u-boot.dtsi | 80 ++++ arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts | 211 ++++++++++ ...oot.dtsi => stm32mp15xx-dhcor-u-boot.dtsi} | 80 +--- arch/arm/dts/stm32mp15xx-dhcor.dtsi | 231 +++++++++++ board/dhelectronics/dh_stm32mp1/board.c | 15 +- doc/board/st/stm32mp1.rst | 8 +- 10 files changed, 645 insertions(+), 450 deletions(-) create mode 100644 arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi create mode 100644 arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts rename arch/arm/dts/{stm32mp157a-avenger96-u-boot.dtsi => stm32mp15xx-dhcor-u-boot.dtsi} (73%) create mode 100644 arch/arm/dts/stm32mp15xx-dhcor.dtsi Cc: Manivannan Sadhasivam <manivannan.sadhasivam(a)linaro.org> Cc: Patrick Delaunay <patrick.delaunay(a)st.com> Cc: Patrice Chotard <patrice.chotard(a)st.com> -- 2.25.1

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