April 2020 - U-Boot

[PATCH v1 00/10] USB host support for Raspberry Pi 4 board
by Sylwester Nawrocki 29 Apr '20

29 Apr '20

Hi all, This patch series adds USB host support for Raspberry Pi 4 board. It includes the Broadcom STB PCIe driver ported from Linux kernel, a memory mapping update for the xHCI controller behind a PCIe bridge for 32-bit and 64-bit system builds and some related fixes and updates in the usb/xhci and the pci core code. Any changes since previous (RFC) version are listed in individual patches. The most significant change was rewriting the PCIe driver to align with current mainline Linux kernel version. As suggested, readq/writeq have been removed from xhci_{readq/writeq} helpers instead of adding a Kconfig option. This patch series is based on v2020.04 tag. Regards, Sylwester Marek Szyprowski (4): rpi4: shorten a mapping for the DRAM rpi4: add a mapping for the PCIe XHCI controller MMIO registers (ARM 64bit) rpi4: add a mapping for the PCIe XHCI controller MMIO registers (ARM 32bit) config: Enable support for the XHCI controller on RPI4 board Nicolas Saenz Julienne (1): linux/bitfield.h: Add primitives for manipulating bitfields both in host- and fixed-endian. Sylwester Nawrocki (5): usb: xhci: Add missing cache flush in the scratchpad array initialization usb: xhci: Use only 32-bit accesses in xhci_writeq/xhci_readq pci: Move some PCIe register offset definitions to a common header pci: Add some PCI Express capability register offset definitions pci: Add driver for Broadcom STB PCIe controller arch/arm/mach-bcm283x/Kconfig | 1 + arch/arm/mach-bcm283x/include/mach/base.h | 7 + arch/arm/mach-bcm283x/init.c | 72 +++- configs/rpi_4_32b_defconfig | 9 + configs/rpi_4_defconfig | 10 + configs/rpi_arm64_defconfig | 9 +- drivers/pci/Kconfig | 6 + drivers/pci/Makefile | 1 + drivers/pci/pci-rcar-gen3.c | 8 - drivers/pci/pcie_brcmstb.c | 593 ++++++++++++++++++++++++++++++ drivers/pci/pcie_intel_fpga.c | 3 - drivers/usb/host/xhci-mem.c | 3 + include/linux/bitfield.h | 46 +++ include/pci.h | 19 +- include/usb/xhci.h | 8 - 15 files changed, 769 insertions(+), 26 deletions(-) create mode 100644 drivers/pci/pcie_brcmstb.c -- 2.7.4

5 27

[PATCH] drivers: video: Add Support for Himax HX8238D Panel
by Moses Christopher 29 Apr '20

29 Apr '20

* SPI based initialization for HX8238D * Resolution: 320x240 * Available Color-Modes: RGB/BGR Example for DT-Binding in *-u-boot.dtsi &spi0 { lcd0: display@0 { compatible = "himax,hx8238d"; pinctrl-names = "default"; pinctrl-0 = <&lcd0_pins>; reg = <0>; label = "lcd"; spi-max-frequency = <100000>; }; }; * Derived from the work done by Sjoerd Simons https://gitlab.apertis.org/packaging/u-boot/-/blob\ /5f259720e3e64965d50da89a841ad6eb256a47df/debian/patches\ /apertis/powertools/0005-video-Add-Himax-HX8238-D-driver.patch * Tested on Bosch Guardian Board Cc: Sjoerd Simons <sjoerd.simons(a)collabora.co.uk> Signed-off-by: Moses Christopher <BollavarapuMoses.Christopher(a)in.bosch.com> --- drivers/video/Kconfig | 10 ++ drivers/video/Makefile | 1 + drivers/video/hx8238d.c | 196 ++++++++++++++++++++++++++++++++++++++++ 3 files changed, 207 insertions(+) create mode 100644 drivers/video/hx8238d.c diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 7c5012a67f..90b2fb0ec2 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -113,6 +113,16 @@ config CONSOLE_TRUETYPE With this option you can adjust the text size and use a variety of fonts. Note that this is noticeably slower than with normal console. +config DM_PANEL_HX8238D + bool "Enable Himax HX-8238D LCD driver" + depends on DM_VIDEO + help + Support for HX-8238D LCD Panel Initialization using SPI. + The HX8238-D is a single chip controller and driver LSI that + integrates the power circuit. + It can drive a maximum 960x240 dot graphics on a-TFT panel + displays in 16M colors with dithering. + config CONSOLE_TRUETYPE_SIZE int "TrueType font size" depends on CONSOLE_TRUETYPE diff --git a/drivers/video/Makefile b/drivers/video/Makefile index df7119d62a..2b5f2c9cbc 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile @@ -13,6 +13,7 @@ obj-$(CONFIG_DISPLAY) += display-uclass.o obj-$(CONFIG_DM_VIDEO) += backlight-uclass.o obj-$(CONFIG_VIDEO_MIPI_DSI) += dsi-host-uclass.o obj-$(CONFIG_DM_VIDEO) += panel-uclass.o simple_panel.o +obj-$(CONFIG_DM_PANEL_HX8238D) += hx8238d.o obj-$(CONFIG_DM_VIDEO) += video-uclass.o vidconsole-uclass.o obj-$(CONFIG_DM_VIDEO) += video_bmp.o endif diff --git a/drivers/video/hx8238d.c b/drivers/video/hx8238d.c new file mode 100644 index 0000000000..9197826360 --- /dev/null +++ b/drivers/video/hx8238d.c @@ -0,0 +1,196 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copied from simple-panel + * Copyright (c) 2016 Google, Inc + * Written by Simon Glass <sjg(a)chromium.org> + * Copyright (c) 2018 Sjoerd Simons <sjoerd.simons(a)collabora.co.uk> + * Modified by Moses Christopher <BollavarapuMoses.Christopher(a)in.bosch.com> + * + * Panel Initialization for HX8238D panel from Himax + * Resolution: 320x240 + * + */ + +#include <common.h> +#include <dm.h> +#include <panel.h> +#include <spi.h> + +DECLARE_GLOBAL_DATA_PTR; + +/* Register Address */ +#define HX8238D_OUTPUT_CTRL_ADDR 0x01 +#define HX8238D_LCD_AC_CTRL_ADDR 0x02 +#define HX8238D_POWER_CTRL_1_ADDR 0x03 +#define HX8238D_DATA_CLR_CTRL_ADDR 0X04 +#define HX8238D_FUNCTION_CTRL_ADDR 0x05 +#define HX8238D_LED_CTRL_ADDR 0x08 +#define HX8238D_CONT_BRIGHT_CTRL_ADDR 0x0A +#define HX8238D_FRAME_CYCLE_CTRL_ADDR 0x0B +#define HX8238D_POWER_CTRL_2_ADDR 0x0D +#define HX8238D_POWER_CTRL_3_ADDR 0x0E +#define HX8238D_GATE_SCAN_POS_ADDR 0x0F +#define HX8238D_HORIZONTAL_PORCH_ADDR 0x16 +#define HX8238D_VERTICAL_PORCH_ADDR 0x17 +#define HX8238D_POWER_CTRL_4_ADDR 0x1E +#define HX8238D_GAMMA_CTRL_1_ADDR 0x30 +#define HX8238D_GAMMA_CTRL_2_ADDR 0x31 +#define HX8238D_GAMMA_CTRL_3_ADDR 0x32 +#define HX8238D_GAMMA_CTRL_4_ADDR 0x33 +#define HX8238D_GAMMA_CTRL_5_ADDR 0x34 +#define HX8238D_GAMMA_CTRL_6_ADDR 0x35 +#define HX8238D_GAMMA_CTRL_7_ADDR 0x36 +#define HX8238D_GAMMA_CTRL_8_ADDR 0x37 +#define HX8238D_GAMMA_CTRL_9_ADDR 0x3A +#define HX8238D_GAMMA_CTRL_10_ADDR 0x3B + +/* Register Data */ +#define HX8238D_OUTPUT_CTRL 0x6300 +#define HX8238D_LCD_AC_CTRL 0x0200 +#define HX8238D_POWER_CTRL_1 0x6564 +#define HX8238D_DATA_CLR_CTRL 0x04C7 +#define HX8238D_FUNCTION_CTRL 0xA884 +#define HX8238D_LED_CTRL 0x00CE +#define HX8238D_CONT_BRIGHT_CTRL 0x4008 +#define HX8238D_FRAME_CYCLE_CTRL 0xD400 +#define HX8238D_POWER_CTRL_2 0x3229 +#define HX8238D_POWER_CTRL_3 0x1200 +#define HX8238D_GATE_SCAN_POS 0x0000 +#define HX8238D_HORIZONTAL_PORCH 0x9F80 +#define HX8238D_VERTICAL_PORCH 0x3F02 +#define HX8238D_POWER_CTRL_4 0x005C + +/* Gamma Control */ +#define HX8238D_GAMMA_CTRL_1 0x0103 +#define HX8238D_GAMMA_CTRL_2 0x0407 +#define HX8238D_GAMMA_CTRL_3 0x0705 +#define HX8238D_GAMMA_CTRL_4 0x0002 +#define HX8238D_GAMMA_CTRL_5 0x0505 +#define HX8238D_GAMMA_CTRL_6 0x0303 +#define HX8238D_GAMMA_CTRL_7 0x0707 +#define HX8238D_GAMMA_CTRL_8 0x0100 +#define HX8238D_GAMMA_CTRL_9 0x1F00 +#define HX8238D_GAMMA_CTRL_10 0x000F + +/* Primary SPI register identification, 011100 */ +/* Select register, RS=0, RS=0 */ +/* Write register, RS=1, RW=0 */ +#define HX8238D_PRIMARY_SELECT_REG 0x70 +#define HX8238D_PRIMARY_WRITE_REG (HX8238D_PRIMARY_SELECT_REG | BIT(1)) + +#define HX8238D_REG_BIT_LEN 24 + +struct hx8238d_priv { + struct spi_slave *spi; +}; + +static int hx8238d_ofdata_to_platdata(struct udevice *dev) +{ + struct hx8238d_priv *priv = dev_get_priv(dev); + + priv->spi = dev_get_parent_priv(dev); + + return 0; +} + +/* data[0] => REGISTER ADDRESS */ +/* data[1] => REGISTER VALUE */ +struct hx8238d_command { + u16 data[2]; +}; + +static struct hx8238d_command hx8238d_init_commands[] = { + { .data = { HX8238D_OUTPUT_CTRL_ADDR, HX8238D_OUTPUT_CTRL } }, + { .data = { HX8238D_LCD_AC_CTRL_ADDR, HX8238D_LCD_AC_CTRL } }, + { .data = { HX8238D_POWER_CTRL_1_ADDR, HX8238D_POWER_CTRL_1 } }, + { .data = { HX8238D_DATA_CLR_CTRL_ADDR, HX8238D_DATA_CLR_CTRL } }, + { .data = { HX8238D_FUNCTION_CTRL_ADDR, HX8238D_FUNCTION_CTRL } }, + { .data = { HX8238D_LED_CTRL_ADDR, HX8238D_LED_CTRL } }, + { .data = { HX8238D_CONT_BRIGHT_CTRL_ADDR, HX8238D_CONT_BRIGHT_CTRL } }, + { .data = { HX8238D_FRAME_CYCLE_CTRL_ADDR, HX8238D_FRAME_CYCLE_CTRL } }, + { .data = { HX8238D_POWER_CTRL_2_ADDR, HX8238D_POWER_CTRL_2 } }, + { .data = { HX8238D_POWER_CTRL_3_ADDR, HX8238D_POWER_CTRL_3 } }, + { .data = { HX8238D_GATE_SCAN_POS_ADDR, HX8238D_GATE_SCAN_POS } }, + { .data = { HX8238D_HORIZONTAL_PORCH_ADDR, HX8238D_HORIZONTAL_PORCH } }, + { .data = { HX8238D_VERTICAL_PORCH_ADDR, HX8238D_VERTICAL_PORCH } }, + { .data = { HX8238D_POWER_CTRL_4_ADDR, HX8238D_POWER_CTRL_4 } }, + { .data = { HX8238D_GAMMA_CTRL_1_ADDR, HX8238D_GAMMA_CTRL_1 } }, + { .data = { HX8238D_GAMMA_CTRL_2_ADDR, HX8238D_GAMMA_CTRL_2 } }, + { .data = { HX8238D_GAMMA_CTRL_3_ADDR, HX8238D_GAMMA_CTRL_3 } }, + { .data = { HX8238D_GAMMA_CTRL_4_ADDR, HX8238D_GAMMA_CTRL_4 } }, + { .data = { HX8238D_GAMMA_CTRL_5_ADDR, HX8238D_GAMMA_CTRL_5 } }, + { .data = { HX8238D_GAMMA_CTRL_6_ADDR, HX8238D_GAMMA_CTRL_6 } }, + { .data = { HX8238D_GAMMA_CTRL_7_ADDR, HX8238D_GAMMA_CTRL_7 } }, + { .data = { HX8238D_GAMMA_CTRL_8_ADDR, HX8238D_GAMMA_CTRL_8 } }, + { .data = { HX8238D_GAMMA_CTRL_9_ADDR, HX8238D_GAMMA_CTRL_9 } }, + { .data = { HX8238D_GAMMA_CTRL_10_ADDR, HX8238D_GAMMA_CTRL_10 } }, +}; + +/* + * Generate Primary Register Buffer for Register Select and Register Write + * First 6 MSB bits of Primary Register is represented with 011100 + * + */ +static void hx8238d_generate_reg_buffers(struct hx8238d_command command, + u8 *sr_buf, uint8_t *wr_buf) +{ + struct hx8238d_command cmd = command; + + sr_buf[0] = HX8238D_PRIMARY_SELECT_REG; + sr_buf[1] = (cmd.data[0] >> 8) & 0xff; + sr_buf[2] = (cmd.data[0]) & 0xff; + + wr_buf[0] = HX8238D_PRIMARY_WRITE_REG; + wr_buf[1] = (cmd.data[1] >> 8) & 0xff; + wr_buf[2] = (cmd.data[1]) & 0xff; +} + +static int hx8238d_probe(struct udevice *dev) +{ + struct hx8238d_priv *priv = dev_get_priv(dev); + int ret; + + ret = spi_claim_bus(priv->spi); + if (ret) { + debug("Failed to claim bus: %d\n", ret); + return ret; + } + + for (int i = 0; i < ARRAY_SIZE(hx8238d_init_commands); i++) { + u8 sr_buf[3], wr_buf[3]; + const struct hx8238d_command cmd = hx8238d_init_commands[i]; + + hx8238d_generate_reg_buffers(cmd, sr_buf, wr_buf); + ret = spi_xfer(priv->spi, HX8238D_REG_BIT_LEN, sr_buf, NULL, + SPI_XFER_BEGIN | SPI_XFER_END); + if (ret) { + debug("Failed to select register %d\n", ret); + goto free; + } + + ret = spi_xfer(priv->spi, HX8238D_REG_BIT_LEN, wr_buf, NULL, + SPI_XFER_BEGIN | SPI_XFER_END); + if (ret) { + debug("Failed to write value %d\n", ret); + goto free; + } + } + +free: + spi_release_bus(priv->spi); + return ret; +} + +static const struct udevice_id hx8238d_ids[] = { + { .compatible = "himax,hx8238d" }, + { } +}; + +U_BOOT_DRIVER(hx8238d) = { + .name = "hx8238d", + .id = UCLASS_PANEL, + .of_match = hx8238d_ids, + .ofdata_to_platdata = hx8238d_ofdata_to_platdata, + .probe = hx8238d_probe, + .priv_auto_alloc_size = sizeof(struct hx8238d_priv), +}; -- 2.20.1

1 0

[PATCH v3 0/2] add brcm iproc gpio driver
by Rayagonda Kokatanur 29 Apr '20

29 Apr '20

Add support for broadcom iproc gpio driver. Changes from v2: -remove ununsed variable "node" in iproc_get_gpio_pctrl_mapping() func to fix compilation warning. Changes from v1: -Address review comments from Simon Glass, Use dev_read_...() instead of fdtdec_...(). Rayagonda Kokatanur (2): drivers: gpio: add broadcom iproc gpio driver support gpio: do not include <asm/arch/gpio.h> on TARGET_BCMNS3 arch/arm/include/asm/gpio.h | 2 +- drivers/gpio/Kconfig | 10 ++ drivers/gpio/Makefile | 1 + drivers/gpio/iproc_gpio.c | 258 ++++++++++++++++++++++++++++++++++++ 4 files changed, 270 insertions(+), 1 deletion(-) create mode 100644 drivers/gpio/iproc_gpio.c -- 2.17.1

1 2

[PATCH] video: cfb_console: Fix 64 bits support problem
by Peng Fan 29 Apr '20

29 Apr '20

From: Ye Li <ye.li(a)nxp.com> There are some integer to pointer convert. To support 64 bits system, change the unsigned int to unsigned long. Signed-off-by: Ye Li <ye.li(a)nxp.com> Signed-off-by: Peng Fan <peng.fan(a)nxp.com> --- drivers/video/cfb_console.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/video/cfb_console.c b/drivers/video/cfb_console.c index 5442bac4c6..c8d7c7e2b5 100644 --- a/drivers/video/cfb_console.c +++ b/drivers/video/cfb_console.c @@ -1179,9 +1179,9 @@ static int display_rle8_bitmap(struct bmp_image *img, int xoff, int yoff, y = __le32_to_cpu(img->header.height) - 1; ncolors = __le32_to_cpu(img->header.colors_used); bpp = VIDEO_PIXEL_SIZE; - fbp = (unsigned char *) ((unsigned int) video_fb_address + - (y + yoff) * VIDEO_LINE_LEN + - xoff * bpp); + fbp = (unsigned char *)((unsigned long)video_fb_address + + (y + yoff) * VIDEO_LINE_LEN + + xoff * bpp); bm = (uchar *) img + __le32_to_cpu(img->header.data_offset); @@ -1234,7 +1234,7 @@ static int display_rle8_bitmap(struct bmp_image *img, int xoff, int yoff, x = 0; y--; fbp = (unsigned char *) - ((unsigned int) video_fb_address + + ((unsigned long)video_fb_address + (y + yoff) * VIDEO_LINE_LEN + xoff * bpp); continue; @@ -1247,7 +1247,7 @@ static int display_rle8_bitmap(struct bmp_image *img, int xoff, int yoff, x += bm[2]; y -= bm[3]; fbp = (unsigned char *) - ((unsigned int) video_fb_address + + ((unsigned long)video_fb_address + (y + yoff) * VIDEO_LINE_LEN + xoff * bpp); bm += 4; @@ -2026,7 +2026,7 @@ static int cfg_video_init(void) if (pGD == NULL) return -1; - video_fb_address = (void *) VIDEO_FB_ADRS; + video_fb_address = (void *)(unsigned long)VIDEO_FB_ADRS; cfb_do_flush_cache = cfb_fb_is_in_dram() && dcache_status(); -- 2.16.4

2 1

[PATCH v1 0/2] add brcm iproc gpio driver
by Rayagonda Kokatanur 29 Apr '20

29 Apr '20

Add support for broadcom iproc gpio driver. Rayagonda Kokatanur (2): drivers: gpio: add broadcom iproc gpio driver support gpio: do not include <asm/arch/gpio.h> on TARGET_BCMNS3 arch/arm/include/asm/gpio.h | 2 +- drivers/gpio/Kconfig | 10 ++ drivers/gpio/Makefile | 1 + drivers/gpio/iproc_gpio.c | 260 ++++++++++++++++++++++++++++++++++++ 4 files changed, 272 insertions(+), 1 deletion(-) create mode 100644 drivers/gpio/iproc_gpio.c -- 2.17.1

2 4

[PATCH v6 00/14] Add support for MediaTek xHCI host controller
by Chunfeng Yun 29 Apr '20

29 Apr '20

The series of patches are used to support xHCI host controller on MediaTek SoCs which has a glue layer IPPC (IP Port Control), and add USB function on T-PHY including T-PHY V1 and V2; Finally add USB related nodes for MT7629 platform. The files of xhci-mtk.* and phy-mtk-tphy.* are ported from Linux Kenrel 5.6-rc1 v6 changes: 1. add Reviewed-by Simon & Weijie v5 changes: 1. print error number suggested by Marek 2. support interrupt transfer 3. update MAINTAINER about MediaTek v4 changes: 1. add phy_bulk API 2. use phy_bulk in xhci-mtk driver, also include dwc3/dwc2 drivers v3 changes: 1. provide non/inline edev_get_child_count() suggested by Simon 2. squash [PATCH v2 02/10] into [PATCH v2 03/10] suggested by Simon 3. use macros to access IPPC registers suggested by Marek v2 changes: 1. move ofnode_get_child_count() into ofnode.c suggested by Simon 2. add a test item for ofnode_get_child_count() suggested by Simon 3. use clk_bulk to get clocks suggested by Marek 4. use clrsetbits_le32() etc suggeseted by Marek 5. get the count of phys by dev_get_child_count() 6. drop reference to fixed clock clk20m Chunfeng Yun (14): dm: core: Add function to get child count of ofnode or device test: dm: add test item for ofnode_get_child_count() phy: Add get/enable/disable for a bulk of phys test: dm: phy: add a test item for the phy_bulk API usb: dwc3: use the phy bulk API to get phys usb: dwc2_udc_otg: use the phy bulk API to get phys phy: phy-mtk-tphy: add support USB phys phy: phy-mtk-tphy: add support new version phy: phy-mtk-tphy: add a new reference clock xhci: mediatek: Add support for MTK xHCI host controller arm: dts: mt7629: add usb related nodes dt-bindings: phy-mtk-tphy: add properties of address mapping and clocks dt-bindings: usb: mtk-xhci: Add binding for MediaTek xHCI host controller MAINTAINERS: MediaTek: add USB related files MAINTAINERS | 3 + arch/arm/dts/mt7629-rfb.dts | 8 + arch/arm/dts/mt7629.dtsi | 41 +++ arch/sandbox/dts/test.dts | 29 ++ doc/device-tree-bindings/phy/phy-mtk-tphy.txt | 78 ++++- .../usb/mediatek,mtk-xhci.txt | 40 +++ drivers/core/ofnode.c | 11 + drivers/core/read.c | 5 + drivers/phy/phy-mtk-tphy.c | 316 +++++++++++++++++- drivers/phy/phy-uclass.c | 80 +++++ drivers/usb/dwc3/core.c | 83 +---- drivers/usb/dwc3/dwc3-generic.c | 7 +- drivers/usb/gadget/dwc2_udc_otg.c | 90 +---- drivers/usb/host/Kconfig | 6 + drivers/usb/host/Makefile | 1 + drivers/usb/host/xhci-mtk.c | 296 ++++++++++++++++ drivers/usb/host/xhci.c | 10 + include/dm/ofnode.h | 8 + include/dm/read.h | 13 + include/dwc3-uboot.h | 11 +- include/generic-phy.h | 66 ++++ include/usb/xhci.h | 3 + test/dm/ofnode.c | 21 ++ test/dm/phy.c | 29 ++ 24 files changed, 1066 insertions(+), 189 deletions(-) create mode 100644 doc/device-tree-bindings/usb/mediatek,mtk-xhci.txt create mode 100644 drivers/usb/host/xhci-mtk.c -- 2.25.1

4 21

[PATCH 0/8] Add Rockchip RK3399 USB3.0 Host support
by Frank Wang 29 Apr '20

29 Apr '20

This series add quirks for DWC3 and add Rockchip RK3399 USB3.0 host support. Frank Wang (8): usb: dwc3: add dis_enblslpm_quirk usb: dwc3: add dis_u2_freeclk_exists_quirk usb: dwc3: amend UTMI/UTMIW phy interface setup usb: dwc3: add make compatible for rockchip platform phy: rockchip: add a new driver for type-c phy driver: usb: drop legacy rockchip xhci driver ARM: dts: rockchip: amend dwc3 nodes to keep in line with kernel configs: evb-rk3399: enable usb3.0 host support arch/arm/dts/rk3399-evb.dts | 28 +- arch/arm/dts/rk3399-puma.dtsi | 35 +- arch/arm/dts/rk3399-u-boot.dtsi | 11 + arch/arm/dts/rk3399.dtsi | 64 +-- configs/evb-rk3399_defconfig | 5 + drivers/phy/Kconfig | 6 + drivers/phy/Makefile | 1 + drivers/phy/phy-rockchip-typec.c | 534 +++++++++++++++++++++++++ drivers/usb/common/common.c | 25 ++ drivers/usb/dwc3/core.c | 77 ++-- drivers/usb/dwc3/core.h | 8 + drivers/usb/dwc3/dwc3-generic.c | 33 +- drivers/usb/host/Kconfig | 9 - drivers/usb/host/Makefile | 1 - drivers/usb/host/xhci-rockchip.c | 196 --------- include/dwc3-uboot.h | 2 + include/linux/usb/phy.h | 18 + include/linux/usb/rockchip_phy_typec.h | 52 +++ 18 files changed, 829 insertions(+), 276 deletions(-) create mode 100644 drivers/phy/phy-rockchip-typec.c delete mode 100644 drivers/usb/host/xhci-rockchip.c create mode 100644 include/linux/usb/rockchip_phy_typec.h -- 2.17.1

5 23

[PATCH] ARM: rmobile: Update Gen3 defconfig names in MAINTAINERS files
by Marek Vasut 29 Apr '20

29 Apr '20

Synchronize Gen3 defconfig entries in the MAINTAINERS files after the recent consolidation. Signed-off-by: Marek Vasut <marek.vasut+renesas(a)gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> --- board/renesas/salvator-x/MAINTAINERS | 4 +--- board/renesas/ulcb/MAINTAINERS | 4 +--- 2 files changed, 2 insertions(+), 6 deletions(-) diff --git a/board/renesas/salvator-x/MAINTAINERS b/board/renesas/salvator-x/MAINTAINERS index 542f7cc893..7335bc3cd8 100644 --- a/board/renesas/salvator-x/MAINTAINERS +++ b/board/renesas/salvator-x/MAINTAINERS @@ -3,6 +3,4 @@ M: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> S: Maintained F: board/renesas/salvator-x/ F: include/configs/salvator-x.h -F: configs/r8a7795_salvator-x_defconfig -F: configs/r8a7796_salvator-x_defconfig -F: configs/r8a77965_salvator-x_defconfig +F: configs/rcar3_salvator-x_defconfig diff --git a/board/renesas/ulcb/MAINTAINERS b/board/renesas/ulcb/MAINTAINERS index 8549f543f4..564eb561b1 100644 --- a/board/renesas/ulcb/MAINTAINERS +++ b/board/renesas/ulcb/MAINTAINERS @@ -3,6 +3,4 @@ M: Marek Vasut <marek.vasut+renesas(a)gmail.com> S: Maintained F: board/renesas/ulcb/ F: include/configs/ulcb.h -F: configs/r8a7795_ulcb_defconfig -F: configs/r8a7796_ulcb_defconfig -F: configs/r8a77965_ulcb_defconfig +F: configs/rcar3_ulcb_defconfig -- 2.25.1

1 0

[PATCH 0/8] rockchip: Add PCIe host support
by Jagan Teki 28 Apr '20

28 Apr '20

Thanks to Patrick for initial work done on this. This series support PCIe host controller support on rockchip rk3399 platform. Works well on rk3399 boards like rock960, nanopc-t4 and roc-kr3399-pc-mezzanine board as Gen1 configurable host. It has dependency with v5.7-rc1 dts(i) sync series[1] [1] https://patchwork.ozlabs.org/project/uboot/cover/20200425105319.12009-1-jag… Any inputs? Jagan. Jagan Teki (8): iopoll: Add dealy to read poll iopoll: Add readl_poll_sleep_timeout clk: rk3399: Enable PCIE_PHY clock clk: rk3399: Disable PCIE_PHY clock pci: Add Rockchip PCIe controller driver pci: Add Rockchip PCIe PHY controller driver rockchip: Enable PCIe/M.2 on rk3399 board w/ M.2 rockchip: Enable PCIe/M.2 on rock960 board arch/arm/dts/rk3399-u-boot.dtsi | 1 + board/vamrs/rock960_rk3399/rock960-rk3399.c | 20 + configs/nanopc-t4-rk3399_defconfig | 4 + configs/roc-pc-mezzanine-rk3399_defconfig | 4 + configs/rock960-rk3399_defconfig | 5 + drivers/clk/rockchip/clk_rk3399.c | 32 ++ drivers/pci/Kconfig | 8 + drivers/pci/Makefile | 1 + drivers/pci/pcie_rockchip.c | 484 ++++++++++++++++++++ drivers/pci/pcie_rockchip.h | 142 ++++++ drivers/pci/pcie_rockchip_phy.c | 205 +++++++++ include/linux/iopoll.h | 23 +- 12 files changed, 920 insertions(+), 9 deletions(-) create mode 100644 drivers/pci/pcie_rockchip.c create mode 100644 drivers/pci/pcie_rockchip.h create mode 100644 drivers/pci/pcie_rockchip_phy.c -- 2.17.1

5 19

Pull request v2: u-boot-spi/master
by Jagan Teki 28 Apr '20

28 Apr '20

Hi Tom, Please pull this PR. Travis-ci: https://travis-ci.org/github/openedev/u-boot-amarula/builds/680186752 Changes for v2: - included SiFive SPI fixes - fixes for SF distro on rockchip thanks, Jagan. The following changes since commit 8d5d3bcf3c53d798bd7f3fe7092e994593bcc41c: Merge branch '2020-04-16-master-imports' (2020-04-17 11:17:29 -0400) are available in the Git repository at: https://gitlab.denx.de/u-boot/custodians/u-boot-spi master for you to fetch changes up to 96955bbb077256db9f56c06b4983810237d700a4: sifive: fu540: Enable spi-nor flash support (2020-04-28 15:32:00 +0530) ---------------------------------------------------------------- Bacem Daassi (1): mtd: spi-nor: Enable dual and quad read for s25fl256s0 Jagan Teki (12): environment: distro: Add SF distro command rk3399: Add boot flash script offset, size rockchip: Enable SF distro bootcmd spi: sifive: Tidy up dm_spi_slave_platdata variable mtd: spi-nor: Enable QE bit for ISSI flash mtd: spi-nor-ids: Enable 4B_OPCODES for is25wp256 watchdog: kconfig: Enable designware for rk3399 spi: sifive: Add spi-mem exec op spi: sifive: Fix format register proto field spi: sifive: Fix QPP transfer riscv: dts: hifive-unleashed-a00: Add -u-boot.dtsi sifive: fu540: Enable spi-nor flash support Kuldeep Singh (3): spi: Transform the FSL QuadSPI driver to use the SPI MEM API mtd: spi-nor-ids: Enable SPI_NOR_OCTAL_READ flag for mt35xu* mtd: spi-nor-ids: Add Spansion s25fs512s flash entry Pratyush Yadav (1): spi: cadence-qspi: Move ref clock calculation to probe Rasmus Villemoes (1): spi: use is_power_of_2 instead of hweight32 in spi_nor_write() Robert Marko (2): mtd: spi-nand: Import Toshiba SPI-NAND support mtd: nand: spi: add support for Toshiba TC58CVG2S0HRAIJ Tudor Ambarus (1): spi: spi-mem: Add SPI_MEM_NO_DATA to the spi_mem_data_dir enum arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi | 11 + board/sifive/fu540/Kconfig | 3 + drivers/mtd/nand/spi/Makefile | 2 +- drivers/mtd/nand/spi/core.c | 1 + drivers/mtd/nand/spi/toshiba.c | 201 +++ drivers/mtd/spi/spi-nor-core.c | 6 +- drivers/mtd/spi/spi-nor-ids.c | 12 +- drivers/spi/cadence_qspi.c | 33 +- drivers/spi/fsl_qspi.c | 1577 +++++++++-------------- drivers/spi/fsl_qspi.h | 145 --- drivers/spi/spi-mem.c | 2 +- drivers/spi/spi-sifive.c | 178 ++- drivers/watchdog/Kconfig | 1 + include/configs/rk3399_common.h | 3 + include/configs/rockchip-common.h | 15 + include/environment/distro/sf.h | 41 + include/linux/mtd/spi-nor.h | 1 + include/linux/mtd/spinand.h | 1 + include/spi-mem.h | 2 + 19 files changed, 1059 insertions(+), 1176 deletions(-) create mode 100644 arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi create mode 100644 drivers/mtd/nand/spi/toshiba.c delete mode 100644 drivers/spi/fsl_qspi.h create mode 100644 include/environment/distro/sf.h

2 2