February 2020 - U-Boot

[PATCH] power-domain: fix hang in endless loop on i.MX8
by Anatolij Gustschin 17 Feb '20

17 Feb '20

Currently when booting the kernel on i.MX8 U-Boot hangs in an endless loop when switching off dma, connectivity or lsio power domains during device removal. It hapens first when removing gpio0 (gpio@5d080000) device, here its power domain device 'lsio_gpio0' is obtained for switching off power. Since the obtained 'lsio_gpio0' device is removed afterwards, its power domain is also switched off and here the parent power domain device 'lsio_power_domain' is optained for switching off the power. Thereafter, when the obtained 'lsio_power_domain' is removed, device_remove() removes its first child 'lsio_gpio0'. During this child removal the 'lsio_power_domain' device is obtained again for switching and when removing it later, the same child removal is repeated, so we are stuck in an endless loop. Below is a snippet from dm tree on i.MX8QXP for better illustration of the DM devices relationship: Class Index Probed Driver Name ----------------------------------------------------------- root 0 [ + ] root_driver root_driver ... simple_bus 0 [ + ] generic_simple_bus |-- imx8qx-pm power_doma 0 [ + ] imx8_power_domain | |-- lsio_power_domain power_doma 1 [ + ] imx8_power_domain | | |-- lsio_gpio0 power_doma 2 [ + ] imx8_power_domain | | |-- lsio_gpio1 Do not remove a power domain device if it is a parent of the currently controlled device. Fixes: 52edfed65de9 ("dm: core: device: switch off power domain after device removal") Signed-off-by: Anatolij Gustschin <agust(a)denx.de> Reported-by: Oliver Graute <oliver.graute(a)gmail.com> Reported-by: Fabio Estevam <festevam(a)gmail.com> --- drivers/power/domain/power-domain-uclass.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/power/domain/power-domain-uclass.c b/drivers/power/domain/power-domain-uclass.c index d9c623b56e..d8fe4d4877 100644 --- a/drivers/power/domain/power-domain-uclass.c +++ b/drivers/power/domain/power-domain-uclass.c @@ -127,6 +127,18 @@ static int dev_power_domain_ctrl(struct udevice *dev, bool on) ret = power_domain_off(&pd); } + /* + * For platforms with parent and child power-domain devices + * we may not run device_remove() on the power-domain parent + * because it will result in removing its children and switching + * off their power-domain parent. So we will get here again and + * again and will be stuck in an endless loop. + */ + if (!on && dev_get_parent(dev) == pd.dev && + device_get_uclass_id(dev) == UCLASS_POWER_DOMAIN) { + return ret; + } + /* * power_domain_get() bound the device, thus * we must remove it again to prevent unbinding -- 2.17.1

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[PATCH 1/1] clk: meson-g12a: missing break
by Heinrich Schuchardt 17 Feb '20

17 Feb '20

Add missing break for CLKID_PCIE_PLL in switch statement. Reported by CppCheck. Cc: Neil Armstrong <narmstrong(a)baylibre.com> Fixes: 08e09c263fdf ("clk: meson-g12a: Add PCIE PLL support") Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- Looking at the code it seems obvious that something is wrong in commit 08e09c263fdf but I have no board for testing. --- drivers/clk/meson/g12a.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c index 686d94ebfe..cada80e6b5 100644 --- a/drivers/clk/meson/g12a.c +++ b/drivers/clk/meson/g12a.c @@ -804,6 +804,7 @@ static ulong meson_clk_get_rate_by_id(struct clk *clk, unsigned long id) break; case CLKID_PCIE_PLL: rate = meson_pcie_pll_get_rate(clk); + break; case CLKID_VPU_0: rate = meson_div_get_rate(clk, CLKID_VPU_0_DIV); break; -- 2.25.0

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[PATCH 1/2] ARM: socfpga: Permit overriding the default timer frequency
by Marek Vasut 17 Feb '20

17 Feb '20

The default timer rate may be different than 25 MHz, permit overriding the default rate in board configuration file. Ultimatelly, this should be properly handled by a clock driver, however that is not available on Gen5 yet. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Ley Foon Tan <ley.foon.tan(a)intel.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt(a)gmail.com> --- include/configs/socfpga_common.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 8d10469e7c..8c5dcfa57c 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -98,8 +98,10 @@ #define CONFIG_SYS_TIMERBASE SOCFPGA_OSC1TIMER0_ADDRESS #define CONFIG_SYS_TIMER_COUNTS_DOWN #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4) +#ifndef CONFIG_SYS_TIMER_RATE #define CONFIG_SYS_TIMER_RATE 25000000 #endif +#endif /* * L4 Watchdog -- 2.25.0

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[PATCH v1] dfu: Reset timeout in case of DFU request
by Andy Shevchenko 17 Feb '20

17 Feb '20

In case dfu command is being executed with timeout option, the timer may expire in the middle of DFU operation. If there is DFU request coming, we may simple reset timeout value to prevent aborting of ongoing DFU operation. Signed-off-by: Andy Shevchenko <andriy.shevchenko(a)linux.intel.com> --- drivers/usb/gadget/f_dfu.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/usb/gadget/f_dfu.c b/drivers/usb/gadget/f_dfu.c index 6756155133..a4a57ba5f5 100644 --- a/drivers/usb/gadget/f_dfu.c +++ b/drivers/usb/gadget/f_dfu.c @@ -596,6 +596,11 @@ dfu_handle(struct usb_function *f, const struct usb_ctrlrequest *ctrl) debug("req_type: 0x%x ctrl->bRequest: 0x%x f_dfu->dfu_state: 0x%x\n", req_type, ctrl->bRequest, f_dfu->dfu_state); +#ifdef CONFIG_DFU_TIMEOUT + /* Forbid aborting by timeout. Next dfu command may update this */ + dfu_set_timeout(0); +#endif + if (req_type == USB_TYPE_STANDARD) { if (ctrl->bRequest == USB_REQ_GET_DESCRIPTOR && (w_value >> 8) == DFU_DT_FUNC) { -- 2.24.1

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Which parameters are shared by kernel and u-boot?
by JH 17 Feb '20

17 Feb '20

Hi, Does kernel and u-boot both need be compiled by u-boot configure files to include bootargs, mtdpars etc? Thank you. Kind regards, - jh

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[PATCH v6 000/102] x86: Add initial support for apollolake
by Simon Glass 17 Feb '20

17 Feb '20

Apollo Lake is an Intel SoC generation aimed at relatively low-end embedded systems. It was released in 2016 but has become more popular recently with some embedded boards using it. This series adds support for Apollo Lake. As an example it adds an implementation of chromebook_coral (a large range of Chromebooks released in 2017). The series provides enough support to boot to a prompt. with LCD display, storage, USB, EC and keyboard. Since this is the first time U-Boot has used FSP2 there is quite a bit of refactoring needed. This series is available at u-boot-dm/coral-working Changes in v6: - Add .driver_data in the designware_pci_supported array - Add a comment about VANILLA - Add a comment about the need for board_run_command() - Add a comment about why we should not use MTRR_TYPE_WRBACK - Add a comment as to why dev_read_bool() is not used - Add a comment to intel_pinctrl_ops - Add a lot of comments to get_cbfs_fsp() - Add back '#ifdef' line to commit message - Add new patch with methods to find the position/size of next SPL phase - Change comment to apl_hostbridge_early_init_pinctrl, not apl_gpio_early_init - Change commented-out enable_rtc_upper_bank() call to a TODO - Correct a few unrelated defconfig changes - Drop Glacier Lake code - Drop code to handle !CONFIG_OF_TRANSLATE case - Drop extra conditions on CONFIG_VIDEO_FSP - Drop incorrect mention of coreboot in qfw_cpu.c - Drop init of ComB since it is not used - Drop lpc_configure_pads() and probe() function, add a comment about pads - Drop mention of devicetree for VTD feature - Drop mention of ramstage - Drop platform data and pre-PCI code, since DM PCI is available in SPL - Drop unnecessary priv struct and probe method - Drop unwanted debug printf() - Drop unwanted space before comma - Drop use of GPIO_NUM_PAD_CFG_REGS - Expand commit message to mention SPL/TPL specifically - Fix 'hone' typo - Fix FSP-M and FSP-S in comments - Fix comments for struct apl_hostbridge_platdata - Fix various coding style problems - Make BOOT_FROM_FAST_SPI_FLASH a Kconfig option - Move Intel Kconfig pinctrl options into this patch - Move image pos/size access functions and symbols to generic SPL code - Move lpss_reset_release() to another commit - Move lpss_reset_release() to this commit - Move setting of CONFIG_IRQ in sandbox to this patch - Remove hyphens from Firmware-Support-Package - Remove the * in the first line of the binding file - Rename init_for_uart() to board_debug_uart_init() - Rename pci_x86_ofplat_get_devfn() to pci_ofplat_get_devfn() in comment - Split out Kconfig change to new patch to enable full pinctrl in SPL/TPL - Update comment to reference board_debug_uart_init() (its in a later patch) - Use 'No SPI' instead of 'SPI2' as a debug message - Use 'north' as the node name instead of 'n' - Use SZ_4G instead of open-coded shift - Use SZ_4G instead of open-coding the size value - Use a generic compatible string intel,gpio - Use generic gpio compatible string - Use one space after #defines in pm.h Changes in v5: - Add ACPI base address and size - Add L2 cache flush function - Add L2 cache flush functoin - Add a new patch to move qemu CPU fixup function into its own file - Add a way to obtain the port ID for a device - Add function to obtain ACPI gpio number - Add gpio-controller to GPIO nodes - Allocate the FSP-S data instead of using the stack - Change SPL as well - Comment out GPIOs in the fsp_s node since we don't use them yet - Correct CPU ACPI IDs - Correct build error in chromebook_samus_tpl - Don't enable p2sb on sandbox in this patch - Drop SAFETY_MARGIN - Drop unrelated change metioned by Heiko - Enable SMP - Fix FST typo - Fix build errors on some PowerPC boards - Group U-Boot and device tree into a section - Rename APOLLOLAKE_USB2_PORT_MAX - Rename spl section to 'spl' so that binman symbols can find it - Use a define for ACPI base address Changes in v4: - Add a LOG_CATEGORY for silicon init - Add a binding file - Add a comment about the speed logic in __dw_i2c_set_bus_speed() - Add a comment for enable_bios_reset_cpl() - Add a comment in the commit message about why has_max_speed is added - Add a patch to explain of-platdata and header files - Add an extra comment to apl_uart_init() - Add comments about MRC-cache records being the same size - Add comments for exported functions - Add comments to functions - Add more documentation for pci_ofplat_get_devfn() - Add new patch to allow designware I2C driver to work in SPL - Add new patch to drop static data in designware i2c driver - Add new patch to make mrccache_update() static - Add new patch to move early-timer init later - Add support for updating power state - Add u-boot,skip-auto-config-until-reloc property to PCI - Adjust - Adjust condition for binding children - Adjust the comment for struct dw_i2c_speed_config - Allow pinctrl nodes to have subnodes (i.e. GPIO nodes) - Avoid needing to know internals of pinctrl in this driver - Change apollolake to apl - Change the behaviour to be a device-tree option - Detect zero mmio address - Disable SPL_DM_GPIO on omap35_logic to avoid a build error - Drop 'if (0)' call to deep_magic_nexgen_probe() and use #ifndef instead - Drop GPIO_NUM_PAD_CFG_REGS - Drop TCO_BASE_ADDRESS - Drop change to message about a missing uclass - Drop duplicate VBT file CONFIG - Drop duplicate commit 'Create a new sandbox_pci_read_bar() function' - Drop empty operations struct since p2sb does not need it - Drop incorrect coreboot reference from header file - Drop itss uclass change in Makefile (now in previous patch) - Drop itss uclass in Makefile - Drop pmic_pm8916 driver name and use a sandbox name instead - Drop sandbox defconfig change now that p2sb change is correct - Drop the whole interrupt file for TPL - Drop unwanted debug printf("bad\n") - Enable HAVE_VBT for FSP2 also - Enable HAVE_X86_FIT - Enable INTEL_GPIO - Enable IRQ for sandbox64 too to avoid build error - Enable option for slimbootloader, coreboot, efi - Expand commit message to better explain the need to checksum functions - Explain the 'twisty headers' comment - Explain why FSP-M cannot be shown - Fix 'enabled' typo - Fix 'what' typo - Fix FSP_M reference to refer to FSP_S in commit message - Fix Makefile copyright message - Fix alpha order in Kconfig - Fix comment for exec_sync_hwseq_xfer() - Fix comment on fsp_silicon_init() - Fix incorrect mask check in pmc_gpe_init() - Fix indentation nit - Fix up license header - Fix various code-style problems - Mention that the return value is pci_dev_t - Move code to pinctrl driver - Move this to intel_common - Name this P-Unit instead of power unit, in the commit message - New GPIO driver binding - One last desperate attempt to try to explain the purpose of this commit - Rename arch_fsp_s_preinit() to arch_fsps_preinit() - Rename get_coreboot_fsp() and add comments - Rename new file to designware_i2c_pci.c - Rename option to HAVE_SYS_TEXT_BASE - Rename pci_x86_ofplat_get_devfn() to pci_ofplat_get_devfn() - Reverse the sense of the CONFIG option - Set up LPC pads early - Split out GPIO code from the pinctrl driver - Split out into a separate patch - Split out mmio changes into a separate patch - Switch over to use pinctrl for pad init/config - Tidy up header guards - Tidy up mixed case in FSP code - Tidy up the header file a little - Update SPI flash protection only in SPL - Update commit message to indicate that CPU-identity bug is fixed - Update documentation with more detailed memory map - Update the commit message to be clearer, fix 'correct' typo - Update the message to mention the preprocessed file, not un-preprocessed - Use 'Apollo Lake' - Use BIT() macro a bit more - Use BIT() macro bit more - Use CONFIG_INTEL_CAR_CQOS to control car2.S inclusion - Use car_init_ret to return - Use existing VBT Kconfig option - Use hex for size values also - Use hyphen for device-tree properties - Use lower-case pinctrl in arch_cpu_init_dm() - Use pci_ofplat_get_devfn() - Use post_code() calls consistent with car.S - Use priv->pch instead of dev->parent - Use tabs instead of spaces - Use the new pci_ofplat_get_devfn() function - apollolake -> Apollo Lake - use GENMASK() for VTBAR_MASK Changes in v3: - Ad FSP-S support - Add CONFIG_TPL_X86_ASSUME_CPUID to reduce code size - Add Chrome OS EC support - Add FSP-S and VBT also - Add MMC, video, USB configs - Add SPL condition to the option - Add VBT signature - Add a driver for APL SPI for TPL (using of-platdata) - Add a proper SPI node and make the SPI flash node a child - Add a proper implementation of fsp_notify - Add a weak function to avoid errors on other platforms - Add an APL_SPI_FLASH_BOOT option to enable non-mmap boot - Add an extra size parameter to the find_next_mrc_cache() function - Add an fsp: tag - Add bootstage support - Add bootstage timing for memory-mapped reads - Add bootstage timing for reading vbt - Add fsp_locate_fsp to locate an fsp component - Add fspm_done() hook - Add fspm_done() hook to handle FSP-S wierdness (it breaks SPI flash) - Add help to CONFIG_FIT and don't make it 'default y' - Add more documentation - Add snapshot/restore for IRQs - Add spi alias in device tree - Add structures for FSP-S also - Add support for FSP-S component and VBT - Add support for of-platdata for TPL - Add the missing header file - Add two more defines for the CPU driver - Add two more operations to IRQ - Add various minor tidy-ups - Adjust fast_spi_cache_bios_region() to avoid using SPI driver - Change Fast-SPI driver into a helper file used by ICH SPI - Change the sandbox test from ITSS to IRQ - Convert code to use hex increased of decimal - Disable the bootcommand since it does nothing useful on coral - Don't allow BOOT_FROM_FAST_SPI_FLASH with FSP-S - Don't enable SPI flash in TPL by default - Don't imply SPI flash either - Don't include write() and erase() in TPL - Drop 'a4' comment for register offset - Drop CONFIG_SPL_NET_SUPPORT - Drop VBT as we already have it elsewhere - Drop calls to x86_cpu_init_f(), x86_cpu_reinit_f() - Drop dead code - Drop patch '86: timer: Reduce timer code size in TPL on Intel CPUs' - Drop patch 'dm: core: Don't include ofnode functions with of-platdata' - Drop patch 'spi: sandbox: Add a test driver for sandbox SPI flash' - Drop patch 'spl: Allow SPL/TPL to use of-platdata without libfdt' - Drop patch 'x86: apollolake: Add definitions for the Intel Fast SPI interface' - Drop patch 'x86: timer: Set up the timer in timer_early_get_count()' - Drop struct fsp_usp_header as it is now in the API file - Drop unnecessary #else part of CONFIG_HAVE_MICROCODE - Drop unneeded Kconfig file - Drop unused code in lpc_configure_pads() - Enable video and USB3 - Expand comments for BOOT_FROM_FAST_SPI_FLASH - Fix build error when debug UART is disabled - Fix build errors in sandbox_spl, etc - Fix mixed case in GPIO defines - Fix the incorrect value of CPU_ADDR_BITS - Fix value of LPC_BC_LE - Init the p2sb before the northbridge since the latter so it can use GPIOs - Merge in patch "x86: Add support for booting from Fast SPI" - Move an additional error handling fix from a future patch - Move line related to variable-cache into the next patch - Move location of fast_spi.h header file - Move mtrr_add_request() call into this patch - Move mtrr_add_request() call to next patch - Move pad programming into the hostbridge to reduce TPL device-tree size - Move the function to a common file instead of duplicating it - Move the mrccache_get_region() change into this patch - Move write_pirq_routing_table() to avoid 64-bit build error - Only supress the 'MAC address from ROM' warning on sandbox - Reduce amount of early-pad data in TPL - Rename X86_HAS_FIT to HAVE_X86_FIT - Rename power-mgr uclass to acpi-pmc - Reorder file so that write() and erase() are together - Rework how pads configuration is defined in TPL and SPL - Rewrite commit message - Set boot_loader_tolum_size to 0 - Set the environment variables at runtime to avoid other warnings - Shorten log_msg_ret() calls since the function name is always printed - Simplify types for fsp_locate_fsp() - Support TPL without CONFIG_TPL_SPI_SUPPORT - Support TPL without CONFIG_TPL_SPI_SUPPORT (reduces code size) - Support bootstage timing - Switch mmap to use SPI instead of SPI flash - Tidy up Makefile rules to reduce duplication - Tidy up the pad settings in the device tree - Update commit message to explain why HAVE_FIT woudl be confusing - Update device type to pci_dev_t - Update example error message to better show the intended purpose - Update mrccache livetree patch to just convert to livetree - Update the 'fsp' command for FSP2, instead of disabling it - Use a macro for is-power-of-two - Use a zero-based tsc timer - Use pci_get_devfn() - Use the IRQ uclass instead of ITSS - Use the IRQ uclass instead of creating a new ITSS uclass - Use the LPSS code from a separate file Changes in v2: - Change 'queensbay' to 'baytrail' in help - Drop probe() function - Fix 'proides' typo - Fix the Kconfig condition to avoid build errors on snow - Implement set_spi_protect() - Use SPI mmap() instead of SPI flash Simon Glass (102): binman: Add a library to access binman entries dm: gpio: Allow control of GPIO uclass in SPL dm: core: Fix offset_to_ofnode() with invalid offset dm: pci: Allow delaying auto-config until after relocation dm: pci: Move pci_get_devfn() into a common file net: Move the checksum functions to lib/ i2c: designware: Tidy up PCI support i2c: designware: Avoid using static data i2c: designware: Support use in SPL x86: spi: Add helper functions for Intel Fast SPI fdt: Show the preprocessed .dts file on error dm: pinctrl: Allow enabling full pinctrl in SPL/TPL board_r: Move early-timer init later RFC: sandbox: net: Suppress the MAC-address warnings Revert "RFC: sandbox: net: Suppress the MAC-address warnings" x86: timer: use a timer base of 0 x86: timer: Reduce timer code size in TPL on Intel CPUs x86: Drop unnecessary cpu code for TPL x86: Drop unnecessary interrupt code for TPL x86: power: Add an ACPI PMC uclass x86: sandbox: Add a PMC emulator and test pci: Add support for p2sb uclass sandbox: Disable mmio by default in tests sandbox: Add PCI driver and test for p2sb x86: Move UCLASS_IRQ into a separate file sandbox: Add a test for IRQ x86: Define the SPL image start x86: Reduce mrccache record alignment size x86: Correct mrccache find_next_mrc_cache() calculation x86: Adjust mrccache_get_region() to use livetree x86: Adjust mrccache_get_region() to support get_mmap() x86: Add a new global_data member for the cache record x86: Tidy up error handling in mrccache_save() x86: Update mrccache to support multiple caches x86: Add mrccache support for a 'variable' cache x86: Don't export mrccache_update() x86: Move fsp_prepare_mrc_cache() to fsp1 directory x86: Set the DRAM banks to reflect real location x86: Set up the MTRR for SDRAM x86: Don't imply libfdt or SPI flash in TPL x86: Allow removal of standard PCH drivers x86: Allow interrupt to happen once x86: fsp: Make graphics support common to FSP1/2 x86: fsp: Correct wrong header inlude in fsp_support.c x86: fsp: Add FSP2 base support x86: fsp: Set up an MTRR for the graphics frame buffer x86: fsp: Add a new arch_fsp_init_r() hook x86: fsp: Allow remembering the location of FSP-S x86: fsp: Make the notify API call common x86: Don't include the BIOS emulator in TPL x86: Add an option to include a FIT x86: Add support for newer CAR schemes x86: Disable microcode section for FSP2 x86: Update the fsp command for FSP2 x86: Update .dtsi file for FSP2 x86: Add an option to control the position of U-Boot x86: Add an option to control the position of SPL x86: Add an fdtmap and image-header x86: Don't repeat microcode in U-Boot if not needed x86: Separate out U-Boot and device tree in ROM image x86: Make MSR_PKG_POWER_SKU common spi: Correct operations check in dm_spi_xfer() x86: spi: Don't enable SPI_FLASH_BAR by default spi: ich: Move init function just above probe() spi: ich: Move the protection/lockdown code into a function spi: ich: Convert to livetree spi: ich: Fix header order spi: ich: Various small tidy-ups spi: ich: Add mmio_base to struct ich_spi_platdata dm: doc: Add a note about of-platdata and header files spi: ich: Correct max-size bug in ich_spi_adjust_size() spi: ich: Support of-platdata for fast-spi spi: ich: Support hardware sequencing spi: ich: Add support for get_mmap() method spi: ich: Add TPL support spi: ich: Add Apollo Lake support mtd: spi: Export spi_flash_std_probe() x86: Enable pinctrl in SPL and TPL x86: Add low-power subsystem (lpss) support x86: Add a generic Intel pinctrl driver x86: Add a generic Intel GPIO driver x86: Move qemu CPU fixup function into its own file x86: apl: Add basic IO addresses x86: apl: Add PMC driver x86: apl: Add UART driver x86: apl: Add pinctrl driver i2c: designware: Add Apollo Lake support x86: apl: Add systemagent driver x86: apl: Add hostbridge driver x86: apl: Add ITSS driver x86: apl: Add LPC driver x86: apl: Add PCH driver x86: apl: Add PUNIT driver spl: Add methods to find the position/size of next phase x86: apl: Add SPL loaders x86: apl: Add a CPU driver x86: apl: Add SPL/TPL init x86: apl: Add P2SB driver x86: apl: Add Kconfig and Makefile x86: apl: Add FSP structures x86: apl: Add FSP support x86: Add chromebook_coral Kconfig | 9 +- arch/Kconfig | 9 +- arch/arm/include/asm/omap_gpio.h | 2 +- arch/arm/mach-at91/include/mach/at91sam9260.h | 2 +- arch/arm/mach-davinci/include/mach/gpio.h | 2 +- arch/arm/mach-omap2/am33xx/board.c | 4 +- arch/arm/mach-omap2/omap3/board.c | 2 +- arch/arm/mach-omap2/omap5/hwinit.c | 2 +- arch/sandbox/cpu/state.c | 1 + arch/sandbox/dts/sandbox.dtsi | 14 + arch/sandbox/dts/test.dts | 31 + arch/sandbox/include/asm/test.h | 2 + arch/x86/Kconfig | 91 +- arch/x86/cpu/Makefile | 4 +- arch/x86/cpu/apollolake/Kconfig | 96 ++ arch/x86/cpu/apollolake/Makefile | 27 + arch/x86/cpu/apollolake/cpu.c | 41 + arch/x86/cpu/apollolake/cpu_common.c | 17 + arch/x86/cpu/apollolake/cpu_spl.c | 271 ++++++ arch/x86/cpu/apollolake/fsp_m.c | 210 +++++ arch/x86/cpu/apollolake/fsp_s.c | 661 ++++++++++++++ arch/x86/cpu/apollolake/hostbridge.c | 179 ++++ arch/x86/cpu/apollolake/itss.c | 214 +++++ arch/x86/cpu/apollolake/lpc.c | 122 +++ arch/x86/cpu/apollolake/p2sb.c | 167 ++++ arch/x86/cpu/apollolake/pch.c | 36 + arch/x86/cpu/apollolake/pmc.c | 216 +++++ arch/x86/cpu/apollolake/punit.c | 94 ++ arch/x86/cpu/apollolake/spl.c | 178 ++++ arch/x86/cpu/apollolake/systemagent.c | 19 + arch/x86/cpu/apollolake/uart.c | 133 +++ arch/x86/cpu/broadwell/sdram.c | 8 +- arch/x86/cpu/coreboot/Kconfig | 1 + arch/x86/cpu/cpu.c | 4 + arch/x86/cpu/i386/Makefile | 2 + arch/x86/cpu/i386/cpu.c | 41 +- arch/x86/cpu/intel_common/Makefile | 10 + arch/x86/cpu/intel_common/car2.S | 448 ++++++++++ arch/x86/cpu/intel_common/car2_uninit.S | 87 ++ arch/x86/cpu/intel_common/fast_spi.c | 73 ++ arch/x86/cpu/intel_common/lpss.c | 44 + arch/x86/cpu/irq.c | 13 - arch/x86/cpu/ivybridge/sdram.c | 8 +- arch/x86/cpu/mp_init.c | 73 +- arch/x86/cpu/qfw_cpu.c | 73 ++ arch/x86/cpu/quark/dram.c | 8 +- arch/x86/cpu/slimbootloader/Kconfig | 1 + arch/x86/cpu/u-boot-spl.lds | 5 +- arch/x86/dts/Makefile | 1 + arch/x86/dts/chromebook_coral.dts | 831 ++++++++++++++++++ arch/x86/dts/u-boot.dtsi | 91 +- arch/x86/include/asm/arch-apollolake/cpu.h | 20 + .../asm/arch-apollolake/fsp/fsp_configs.h | 14 + .../asm/arch-apollolake/fsp/fsp_m_upd.h | 123 +++ .../asm/arch-apollolake/fsp/fsp_s_upd.h | 292 ++++++ .../include/asm/arch-apollolake/fsp/fsp_vpd.h | 11 + arch/x86/include/asm/arch-apollolake/gpio.h | 490 +++++++++++ arch/x86/include/asm/arch-apollolake/iomap.h | 29 + arch/x86/include/asm/arch-apollolake/itss.h | 43 + arch/x86/include/asm/arch-apollolake/lpc.h | 82 ++ arch/x86/include/asm/arch-apollolake/pch.h | 9 + arch/x86/include/asm/arch-apollolake/pm.h | 19 + .../include/asm/arch-apollolake/systemagent.h | 37 + arch/x86/include/asm/arch-apollolake/uart.h | 20 + arch/x86/include/asm/arch-broadwell/cpu.h | 1 - .../include/asm/arch-ivybridge/model_206ax.h | 1 - arch/x86/include/asm/fast_spi.h | 68 ++ arch/x86/include/asm/fsp/fsp_api.h | 24 + arch/x86/include/asm/fsp/fsp_support.h | 7 - arch/x86/include/asm/fsp1/fsp_api.h | 21 +- arch/x86/include/asm/fsp2/fsp_api.h | 63 ++ arch/x86/include/asm/fsp2/fsp_internal.h | 97 ++ arch/x86/include/asm/global_data.h | 25 +- arch/x86/include/asm/intel_pinctrl.h | 306 +++++++ arch/x86/include/asm/intel_pinctrl_defs.h | 373 ++++++++ arch/x86/include/asm/lpss.h | 36 + arch/x86/include/asm/mrccache.h | 29 +- arch/x86/include/asm/msr-index.h | 10 +- arch/x86/include/asm/processor.h | 12 +- arch/x86/include/asm/spl.h | 1 + arch/x86/lib/Makefile | 2 + arch/x86/lib/fsp/Makefile | 3 + arch/x86/lib/fsp/fsp_common.c | 20 - arch/x86/lib/fsp/fsp_dram.c | 35 +- arch/x86/lib/{fsp1 => fsp}/fsp_graphics.c | 6 +- arch/x86/lib/fsp/fsp_support.c | 2 +- arch/x86/lib/fsp1/Makefile | 1 - arch/x86/lib/fsp1/fsp_common.c | 20 + arch/x86/lib/fsp1/fsp_dram.c | 8 +- arch/x86/lib/fsp2/Makefile | 10 + arch/x86/lib/fsp2/fsp_common.c | 13 + arch/x86/lib/fsp2/fsp_dram.c | 78 ++ arch/x86/lib/fsp2/fsp_init.c | 191 ++++ arch/x86/lib/fsp2/fsp_meminit.c | 97 ++ arch/x86/lib/fsp2/fsp_silicon_init.c | 54 ++ arch/x86/lib/fsp2/fsp_support.c | 131 +++ arch/x86/lib/mrccache.c | 204 +++-- arch/x86/lib/pirq_routing.c | 10 + board/freescale/imx8qm_mek/imx8qm_mek.c | 2 +- board/freescale/imx8qxp_mek/imx8qxp_mek.c | 2 +- board/gateworks/gw_ventana/Kconfig | 3 + board/google/Kconfig | 15 + board/google/chromebook_coral/Kconfig | 43 + board/google/chromebook_coral/MAINTAINERS | 6 + board/google/chromebook_coral/Makefile | 5 + board/google/chromebook_coral/coral.c | 19 + board/toradex/apalis-imx8/apalis-imx8.c | 2 +- cmd/Kconfig | 8 + cmd/Makefile | 1 + cmd/pmc.c | 81 ++ cmd/x86/fsp.c | 65 +- common/board_r.c | 32 +- common/spl/spl.c | 20 + configs/chromebook_coral_defconfig | 102 +++ configs/chromebook_samus_tpl_defconfig | 3 + configs/omap35_logic_defconfig | 1 + configs/qemu-x86_64_defconfig | 1 + configs/sandbox64_defconfig | 4 + configs/sandbox_defconfig | 2 + configs/sandbox_flattree_defconfig | 4 + configs/sandbox_spl_defconfig | 4 + configs/tools-only_defconfig | 2 + doc/board/google/chromebook_coral.rst | 241 +++++ .../gpio/intel,apl-gpio.txt | 55 ++ doc/device-tree-bindings/pci/x86-pci.txt | 24 + .../pinctrl/intel,apl-pinctrl.txt | 39 + doc/driver-model/of-plat.rst | 6 + drivers/Makefile | 1 + drivers/core/util.c | 20 + drivers/gpio/Kconfig | 31 + drivers/gpio/Makefile | 5 +- drivers/gpio/at91_gpio.c | 6 +- drivers/gpio/atmel_pio4.c | 2 +- drivers/gpio/da8xx_gpio.c | 7 +- drivers/gpio/da8xx_gpio.h | 2 +- drivers/gpio/intel_gpio.c | 161 ++++ drivers/gpio/mxc_gpio.c | 4 +- drivers/gpio/mxs_gpio.c | 4 +- drivers/gpio/omap_gpio.c | 6 +- drivers/gpio/sunxi_gpio.c | 8 +- drivers/i2c/Makefile | 3 + drivers/i2c/designware_i2c.c | 106 +-- drivers/i2c/designware_i2c.h | 35 + drivers/i2c/designware_i2c_pci.c | 144 +++ drivers/i2c/i2c-uclass.c | 6 +- drivers/i2c/muxes/pca954x.c | 4 +- drivers/misc/Kconfig | 42 + drivers/misc/Makefile | 5 + drivers/misc/irq-uclass.c | 53 ++ drivers/misc/irq_sandbox.c | 55 ++ drivers/misc/p2sb-uclass.c | 216 +++++ drivers/misc/p2sb_emul.c | 272 ++++++ drivers/misc/p2sb_sandbox.c | 39 + drivers/misc/sandbox_adder.c | 60 ++ drivers/mmc/fsl_esdhc_imx.c | 13 +- drivers/mmc/omap_hsmmc.c | 2 +- drivers/mtd/spi/sf_probe.c | 2 +- drivers/net/designware.c | 10 +- drivers/net/designware.h | 4 +- drivers/net/fec_mxc.c | 6 +- drivers/net/fec_mxc.h | 2 +- drivers/net/mvneta.c | 4 +- drivers/net/mvpp2.c | 8 +- drivers/net/sun8i_emac.c | 12 +- drivers/pch/Kconfig | 18 + drivers/pch/Makefile | 4 +- drivers/pci/pci-aardvark.c | 4 +- drivers/pci/pci-uclass.c | 31 +- drivers/pci/pcie_dw_mvebu.c | 4 +- drivers/pinctrl/Kconfig | 23 + drivers/pinctrl/Makefile | 1 + drivers/pinctrl/intel/Kconfig | 24 + drivers/pinctrl/intel/Makefile | 6 + drivers/pinctrl/intel/pinctrl.c | 636 ++++++++++++++ drivers/pinctrl/intel/pinctrl_apl.c | 192 ++++ drivers/power/Kconfig | 2 + drivers/power/acpi_pmc/Kconfig | 34 + drivers/power/acpi_pmc/Makefile | 6 + drivers/power/acpi_pmc/acpi-pmc-uclass.c | 244 +++++ drivers/power/acpi_pmc/pmc_emul.c | 246 ++++++ drivers/power/acpi_pmc/sandbox.c | 97 ++ drivers/spi/Kconfig | 1 - drivers/spi/atmel_spi.c | 10 +- drivers/spi/designware_spi.c | 4 +- drivers/spi/ich.c | 534 ++++++++--- drivers/spi/ich.h | 46 +- drivers/spi/spi-uclass.c | 5 +- drivers/timer/Kconfig | 23 + drivers/timer/tsc_timer.c | 10 +- drivers/tpm/tpm2_tis_spi.c | 2 +- include/binman.h | 45 + include/bootstage.h | 3 + include/config_uncmd_spl.h | 1 - include/configs/at91-sama5_common.h | 5 +- include/configs/chromebook_coral.h | 32 + include/configs/gw_ventana.h | 1 - include/configs/mx6ul_14x14_evk.h | 1 + include/dm/ofnode.h | 2 +- include/dm/pci.h | 43 + include/dm/uclass-id.h | 2 + include/init.h | 11 + include/irq.h | 88 ++ include/p2sb.h | 135 +++ include/pci.h | 21 +- include/power/acpi_pmc.h | 185 ++++ include/qfw.h | 8 + include/spi.h | 2 +- include/spi_flash.h | 12 + include/spl.h | 21 +- lib/Kconfig | 10 + lib/Makefile | 3 +- lib/binman.c | 48 + lib/efi/Kconfig | 1 + lib/net_utils.c | 48 + net/Makefile | 1 - net/checksum.c | 59 -- scripts/Makefile.lib | 4 +- scripts/Makefile.uncmd_spl | 1 - test/dm/Makefile | 3 + test/dm/irq.c | 32 + test/dm/p2sb.c | 28 + test/dm/pmc.c | 33 + 222 files changed, 12368 insertions(+), 706 deletions(-) create mode 100644 arch/x86/cpu/apollolake/Kconfig create mode 100644 arch/x86/cpu/apollolake/Makefile create mode 100644 arch/x86/cpu/apollolake/cpu.c create mode 100644 arch/x86/cpu/apollolake/cpu_common.c create mode 100644 arch/x86/cpu/apollolake/cpu_spl.c create mode 100644 arch/x86/cpu/apollolake/fsp_m.c create mode 100644 arch/x86/cpu/apollolake/fsp_s.c create mode 100644 arch/x86/cpu/apollolake/hostbridge.c create mode 100644 arch/x86/cpu/apollolake/itss.c create mode 100644 arch/x86/cpu/apollolake/lpc.c create mode 100644 arch/x86/cpu/apollolake/p2sb.c create mode 100644 arch/x86/cpu/apollolake/pch.c create mode 100644 arch/x86/cpu/apollolake/pmc.c create mode 100644 arch/x86/cpu/apollolake/punit.c create mode 100644 arch/x86/cpu/apollolake/spl.c create mode 100644 arch/x86/cpu/apollolake/systemagent.c create mode 100644 arch/x86/cpu/apollolake/uart.c create mode 100644 arch/x86/cpu/intel_common/car2.S create mode 100644 arch/x86/cpu/intel_common/car2_uninit.S create mode 100644 arch/x86/cpu/intel_common/fast_spi.c create mode 100644 arch/x86/cpu/intel_common/lpss.c create mode 100644 arch/x86/cpu/qfw_cpu.c create mode 100644 arch/x86/dts/chromebook_coral.dts create mode 100644 arch/x86/include/asm/arch-apollolake/cpu.h create mode 100644 arch/x86/include/asm/arch-apollolake/fsp/fsp_configs.h create mode 100644 arch/x86/include/asm/arch-apollolake/fsp/fsp_m_upd.h create mode 100644 arch/x86/include/asm/arch-apollolake/fsp/fsp_s_upd.h create mode 100644 arch/x86/include/asm/arch-apollolake/fsp/fsp_vpd.h create mode 100644 arch/x86/include/asm/arch-apollolake/gpio.h create mode 100644 arch/x86/include/asm/arch-apollolake/iomap.h create mode 100644 arch/x86/include/asm/arch-apollolake/itss.h create mode 100644 arch/x86/include/asm/arch-apollolake/lpc.h create mode 100644 arch/x86/include/asm/arch-apollolake/pch.h create mode 100644 arch/x86/include/asm/arch-apollolake/pm.h create mode 100644 arch/x86/include/asm/arch-apollolake/systemagent.h create mode 100644 arch/x86/include/asm/arch-apollolake/uart.h create mode 100644 arch/x86/include/asm/fast_spi.h create mode 100644 arch/x86/include/asm/fsp/fsp_api.h create mode 100644 arch/x86/include/asm/fsp2/fsp_api.h create mode 100644 arch/x86/include/asm/fsp2/fsp_internal.h create mode 100644 arch/x86/include/asm/intel_pinctrl.h create mode 100644 arch/x86/include/asm/intel_pinctrl_defs.h create mode 100644 arch/x86/include/asm/lpss.h rename arch/x86/lib/{fsp1 => fsp}/fsp_graphics.c (95%) create mode 100644 arch/x86/lib/fsp2/Makefile create mode 100644 arch/x86/lib/fsp2/fsp_common.c create mode 100644 arch/x86/lib/fsp2/fsp_dram.c create mode 100644 arch/x86/lib/fsp2/fsp_init.c create mode 100644 arch/x86/lib/fsp2/fsp_meminit.c create mode 100644 arch/x86/lib/fsp2/fsp_silicon_init.c create mode 100644 arch/x86/lib/fsp2/fsp_support.c create mode 100644 board/google/chromebook_coral/Kconfig create mode 100644 board/google/chromebook_coral/MAINTAINERS create mode 100644 board/google/chromebook_coral/Makefile create mode 100644 board/google/chromebook_coral/coral.c create mode 100644 cmd/pmc.c create mode 100644 configs/chromebook_coral_defconfig create mode 100644 doc/board/google/chromebook_coral.rst create mode 100644 doc/device-tree-bindings/gpio/intel,apl-gpio.txt create mode 100644 doc/device-tree-bindings/pci/x86-pci.txt create mode 100644 doc/device-tree-bindings/pinctrl/intel,apl-pinctrl.txt create mode 100644 drivers/gpio/intel_gpio.c create mode 100644 drivers/i2c/designware_i2c_pci.c create mode 100644 drivers/misc/irq-uclass.c create mode 100644 drivers/misc/irq_sandbox.c create mode 100644 drivers/misc/p2sb-uclass.c create mode 100644 drivers/misc/p2sb_emul.c create mode 100644 drivers/misc/p2sb_sandbox.c create mode 100644 drivers/misc/sandbox_adder.c create mode 100644 drivers/pinctrl/intel/Kconfig create mode 100644 drivers/pinctrl/intel/Makefile create mode 100644 drivers/pinctrl/intel/pinctrl.c create mode 100644 drivers/pinctrl/intel/pinctrl_apl.c create mode 100644 drivers/power/acpi_pmc/Kconfig create mode 100644 drivers/power/acpi_pmc/Makefile create mode 100644 drivers/power/acpi_pmc/acpi-pmc-uclass.c create mode 100644 drivers/power/acpi_pmc/pmc_emul.c create mode 100644 drivers/power/acpi_pmc/sandbox.c create mode 100644 include/binman.h create mode 100644 include/configs/chromebook_coral.h create mode 100644 include/dm/pci.h create mode 100644 include/irq.h create mode 100644 include/p2sb.h create mode 100644 include/power/acpi_pmc.h create mode 100644 lib/binman.c delete mode 100644 net/checksum.c create mode 100644 test/dm/irq.c create mode 100644 test/dm/p2sb.c create mode 100644 test/dm/pmc.c -- 2.24.0.393.g34dc348eaf-goog

6 234

[PATCH v4 0/6] log: syslog logging driver
by Heinrich Schuchardt 17 Feb '20

17 Feb '20

This patch series provides a logging driver to send syslog messages via UDP port 514 to a syslog server and a unit test for the syslog driver. For testing LOG_SYSLOG is enabled on the sandbox. For CONFIG_LOG=n a patch enables printf() or debug() output for log_* functions. A unit test for this use case is provided. v4: correct syslog test (expect 'uboot:' not 'uboot[1]:') provide more comments for syslog test Heinrich Schuchardt (6): log: correct CONFIG_LOG_TEST prerequisites log: syslog driver log: output for CONFIG_LOG=n test: log functions with CONFIG_LOG=n test: log: test syslog logging driver configs: sandbox: enable LOG_SYSLOG MAINTAINERS | 4 +- common/Kconfig | 9 +- common/Makefile | 1 + common/log_syslog.c | 117 ++++++++++++ configs/sandbox64_defconfig | 1 + configs/sandbox_defconfig | 1 + configs/sandbox_flattree_defconfig | 1 + doc/README.log | 3 + include/log.h | 10 +- include/test/log.h | 16 ++ include/test/suites.h | 1 + test/Kconfig | 9 + test/Makefile | 2 +- test/cmd_ut.c | 6 + test/log/Makefile | 14 ++ test/log/nolog_test.c | 135 ++++++++++++++ test/log/syslog_test.c | 280 +++++++++++++++++++++++++++++ test/log/test-main.c | 20 +++ 18 files changed, 621 insertions(+), 9 deletions(-) create mode 100644 common/log_syslog.c create mode 100644 include/test/log.h create mode 100644 test/log/nolog_test.c create mode 100644 test/log/syslog_test.c create mode 100644 test/log/test-main.c -- 2.25.0

1 6

[Patch v2 0/3] Enable octal read support for mt35xu* flashes
by Kuldeep Singh 17 Feb '20

17 Feb '20

v2 version of series update dependencies of the patches and add lx2160aqds node buswidth in patch3. No dependency on patch1 and patch2. Patch3 has dependency on https://patchwork.ozlabs.org/patch/1236164/. Patch series enable octal read(1-1-8) support for LX2160ARDB and LS1028ARDB which have mt35xu512aba and mt35xu02g flashes respectively. mt35xu512aba and mt35xu02g flashes support SINGLE and OCTAL I/O. Previously, 1 bit mode was used in u-boot and now use octal mode for the flashes. Patch 1 enables octal read flag for flashes in framework. Patch 2/3 adds RX,TX buswidth in qspi dts entries to use octal mode for LS1028ARDB/QDS, LX2160ARDB/QDS. Kuldeep Singh (3): mtd: spi-nor-ids: Enable SPI_NOR_OCTAL_READ flag for mt35xu* arm: dts: ls1028a: Add RX,TX buswidth in qspi to use octal mode arm: dts: lx2160a: Add RX,TX buswidth in qspi to use octal mode arch/arm/dts/fsl-ls1028a-qds.dts | 2 ++ arch/arm/dts/fsl-ls1028a-rdb.dts | 2 ++ arch/arm/dts/fsl-lx2160a-qds.dts | 4 ++++ arch/arm/dts/fsl-lx2160a-rdb.dts | 4 ++++ drivers/mtd/spi/spi-nor-ids.c | 4 ++-- 5 files changed, 14 insertions(+), 2 deletions(-) -- 2.7.4

2 4

[PATCH] usb: dwc3: Check that the request is valid in dwc3_gadget_giveback()
by Vignesh Raghavendra 17 Feb '20

17 Feb '20

From: Jean-Jacques Hiblot <jjhiblot(a)ti.com> This fixes potential issues reported by klokworks: Pointer 'req' returned from call to function 'next_request' at line 531 and 538 may be NULL and will be dereferenced in dwc3_gadget_giveback() Signed-off-by: Jean-Jacques Hiblot <jjhiblot(a)ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr(a)ti.com> --- drivers/usb/dwc3/gadget.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index 4353dffb6b12..12de3b1da663 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -227,6 +227,9 @@ void dwc3_gadget_giveback(struct dwc3_ep *dep, struct dwc3_request *req, { struct dwc3 *dwc = dep->dwc; + if (!req) + return; + if (req->queued) { dep->busy_slot++; /* -- 2.25.0

2 2

[PATCH v3 0/6] log: syslog logging driver
by Heinrich Schuchardt 16 Feb '20

16 Feb '20

This patch series provides a logging driver to send syslog messages via UDP port 514 to a syslog server and a unit test for the syslog driver. For testing LOG_SYSLOG is enabled on the sandbox. For CONFIG_LOG=n a patch enables printf() or debug() output for log_* functions. A unit test for this use case is provided. Heinrich Schuchardt (6): log: correct CONFIG_LOG_TEST prerequisites log: syslog driver log: output for CONFIG_LOG=n test: log functions with CONFIG_LOG=n test: log: test syslog logging driver configs: sandbox: enable LOG_SYSLOG MAINTAINERS | 4 +- common/Kconfig | 9 +- common/Makefile | 1 + common/log_syslog.c | 117 ++++++++++++++++++ configs/sandbox64_defconfig | 1 + configs/sandbox_defconfig | 1 + configs/sandbox_flattree_defconfig | 1 + doc/README.log | 3 + include/log.h | 10 +- include/test/log.h | 16 +++ include/test/suites.h | 1 + test/Kconfig | 9 ++ test/Makefile | 2 +- test/cmd_ut.c | 6 + test/log/Makefile | 14 +++ test/log/nolog_test.c | 135 +++++++++++++++++++++ test/log/syslog_test.c | 186 +++++++++++++++++++++++++++++ test/log/test-main.c | 20 ++++ 18 files changed, 527 insertions(+), 9 deletions(-) create mode 100644 common/log_syslog.c create mode 100644 include/test/log.h create mode 100644 test/log/nolog_test.c create mode 100644 test/log/syslog_test.c create mode 100644 test/log/test-main.c -- 2.25.0

2 10