February 2020 - U-Boot

[PATCH 0/2] doc: build HTML docs in CI
by Heinrich Schuchardt 21 Feb '20

21 Feb '20

We are on the move to a restructured text based documentation for U-Boot. Build target htmldocs is used to transform the restructured text into HTML. We should avoid syntax errors in the restructured text documents that may lead to incorrect HTML. This patch series turns the 'make htmldocs' warnings into errors and adds build steps for 'make htmldocs' to Travis CI scripts. I am still working on Gitlab. At least imagemagick (/usr/bin/convert) is missing in our Docker image. Heinrich Schuchardt (2): doc/Makefile: turn warnings into errors travis: build HTML docs .travis.yml | 5 +++++ doc/Makefile | 1 + 2 files changed, 6 insertions(+) -- 2.25.0

3 9

[PATCH 1/1] gitlab: build HTML documentation
by Heinrich Schuchardt 21 Feb '20

21 Feb '20

Several patches delivered incorrect restructured text as documentation. We should be able to discover this in Gitlab CI. Provide a build step for 'make htmldocs'. Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- This patch requires a new Docker image. Cf. [PATCH 1/1] Dockerfile: add imagemagick https://lists.denx.de/pipermail/u-boot/2020-February/400983.html If have tested successfully against Docker image xypron/u-boot-gitlab-ci-runner:2020-02-20: https://gitlab.denx.de/u-boot/custodians/u-boot-efi/-/jobs/60271 --- .gitlab-ci.yml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index d486e72042..652ed3b501 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -122,6 +122,13 @@ grep TODO/FIXME/HACK: # search for HACK within source tree and ignore HACKKIT board - grep -r HACK . | grep -v HACKKIT +# build HTML documentation +htmldocs: + tags: [ 'all' ] + stage: testsuites + script: + - make htmldocs + # some statistics about the code base sloccount: tags: [ 'all' ] -- 2.25.0

2 1

[PATCH 1/3] clk: imx: imx8mn: add enet clk
by Alifer Moraes 21 Feb '20

21 Feb '20

Add enet ref/timer/PHY_REF/root clk wich are required to make enet work properly Signed-off-by: Alifer Moraes <alifer.wsdm(a)gmail.com> --- drivers/clk/imx/clk-imx8mn.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/drivers/clk/imx/clk-imx8mn.c b/drivers/clk/imx/clk-imx8mn.c index eb43971ae6..103ba770ed 100644 --- a/drivers/clk/imx/clk-imx8mn.c +++ b/drivers/clk/imx/clk-imx8mn.c @@ -80,6 +80,17 @@ static const char *imx8mn_ahb_sels[] = {"clock-osc-24m", "sys_pll1_133m", "sys_p static const char *imx8mn_enet_axi_sels[] = {"clock-osc-24m", "sys_pll1_266m", "sys_pll1_800m", "sys_pll2_250m", "sys_pll2_200m", "audio_pll1_out", "video_pll1_out", "sys_pll3_out", }; +#ifndef CONFIG_SPL_BUILD +static const char *imx8mn_enet_ref_sels[] = {"clock-osc-24m", "sys_pll2_125m", "sys_pll2_50m", "sys_pll2_100m", + "sys_pll1_160m", "audio_pll1_out", "video_pll1_out", "clk_ext4", }; + +static const char *imx8mn_enet_timer_sels[] = {"clock-osc-24m", "sys_pll2_100m", "audio_pll1_out", "clk_ext1", "clk_ext2", + "clk_ext3", "clk_ext4", "video_pll1_out", }; + +static const char *imx8mn_enet_phy_sels[] = {"clock-osc-24m", "sys_pll2_50m", "sys_pll2_125m", "sys_pll2_200m", + "sys_pll2_500m", "video_pll1_out", "audio_pll2_out", }; +#endif + static const char *imx8mn_nand_usdhc_sels[] = {"clock-osc-24m", "sys_pll1_266m", "sys_pll1_800m", "sys_pll2_200m", "sys_pll1_133m", "sys_pll3_out", "sys_pll2_250m", "audio_pll1_out", }; @@ -363,6 +374,14 @@ static int imx8mn_clk_probe(struct udevice *dev) clk_dm(IMX8MN_CLK_USDHC3_ROOT, imx_clk_gate4("usdhc3_root_clk", "usdhc3", base + 0x45e0, 0)); +/* clks not needed in SPL stage */ +#ifndef CONFIG_SPL_BUILD + clk_dm(IMX8MN_CLK_ENET_REF, imx8m_clk_composite("enet_ref", imx8mn_enet_ref_sels, base + 0xa980)); + clk_dm(IMX8MN_CLK_ENET_TIMER, imx8m_clk_composite("enet_timer", imx8mn_enet_timer_sels, base + 0xaa00)); + clk_dm(IMX8MN_CLK_ENET_PHY_REF, imx8m_clk_composite("enet_phy", imx8mn_enet_phy_sels, base + 0xaa80)); + clk_dm(IMX8MN_CLK_ENET1_ROOT, imx_clk_gate4("enet1_root_clk", "enet_axi", base + 0x40a0, 0)); +#endif + #ifdef CONFIG_SPL_BUILD struct clk *clkp, *clkp1; -- 2.17.1

2 5

[PATCH v3 00/21] Enable ARM Trusted Firmware for U-Boot
by chee.hong.ang＠intel.com 21 Feb '20

21 Feb '20

From: "Ang, Chee Hong" <chee.hong.ang(a)intel.com> v3 changes: [v3 03/21] arm: socfpga: Add function for checking description from FIT image - documented the 'weak' function in commit message [v3 05/21] arm: socfpga: Override 'lowlevel_init' to support ATF - changed the source file name to 'lowlevel_init_64.S' - removed a redundant '#ifdef' in the 'lowlevel_init' function [v3 06/21] configs: socfpga: Enable FIT image loading with ATF support - removed CONFIG_SPL_LEGACY_IMAGE_SUPPORT=y from defconfigs - documented the change of address in CONFIG_SYS_TEXT_BASE in commit message [v3 08/21] arm: socfpga: Add SMC helper function for Intel SOCFPGA (64bits) - replaced for-loops with memcpys [v3 09/21] arm: socfpga: Define SMC function identifiers for PSCI SiP services - update the license header date to '2017-2020' - fixed the indentations [v3 10/21] arm: socfpga: Add secure register access helper functions for SoC 64bits - remove inner 'ifdef' in Makefile v2: https://lists.denx.de/pipermail/u-boot/2020-February/400704.html These patchsets have dependency on: https://lists.denx.de/pipermail/u-boot/2019-September/384906.html Chee Hong Ang (21): configs: agilex: Remove CONFIG_OF_EMBED arm: socfpga: add fit source file for pack itb with ATF arm: socfpga: Add function for checking description from FIT image arm: socfpga: Load FIT image with ATF support arm: socfpga: Override 'lowlevel_init' to support ATF configs: socfpga: Enable FIT image loading with ATF support arm: socfpga: Disable "spin-table" method for booting Linux arm: socfpga: Add SMC helper function for Intel SOCFPGA (64bits) arm: socfpga: Define SMC function identifiers for PSCI SiP services arm: socfpga: Add secure register access helper functions for SoC 64bits arm: socfpga: Secure register access for clock manager (SoC 64bits) arm: socfpga: Secure register access in PHY mode setup arm: socfpga: Secure register access for reading PLL frequency mmc: dwmmc: socfpga: Secure register access in MMC driver net: designware: socfpga: Secure register access in MAC driver arm: socfpga: Secure register access in Reset Manager driver arm: socfpga: stratix10: Initialize timer in SPL arm: socfpga: Bridge reset invokes SMC service calls in EL2 arm: socfpga: stratix10: Add ATF support to FPGA reconfig driver arm: socfpga: mailbox: Add 'SYSTEM_RESET' PSCI support to mbox_reset_cold() configs: socfpga: Add defconfig for Agilex and Stratix 10 without ATF support arch/arm/mach-socfpga/Kconfig | 2 - arch/arm/mach-socfpga/Makefile | 6 + arch/arm/mach-socfpga/board.c | 10 + arch/arm/mach-socfpga/clock_manager_agilex.c | 5 +- arch/arm/mach-socfpga/clock_manager_s10.c | 5 +- arch/arm/mach-socfpga/include/mach/misc.h | 3 + .../mach-socfpga/include/mach/secure_reg_helper.h | 20 ++ arch/arm/mach-socfpga/lowlevel_init_64.S | 81 +++++ arch/arm/mach-socfpga/mailbox_s10.c | 4 + arch/arm/mach-socfpga/misc_s10.c | 43 ++- arch/arm/mach-socfpga/reset_manager_s10.c | 31 +- arch/arm/mach-socfpga/secure_reg_helper.c | 57 ++++ arch/arm/mach-socfpga/timer_s10.c | 3 +- arch/arm/mach-socfpga/wrap_pll_config_s10.c | 9 +- board/altera/soc64/its/fit_spl_atf.its | 52 +++ configs/socfpga_agilex_defconfig | 8 +- ...lex_defconfig => socfpga_agilex_nofw_defconfig} | 2 +- configs/socfpga_stratix10_defconfig | 7 +- ..._defconfig => socfpga_stratix10_nofw_defconfig} | 2 +- drivers/fpga/stratix10.c | 141 +++++++- drivers/mmc/socfpga_dw_mmc.c | 7 +- drivers/net/dwmac_socfpga.c | 5 +- include/configs/socfpga_soc64_common.h | 4 + include/linux/intel-smc.h | 374 +++++++++++++++++++++ 24 files changed, 843 insertions(+), 38 deletions(-) create mode 100644 arch/arm/mach-socfpga/include/mach/secure_reg_helper.h create mode 100644 arch/arm/mach-socfpga/lowlevel_init_64.S create mode 100644 arch/arm/mach-socfpga/secure_reg_helper.c create mode 100644 board/altera/soc64/its/fit_spl_atf.its copy configs/{socfpga_agilex_defconfig => socfpga_agilex_nofw_defconfig} (97%) copy configs/{socfpga_stratix10_defconfig => socfpga_stratix10_nofw_defconfig} (97%) create mode 100644 include/linux/intel-smc.h -- 2.7.4

1 21

[PATCH 1/2] mmc: ca_dw_mmc: add DesignWare based DM support for CAxxxx SoCs
by Alex Nemirovsky 21 Feb '20

21 Feb '20

From: Arthur Li <arthur.li(a)cortina-access.com> Initial DesignWare based DM support for Cortina Access CAxxxx SoCs. Signed-off-by: Arthur Li <arthur.li(a)cortina-access.com> Signed-off-by: Alex Nemirovsky <alex.nemirovsky(a)cortina-access.com> --- MAINTAINERS | 2 + drivers/mmc/Kconfig | 11 +++ drivers/mmc/Makefile | 1 + drivers/mmc/ca_dw_mmc.c | 181 ++++++++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 195 insertions(+) create mode 100644 drivers/mmc/ca_dw_mmc.c diff --git a/MAINTAINERS b/MAINTAINERS index 82e4159..bb45d3c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -180,6 +180,7 @@ F: board/cortina/common/ F: drivers/gpio/cortina_gpio.c F: drivers/watchdog/cortina_wdt.c F: drivers/serial/serial_cortina.c +F: drivers/mmc/ca_dw_mmc.c ARM/CZ.NIC TURRIS MOX SUPPORT M: Marek Behun <marek.behun(a)nic.cz> @@ -670,6 +671,7 @@ F: board/cortina/common/ F: drivers/gpio/cortina_gpio.c F: drivers/watchdog/cortina_wdt.c F: drivers/serial/serial_cortina.c +F: drivers/mmc/ca_dw_mmc.c MIPS MSCC M: Gregory CLEMENT <gregory.clement(a)bootlin.com> diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index 2f0eedc..bb38787 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -205,6 +205,17 @@ config MMC_DW block, this provides host support for SD and MMC interfaces, in both PIO, internal DMA mode and external DMA mode. +config MMC_DW_CORTINA + bool "Cortina specific extensions for Synopsys DW Memory Card Interface" + depends on DM_MMC + depends on MMC_DW + depends on BLK + default n + help + This selects support for Cortina SoC specific extensions to the + Synopsys DesignWare Memory Card Interface driver. Select this option + for platforms based on Cortina CAxxxx Soc's. + config MMC_DW_EXYNOS bool "Exynos specific extensions for Synopsys DW Memory Card Interface" depends on ARCH_EXYNOS diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index 9c1f8e5..615b724 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -20,6 +20,7 @@ endif obj-$(CONFIG_ARM_PL180_MMCI) += arm_pl180_mmci.o obj-$(CONFIG_MMC_DAVINCI) += davinci_mmc.o obj-$(CONFIG_MMC_DW) += dw_mmc.o +obj-$(CONFIG_MMC_DW_CORTINA) += ca_dw_mmc.o obj-$(CONFIG_MMC_DW_EXYNOS) += exynos_dw_mmc.o obj-$(CONFIG_MMC_DW_K3) += hi6220_dw_mmc.o obj-$(CONFIG_MMC_DW_ROCKCHIP) += rockchip_dw_mmc.o diff --git a/drivers/mmc/ca_dw_mmc.c b/drivers/mmc/ca_dw_mmc.c new file mode 100644 index 0000000..acbc850 --- /dev/null +++ b/drivers/mmc/ca_dw_mmc.c @@ -0,0 +1,181 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2019 Cortina Access + * Arthur Li <arthur.li(a)cortina-access.com> + */ + +#include <common.h> +#include <dwmmc.h> +#include <fdtdec.h> +#include <linux/libfdt.h> +#include <malloc.h> +#include <errno.h> +#include <dm.h> +#include <mapmem.h> + +#define SD_CLK_SEL_MASK (0x3) +#define SD_DLL_DEFAULT (0x143000) +#define SD_SCLK_MAX (200000000) + +#define SD_CLK_SEL_200MHZ (0x2) +#define SD_CLK_SEL_100MHZ (0x1) + +#define IO_DRV_SD_DS_OFFSET (16) +#define IO_DRV_SD_DS_MASK (0xff << IO_DRV_SD_DS_OFFSET) + +#define MIN_FREQ (400000) + +DECLARE_GLOBAL_DATA_PTR; + +struct ca_mmc_plat { + struct mmc_config cfg; + struct mmc mmc; +}; + +struct ca_dwmmc_priv_data { + struct dwmci_host host; + void __iomem *sd_dll_reg; + void __iomem *io_drv_reg; + u8 ds; +}; + +static void ca_dwmci_clksel(struct dwmci_host *host) +{ + struct ca_dwmmc_priv_data *priv = host->priv; + u32 val = readl(priv->sd_dll_reg); + + if (host->bus_hz >= 200000000) { + val &= ~SD_CLK_SEL_MASK; + val |= SD_CLK_SEL_200MHZ; + } else if (host->bus_hz >= 100000000) { + val &= ~SD_CLK_SEL_MASK; + val |= SD_CLK_SEL_100MHZ; + } else { + val &= ~SD_CLK_SEL_MASK; + } + + writel(val, priv->sd_dll_reg); +} + +static void ca_dwmci_board_init(struct dwmci_host *host) +{ + struct ca_dwmmc_priv_data *priv = host->priv; + u32 val = readl(priv->io_drv_reg); + + writel(SD_DLL_DEFAULT, priv->sd_dll_reg); + + val &= ~IO_DRV_SD_DS_MASK; + if (priv && priv->ds) + val |= priv->ds << IO_DRV_SD_DS_OFFSET; + writel(val, priv->io_drv_reg); +} + +unsigned int ca_dwmci_get_mmc_clock(struct dwmci_host *host, uint freq) +{ + struct ca_dwmmc_priv_data *priv = host->priv; + u8 sd_clk_sel = readl(priv->sd_dll_reg) & SD_CLK_SEL_MASK; + u8 clk_div; + + switch (sd_clk_sel) { + case 2: + clk_div = 1; + break; + case 1: + clk_div = 2; + break; + default: + clk_div = 4; + } + + return SD_SCLK_MAX / clk_div / (host->div + 1); +} + +static int ca_dwmmc_ofdata_to_platdata(struct udevice *dev) +{ + struct ca_dwmmc_priv_data *priv = dev_get_priv(dev); + struct dwmci_host *host = &priv->host; + u32 tmp; + + host->name = dev->name; + host->dev_index = 0; + + host->buswidth = dev_read_u32_default(dev, "bus-width", 1); + if (host->buswidth != 1 && host->buswidth != 4) + return -EINVAL; + + host->bus_hz = dev_read_u32_default(dev, "max-frequency", 50000000); + priv->ds = dev_read_u32_default(dev, "io_ds", 0x33); + host->fifo_mode = dev_read_bool(dev, "fifo-mode"); + + dev_read_u32(dev, "sd_dll_ctrl", &tmp); + priv->sd_dll_reg = map_sysmem((uintptr_t)tmp, sizeof(uintptr_t)); + if (!priv->sd_dll_reg) + return -EINVAL; + + dev_read_u32(dev, "io_drv_ctrl", &tmp); + priv->io_drv_reg = map_sysmem((uintptr_t)tmp, sizeof(uintptr_t)); + if (!priv->io_drv_reg) + return -EINVAL; + + host->ioaddr = dev_read_addr_ptr(dev); + if (host->ioaddr == (void *)FDT_ADDR_T_NONE) { + printf("DWMMC: base address is invalid\n"); + return -EINVAL; + } + + host->priv = priv; + + return 0; +} + +struct dm_mmc_ops ca_dwmci_dm_ops; + +static int ca_dwmmc_probe(struct udevice *dev) +{ + struct ca_mmc_plat *plat = dev_get_platdata(dev); + struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); + struct ca_dwmmc_priv_data *priv = dev_get_priv(dev); + struct dwmci_host *host = &priv->host; + + memcpy(&ca_dwmci_dm_ops, &dm_dwmci_ops, sizeof(struct dm_mmc_ops)); + + dwmci_setup_cfg(&plat->cfg, host, host->bus_hz, MIN_FREQ); + if (host->buswidth == 1) { + (&plat->cfg)->host_caps &= ~MMC_MODE_8BIT; + (&plat->cfg)->host_caps &= ~MMC_MODE_4BIT; + } + + host->mmc = &plat->mmc; + host->mmc->priv = &priv->host; + upriv->mmc = host->mmc; + host->mmc->dev = dev; + host->clksel = ca_dwmci_clksel; + host->board_init = ca_dwmci_board_init; + host->get_mmc_clk = ca_dwmci_get_mmc_clock; + + return dwmci_probe(dev); +} + +static int ca_dwmmc_bind(struct udevice *dev) +{ + struct ca_mmc_plat *plat = dev_get_platdata(dev); + + return dwmci_bind(dev, &plat->mmc, &plat->cfg); +} + +static const struct udevice_id ca_dwmmc_ids[] = { + { .compatible = "snps,dw-cortina" }, + { } +}; + +U_BOOT_DRIVER(ca_dwmmc_drv) = { + .name = "cortina_dwmmc", + .id = UCLASS_MMC, + .of_match = ca_dwmmc_ids, + .ofdata_to_platdata = ca_dwmmc_ofdata_to_platdata, + .bind = ca_dwmmc_bind, + .ops = &ca_dwmci_dm_ops, + .probe = ca_dwmmc_probe, + .priv_auto_alloc_size = sizeof(struct ca_dwmmc_priv_data), + .platdata_auto_alloc_size = sizeof(struct ca_mmc_plat), +}; -- 2.7.4

1 1

[PATCH] board: nitrogen6x: migrate to CONFIG_DM_VIDEO
by Troy Kisky 20 Feb '20

20 Feb '20

Enable driver model for Video to remove compiler warning. To enable display, issue setenv stdout serial,vidconsole; Add CONFIG_DM_VIDEO to all defconfigs whose board is nitrogen6x. mx6qsabrelite_defconfig nitrogen6dl2g_defconfig nitrogen6dl_defconfig nitrogen6q2g_defconfig nitrogen6q_defconfig nitrogen6s1g_defconfig nitrogen6s_defconfig Signed-off-by: Troy Kisky <troy.kisky(a)boundarydevices.com> diff --git a/arch/arm/dts/imx6qdl-sabrelite.dtsi b/arch/arm/dts/imx6qdl-sabrelite.dtsi index 673a19c3df..86375156b9 100644 --- a/arch/arm/dts/imx6qdl-sabrelite.dtsi +++ b/arch/arm/dts/imx6qdl-sabrelite.dtsi @@ -195,6 +195,15 @@ pwm_lvds = &pwm4; }; + backlight_lvds: backlight-lvds { + brightness-levels = <0 1 2 3 4 5 6 7 8 9 10>; + compatible = "pwm-backlight"; + default-brightness-level = <8>; + power-supply = <&reg_3p3v>; + pwms = <&pwm4 0 5000000>; + status = "okay"; + }; + chosen { stdout-path = &uart2; }; @@ -219,6 +228,17 @@ gpio = GP_REG_USBOTG; enable-active-high; }; + + panel-lvds0 { + backlight = <&backlight_lvds>; + compatible = "hannstar,hsd100pxn1"; + + port { + panel_in: endpoint { + remote-endpoint = <&lvds0_out>; + }; + }; + }; }; &ecspi1 { @@ -281,6 +301,11 @@ }; }; +&hdmi { + ddc-i2c-bus = <&i2c2>; + status = "okay"; +}; + &i2c1 { clock-frequency = <100000>; pinctrl-names = "default", "gpio"; @@ -316,6 +341,22 @@ status = "okay"; }; +&ldb { + status = "okay"; + + lvds-channel@0 { + status = "okay"; + + port@4 { + reg = <4>; + + lvds0_out: endpoint { + remote-endpoint = <&panel_in>; + }; + }; + }; +}; + &pcie { status = "okay"; }; diff --git a/configs/mx6qsabrelite_defconfig b/configs/mx6qsabrelite_defconfig index a85bfe0769..1171192c33 100644 --- a/configs/mx6qsabrelite_defconfig +++ b/configs/mx6qsabrelite_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 +CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_TARGET_NITROGEN6X=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x60000 @@ -9,7 +10,6 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_CMD_HDMIDETECT=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y -# CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,MX6Q,DDR_MB=1024,SABRELITE" CONFIG_BOOTDELAY=3 # CONFIG_USE_BOOTCOMMAND is not set @@ -68,6 +68,6 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_USB_ETHER=y CONFIG_USB_ETH_CDC=y +CONFIG_DM_VIDEO=y +CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_VIDEO_IPUV3=y -CONFIG_VIDEO=y -# CONFIG_VIDEO_SW_CURSOR is not set diff --git a/configs/nitrogen6dl2g_defconfig b/configs/nitrogen6dl2g_defconfig index d10162578a..07814f3ef4 100644 --- a/configs/nitrogen6dl2g_defconfig +++ b/configs/nitrogen6dl2g_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 +CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_TARGET_NITROGEN6X=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 @@ -9,7 +10,6 @@ CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_CMD_HDMIDETECT=y CONFIG_AHCI=y -# CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl2g.cfg,MX6DL,DDR_MB=2048" CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y @@ -72,6 +72,6 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_USB_ETHER=y CONFIG_USB_ETH_CDC=y +CONFIG_DM_VIDEO=y +CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_VIDEO_IPUV3=y -CONFIG_VIDEO=y -# CONFIG_VIDEO_SW_CURSOR is not set diff --git a/configs/nitrogen6dl_defconfig b/configs/nitrogen6dl_defconfig index dd07ce0d58..7a0de9d0e0 100644 --- a/configs/nitrogen6dl_defconfig +++ b/configs/nitrogen6dl_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 +CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_TARGET_NITROGEN6X=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 @@ -9,7 +10,6 @@ CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_CMD_HDMIDETECT=y CONFIG_AHCI=y -# CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl.cfg,MX6DL,DDR_MB=1024" CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y @@ -72,6 +72,6 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_USB_ETHER=y CONFIG_USB_ETH_CDC=y +CONFIG_DM_VIDEO=y +CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_VIDEO_IPUV3=y -CONFIG_VIDEO=y -# CONFIG_VIDEO_SW_CURSOR is not set diff --git a/configs/nitrogen6q2g_defconfig b/configs/nitrogen6q2g_defconfig index 91b85ea708..69698d94a0 100644 --- a/configs/nitrogen6q2g_defconfig +++ b/configs/nitrogen6q2g_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 +CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_TARGET_NITROGEN6X=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 @@ -9,7 +10,6 @@ CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_CMD_HDMIDETECT=y CONFIG_AHCI=y -# CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q2g.cfg,MX6Q,DDR_MB=2048" CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y @@ -74,6 +74,6 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_USB_ETHER=y CONFIG_USB_ETH_CDC=y +CONFIG_DM_VIDEO=y +CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_VIDEO_IPUV3=y -CONFIG_VIDEO=y -# CONFIG_VIDEO_SW_CURSOR is not set diff --git a/configs/nitrogen6q_defconfig b/configs/nitrogen6q_defconfig index 009382fec0..6d11b90f0a 100644 --- a/configs/nitrogen6q_defconfig +++ b/configs/nitrogen6q_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 +CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_TARGET_NITROGEN6X=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 @@ -9,7 +10,6 @@ CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_CMD_HDMIDETECT=y CONFIG_AHCI=y -# CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,MX6Q,DDR_MB=1024" CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y @@ -74,6 +74,6 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_USB_ETHER=y CONFIG_USB_ETH_CDC=y +CONFIG_DM_VIDEO=y +CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_VIDEO_IPUV3=y -CONFIG_VIDEO=y -# CONFIG_VIDEO_SW_CURSOR is not set diff --git a/configs/nitrogen6s1g_defconfig b/configs/nitrogen6s1g_defconfig index c0f4261930..f7fcae4f0a 100644 --- a/configs/nitrogen6s1g_defconfig +++ b/configs/nitrogen6s1g_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 +CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_TARGET_NITROGEN6X=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 @@ -9,7 +10,6 @@ CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_CMD_HDMIDETECT=y CONFIG_AHCI=y -# CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s1g.cfg,MX6S,DDR_MB=1024" CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y @@ -72,6 +72,6 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_USB_ETHER=y CONFIG_USB_ETH_CDC=y +CONFIG_DM_VIDEO=y +CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_VIDEO_IPUV3=y -CONFIG_VIDEO=y -# CONFIG_VIDEO_SW_CURSOR is not set diff --git a/configs/nitrogen6s_defconfig b/configs/nitrogen6s_defconfig index 1dc9d5377a..db557633b7 100644 --- a/configs/nitrogen6s_defconfig +++ b/configs/nitrogen6s_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 +CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_TARGET_NITROGEN6X=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 @@ -9,7 +10,6 @@ CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_CMD_HDMIDETECT=y CONFIG_AHCI=y -# CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s.cfg,MX6S,DDR_MB=512" CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y @@ -72,6 +72,6 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_USB_ETHER=y CONFIG_USB_ETH_CDC=y +CONFIG_DM_VIDEO=y +CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_VIDEO_IPUV3=y -CONFIG_VIDEO=y -# CONFIG_VIDEO_SW_CURSOR is not set -- 2.18.0

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[PATCH] env: ti: boot: Fix Android boot on AM57x EVM
by Sam Protsenko 20 Feb '20

20 Feb '20

When applying DTBO on top of DTB (with "fdt apply" command) on AM57x EVM board, there is not enough memory reserved in RAM for DTB blob. Hence, DTBO can't be merged in DTB. It leads to inability to boot Android with next error message: failed on fdt_overlay_apply(): FDT_ERR_NOSPACE To overcome that issue let's provide 1 MiB of space to keep DTB and all merged DTBO blobs. To do so, "length" parameter should be specified for "fdt addr" command: => fdt addr $fdtaddr 0x100000 Also add size variables to 'adtimg' command invocations, to avoid cluttering the console with DTBO blob sizes. Signed-off-by: Sam Protsenko <joe.skb7(a)gmail.com> --- include/environment/ti/boot.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/include/environment/ti/boot.h b/include/environment/ti/boot.h index 523c8fc4fe..298c972cd0 100644 --- a/include/environment/ti/boot.h +++ b/include/environment/ti/boot.h @@ -103,18 +103,18 @@ "echo \" Reading DTB for AM57x EVM RevA3...\"; " \ "abootimg get dtb --index=0 dtb_start dtb_size; " \ "cp.b $dtb_start $fdtaddr $dtb_size; " \ - "fdt addr $fdtaddr; " \ + "fdt addr $fdtaddr 0x100000; " \ "echo \" Applying DTBOs for AM57x EVM RevA3...\"; " \ "adtimg addr $dtboaddr; " \ - "adtimg get dt --index=0 dtbo0_addr; " \ + "adtimg get dt --index=0 dtbo0_addr dtbo0_size; " \ "fdt apply $dtbo0_addr; " \ - "adtimg get dt --index=1 dtbo1_addr; " \ + "adtimg get dt --index=1 dtbo1_addr dtbo1_size; " \ "fdt apply $dtbo1_addr; " \ "elif test $board_name = beagle_x15_revc; then " \ "echo \" Reading DTB for Beagle X15 RevC...\"; " \ "abootimg get dtb --index=0 dtb_start dtb_size; " \ "cp.b $dtb_start $fdtaddr $dtb_size; " \ - "fdt addr $fdtaddr; " \ + "fdt addr $fdtaddr 0x100000; " \ "else " \ "echo Error: Android boot is not supported for $board_name; " \ "exit; " \ -- 2.24.1

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Please pull mmc mmc-2-20-2020
by Peng Fan 20 Feb '20

20 Feb '20

Hi Tom Please pull mmc-2-20-2020. I redo CI with Masahiro's fix, and no issue. ------------------------------------ sdhci: code clean-up and fix cache coherency problem enable cache snooping on mpc830x Fix build error when MMC_WRITE disabled ------------------------------------ CI: https://travis-ci.org/MrVan/u-boot/builds/652853505 Thanks, Peng. The following changes since commit f2a73d6867ef973fbb8471cc87058205999b5e5c: Merge tag 'u-boot-stm32-20200214' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm (2020-02-14 07:31:47 -0500) are available in the Git repository at: https://gitlab.denx.de/u-boot/custodians/u-boot-mmc.git tags/mmc-2-20-2020 for you to fetch changes up to 4155ad9aac9474610038b525da9eec8ad9afbc12: mmc: sdhci: fix missing cache invalidation after reading by DMA (2020-02-20 15:09:57 +0800) ---------------------------------------------------------------- Bharat Kumar Reddy Gooty (1): drivers: mmc: rpmb: Use R1 response Jaehoon Chung (1): mmc: fix the build error when MMC_WRITE is disabled Masahiro Yamada (14): mmc: sdhci-cadence: send tune request twice to work around errata mmc: check the return value of mmc_select_mode_and_width() mmc: remove unneeded forward declarations dma-mapping: fix the prototype of dma_map_single() dma-mapping: fix the prototype of dma_unmap_single() dma-mapping: move dma_map_(un)single() to <linux/dma-mapping.h> dma-mapping: add <asm/dma-mapping.h> for all architectures mmc: sdhci: put the aligned buffer pointer to struct sdhci_host mmc: sdhci: reduce code duplication for aligned buffer mmc: sdhci: use lower_32_bit2() and upper_32_bits() for setting adma_addr mmc: sdhci: remove unneeded casts mmc: add mmc_get_dma_dir() helper mmc: sdhci: use dma_map_single() instead of flush_cache() before DMA mmc: sdhci: fix missing cache invalidation after reading by DMA Rasmus Villemoes (1): mmc: fsl_esdhc: actually enable cache snooping on mpc830x arch/arc/include/asm/dma-mapping.h | 1 + arch/arm/include/asm/dma-mapping.h | 29 +---------------------------- arch/m68k/include/asm/dma-mapping.h | 1 + arch/microblaze/include/asm/dma-mapping.h | 1 + arch/mips/include/asm/dma-mapping.h | 1 + arch/nds32/include/asm/dma-mapping.h | 27 +-------------------------- arch/powerpc/include/asm/dma-mapping.h | 1 + arch/riscv/include/asm/dma-mapping.h | 29 +---------------------------- arch/sandbox/include/asm/dma-mapping.h | 1 + arch/sh/include/asm/dma-mapping.h | 1 + arch/x86/include/asm/dma-mapping.h | 29 +---------------------------- arch/xtensa/include/asm/dma-mapping.h | 1 + drivers/dma/ti/k3-udma.c | 2 +- drivers/mmc/fsl_esdhc.c | 15 +++++++++++++-- drivers/mmc/mmc.c | 8 +++----- drivers/mmc/rpmb.c | 5 +++++ drivers/mmc/sdhci-cadence.c | 21 +++++++++++++++++---- drivers/mmc/sdhci.c | 96 ++++++++++++++++++++++++++++++++++++++++++++++-------------------------------------------------- drivers/mmc/tmio-common.c | 5 ++--- drivers/mtd/nand/raw/denali.c | 5 ++--- drivers/net/altera_tse.c | 2 +- drivers/net/ftmac110.c | 2 +- drivers/net/macb.c | 4 ++-- drivers/soc/ti/k3-navss-ringacc.c | 2 +- drivers/ufs/ufs.c | 2 +- drivers/usb/cdns3/gadget.c | 2 +- drivers/usb/dwc3/core.c | 8 ++++---- drivers/usb/dwc3/gadget.c | 2 +- drivers/usb/gadget/udc/udc-core.c | 4 ++-- include/linux/dma-mapping.h | 63 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ include/mmc.h | 6 ++++++ include/sdhci.h | 3 +++ 32 files changed, 187 insertions(+), 192 deletions(-) create mode 100644 arch/arc/include/asm/dma-mapping.h create mode 100644 arch/m68k/include/asm/dma-mapping.h create mode 100644 arch/microblaze/include/asm/dma-mapping.h create mode 100644 arch/mips/include/asm/dma-mapping.h create mode 100644 arch/powerpc/include/asm/dma-mapping.h create mode 100644 arch/sandbox/include/asm/dma-mapping.h create mode 100644 arch/sh/include/asm/dma-mapping.h create mode 100644 arch/xtensa/include/asm/dma-mapping.h create mode 100644 include/linux/dma-mapping.h

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[PATCH 1/4] wdt: Add CONFIG_DESIGNWARE_WATCHDOG to Kconfig
by Sean Anderson 20 Feb '20

20 Feb '20

Currently this is set from headers. No board has this set by default, so we don't need to modify any configs. --- drivers/watchdog/Kconfig | 7 +++++++ include/configs/socfpga_common.h | 1 - include/configs/socfpga_soc64_common.h | 1 - 3 files changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index 8c16d69d33..b717eebe3c 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -176,6 +176,13 @@ config WDT_TANGIER Intel Tangier SoC. If you're using a board with Intel Tangier SoC, say Y here. +config DESIGNWARE_WATCHDOG + bool "Synopsys Designware watchdog timer support" + select HW_WATCHDOG if !WDT + help + Enable support for the Synopsys Designware watchdog timer, which can + be found on Altera socfpgas, and on Kendryte CPUs. + config SPL_WDT bool "Enable driver model for watchdog timer drivers in SPL" depends on SPL_DM diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 05bfef75c0..5329b19af2 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -105,7 +105,6 @@ * L4 Watchdog */ #ifdef CONFIG_HW_WATCHDOG -#define CONFIG_DESIGNWARE_WATCHDOG #define CONFIG_DW_WDT_BASE SOCFPGA_L4WD0_ADDRESS #define CONFIG_DW_WDT_CLOCK_KHZ 25000 #endif diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index 4afadafd35..159e60ec6e 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -152,7 +152,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); */ #ifdef CONFIG_SPL_BUILD #define CONFIG_HW_WATCHDOG -#define CONFIG_DESIGNWARE_WATCHDOG #define CONFIG_DW_WDT_BASE SOCFPGA_L4WD0_ADDRESS #ifdef CONFIG_TARGET_SOCFPGA_STRATIX10 #ifndef __ASSEMBLY__ -- 2.25.0

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[PATCH v1] Revert "x86: use invd instead of wbinvd in real mode start code"
by Andy Shevchenko 20 Feb '20

20 Feb '20

This reverts commit 0d67fac29f3187e67f4fd3ef15f73e91be2fad12. As real hardware testing (*) shows the above mentioned commit breaks U-Boot on it. Revert for the upcoming release. We may get more information in the future and optimize the code accordingly. (*) om Intel Edison board. Signed-off-by: Andy Shevchenko <andriy.shevchenko(a)linux.intel.com> --- arch/x86/cpu/start.S | 2 +- arch/x86/cpu/start16.S | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/x86/cpu/start.S b/arch/x86/cpu/start.S index 26cf995db2..01524635e9 100644 --- a/arch/x86/cpu/start.S +++ b/arch/x86/cpu/start.S @@ -50,7 +50,7 @@ _x86boot_start: movl %cr0, %eax orl $(X86_CR0_NW | X86_CR0_CD), %eax movl %eax, %cr0 - invd + wbinvd /* * Zero the BIST (Built-In Self Test) value since we don't have it. diff --git a/arch/x86/cpu/start16.S b/arch/x86/cpu/start16.S index 292e750508..54f4ff6662 100644 --- a/arch/x86/cpu/start16.S +++ b/arch/x86/cpu/start16.S @@ -28,7 +28,7 @@ start16: movl %cr0, %eax orl $(X86_CR0_NW | X86_CR0_CD), %eax movl %eax, %cr0 - invd + wbinvd /* load the temporary Global Descriptor Table */ data32 cs lidt idt_ptr -- 2.25.0

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