December 2020 - U-Boot

[PATCH v2] mmc: fsl_esdhc_imx: add wait_dat0() support
by haibo.chen＠nxp.com 08 Dec '20

08 Dec '20

From: Haibo Chen <haibo.chen(a)nxp.com> Add wait_dat0() support, upper layer will use this callback. Signed-off-by: Haibo Chen <haibo.chen(a)nxp.com> --- drivers/mmc/fsl_esdhc_imx.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c index 22040c67a8..29592d1f2c 100644 --- a/drivers/mmc/fsl_esdhc_imx.c +++ b/drivers/mmc/fsl_esdhc_imx.c @@ -1646,6 +1646,20 @@ static int fsl_esdhc_set_enhanced_strobe(struct udevice *dev) } #endif +static int fsl_esdhc_wait_dat0(struct udevice *dev, int state, + int timeout_us) +{ + int ret; + u32 tmp; + struct fsl_esdhc_priv *priv = dev_get_priv(dev); + struct fsl_esdhc *regs = priv->esdhc_regs; + + ret = readx_poll_timeout(esdhc_read32, &regs->prsstat, tmp, + !!(tmp & PRSSTAT_DAT0) == !!state, + timeout_us); + return ret; +} + static const struct dm_mmc_ops fsl_esdhc_ops = { .get_cd = fsl_esdhc_get_cd, .send_cmd = fsl_esdhc_send_cmd, @@ -1656,6 +1670,7 @@ static const struct dm_mmc_ops fsl_esdhc_ops = { #if CONFIG_IS_ENABLED(MMC_HS400_ES_SUPPORT) .set_enhanced_strobe = fsl_esdhc_set_enhanced_strobe, #endif + .wait_dat0 = fsl_esdhc_wait_dat0, }; #endif -- 2.17.1

3 2

[PATCH] imx8mp_evk: README instruction fixes
by Baruch Siach 08 Dec '20

08 Dec '20

Use the full name of firmware self extracting file to make it run. Also, don't use sudo when not needed. Signed-off-by: Baruch Siach <baruch(a)tkos.co.il> --- This time add the u-boot list to Cc. --- board/freescale/imx8mp_evk/README | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/board/freescale/imx8mp_evk/README b/board/freescale/imx8mp_evk/README index 7dd3a9352a57..0c65a894bb1a 100644 --- a/board/freescale/imx8mp_evk/README +++ b/board/freescale/imx8mp_evk/README @@ -13,17 +13,17 @@ Note: $(srctree) is the U-Boot source directory Get ATF from: https://source.codeaurora.org/external/imx/imx-atf branch: imx_5.4.3_2.0.0 $ make PLAT=imx8mp bl31 -$ sudo cp build/imx8mp/release/bl31.bin $(srctree) +$ cp build/imx8mp/release/bl31.bin $(srctree) Get the ddr firmware ==================== $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.7.bin $ chmod +x firmware-imx-8.7.bin -$ ./firmware-imx-8.7 -$ sudo cp firmware-imx-8.7/firmware/ddr/synopsys/lpddr4_pmu_train_1d_dmem_201904.bin $(srctree)/lpddr4_pmu_train_1d_dmem.bin -$ sudo cp firmware-imx-8.7/firmware/ddr/synopsys/lpddr4_pmu_train_1d_imem_201904.bin $(srctree)/lpddr4_pmu_train_1d_imem.bin -$ sudo cp firmware-imx-8.7/firmware/ddr/synopsys/lpddr4_pmu_train_2d_dmem_201904.bin $(srctree)/lpddr4_pmu_train_2d_dmem.bin -$ sudo cp firmware-imx-8.7/firmware/ddr/synopsys/lpddr4_pmu_train_2d_imem_201904.bin $(srctree)/lpddr4_pmu_train_2d_imem.bin +$ ./firmware-imx-8.7.bin +$ cp firmware-imx-8.7/firmware/ddr/synopsys/lpddr4_pmu_train_1d_dmem_201904.bin $(srctree)/lpddr4_pmu_train_1d_dmem.bin +$ cp firmware-imx-8.7/firmware/ddr/synopsys/lpddr4_pmu_train_1d_imem_201904.bin $(srctree)/lpddr4_pmu_train_1d_imem.bin +$ cp firmware-imx-8.7/firmware/ddr/synopsys/lpddr4_pmu_train_2d_dmem_201904.bin $(srctree)/lpddr4_pmu_train_2d_dmem.bin +$ cp firmware-imx-8.7/firmware/ddr/synopsys/lpddr4_pmu_train_2d_imem_201904.bin $(srctree)/lpddr4_pmu_train_2d_imem.bin Build U-Boot ============ -- 2.28.0

2 1

[PATCH v1] imx: clk: added IPG Clock for I2C on imx8qm
by Oliver Graute 08 Dec '20

08 Dec '20

This patch fixes this clk issue on I2C on imx8qm => i2c bus Bus 3: i2c@5a830000 => i2c dev 3 Setting bus to 3 Failed to enable ipg clk Failure changing bus number (-524) Signed-off-by: Oliver Graute <oliver.graute(a)kococonnector.com> Cc: Stefano Babic <sbabic(a)denx.de> Cc: Peng Fan <peng.fan(a)nxp.com> Cc: uboot-imx <uboot-imx(a)nxp.com> --- drivers/clk/imx/clk-imx8qm.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/drivers/clk/imx/clk-imx8qm.c b/drivers/clk/imx/clk-imx8qm.c index 54fb09fda4..7e466d630a 100644 --- a/drivers/clk/imx/clk-imx8qm.c +++ b/drivers/clk/imx/clk-imx8qm.c @@ -53,19 +53,27 @@ ulong imx8_clk_get_rate(struct clk *clk) resource = SC_R_A53; pm_clk = SC_PM_CLK_CPU; break; + case IMX8QM_I2C0_IPG_CLK: case IMX8QM_I2C0_CLK: + case IMX8QM_I2C0_DIV: resource = SC_R_I2C_0; pm_clk = SC_PM_CLK_PER; break; + case IMX8QM_I2C1_IPG_CLK: case IMX8QM_I2C1_CLK: + case IMX8QM_I2C1_DIV: resource = SC_R_I2C_1; pm_clk = SC_PM_CLK_PER; break; + case IMX8QM_I2C2_IPG_CLK: case IMX8QM_I2C2_CLK: + case IMX8QM_I2C2_DIV: resource = SC_R_I2C_2; pm_clk = SC_PM_CLK_PER; break; + case IMX8QM_I2C3_IPG_CLK: case IMX8QM_I2C3_CLK: + case IMX8QM_I2C3_DIV: resource = SC_R_I2C_3; pm_clk = SC_PM_CLK_PER; break; @@ -148,19 +156,27 @@ ulong imx8_clk_set_rate(struct clk *clk, unsigned long rate) debug("%s(#%lu), rate: %lu\n", __func__, clk->id, rate); switch (clk->id) { + case IMX8QM_I2C0_IPG_CLK: case IMX8QM_I2C0_CLK: + case IMX8QM_I2C0_DIV: resource = SC_R_I2C_0; pm_clk = SC_PM_CLK_PER; break; + case IMX8QM_I2C1_IPG_CLK: case IMX8QM_I2C1_CLK: + case IMX8QM_I2C1_DIV: resource = SC_R_I2C_1; pm_clk = SC_PM_CLK_PER; break; + case IMX8QM_I2C2_IPG_CLK: case IMX8QM_I2C2_CLK: + case IMX8QM_I2C2_DIV: resource = SC_R_I2C_2; pm_clk = SC_PM_CLK_PER; break; + case IMX8QM_I2C3_IPG_CLK: case IMX8QM_I2C3_CLK: + case IMX8QM_I2C3_DIV: resource = SC_R_I2C_3; pm_clk = SC_PM_CLK_PER; break; @@ -242,19 +258,27 @@ int __imx8_clk_enable(struct clk *clk, bool enable) debug("%s(#%lu)\n", __func__, clk->id); switch (clk->id) { + case IMX8QM_I2C0_IPG_CLK: case IMX8QM_I2C0_CLK: + case IMX8QM_I2C0_DIV: resource = SC_R_I2C_0; pm_clk = SC_PM_CLK_PER; break; + case IMX8QM_I2C1_IPG_CLK: case IMX8QM_I2C1_CLK: + case IMX8QM_I2C1_DIV: resource = SC_R_I2C_1; pm_clk = SC_PM_CLK_PER; break; + case IMX8QM_I2C2_IPG_CLK: case IMX8QM_I2C2_CLK: + case IMX8QM_I2C2_DIV: resource = SC_R_I2C_2; pm_clk = SC_PM_CLK_PER; break; + case IMX8QM_I2C3_IPG_CLK: case IMX8QM_I2C3_CLK: + case IMX8QM_I2C3_DIV: resource = SC_R_I2C_3; pm_clk = SC_PM_CLK_PER; break; -- 2.17.1

3 2

U-Boot: spl: partition error (stm32mp157)
by Jagan Teki 08 Dec '20

08 Dec '20

Hi Patrick, Not sure, it's an issue with the current tree, or I may miss something. Any suggestions? U-Boot SPL 2021.01-rc2-00143-g345dd00160-dirty (Dec 07 2020 - 01:48:44 +0530) Model: Engicam i.Core STM32MP1 EDIMM2.2 Starter Kit RAM: DDR3-DDR3L 32bits 528000Khz WDT: Started with servicing (60s timeout) ## Unknown partition table type 0 spl: partition error SPL: failed to boot from all boot devices ### ERROR ### Please RESET the board ### Disk /dev/sda: 29.83 GiB, 32010928128 bytes, 62521344 sectors Disk model: Storage Device Units: sectors of 1 * 512 = 512 bytes Sector size (logical/physical): 512 bytes / 512 bytes I/O size (minimum/optimal): 512 bytes / 512 bytes Disklabel type: gpt Disk identifier: 6524CDDB-929F-4A12-96B2-C04F07403931 Device Start End Sectors Size Type /dev/sda1 34 545 512 256K Linux filesystem /dev/sda2 546 1057 512 256K Linux filesystem /dev/sda3 1058 5153 4096 2M Linux filesystem /dev/sda4 5154 62521310 62516157 29.8G Linux filesystem $ sudo dd if=u-boot-spl.stm32 of=/dev/sda1 $ sudo dd if=u-boot-spl.stm32 of=/dev/sda2 $ sudo dd if=u-boot.img of=/dev/sda3 .config: # # Automatically generated file; DO NOT EDIT. # U-Boot 2021.01-rc2 Configuration # # # Compiler: arm-buildroot-linux-gnueabihf-gcc.br_real (Buildroot 2020.08-849-gdcd4b75069-dirty) 9.3.0 # CONFIG_CREATE_ARCH_SYMLINK=y # CONFIG_ARC is not set CONFIG_ARM=y # CONFIG_M68K is not set # CONFIG_MICROBLAZE is not set # CONFIG_MIPS is not set # CONFIG_NDS32 is not set # CONFIG_NIOS2 is not set # CONFIG_PPC is not set # CONFIG_RISCV is not set # CONFIG_SANDBOX is not set # CONFIG_SH is not set # CONFIG_X86 is not set # CONFIG_XTENSA is not set CONFIG_SYS_ARCH="arm" CONFIG_SYS_CPU="armv7" CONFIG_SYS_SOC="stm32mp" CONFIG_SYS_VENDOR="engicam" CONFIG_SYS_BOARD="stm32mp1" CONFIG_SYS_CONFIG_NAME="stm32mp1" # CONFIG_SYS_ICACHE_OFF is not set # CONFIG_SPL_SYS_ICACHE_OFF is not set # CONFIG_SYS_DCACHE_OFF is not set # CONFIG_SPL_SYS_DCACHE_OFF is not set # # ARM architecture # # CONFIG_GIC_V3_ITS is not set CONFIG_HAS_VBAR=y CONFIG_HAS_THUMB2=y CONFIG_ARM_ASM_UNIFIED=y CONFIG_SYS_ARM_CACHE_CP15=y CONFIG_SYS_ARM_MMU=y # CONFIG_SYS_ARM_MPU is not set CONFIG_CPU_V7A=y CONFIG_SYS_ARM_ARCH=7 CONFIG_SYS_CACHE_SHIFT_6=y CONFIG_SYS_CACHELINE_SIZE=64 CONFIG_SYS_ARM_CACHE_WRITEBACK=y # CONFIG_SYS_ARM_CACHE_WRITETHROUGH is not set # CONFIG_SYS_ARM_CACHE_WRITEALLOC is not set # CONFIG_ARCH_CPU_INIT is not set CONFIG_SYS_ARCH_TIMER=y # CONFIG_ARM_SMCCC is not set # CONFIG_SEMIHOSTING is not set CONFIG_SYS_THUMB_BUILD=y CONFIG_SPL_SYS_THUMB_BUILD=y # CONFIG_SYS_L2CACHE_OFF is not set # CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK is not set CONFIG_USE_ARCH_MEMCPY=y CONFIG_SPL_USE_ARCH_MEMCPY=y CONFIG_USE_ARCH_MEMSET=y CONFIG_SPL_USE_ARCH_MEMSET=y # CONFIG_ARCH_AT91 is not set # CONFIG_TARGET_EDB93XX is not set # CONFIG_TARGET_ASPENITE is not set # CONFIG_TARGET_GPLUGD is not set # CONFIG_ARCH_DAVINCI is not set # CONFIG_ARCH_KIRKWOOD is not set # CONFIG_ARCH_MVEBU is not set # CONFIG_TARGET_APF27 is not set # CONFIG_ARCH_ORION5X is not set # CONFIG_TARGET_SPEAR300 is not set # CONFIG_TARGET_SPEAR310 is not set # CONFIG_TARGET_SPEAR320 is not set # CONFIG_TARGET_SPEAR600 is not set # CONFIG_TARGET_STV0991 is not set # CONFIG_TARGET_X600 is not set # CONFIG_TARGET_FLEA3 is not set # CONFIG_TARGET_MX35PDK is not set # CONFIG_ARCH_BCM283X is not set # CONFIG_ARCH_BCM63158 is not set # CONFIG_ARCH_BCM68360 is not set # CONFIG_ARCH_BCM6858 is not set # CONFIG_TARGET_VEXPRESS_CA15_TC2 is not set # CONFIG_ARCH_BCMSTB is not set # CONFIG_TARGET_VEXPRESS_CA5X2 is not set # CONFIG_TARGET_VEXPRESS_CA9X4 is not set # CONFIG_TARGET_BCM23550_W1D is not set # CONFIG_TARGET_BCM28155_AP is not set # CONFIG_TARGET_BCMCYGNUS is not set # CONFIG_TARGET_BCMNSP is not set # CONFIG_TARGET_BCMNS2 is not set # CONFIG_TARGET_BCMNS3 is not set # CONFIG_ARCH_EXYNOS is not set # CONFIG_ARCH_S5PC1XX is not set # CONFIG_ARCH_HIGHBANK is not set # CONFIG_ARCH_INTEGRATOR is not set # CONFIG_ARCH_IPQ40XX is not set # CONFIG_ARCH_KEYSTONE is not set # CONFIG_ARCH_K3 is not set # CONFIG_ARCH_OMAP2PLUS is not set # CONFIG_ARCH_MESON is not set # CONFIG_ARCH_MEDIATEK is not set # CONFIG_ARCH_LPC32XX is not set # CONFIG_ARCH_IMX8 is not set # CONFIG_ARCH_IMX8M is not set # CONFIG_ARCH_IMXRT is not set # CONFIG_ARCH_MX23 is not set # CONFIG_ARCH_MX25 is not set # CONFIG_ARCH_MX28 is not set # CONFIG_ARCH_MX31 is not set # CONFIG_ARCH_MX7ULP is not set # CONFIG_ARCH_MX7 is not set # CONFIG_ARCH_MX6 is not set CONFIG_SPL_LDSCRIPT="arch/$(ARCH)/cpu/u-boot-spl.lds" # CONFIG_ARCH_MX5 is not set # CONFIG_ARCH_NEXELL is not set # CONFIG_ARCH_OWL is not set # CONFIG_ARCH_QEMU is not set # CONFIG_ARCH_RMOBILE is not set # CONFIG_TARGET_S32V234EVB is not set # CONFIG_ARCH_SNAPDRAGON is not set # CONFIG_ARCH_SOCFPGA is not set # CONFIG_ARCH_SUNXI is not set # CONFIG_ARCH_U8500 is not set # CONFIG_ARCH_VERSAL is not set # CONFIG_ARCH_VF610 is not set # CONFIG_ARCH_ZYNQ is not set # CONFIG_ARCH_ZYNQMP_R5 is not set # CONFIG_ARCH_ZYNQMP is not set # CONFIG_ARCH_TEGRA is not set # CONFIG_TARGET_VEXPRESS64_AEMV8A is not set # CONFIG_TARGET_VEXPRESS64_BASE_FVP is not set # CONFIG_TARGET_VEXPRESS64_JUNO is not set # CONFIG_TARGET_TOTAL_COMPUTE is not set # CONFIG_TARGET_LS2080A_EMU is not set # CONFIG_TARGET_LS2080A_SIMU is not set # CONFIG_TARGET_LS1088AQDS is not set # CONFIG_TARGET_LS2080AQDS is not set # CONFIG_TARGET_LS2080ARDB is not set # CONFIG_TARGET_LS2081ARDB is not set # CONFIG_TARGET_LX2160ARDB is not set # CONFIG_TARGET_LX2160AQDS is not set # CONFIG_TARGET_HIKEY is not set # CONFIG_TARGET_HIKEY960 is not set # CONFIG_TARGET_POPLAR is not set # CONFIG_TARGET_LS1012AQDS is not set # CONFIG_TARGET_LS1012ARDB is not set # CONFIG_TARGET_LS1012A2G5RDB is not set # CONFIG_TARGET_LS1012AFRWY is not set # CONFIG_TARGET_LS1012AFRDM is not set # CONFIG_TARGET_LS1028AQDS is not set # CONFIG_TARGET_LS1028ARDB is not set # CONFIG_TARGET_LS1088ARDB is not set # CONFIG_TARGET_LS1021AQDS is not set # CONFIG_TARGET_LS1021ATWR is not set # CONFIG_TARGET_LS1021ATSN is not set # CONFIG_TARGET_LS1021AIOT is not set # CONFIG_TARGET_LS1043AQDS is not set # CONFIG_TARGET_LS1043ARDB is not set # CONFIG_TARGET_LS1046AQDS is not set # CONFIG_TARGET_LS1046ARDB is not set # CONFIG_TARGET_LS1046AFRWY is not set # CONFIG_TARGET_SL28 is not set # CONFIG_TARGET_COLIBRI_PXA270 is not set # CONFIG_ARCH_UNIPHIER is not set # CONFIG_ARCH_STM32 is not set # CONFIG_ARCH_STI is not set CONFIG_ARCH_STM32MP=y # CONFIG_ARCH_ROCKCHIP is not set # CONFIG_ARCH_OCTEONTX is not set # CONFIG_ARCH_OCTEONTX2 is not set # CONFIG_TARGET_THUNDERX_88XX is not set # CONFIG_ARCH_ASPEED is not set # CONFIG_TARGET_DURIAN is not set # CONFIG_TARGET_PRESIDIO_ASIC is not set # CONFIG_TARGET_XENGUEST_ARM64 is not set CONFIG_ARCH_SUPPORT_TFABOOT=y # CONFIG_TFABOOT is not set CONFIG_SYS_TEXT_BASE=0xC0100000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x3000 CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_MEMTEST_START=0xc0000000 CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x280000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_SYS_MALLOC_LEN=0x2000000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y CONFIG_SPL_TEXT_BASE=0x2FFC2500 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_BOOTCOUNT_BOOTLIMIT=0 CONFIG_SYS_BOOTCOUNT_ADDR=0x5C00A154 CONFIG_SPL_SYS_MALLOC_F_LEN=0x3000 CONFIG_ERR_PTR_OFFSET=0x0 CONFIG_SPL_SIZE_LIMIT=0x0 CONFIG_SPL=y CONFIG_STM32MP15x=y # CONFIG_TARGET_ST_STM32MP15x is not set CONFIG_TARGET_ICORE_STM32MP1=y # CONFIG_TARGET_DH_STM32MP1_PDK2 is not set CONFIG_DDR_CACHEABLE_SIZE=0x40000000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2=1 CONFIG_STM32_ETZPC=y CONFIG_CMD_STM32PROG=y CONFIG_CMD_STM32KEY=y CONFIG_PRE_CON_BUF_ADDR=0xC02FF000 CONFIG_PRE_CON_BUF_SZ=4096 CONFIG_BOOTSTAGE_STASH_ADDR=0xC3000000 CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y # CONFIG_CMD_STBOARD is not set CONFIG_DFU_ALT_RAM0="uImage ram 0xc2000000 0x2000000;devicetree.dtb ram 0xc4000000 0x100000;uramdisk.image.gz ram 0xc4400000 0x10000000" CONFIG_TYPEC_STUSB160X=y CONFIG_ENV_OFFSET_REDUND=0x2C0000 CONFIG_IDENT_STRING="" # CONFIG_SPL_FS_FAT is not set CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_CPU_V7_HAS_NONSEC=y CONFIG_CPU_V7_HAS_VIRT=y CONFIG_ARCH_SUPPORT_PSCI=y CONFIG_ARMV7_NONSEC=y # CONFIG_ARMV7_BOOT_SEC_DEFAULT is not set # CONFIG_ARMV7_VIRT is not set CONFIG_ARMV7_PSCI=y CONFIG_ARMV7_PSCI_1_0=y # CONFIG_ARMV7_PSCI_0_2 is not set # CONFIG_ARMV7_PSCI_0_1 is not set CONFIG_ARMV7_PSCI_NR_CPUS=4 # CONFIG_ARMV7_LPAE is not set # CONFIG_CMD_DEKBLOB is not set # CONFIG_CMD_HDMIDETECT is not set CONFIG_IMX_DCD_ADDR=0x00910000 # # ARM debug # # CONFIG_DEBUG_LL is not set CONFIG_SPL_PAYLOAD="u-boot.bin" CONFIG_BUILD_TARGET="" CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-icore-stm32mp1" # CONFIG_DEBUG_UART is not set # CONFIG_AHCI is not set # CONFIG_OF_BOARD_FIXUP is not set # # General setup # CONFIG_LOCALVERSION="" CONFIG_LOCALVERSION_AUTO=y CONFIG_CC_OPTIMIZE_FOR_SIZE=y # CONFIG_OPTIMIZE_INLINING is not set # CONFIG_SPL_OPTIMIZE_INLINING is not set CONFIG_CC_HAS_ASM_INLINE=y # CONFIG_XEN is not set CONFIG_DISTRO_DEFAULTS=y CONFIG_ENV_VARS_UBOOT_CONFIG=y # CONFIG_SYS_BOOT_GET_CMDLINE is not set # CONFIG_SYS_BOOT_GET_KBD is not set CONFIG_SYS_MALLOC_F=y CONFIG_EXPERT=y CONFIG_SYS_MALLOC_CLEAR_ON_INIT=y # CONFIG_SYS_MALLOC_DEFAULT_TO_INIT is not set # CONFIG_TOOLS_DEBUG is not set # CONFIG_PHYS_64BIT is not set CONFIG_SPL_IMAGE="spl/u-boot-spl.bin" # CONFIG_SYS_CUSTOM_LDSCRIPT is not set CONFIG_PLATFORM_ELFENTRY="_start" CONFIG_STACK_SIZE=0x1000000 CONFIG_SYS_SRAM_BASE=0x0 CONFIG_SYS_SRAM_SIZE=0x0 # CONFIG_EXAMPLES is not set # # API # # CONFIG_API is not set # # Boot options # # # Boot images # CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x0 CONFIG_FIT_ENABLE_SHA256_SUPPORT=y # CONFIG_FIT_ENABLE_SHA384_SUPPORT is not set # CONFIG_FIT_ENABLE_SHA512_SUPPORT is not set # CONFIG_FIT_SIGNATURE is not set # CONFIG_FIT_CIPHER is not set # CONFIG_FIT_VERBOSE is not set # CONFIG_FIT_BEST_MATCH is not set # CONFIG_SPL_FIT is not set # CONFIG_SPL_FIT_SIGNATURE is not set # CONFIG_SPL_LOAD_FIT is not set # CONFIG_SPL_LOAD_FIT_FULL is not set # CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_SYSTEM_SETUP=y # CONFIG_OF_STDOUT_VIA_ALIAS is not set CONFIG_SYS_EXTRA_OPTIONS="" CONFIG_HAVE_SYS_TEXT_BASE=y CONFIG_ARCH_FIXUP_FDT_MEMORY=y # CONFIG_CHROMEOS is not set # CONFIG_CHROMEOS_VBOOT is not set # # Boot timing # CONFIG_BOOTSTAGE=y CONFIG_SPL_BOOTSTAGE=y # CONFIG_TPL_BOOTSTAGE is not set # CONFIG_BOOTSTAGE_REPORT is not set CONFIG_BOOTSTAGE_RECORD_COUNT=30 CONFIG_SPL_BOOTSTAGE_RECORD_COUNT=5 CONFIG_TPL_BOOTSTAGE_RECORD_COUNT=5 # CONFIG_BOOTSTAGE_FDT is not set CONFIG_BOOTSTAGE_STASH=y CONFIG_BOOTSTAGE_STASH_SIZE=0x1000 # CONFIG_SHOW_BOOT_PROGRESS is not set # # Boot media # # CONFIG_NAND_BOOT is not set # CONFIG_ONENAND_BOOT is not set # CONFIG_QSPI_BOOT is not set # CONFIG_SATA_BOOT is not set # CONFIG_SD_BOOT is not set # CONFIG_SPI_BOOT is not set # # Autoboot options # CONFIG_AUTOBOOT=y CONFIG_BOOTDELAY=2 # CONFIG_AUTOBOOT_KEYED is not set # CONFIG_AUTOBOOT_USE_MENUKEY is not set # CONFIG_USE_BOOTARGS is not set CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="" CONFIG_DEFAULT_FDT_FILE="" # # Console # CONFIG_MENU=y # CONFIG_CONSOLE_RECORD is not set CONFIG_DISABLE_CONSOLE=y CONFIG_LOGLEVEL=4 CONFIG_SPL_LOGLEVEL=4 CONFIG_TPL_LOGLEVEL=4 CONFIG_SILENT_CONSOLE=y # CONFIG_SILENT_U_BOOT_ONLY is not set CONFIG_SILENT_CONSOLE_UPDATE_ON_SET=y # CONFIG_SILENT_CONSOLE_UPDATE_ON_RELOC is not set CONFIG_PRE_CONSOLE_BUFFER=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE is not set # CONFIG_SYS_CONSOLE_ENV_OVERWRITE is not set # CONFIG_SYS_CONSOLE_INFO_QUIET is not set # CONFIG_SYS_STDIO_DEREGISTER is not set # CONFIG_SPL_SYS_STDIO_DEREGISTER is not set # CONFIG_SYS_DEVICE_NULLDEV is not set # # Logging # # CONFIG_LOG is not set # # Init options # # CONFIG_BOARD_TYPES is not set CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y # CONFIG_DISPLAY_BOARDINFO_LATE is not set # # Start-up hooks # # CONFIG_ARCH_EARLY_INIT_R is not set CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_EARLY_INIT_F=y # CONFIG_BOARD_EARLY_INIT_R is not set CONFIG_BOARD_LATE_INIT=y # CONFIG_LAST_STAGE_INIT is not set # CONFIG_MISC_INIT_R is not set # # Security support # CONFIG_HASH=y # # Update support # # CONFIG_UPDATE_TFTP is not set # CONFIG_UPDATE_FIT is not set # CONFIG_ANDROID_AB is not set # # Blob list # # CONFIG_BLOBLIST is not set # # SPL / TPL # CONFIG_SUPPORT_SPL=y CONFIG_SPL_FRAMEWORK=y # CONFIG_SPL_FRAMEWORK_BOARD_INIT_F is not set CONFIG_SPL_SYS_STACK_F_CHECK_BYTE=0xaa # CONFIG_SPL_SYS_REPORT_STACK_F_USAGE is not set # # PowerPC and LayerScape SPL Boot options # CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_BOOTROM_SUPPORT is not set # CONFIG_SPL_BOOTCOUNT_LIMIT is not set CONFIG_SPL_RAW_IMAGE_SUPPORT=y CONFIG_SPL_LEGACY_IMAGE_SUPPORT=y # CONFIG_SPL_LEGACY_IMAGE_CRC_CHECK is not set # CONFIG_SPL_SYS_MALLOC_SIMPLE is not set # CONFIG_SPL_STACK_R is not set # CONFIG_SPL_SEPARATE_BSS is not set CONFIG_SPL_BANNER_PRINT=y # CONFIG_SPL_EARLY_BSS is not set CONFIG_SPL_DISPLAY_PRINT=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE is not set # CONFIG_SUPPORT_EMMC_BOOT_OVERRIDE_PART_CONFIG is not set CONFIG_SPL_CRC32_SUPPORT=y # CONFIG_SPL_CACHE_SUPPORT is not set # CONFIG_SPL_CPU_SUPPORT is not set # CONFIG_SPL_CRYPTO_SUPPORT is not set # CONFIG_SPL_HASH_SUPPORT is not set # CONFIG_SPL_DMA is not set CONFIG_SPL_ENV_SUPPORT=y # CONFIG_SPL_SAVEENV is not set # CONFIG_SPL_ETH_SUPPORT is not set # CONFIG_SPL_FS_EXT4 is not set # CONFIG_SPL_FS_SQUASHFS is not set # CONFIG_SPL_FAT_WRITE is not set # CONFIG_SPL_FPGA is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_SPL_DM_MAILBOX is not set CONFIG_SYS_MMCSD_FS_BOOT_PARTITION=1 # CONFIG_SPL_MMC_TINY is not set # CONFIG_SPL_MMC_WRITE is not set # CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT is not set # CONFIG_SPL_MTD_SUPPORT is not set # CONFIG_SPL_MUSB_NEW_SUPPORT is not set # CONFIG_SPL_NAND_SUPPORT is not set # CONFIG_SPL_NAND_DRIVERS is not set # CONFIG_SPL_NAND_ECC is not set # CONFIG_SPL_NAND_SIMPLE is not set # CONFIG_SPL_UBI is not set CONFIG_SPL_DM_SPI_FLASH=y # CONFIG_SPL_NET_SUPPORT is not set # CONFIG_SPL_NO_CPU_SUPPORT is not set # CONFIG_SPL_NOR_SUPPORT is not set # CONFIG_SPL_XIP_SUPPORT is not set # CONFIG_SPL_ONENAND_SUPPORT is not set # CONFIG_SPL_OS_BOOT is not set # CONFIG_SPL_PCI is not set # CONFIG_SPL_PCH_SUPPORT is not set # CONFIG_SPL_POST_MEM_SUPPORT is not set CONFIG_SPL_DM_RESET=y CONFIG_SPL_POWER_SUPPORT=y # CONFIG_SPL_POWER_DOMAIN is not set # CONFIG_SPL_RAM_SUPPORT is not set # CONFIG_SPL_REMOTEPROC is not set # CONFIG_SPL_RTC_SUPPORT is not set # CONFIG_SPL_SATA_SUPPORT is not set CONFIG_SPL_SPI_FLASH_TINY=y # CONFIG_SPL_SPI_FLASH_MTD is not set # CONFIG_SPL_SPI_LOAD is not set # CONFIG_SPL_THERMAL is not set # CONFIG_SPL_USB_HOST_SUPPORT is not set # CONFIG_SPL_USB_GADGET is not set CONFIG_SPL_WATCHDOG_SUPPORT=y # CONFIG_SPL_YMODEM_SUPPORT is not set # CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set # CONFIG_SPL_OPTEE is not set # # Command line interface # CONFIG_CMDLINE=y CONFIG_HUSH_PARSER=y CONFIG_CMDLINE_EDITING=y CONFIG_AUTO_COMPLETE=y CONFIG_SYS_LONGHELP=y CONFIG_SYS_PROMPT="STM32MP> " CONFIG_SYS_XTRACE="y" # # Commands # # # Info commands # # CONFIG_CMD_ACPI is not set CONFIG_CMD_BDI=y # CONFIG_CMD_CONFIG is not set CONFIG_CMD_CONSOLE=y # CONFIG_CMD_CPU is not set # CONFIG_CMD_LICENSE is not set # CONFIG_CMD_PMC is not set # # Boot commands # CONFIG_CMD_BOOTD=y CONFIG_CMD_BOOTM=y CONFIG_BOOTM_EFI=y CONFIG_CMD_BOOTZ=y CONFIG_BOOTM_LINUX=y CONFIG_BOOTM_NETBSD=y # CONFIG_BOOTM_OPENRTOS is not set # CONFIG_BOOTM_OSE is not set CONFIG_BOOTM_PLAN9=y CONFIG_BOOTM_RTEMS=y CONFIG_BOOTM_VXWORKS=y CONFIG_CMD_BOOTEFI=y CONFIG_CMD_BOOTEFI_HELLO_COMPILE=y # CONFIG_CMD_BOOTEFI_HELLO is not set # CONFIG_CMD_BOOTEFI_SELFTEST is not set # CONFIG_CMD_BOOTMENU is not set CONFIG_CMD_ADTIMG=y # CONFIG_CMD_ABOOTIMG is not set CONFIG_CMD_ELF=y CONFIG_CMD_FDT=y CONFIG_CMD_GO=y CONFIG_CMD_RUN=y CONFIG_CMD_IMI=y # CONFIG_CMD_IMLS is not set CONFIG_CMD_XIMG=y # CONFIG_CMD_SPL is not set # CONFIG_CMD_THOR_DOWNLOAD is not set # CONFIG_CMD_ZBOOT is not set # # Environment commands # # CONFIG_CMD_ASKENV is not set CONFIG_CMD_EXPORTENV=y CONFIG_CMD_IMPORTENV=y CONFIG_CMD_EDITENV=y # CONFIG_CMD_GREPENV is not set CONFIG_CMD_SAVEENV=y CONFIG_CMD_ERASEENV=y CONFIG_CMD_ENV_EXISTS=y # CONFIG_CMD_ENV_CALLBACK is not set # CONFIG_CMD_ENV_FLAGS is not set # CONFIG_CMD_NVEDIT_EFI is not set CONFIG_CMD_NVEDIT_INFO=y # CONFIG_CMD_NVEDIT_LOAD is not set # CONFIG_CMD_NVEDIT_SELECT is not set # # Memory commands # # CONFIG_CMD_BINOP is not set # CONFIG_CMD_BLOBLIST is not set CONFIG_CMD_CRC32=y # CONFIG_CRC32_VERIFY is not set # CONFIG_CMD_EEPROM is not set # CONFIG_LOOPW is not set # CONFIG_CMD_MD5SUM is not set CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMORY=y # CONFIG_CMD_MEM_SEARCH is not set # CONFIG_CMD_MX_CYCLIC is not set CONFIG_CMD_RANDOM=y CONFIG_CMD_MEMTEST=y # CONFIG_SYS_ALT_MEMTEST is not set # CONFIG_CMD_SHA1SUM is not set # CONFIG_CMD_STRINGS is not set # # Compression commands # # CONFIG_CMD_LZMADEC is not set # CONFIG_CMD_UNLZ4 is not set # CONFIG_CMD_UNZIP is not set # CONFIG_CMD_ZIP is not set # # Device access commands # # CONFIG_CMD_ARMFLASH is not set CONFIG_CMD_ADC=y # CONFIG_CMD_BCB is not set # CONFIG_CMD_BIND is not set CONFIG_CMD_CLK=y # CONFIG_CMD_DEMO is not set # CONFIG_CMD_DFU is not set CONFIG_CMD_DM=y CONFIG_CMD_FASTBOOT=y # CONFIG_CMD_FPGAD is not set CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_RANDOM_UUID=y # CONFIG_CMD_GPT_RENAME is not set # CONFIG_CMD_IDE is not set # CONFIG_CMD_IO is not set # CONFIG_CMD_IOTRACE is not set CONFIG_CMD_I2C=y CONFIG_CMD_LOADB=y CONFIG_CMD_LOADS=y # CONFIG_CMD_LSBLK is not set # CONFIG_CMD_MISC is not set CONFIG_CMD_MMC=y # CONFIG_CMD_BKOPS_ENABLE is not set # CONFIG_CMD_MMC_SWRITE is not set # CONFIG_CMD_CLONE is not set # CONFIG_CMD_OSD is not set CONFIG_CMD_PART=y # CONFIG_CMD_PCI is not set CONFIG_CMD_PINMUX=y CONFIG_CMD_POWEROFF=y # CONFIG_CMD_READ is not set CONFIG_CMD_REMOTEPROC=y # CONFIG_CMD_SATA is not set # CONFIG_CMD_SAVES is not set # CONFIG_CMD_SCSI is not set # CONFIG_CMD_SDRAM is not set CONFIG_CMD_SF=y # CONFIG_CMD_SF_TEST is not set CONFIG_CMD_SPI=y CONFIG_DEFAULT_SPI_BUS=0 CONFIG_DEFAULT_SPI_MODE=0 # CONFIG_CMD_TSI148 is not set # CONFIG_CMD_UNIVERSE is not set CONFIG_CMD_USB=y # CONFIG_CMD_USB_SDP is not set CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_WDT is not set # # Shell scripting commands # CONFIG_CMD_ECHO=y CONFIG_CMD_ITEST=y CONFIG_CMD_SOURCE=y CONFIG_CMD_SETEXPR=y # # Android support commands # CONFIG_CMD_NET=y CONFIG_CMD_BOOTP=y CONFIG_CMD_DHCP=y CONFIG_BOOTP_BOOTPATH=y CONFIG_BOOTP_DNS=y # CONFIG_BOOTP_DNS2 is not set CONFIG_BOOTP_GATEWAY=y CONFIG_BOOTP_HOSTNAME=y # CONFIG_BOOTP_PREFER_SERVERIP is not set CONFIG_BOOTP_SUBNETMASK=y # CONFIG_BOOTP_NTPSERVER is not set # CONFIG_CMD_PCAP is not set CONFIG_BOOTP_PXE=y CONFIG_BOOTP_PXE_CLIENTARCH=0x15 CONFIG_BOOTP_VCI_STRING="U-Boot.armv7" CONFIG_CMD_TFTPBOOT=y # CONFIG_CMD_TFTPPUT is not set # CONFIG_CMD_TFTPSRV is not set CONFIG_NET_TFTP_VARS=y # CONFIG_CMD_RARP is not set CONFIG_CMD_NFS=y CONFIG_CMD_MII=y CONFIG_CMD_MDIO=y CONFIG_CMD_PING=y # CONFIG_CMD_CDP is not set # CONFIG_CMD_SNTP is not set # CONFIG_CMD_DNS is not set # CONFIG_CMD_LINK_LOCAL is not set # CONFIG_CMD_ETHSW is not set CONFIG_CMD_PXE=y # CONFIG_CMD_WOL is not set # # Misc commands # CONFIG_CMD_BMP=y CONFIG_CMD_BOOTCOUNT=y # CONFIG_CMD_BSP is not set CONFIG_CMD_BLOCK_CACHE=y CONFIG_CMD_CACHE=y # CONFIG_CMD_CONITRACE is not set CONFIG_CMD_CLS=y # CONFIG_CMD_EFIDEBUG is not set # CONFIG_CMD_EXCEPTION is not set CONFIG_CMD_LED=y CONFIG_CMD_DATE=y # CONFIG_CMD_RTC is not set CONFIG_CMD_TIME=y # CONFIG_CMD_GETTIME is not set # CONFIG_CMD_RNG is not set CONFIG_CMD_SLEEP=y # CONFIG_MP is not set CONFIG_CMD_TIMER=y CONFIG_CMD_SYSBOOT=y # CONFIG_CMD_QFW is not set # CONFIG_CMD_PSTORE is not set # CONFIG_CMD_TERMINAL is not set # CONFIG_CMD_UUID is not set # # TI specific command line interface # # CONFIG_CMD_DDR3 is not set CONFIG_CMD_BOOTSTAGE=y # # Power commands # CONFIG_CMD_PMIC=y CONFIG_CMD_REGULATOR=y # # Security commands # # CONFIG_CMD_AES is not set # CONFIG_CMD_BLOB is not set # CONFIG_CMD_HASH is not set # # Firmware commands # # # Filesystem commands # # CONFIG_CMD_BTRFS is not set CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y # CONFIG_CMD_SQUASHFS is not set CONFIG_CMD_FS_GENERIC=y # CONFIG_CMD_FS_UUID is not set # CONFIG_CMD_JFFS2 is not set CONFIG_MTDIDS_DEFAULT="" CONFIG_MTDPARTS_DEFAULT="" # CONFIG_CMD_REISER is not set # CONFIG_CMD_ZFS is not set # # Debug commands # # CONFIG_CMD_BEDBUG is not set # CONFIG_CMD_DIAG is not set # CONFIG_CMD_LOG is not set # CONFIG_CMD_TRACE is not set # CONFIG_CMD_UBI is not set # # Partition Types # CONFIG_PARTITIONS=y # CONFIG_MAC_PARTITION is not set # CONFIG_SPL_MAC_PARTITION is not set CONFIG_DOS_PARTITION=y # CONFIG_SPL_DOS_PARTITION is not set CONFIG_ISO_PARTITION=y # CONFIG_SPL_ISO_PARTITION is not set # CONFIG_AMIGA_PARTITION is not set # CONFIG_SPL_AMIGA_PARTITION is not set CONFIG_EFI_PARTITION=y CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=128 CONFIG_EFI_PARTITION_ENTRIES_OFF=0 CONFIG_SPL_EFI_PARTITION=y CONFIG_PARTITION_UUIDS=y CONFIG_SPL_PARTITION_UUIDS=y CONFIG_PARTITION_TYPE_GUID=y CONFIG_SUPPORT_OF_CONTROL=y CONFIG_DTC=y # # Device Tree Control # CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y # CONFIG_OF_LIVE is not set CONFIG_OF_SEPARATE=y # CONFIG_OF_EMBED is not set # CONFIG_OF_BOARD is not set # CONFIG_OF_PRIOR_STAGE is not set # CONFIG_MULTI_DTB_FIT is not set CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-names interrupts-extended interrupt-controller \\\#interrupt-cells interrupt-parent dmas dma-names assigned-clocks assigned-clock-rates assigned-clock-parents hwlocks" # CONFIG_OF_DTB_PROPS_REMOVE is not set # CONFIG_SPL_OF_PLATDATA is not set # # Environment # CONFIG_ENV_SUPPORT=y CONFIG_SAVEENV=y # CONFIG_ENV_OVERWRITE is not set CONFIG_ENV_IS_NOWHERE=y # CONFIG_ENV_IS_IN_EEPROM is not set # CONFIG_ENV_IS_IN_FAT is not set # CONFIG_ENV_IS_IN_EXT4 is not set # CONFIG_ENV_IS_IN_FLASH is not set CONFIG_ENV_IS_IN_MMC=y # CONFIG_ENV_IS_IN_NAND is not set # CONFIG_ENV_IS_IN_NVRAM is not set # CONFIG_ENV_IS_IN_ONENAND is not set # CONFIG_ENV_IS_IN_REMOTE is not set CONFIG_ENV_IS_IN_SPI_FLASH=y # CONFIG_USE_ENV_SPI_BUS is not set # CONFIG_USE_ENV_SPI_CS is not set # CONFIG_USE_ENV_SPI_MAX_HZ is not set # CONFIG_USE_ENV_SPI_MODE is not set # CONFIG_ENV_SPI_EARLY is not set CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_ENV_ADDR=0x0 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=0 CONFIG_SYS_MMC_ENV_PART=0 # CONFIG_USE_DEFAULT_ENV_FILE is not set CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y # CONFIG_ENV_APPEND is not set # CONFIG_ENV_WRITEABLE_LIST is not set # CONFIG_ENV_ACCESS_IGNORE_FORCE is not set # CONFIG_SPL_ENV_IS_NOWHERE is not set CONFIG_SPL_ENV_IS_IN_MMC=y # CONFIG_SPL_ENV_IS_IN_SPI_FLASH is not set # CONFIG_VERSION_VARIABLE is not set CONFIG_NET=y # CONFIG_PROT_UDP is not set # CONFIG_BOOTP_SEND_HOSTNAME is not set # CONFIG_NET_RANDOM_ETHADDR is not set # CONFIG_NETCONSOLE is not set # CONFIG_IP_DEFRAG is not set CONFIG_TFTP_BLOCKSIZE=1468 CONFIG_TFTP_WINDOWSIZE=1 # # Device Drivers # # # Generic Driver Options # CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_DM_WARN=y # CONFIG_SPL_DM_WARN is not set # CONFIG_DM_DEBUG is not set CONFIG_DM_DEVICE_REMOVE=y # CONFIG_SPL_DM_DEVICE_REMOVE is not set CONFIG_DM_STDIO=y CONFIG_DM_SEQ_ALIAS=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y CONFIG_SYSCON=y CONFIG_SPL_SYSCON=y # CONFIG_DEVRES is not set CONFIG_SIMPLE_BUS=y CONFIG_SPL_SIMPLE_BUS=y CONFIG_OF_TRANSLATE=y CONFIG_SPL_OF_TRANSLATE=y # CONFIG_TRANSLATION_OFFSET is not set CONFIG_DM_DEV_READ_INLINE=y # CONFIG_ACPIGEN is not set # CONFIG_BOUNCE_BUFFER is not set CONFIG_ADC=y # CONFIG_ADC_EXYNOS is not set # CONFIG_ADC_SANDBOX is not set # CONFIG_SARADC_MESON is not set # CONFIG_SARADC_ROCKCHIP is not set CONFIG_STM32_ADC=y # CONFIG_SATA is not set # CONFIG_SCSI_AHCI is not set # # SATA/SCSI device support # # CONFIG_DWC_AHSATA is not set # CONFIG_FSL_SATA is not set # CONFIG_MVSATA_IDE is not set # CONFIG_SATA_MV is not set # CONFIG_SATA_SIL is not set # CONFIG_SATA_SIL3114 is not set # CONFIG_AXI is not set # # Bus devices # CONFIG_BLK=y CONFIG_HAVE_BLOCK_DEVICE=y CONFIG_SPL_BLK=y CONFIG_BLOCK_CACHE=y # CONFIG_SPL_BLOCK_CACHE is not set # CONFIG_IDE is not set CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_GENERIC=y # CONFIG_BOOTCOUNT_EXT is not set # CONFIG_BOOTCOUNT_ENV is not set # CONFIG_BOOTCOUNT_RAM is not set # CONFIG_BOOTCOUNT_I2C is not set # CONFIG_DM_BOOTCOUNT is not set CONFIG_SYS_BOOTCOUNT_MAGIC=0xB001C041 # # Button Support # # CONFIG_BUTTON is not set # # Cache Controller drivers # # CONFIG_CACHE is not set # CONFIG_L2X0_CACHE is not set # CONFIG_NCORE_CACHE is not set # # Clock # CONFIG_CLK=y CONFIG_SPL_CLK=y # CONFIG_SPL_CLK_CCF is not set # CONFIG_CLK_CCF is not set CONFIG_CLK_STM32MP1=y # CONFIG_CLK_CDCE9XX is not set # CONFIG_CLK_AT91 is not set # CONFIG_CLK_SIFIVE is not set # CONFIG_ICS8N3QV01 is not set # CONFIG_CLK_MPC83XX is not set # CONFIG_CPU is not set # # Hardware crypto devices # # CONFIG_FSL_CAAM is not set # CONFIG_SYS_FSL_SEC_BE is not set # CONFIG_SYS_FSL_SEC_LE is not set # # Demo for driver model # # CONFIG_DM_DEMO is not set # # DFU support # CONFIG_DFU=y CONFIG_DFU_OVER_USB=y # CONFIG_DFU_TFTP is not set # CONFIG_DFU_TIMEOUT is not set CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y # CONFIG_DFU_SF is not set CONFIG_DFU_VIRT=y CONFIG_SET_DFU_ALT_INFO=y # # DMA Support # # CONFIG_DMA is not set # CONFIG_TI_EDMA3 is not set # # Fastboot support # CONFIG_FASTBOOT=y CONFIG_USB_FUNCTION_FASTBOOT=y # CONFIG_UDP_FUNCTION_FASTBOOT is not set CONFIG_FASTBOOT_BUF_ADDR=0xC0000000 CONFIG_FASTBOOT_BUF_SIZE=0x02000000 CONFIG_FASTBOOT_USB_DEV=1 CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC=y CONFIG_FASTBOOT_FLASH_MMC_DEV=1 CONFIG_FASTBOOT_GPT_NAME="gpt" CONFIG_FASTBOOT_MBR_NAME="mbr" # CONFIG_FASTBOOT_CMD_OEM_FORMAT is not set # CONFIG_FIRMWARE is not set # CONFIG_ZYNQMP_FIRMWARE is not set # CONFIG_SCMI_FIRMWARE is not set # # FPGA support # # CONFIG_FPGA_ALTERA is not set # CONFIG_FPGA_SOCFPGA is not set # CONFIG_FPGA_XILINX is not set # # GPIO Support # CONFIG_SPL_DM_GPIO=y CONFIG_GPIO_HOG=y # CONFIG_DM_GPIO_LOOKUP_LABEL is not set # CONFIG_SPL_DM_GPIO_LOOKUP_LABEL is not set # CONFIG_ALTERA_PIO is not set # CONFIG_DWAPB_GPIO is not set # CONFIG_AT91_GPIO is not set # CONFIG_ATMEL_PIO4 is not set # CONFIG_DA8XX_GPIO is not set # CONFIG_INTEL_BROADWELL_GPIO is not set # CONFIG_INTEL_GPIO is not set # CONFIG_INTEL_ICH6_GPIO is not set # CONFIG_IMX_RGPIO2P is not set # CONFIG_IPROC_GPIO is not set # CONFIG_HSDK_CREG_GPIO is not set # CONFIG_LPC32XX_GPIO is not set # CONFIG_MSM_GPIO is not set # CONFIG_MXC_GPIO is not set # CONFIG_MXS_GPIO is not set # CONFIG_CMD_PCA953X is not set # CONFIG_PCF8575_GPIO is not set # CONFIG_ROCKCHIP_GPIO is not set # CONFIG_XILINX_GPIO is not set # CONFIG_CMD_TCA642X is not set # CONFIG_TEGRA_GPIO is not set # CONFIG_TEGRA186_GPIO is not set # CONFIG_VYBRID_GPIO is not set CONFIG_STM32_GPIO=y # CONFIG_SIFIVE_GPIO is not set # CONFIG_ZYNQ_GPIO is not set # CONFIG_DM_74X164 is not set # CONFIG_DM_PCA953X is not set # CONFIG_SPL_DM_PCA953X is not set # CONFIG_MPC8XXX_GPIO is not set # CONFIG_NX_GPIO is not set # # Hardware Spinlock Support # CONFIG_DM_HWSPINLOCK=y CONFIG_HWSPINLOCK_STM32=y # # I2C support # CONFIG_DM_I2C=y # CONFIG_I2C_SET_DEFAULT_BUS_NUM is not set # CONFIG_DM_I2C_GPIO is not set # CONFIG_SYS_I2C_IPROC is not set # CONFIG_SYS_I2C_FSL is not set # CONFIG_SYS_I2C_CADENCE is not set # CONFIG_SYS_I2C_DW is not set # CONFIG_SYS_I2C_INTEL is not set # CONFIG_SYS_I2C_IMX_LPI2C is not set # CONFIG_SYS_I2C_MXC is not set # CONFIG_SYS_I2C_NEXELL is not set # CONFIG_SYS_I2C_ROCKCHIP is not set CONFIG_SYS_I2C_STM32F7=y # CONFIG_SYS_I2C_MVTWSI is not set # CONFIG_SYS_I2C_XILINX_XIIC is not set # CONFIG_SYS_I2C_IHS is not set # CONFIG_I2C_MUX is not set CONFIG_INPUT=y # CONFIG_SPL_INPUT is not set # CONFIG_DM_KEYBOARD is not set # CONFIG_SPL_DM_KEYBOARD is not set # CONFIG_CROS_EC_KEYB is not set # CONFIG_TEGRA_KEYBOARD is not set # CONFIG_TWL4030_INPUT is not set # # LED Support # CONFIG_LED=y # CONFIG_LED_BLINK is not set # CONFIG_SPL_LED is not set CONFIG_LED_GPIO=y # CONFIG_LED_STATUS is not set # # Mailbox Controller Support # CONFIG_DM_MAILBOX=y CONFIG_STM32_IPCC=y # # Memory Controller drivers # CONFIG_STM32_FMC2_EBI=y # # Multifunction device drivers # CONFIG_MISC=y # CONFIG_SPL_MISC is not set # CONFIG_ALTERA_SYSID is not set # CONFIG_ATSHA204A is not set # CONFIG_ROCKCHIP_EFUSE is not set # CONFIG_ROCKCHIP_OTP is not set # CONFIG_SIFIVE_OTP is not set # CONFIG_VEXPRESS_CONFIG is not set # CONFIG_CROS_EC is not set # CONFIG_SPL_CROS_EC is not set # CONFIG_DS4510 is not set # CONFIG_FSL_SEC_MON is not set # CONFIG_NUVOTON_NCT6102D is not set # CONFIG_PWRSEQ is not set # CONFIG_PCA9551_LED is not set CONFIG_STM32MP_FUSE=y CONFIG_STM32_RCC=y # CONFIG_TWL4030_LED is not set # CONFIG_WINBOND_W83627 is not set # CONFIG_I2C_EEPROM is not set # CONFIG_SPL_I2C_EEPROM is not set # CONFIG_GDSYS_RXAUI_CTRL is not set # CONFIG_GDSYS_IOEP is not set # CONFIG_MPC83XX_SERDES is not set # CONFIG_FS_LOADER is not set # CONFIG_GDSYS_SOC is not set # CONFIG_IHS_FPGA is not set # CONFIG_MICROCHIP_FLEXCOM is not set # CONFIG_ESM_PMIC is not set # # MMC Host controller Support # CONFIG_MMC=y CONFIG_MMC_WRITE=y # CONFIG_MMC_BROKEN_CD is not set CONFIG_DM_MMC=y CONFIG_SPL_DM_MMC=y # CONFIG_MMC_SPI is not set # CONFIG_ARM_PL180_MMCI is not set CONFIG_MMC_QUIRKS=y CONFIG_MMC_HW_PARTITIONING=y # CONFIG_SUPPORT_EMMC_RPMB is not set CONFIG_SUPPORT_EMMC_BOOT=y # CONFIG_MMC_IO_VOLTAGE is not set # CONFIG_SPL_MMC_IO_VOLTAGE is not set # CONFIG_MMC_HS400_ES_SUPPORT is not set # CONFIG_SPL_MMC_HS400_ES_SUPPORT is not set # CONFIG_MMC_HS400_SUPPORT is not set # CONFIG_SPL_MMC_HS400_SUPPORT is not set # CONFIG_MMC_HS200_SUPPORT is not set # CONFIG_SPL_MMC_HS200_SUPPORT is not set CONFIG_MMC_VERBOSE=y # CONFIG_MMC_TRACE is not set # CONFIG_MMC_DW is not set # CONFIG_MMC_MXC is not set # CONFIG_MMC_PCI is not set # CONFIG_PXA_MMC_GENERIC is not set # CONFIG_MMC_OMAP_HS is not set # CONFIG_MMC_SDHCI is not set CONFIG_STM32_SDMMC2=y # CONFIG_FTSDC010 is not set # CONFIG_FSL_ESDHC is not set # CONFIG_FSL_ESDHC_IMX is not set # # MTD Support # CONFIG_MTD_PARTITIONS=y # CONFIG_MTD is not set # CONFIG_DM_MTD is not set # CONFIG_MTD_NOR_FLASH is not set # CONFIG_FLASH_CFI_DRIVER is not set # CONFIG_HBMC_AM654 is not set # CONFIG_MTD_RAW_NAND is not set # # SPI Flash Support # CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=0 CONFIG_SF_DEFAULT_CS=0 CONFIG_SF_DEFAULT_MODE=3 CONFIG_SF_DEFAULT_SPEED=1000000 # CONFIG_SPI_FLASH_SFDP_SUPPORT is not set # CONFIG_SPI_FLASH_BAR is not set # CONFIG_SF_DUAL_FLASH is not set # CONFIG_SPI_FLASH_ATMEL is not set # CONFIG_SPI_FLASH_EON is not set # CONFIG_SPI_FLASH_GIGADEVICE is not set # CONFIG_SPI_FLASH_ISSI is not set CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_SPI_FLASH_SST is not set CONFIG_SPI_FLASH_WINBOND=y # CONFIG_SPI_FLASH_XMC is not set # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set # CONFIG_SPI_FLASH_DATAFLASH is not set # # UBI support # CONFIG_UBI_SILENCE_MSG=y CONFIG_MTD_UBI=y CONFIG_MTD_UBI_WL_THRESHOLD=4096 CONFIG_MTD_UBI_BEB_LIMIT=20 # CONFIG_MTD_UBI_FASTMAP is not set # # Multiplexer drivers # # CONFIG_MULTIPLEXER is not set # CONFIG_BITBANGMII is not set # CONFIG_MV88E6352_SWITCH is not set CONFIG_PHYLIB=y # CONFIG_PHY_ADDR_ENABLE is not set # CONFIG_B53_SWITCH is not set # CONFIG_MV88E61XX_SWITCH is not set # CONFIG_PHYLIB_10G is not set # CONFIG_PHY_AQUANTIA is not set # CONFIG_PHY_ATHEROS is not set # CONFIG_PHY_BROADCOM is not set # CONFIG_PHY_CORTINA is not set # CONFIG_PHY_DAVICOM is not set # CONFIG_PHY_ET1011C is not set # CONFIG_PHY_LXT is not set # CONFIG_PHY_MARVELL is not set # CONFIG_PHY_MESON_GXL is not set # CONFIG_PHY_MICREL is not set # CONFIG_PHY_MSCC is not set # CONFIG_PHY_NATSEMI is not set CONFIG_PHY_REALTEK=y # CONFIG_RTL8211E_PINE64_GIGABIT_FIX is not set # CONFIG_RTL8211X_PHY_FORCE_MASTER is not set # CONFIG_RTL8211F_PHY_FORCE_EEE_RXC_ON is not set # CONFIG_RTL8201F_PHY_S700_RMII_TIMINGS is not set # CONFIG_PHY_SMSC is not set # CONFIG_PHY_TERANETICS is not set # CONFIG_PHY_TI is not set # CONFIG_PHY_TI_DP83867 is not set # CONFIG_PHY_TI_GENERIC is not set # CONFIG_PHY_VITESSE is not set # CONFIG_PHY_XILINX is not set # CONFIG_PHY_XILINX_GMII2RGMII is not set # CONFIG_PHY_FIXED is not set # CONFIG_PHY_NCSI is not set # CONFIG_FSL_PFE is not set CONFIG_DM_ETH=y # CONFIG_DM_MDIO is not set # CONFIG_DM_ETH_PHY is not set CONFIG_NETDEVICES=y # CONFIG_PHY_GIGE is not set # CONFIG_ALTERA_TSE is not set # CONFIG_BCM_SF2_ETH is not set # CONFIG_BCMGENET is not set CONFIG_DWC_ETH_QOS=y # CONFIG_DWC_ETH_QOS_IMX is not set CONFIG_DWC_ETH_QOS_STM32=y # CONFIG_DWC_ETH_QOS_TEGRA186 is not set # CONFIG_EEPRO100 is not set # CONFIG_ETH_DESIGNWARE is not set # CONFIG_ETHOC is not set # CONFIG_FMAN_ENET is not set # CONFIG_FTMAC100 is not set # CONFIG_FTGMAC100 is not set # CONFIG_MCFFEC is not set # CONFIG_FSLDMAFEC is not set # CONFIG_KS8851_MLL is not set # CONFIG_MACB is not set # CONFIG_RGMII is not set # CONFIG_MII is not set # CONFIG_PCNET is not set # CONFIG_QE_UEC is not set # CONFIG_RTL8139 is not set # CONFIG_RTL8169 is not set # CONFIG_SMC911X is not set # CONFIG_SUN7I_GMAC is not set # CONFIG_SUN4I_EMAC is not set # CONFIG_SUN8I_EMAC is not set # CONFIG_SH_ETHER is not set # CONFIG_DRIVER_TI_CPSW is not set # CONFIG_DRIVER_TI_EMAC is not set # CONFIG_DRIVER_TI_KEYSTONE_NET is not set # CONFIG_XILINX_AXIEMAC is not set # CONFIG_XILINX_EMACLITE is not set # CONFIG_ZYNQ_GEM is not set # CONFIG_SYS_DPAA_QBMAN is not set # CONFIG_TSEC_ENET is not set # CONFIG_MEDIATEK_ETH is not set # CONFIG_HIGMACV300_ETH is not set # CONFIG_PCI is not set # # PCI Endpoint # # CONFIG_PCI_ENDPOINT is not set # CONFIG_X86_PCH7 is not set # CONFIG_X86_PCH9 is not set # # PHY Subsystem # CONFIG_PHY=y # CONFIG_SPL_PHY is not set # CONFIG_NOP_PHY is not set # CONFIG_BCM_SR_PCIE_PHY is not set CONFIG_PHY_STM32_USBPHYC=y # CONFIG_MSM8916_USB_PHY is not set # CONFIG_OMAP_USB2_PHY is not set # # Rockchip PHY driver # # CONFIG_MVEBU_COMPHY_SUPPORT is not set # # Pin controllers # CONFIG_PINCTRL=y CONFIG_PINCTRL_FULL=y CONFIG_PINCTRL_GENERIC=y CONFIG_PINMUX=y CONFIG_PINCONF=y # CONFIG_PINCONF_RECURSIVE is not set CONFIG_SPL_PINCTRL=y # CONFIG_SPL_PINCTRL_FULL is not set # CONFIG_PINCTRL_AT91 is not set # CONFIG_PINCTRL_AT91PIO4 is not set # CONFIG_PINCTRL_INTEL is not set # CONFIG_PINCTRL_QE is not set # CONFIG_PINCTRL_ROCKCHIP_RV1108 is not set # CONFIG_PINCTRL_SINGLE is not set CONFIG_PINCTRL_STM32=y CONFIG_PINCTRL_STMFX=y # CONFIG_PINCTRL_K210 is not set # # Power # # CONFIG_ACPI_PMC is not set # CONFIG_SPL_ACPI_PMC is not set # CONFIG_TPL_ACPI_PMC is not set # # Power Domain Support # # CONFIG_POWER_DOMAIN is not set CONFIG_DM_PMIC=y CONFIG_PMIC_CHILDREN=y # CONFIG_SPL_PMIC_CHILDREN is not set # CONFIG_PMIC_ACT8846 is not set # CONFIG_DM_PMIC_DA9063 is not set # CONFIG_SPL_DM_PMIC_DA9063 is not set # CONFIG_PMIC_AS3722 is not set # CONFIG_DM_PMIC_BD71837 is not set # CONFIG_SPL_DM_PMIC_BD71837 is not set # CONFIG_DM_PMIC_FAN53555 is not set # CONFIG_DM_PMIC_PCA9450 is not set # CONFIG_DM_PMIC_PFUZE100 is not set # CONFIG_SPL_DM_PMIC_PFUZE100 is not set # CONFIG_DM_PMIC_MAX77686 is not set # CONFIG_DM_PMIC_MAX8998 is not set # CONFIG_DM_PMIC_MC34708 is not set # CONFIG_PMIC_MAX8997 is not set # CONFIG_PMIC_PM8916 is not set # CONFIG_PMIC_RK8XX is not set # CONFIG_PMIC_S2MPS11 is not set # CONFIG_DM_PMIC_SANDBOX is not set # CONFIG_PMIC_S5M8767 is not set # CONFIG_PMIC_RN5T567 is not set # CONFIG_PMIC_TPS65090 is not set # CONFIG_PMIC_PALMAS is not set # CONFIG_PMIC_LP873X is not set # CONFIG_PMIC_LP87565 is not set # CONFIG_POWER_MC34VR500 is not set # CONFIG_DM_PMIC_TPS65910 is not set CONFIG_PMIC_STPMIC1=y # CONFIG_SPL_PMIC_PALMAS is not set # CONFIG_SPL_PMIC_LP873X is not set # CONFIG_SPL_PMIC_LP87565 is not set # CONFIG_PMIC_TPS65941 is not set CONFIG_DM_REGULATOR=y # CONFIG_SPL_DM_REGULATOR is not set # CONFIG_REGULATOR_PWM is not set CONFIG_DM_REGULATOR_COMMON=y CONFIG_DM_REGULATOR_FIXED=y # CONFIG_SPL_DM_REGULATOR_FIXED is not set CONFIG_DM_REGULATOR_GPIO=y # CONFIG_SPL_DM_REGULATOR_GPIO is not set # CONFIG_DM_REGULATOR_PBIAS is not set CONFIG_DM_REGULATOR_STM32_VREFBUF=y # CONFIG_DM_REGULATOR_TPS62360 is not set CONFIG_DM_REGULATOR_STPMIC1=y # CONFIG_POWER_MT6323 is not set # CONFIG_DM_PWM is not set # CONFIG_PWM_IMX is not set # CONFIG_PWM_SANDBOX is not set # CONFIG_U_QE is not set CONFIG_RAM=y CONFIG_SPL_RAM=y # CONFIG_TPL_RAM is not set # CONFIG_STM32_SDRAM is not set # CONFIG_MPC83XX_SDRAM is not set # CONFIG_K3_J721E_DDRSS is not set # CONFIG_IMXRT_SDRAM is not set # CONFIG_ROCKCHIP_SDRAM_COMMON is not set CONFIG_STM32MP1_DDR=y # CONFIG_STM32MP1_DDR_INTERACTIVE is not set # # Remote Processor drivers # CONFIG_REMOTEPROC=y CONFIG_REMOTEPROC_STM32_COPRO=y # # Reset Controller Support # CONFIG_DM_RESET=y CONFIG_STM32_RESET=y # CONFIG_RESET_AST2500 is not set # CONFIG_RESET_HISILICON is not set # CONFIG_RESET_SYSCON is not set # CONFIG_RESET_SCMI is not set CONFIG_DM_RNG=y # CONFIG_RNG_MSM is not set CONFIG_RNG_STM32MP1=y # # Real Time Clock # CONFIG_DM_RTC=y # CONFIG_SPL_DM_RTC is not set # CONFIG_RTC_ENABLE_32KHZ_OUTPUT is not set # CONFIG_RTC_PCF2127 is not set # CONFIG_RTC_DS1307 is not set # CONFIG_RTC_DS3232 is not set # CONFIG_RTC_EMULATION is not set # CONFIG_RTC_ISL1208 is not set # CONFIG_RTC_PCF8563 is not set # CONFIG_RTC_RV3029 is not set # CONFIG_RTC_RV8803 is not set # CONFIG_RTC_RX8010SJ is not set # CONFIG_RTC_RX8025 is not set # CONFIG_RTC_PL031 is not set # CONFIG_RTC_MV is not set # CONFIG_RTC_S35392A is not set # CONFIG_RTC_MC146818 is not set # CONFIG_RTC_M41T62 is not set CONFIG_RTC_STM32=y # CONFIG_SCSI is not set # CONFIG_DM_SCSI is not set # # Serial drivers # CONFIG_BAUDRATE=115200 CONFIG_REQUIRE_SERIAL_CONSOLE=y # CONFIG_SPECIFY_CONSOLE_INDEX is not set CONFIG_SERIAL_PRESENT=y CONFIG_SPL_SERIAL_PRESENT=y CONFIG_DM_SERIAL=y CONFIG_SERIAL_RX_BUFFER=y CONFIG_SERIAL_RX_BUFFER_SIZE=256 # CONFIG_SERIAL_SEARCH_ALL is not set CONFIG_SPL_DM_SERIAL=y # CONFIG_ALTERA_JTAG_UART is not set # CONFIG_ALTERA_UART is not set # CONFIG_ARC_SERIAL is not set # CONFIG_ARM_DCC is not set # CONFIG_ATMEL_USART is not set # CONFIG_BCM6345_SERIAL is not set # CONFIG_COREBOOT_SERIAL is not set # CONFIG_CORTINA_UART is not set # CONFIG_FSL_LINFLEXUART is not set # CONFIG_FSL_LPUART is not set # CONFIG_MVEBU_A3700_UART is not set # CONFIG_MCFUART is not set # CONFIG_NULLDEV_SERIAL is not set # CONFIG_SYS_NS16550 is not set # CONFIG_NS16550_DYNAMIC is not set # CONFIG_PL01X_SERIAL is not set # CONFIG_XILINX_UARTLITE is not set # CONFIG_MSM_SERIAL is not set # CONFIG_OMAP_SERIAL is not set # CONFIG_PXA_SERIAL is not set # CONFIG_SIFIVE_SERIAL is not set CONFIG_STM32_SERIAL=y # CONFIG_ZYNQ_SERIAL is not set # CONFIG_MTK_SERIAL is not set # CONFIG_SMEM is not set # # Sound support # # CONFIG_SOUND is not set # # SOC (System On Chip) specific Drivers # # CONFIG_SOC_DEVICE is not set # CONFIG_SOC_TI is not set CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_SPI_MEM=y # CONFIG_ALTERA_SPI is not set # CONFIG_ATCSPI200_SPI is not set # CONFIG_ATMEL_SPI is not set # CONFIG_BCMSTB_SPI is not set # CONFIG_CADENCE_QSPI is not set # CONFIG_CF_SPI is not set # CONFIG_DESIGNWARE_SPI is not set # CONFIG_EXYNOS_SPI is not set # CONFIG_FSL_DSPI is not set # CONFIG_FSL_QSPI is not set # CONFIG_ICH_SPI is not set # CONFIG_KIRKWOOD_SPI is not set # CONFIG_MPC8XXX_SPI is not set # CONFIG_MTK_SNFI_SPI is not set # CONFIG_MVEBU_A3700_SPI is not set # CONFIG_MXS_SPI is not set # CONFIG_NXP_FSPI is not set # CONFIG_OMAP3_SPI is not set # CONFIG_PL022_SPI is not set # CONFIG_ROCKCHIP_SPI is not set # CONFIG_SPI_SIFIVE is not set # CONFIG_SOFT_SPI is not set # CONFIG_SPI_SUNXI is not set CONFIG_STM32_QSPI=y CONFIG_STM32_SPI=y # CONFIG_TEGRA114_SPI is not set # CONFIG_TEGRA20_SFLASH is not set # CONFIG_TEGRA20_SLINK is not set # CONFIG_TEGRA210_QSPI is not set # CONFIG_TI_QSPI is not set # CONFIG_XILINX_SPI is not set # CONFIG_ZYNQ_SPI is not set # CONFIG_ZYNQ_QSPI is not set # CONFIG_ZYNQMP_GQSPI is not set # CONFIG_FSL_ESPI is not set # CONFIG_SH_QSPI is not set # CONFIG_MXC_SPI is not set # # SPMI support # # CONFIG_SPMI is not set # CONFIG_SYSINFO is not set # # System reset device drivers # CONFIG_SYSRESET=y CONFIG_SPL_SYSRESET=y CONFIG_SYSRESET_CMD_POWEROFF=y # CONFIG_POWEROFF_GPIO is not set # CONFIG_SYSRESET_GPIO is not set CONFIG_SYSRESET_SYSCON=y # CONFIG_SYSRESET_WATCHDOG is not set # CONFIG_SYSRESET_RESETCTL is not set # CONFIG_SYSRESET_MPC83XX is not set # CONFIG_TEE is not set # CONFIG_OPTEE is not set # CONFIG_DM_THERMAL is not set # # Timer Support # # CONFIG_TIMER is not set # # TPM support # CONFIG_USB=y CONFIG_DM_USB=y CONFIG_SPL_DM_USB=y CONFIG_DM_USB_GADGET=y # CONFIG_SPL_DM_USB_GADGET is not set # # USB Host Controller Drivers # CONFIG_USB_HOST=y # CONFIG_USB_XHCI_HCD is not set CONFIG_USB_EHCI_HCD=y # CONFIG_USB_EHCI_MSM is not set # CONFIG_USB_EHCI_PCI is not set # CONFIG_USB_EHCI_ZYNQ is not set CONFIG_USB_EHCI_GENERIC=y # CONFIG_USB_EHCI_FSL is not set # CONFIG_USB_OHCI_HCD is not set # CONFIG_USB_OHCI_PCI is not set # CONFIG_USB_UHCI_HCD is not set # CONFIG_USB_DWC2 is not set # CONFIG_USB_R8A66597_HCD is not set # CONFIG_USB_CDNS3 is not set # CONFIG_USB_DWC3 is not set # # Legacy MUSB Support # # CONFIG_USB_MUSB_HCD is not set # CONFIG_USB_MUSB_UDC is not set # # MUSB Controller Driver # # CONFIG_USB_MUSB_HOST is not set # CONFIG_USB_MUSB_GADGET is not set # CONFIG_USB_MUSB_DA8XX is not set # CONFIG_USB_MUSB_TI is not set # CONFIG_USB_MUSB_AM35X is not set # CONFIG_USB_MUSB_DSPS is not set # CONFIG_USB_MUSB_PIO_ONLY is not set # # USB Phy # # CONFIG_TWL4030_USB is not set # CONFIG_OMAP_USB_PHY is not set # CONFIG_ROCKCHIP_USB2_PHY is not set # # ULPI drivers # # # USB peripherals # CONFIG_USB_STORAGE=y # CONFIG_USB_KEYBOARD is not set CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="STMicroelectronics" CONFIG_USB_GADGET_VENDOR_NUM=0x0483 CONFIG_USB_GADGET_PRODUCT_NUM=0x5720 # CONFIG_USB_GADGET_ATMEL_USBA is not set # CONFIG_USB_GADGET_BCM_UDC_OTG_PHY is not set CONFIG_USB_GADGET_DWC2_OTG=y # CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8 is not set # CONFIG_CI_UDC is not set # CONFIG_USB_GADGET_MAX3420 is not set CONFIG_USB_GADGET_VBUS_DRAW=2 CONFIG_SDP_LOADADDR=0 CONFIG_USB_GADGET_DUALSPEED=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_FUNCTION_MASS_STORAGE=y # CONFIG_USB_FUNCTION_ROCKUSB is not set # CONFIG_USB_FUNCTION_SDP is not set # CONFIG_USB_FUNCTION_THOR is not set # CONFIG_USB_ETHER is not set # CONFIG_USB_HOST_ETHER is not set # # UFS Host Controller Support # # CONFIG_TI_J721E_UFS is not set # # Graphics support # CONFIG_DM_VIDEO=y CONFIG_BACKLIGHT=y CONFIG_VIDEO_PCI_DEFAULT_FB_SIZE=0 # CONFIG_VIDEO_COPY is not set CONFIG_BACKLIGHT_GPIO=y CONFIG_CMD_VIDCONSOLE=y CONFIG_VIDEO_BPP8=y CONFIG_VIDEO_BPP16=y CONFIG_VIDEO_BPP32=y CONFIG_VIDEO_ANSI=y CONFIG_VIDEO_MIPI_DSI=y CONFIG_CONSOLE_NORMAL=y # CONFIG_CONSOLE_ROTATION is not set # CONFIG_CONSOLE_TRUETYPE is not set # CONFIG_SYS_WHITE_ON_BLACK is not set # CONFIG_NO_FB_CLEAR is not set CONFIG_PANEL=y CONFIG_SIMPLE_PANEL=y # # TrueType Fonts # # CONFIG_VIDCONSOLE_AS_LCD is not set # CONFIG_VIDEO_VESA is not set # CONFIG_VIDEO_LCD_ANX9804 is not set CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y CONFIG_VIDEO_LCD_RAYDIUM_RM68200=y # CONFIG_VIDEO_LCD_SSD2828 is not set # CONFIG_VIDEO_MESON is not set # CONFIG_VIDEO_MVEBU is not set # CONFIG_I2C_EDID is not set # CONFIG_DISPLAY is not set # CONFIG_ATMEL_HLCD is not set # CONFIG_AM335X_LCD is not set # CONFIG_VIDEO_FSL_DCU_FB is not set # CONFIG_VIDEO_ROCKCHIP is not set # CONFIG_VIDEO_ARM_MALIDP is not set CONFIG_VIDEO_STM32=y CONFIG_VIDEO_STM32_DSI=y CONFIG_VIDEO_STM32_MAX_XRES=1280 CONFIG_VIDEO_STM32_MAX_YRES=800 CONFIG_VIDEO_STM32_MAX_BPP=16 # CONFIG_VIDEO_TEGRA20 is not set # CONFIG_VIDEO_TEGRA124 is not set CONFIG_VIDEO_BRIDGE=y # CONFIG_VIDEO_BRIDGE_PARADE_PS862X is not set # CONFIG_VIDEO_BRIDGE_NXP_PTN3460 is not set # CONFIG_VIDEO_BRIDGE_ANALOGIX_ANX6345 is not set CONFIG_CONSOLE_SCROLL_LINES=1 # CONFIG_LCD is not set CONFIG_VIDEO_DW_MIPI_DSI=y # CONFIG_VIDEO_SIMPLE is not set # CONFIG_VIDEO_DT_SIMPLEFB is not set # CONFIG_OSD is not set # CONFIG_SPLASH_SCREEN is not set # CONFIG_SPLASH_SCREEN_ALIGN is not set # CONFIG_VIDEO_BMP_GZIP is not set CONFIG_VIDEO_BMP_RLE8=y CONFIG_BMP_16BPP=y CONFIG_BMP_24BPP=y CONFIG_BMP_32BPP=y # CONFIG_VIDEO_VCXK is not set # # VirtIO Drivers # # CONFIG_VIRTIO_MMIO is not set # # 1-Wire support # # CONFIG_W1 is not set # # 1-wire EEPROM support # # CONFIG_W1_EEPROM is not set # # Watchdog Timer Support # CONFIG_WATCHDOG=y CONFIG_WATCHDOG_TIMEOUT_MSECS=60000 # CONFIG_IMX_WATCHDOG is not set # CONFIG_ULP_WATCHDOG is not set # CONFIG_DESIGNWARE_WATCHDOG is not set CONFIG_WDT=y # CONFIG_WDT_ASPEED is not set # CONFIG_WDT_AT91 is not set # CONFIG_WDT_CDNS is not set # CONFIG_WDT_CORTINA is not set # CONFIG_WDT_ORION is not set # CONFIG_WDT_SBSA is not set # CONFIG_WDT_SP805 is not set CONFIG_WDT_STM32MP=y # CONFIG_XILINX_TB_WATCHDOG is not set CONFIG_SPL_WDT=y # CONFIG_PVBLOCK is not set # CONFIG_PHYS_TO_BUS is not set # # File systems # # CONFIG_FS_BTRFS is not set # CONFIG_FS_CBFS is not set # CONFIG_SPL_FS_CBFS is not set CONFIG_FS_EXT4=y CONFIG_EXT4_WRITE=y CONFIG_FS_FAT=y CONFIG_FAT_WRITE=y CONFIG_FS_FAT_MAX_CLUSTSIZE=65536 # CONFIG_FS_JFFS2 is not set CONFIG_UBIFS_SILENCE_MSG=y # CONFIG_FS_CRAMFS is not set # CONFIG_YAFFS2 is not set # CONFIG_FS_SQUASHFS is not set # # Library routines # # CONFIG_ADDR_MAP is not set # CONFIG_BCH is not set # CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED is not set # CONFIG_DYNAMIC_CRC_TABLE is not set CONFIG_HAVE_PRIVATE_LIBGCC=y CONFIG_LIB_UUID=y CONFIG_PRINTF=y CONFIG_SPL_PRINTF=y CONFIG_SPRINTF=y CONFIG_SPL_SPRINTF=y CONFIG_STRTO=y CONFIG_SPL_STRTO=y CONFIG_IMAGE_SPARSE=y CONFIG_IMAGE_SPARSE_FILLBUF_SIZE=0x80000 CONFIG_USE_PRIVATE_LIBGCC=y CONFIG_SYS_HZ=1000 CONFIG_SPL_USE_TINY_PRINTF=y # CONFIG_PANIC_HANG is not set CONFIG_REGEX=y CONFIG_LIB_RAND=y # CONFIG_LIB_HW_RAND is not set # CONFIG_SPL_TINY_MEMSET is not set # CONFIG_TPL_TINY_MEMSET is not set CONFIG_RBTREE=y # CONFIG_BITREVERSE is not set # CONFIG_TRACE is not set # CONFIG_CMD_DHRYSTONE is not set # # Security support # # CONFIG_AES is not set # CONFIG_RSA is not set # CONFIG_ASYMMETRIC_KEY_TYPE is not set # CONFIG_TPM is not set # CONFIG_SPL_TPM is not set # # Android Verified Boot # # CONFIG_LIBAVB is not set # # Hashing Support # CONFIG_SHA1=y CONFIG_SHA256=y # CONFIG_SHA512_ALGO is not set # CONFIG_SHA_HW_ACCEL is not set CONFIG_MD5=y # CONFIG_SPL_MD5 is not set # # Compression Support # # CONFIG_LZ4 is not set # CONFIG_LZMA is not set CONFIG_LZO=y CONFIG_GZIP=y # CONFIG_ZLIB_UNCOMPRESS is not set # CONFIG_BZIP2 is not set CONFIG_ZLIB=y # CONFIG_ZSTD is not set # CONFIG_SPL_LZ4 is not set # CONFIG_SPL_LZMA is not set # CONFIG_SPL_LZO is not set # CONFIG_SPL_GZIP is not set # CONFIG_SPL_ZSTD is not set CONFIG_ERRNO_STR=y # CONFIG_HEXDUMP is not set # CONFIG_GETOPT is not set CONFIG_OF_LIBFDT=y CONFIG_OF_LIBFDT_ASSUME_MASK=0 CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_SPL_OF_LIBFDT=y CONFIG_SPL_OF_LIBFDT_ASSUME_MASK=0xff # CONFIG_TPL_OF_LIBFDT is not set CONFIG_TPL_OF_LIBFDT_ASSUME_MASK=0xff # # System tables # CONFIG_GENERATE_SMBIOS_TABLE=y # CONFIG_SMBIOS_PARSER is not set CONFIG_EFI_LOADER=y CONFIG_EFI_VARIABLE_FILE_STORE=y # CONFIG_EFI_VARIABLES_PRESEED is not set CONFIG_EFI_GET_TIME=y # CONFIG_EFI_SET_TIME is not set CONFIG_EFI_DEVICE_PATH_TO_TEXT=y CONFIG_EFI_LOADER_HII=y CONFIG_EFI_UNICODE_COLLATION_PROTOCOL2=y CONFIG_EFI_UNICODE_CAPITALIZATION=y # CONFIG_EFI_UNICODE_COLLATION_PROTOCOL is not set CONFIG_EFI_PLATFORM_LANG_CODES="en-US" CONFIG_EFI_GRUB_ARM32_WORKAROUND=y CONFIG_EFI_RNG_PROTOCOL=y # CONFIG_EFI_LOAD_FILE2_INITRD is not set # CONFIG_EFI_SECURE_BOOT is not set # CONFIG_TEST_FDTDEC is not set CONFIG_LIB_DATE=y CONFIG_LIB_ELF=y # CONFIG_UNIT_TEST is not set # CONFIG_SPL_UNIT_TEST is not set # # Tools options # CONFIG_MKIMAGE_DTC_PATH="dtc" -- Jagan Teki, Amarula Solutions India Pvt. Ltd. Co-Founder & Embedded Linux Architect 405/E-Block, Sri Lakshmi Shubham Arcade, Chandanagar, Hyderabad - 500050, India M. (+91) 910 009 0959 [`as] http://www.amarulasolutions.com

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[PATCH v2] arm: fsl: common: Improve NXP VID driver PMBus support
by Stephen Carlson 08 Dec '20

08 Dec '20

This patch adds support for more PMBus compatible devices to the NXP drivers for its QorIQ family devices. At runtime, the voltage regulator is queried over I2C, and the required voltage multiplier determined. This change supports the DIRECT and LINEAR PMBus voltage reporting modes. Previously, the driver only supported a few specific devices such as the IR36021 and LTC3882, so this change allows the QorIQ series to be used with a much larger variety of core voltage regulator devices. checkpatch warning "Use if (IS_DEFINED (...))" was ignored to maintain consistency with the existing code. Signed-off-by: Stephen Carlson <stcarlso(a)linux.microsoft.com> Cc: Priyanka Jain <priyanka.jain(a)nxp.com> --- board/freescale/common/Kconfig | 27 +- board/freescale/common/vid.c | 815 ++++++++++++------------------ board/freescale/common/vid.h | 13 +- board/freescale/ls1028a/ls1028a.c | 42 ++ board/freescale/ls1088a/ls1088a.c | 40 ++ board/freescale/ls2080a/ls2080a.c | 49 ++ board/freescale/lx2160a/lx2160a.c | 42 ++ include/configs/ls1088aqds.h | 6 - include/configs/ls1088ardb.h | 8 +- 9 files changed, 526 insertions(+), 516 deletions(-) diff --git a/board/freescale/common/Kconfig b/board/freescale/common/Kconfig index 1b1fd69cb2..17db755951 100644 --- a/board/freescale/common/Kconfig +++ b/board/freescale/common/Kconfig @@ -21,18 +21,37 @@ config CMD_ESBC_VALIDATE esbc_validate - validate signature using RSA verification esbc_halt - put the core in spin loop (Secure Boot Only) +config VID + depends on DM_I2C + bool "Enable Freescale VID" + help + This option enables setting core voltage based on individual + values saved in SoC fuses. + config VOL_MONITOR_LTC3882_READ depends on VID bool "Enable the LTC3882 voltage monitor read" - default n help This option enables LTC3882 voltage monitor read - functionality. It is used by common VID driver. + functionality. It is used by the common VID driver. config VOL_MONITOR_LTC3882_SET depends on VID bool "Enable the LTC3882 voltage monitor set" - default n help This option enables LTC3882 voltage monitor set - functionality. It is used by common VID driver. + functionality. It is used by the common VID driver. + +config VOL_MONITOR_ISL68233_READ + depends on VID + bool "Enable the ISL68233 voltage monitor read" + help + This option enables ISL68233 voltage monitor read + functionality. It is used by the common VID driver. + +config VOL_MONITOR_ISL68233_SET + depends on VID + bool "Enable the ISL68233 voltage monitor set" + help + This option enables ISL68233 voltage monitor set + functionality. It is used by the common VID driver. diff --git a/board/freescale/common/vid.c b/board/freescale/common/vid.c index 9c51f50260..2df3adf3bc 100644 --- a/board/freescale/common/vid.c +++ b/board/freescale/common/vid.c @@ -1,6 +1,8 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2014 Freescale Semiconductor, Inc. + * + * Copyright 2020 Stephen Carlson <stcarlso(a)linux.microsoft.com> */ #include <common.h> @@ -20,14 +22,22 @@ #include <linux/delay.h> #include "vid.h" +/* Voltages are generally handled in mV to keep them as integers */ +#define MV_PER_V 1000 + +/* + * Select the channel on the I2C mux (on some NXP boards) that contains + * the voltage regulator to use for VID. Return 0 for success or nonzero + * for failure. + */ int __weak i2c_multiplexer_select_vid_channel(u8 channel) { return 0; } /* - * Compensate for a board specific voltage drop between regulator and SoC - * return a value in mV + * Compensate for a board specific voltage drop between regulator and SoC. + * Returns the voltage offset in mV. */ int __weak board_vdd_drop_compensation(void) { @@ -35,13 +45,90 @@ int __weak board_vdd_drop_compensation(void) } /* - * Board specific settings for specific voltage value + * Performs any board specific adjustments after the VID voltage has been + * set. Return 0 for success or nonzero for failure. */ int __weak board_adjust_vdd(int vdd) { return 0; } +/* + * Processor specific method of converting the fuse value read from VID + * registers into the core voltage to supply. Return the voltage in mV. + */ +u16 __weak soc_get_fuse_vid(int vid_index) +{ + /* Default VDD for Layerscape Chassis 1 devices */ + static const u16 vdd[32] = { + 0, /* unused */ + 9875, /* 0.9875V */ + 9750, + 9625, + 9500, + 9375, + 9250, + 9125, + 9000, + 8875, + 8750, + 8625, + 8500, + 8375, + 8250, + 8125, + 10000, /* 1.0000V */ + 10125, + 10250, + 10375, + 10500, + 10625, + 10750, + 10875, + 11000, + 0, /* reserved */ + }; + return vdd[vid_index]; +} + +#ifdef CONFIG_DM_I2C +#define DEVICE_HANDLE_T struct udevice * + +#ifndef I2C_VOL_MONITOR_BUS +#define I2C_VOL_MONITOR_BUS 0 +#endif + +/* If DM is in use, retrieve the udevice chip for the specified bus number */ +static int vid_get_device(int address, DEVICE_HANDLE_T *dev) +{ + int ret = i2c_get_chip_for_busnum(I2C_VOL_MONITOR_BUS, address, 1, dev); + + if (ret) + printf("VID: Bus %d has no device with address 0x%02X\n", + I2C_VOL_MONITOR_BUS, address); + return ret; +} + +#define I2C_READ(dev, register, data, length) \ + dm_i2c_read(dev, register, data, length) +#define I2C_WRITE(dev, register, data, length) \ + dm_i2c_write(dev, register, data, length) +#else +#define DEVICE_HANDLE_T int + +/* If DM is not in use, I2C addresses are passed directly */ +static int vid_get_device(int address, DEVICE_HANDLE_T *dev) +{ + *dev = address; + return 0; +} + +#define I2C_READ(dev, register, data, length) \ + i2c_read(dev, register, 1, data, length) +#define I2C_WRITE(dev, register, data, length) \ + i2c_write(dev, register, 1, data, length) +#endif + #if defined(CONFIG_VOL_MONITOR_IR36021_SET) || \ defined(CONFIG_VOL_MONITOR_IR36021_READ) /* @@ -59,30 +146,22 @@ int __weak board_adjust_vdd(int vdd) */ static int find_ir_chip_on_i2c(void) { - int i2caddress; - int ret; - u8 byte; - int i; + int i2caddress, ret, i; + u8 mfrID; const int ir_i2c_addr[] = {0x38, 0x08, 0x09}; -#ifdef CONFIG_DM_I2C - struct udevice *dev; -#endif + DEVICE_HANDLE_T dev; /* Check all the address */ for (i = 0; i < (sizeof(ir_i2c_addr)/sizeof(ir_i2c_addr[0])); i++) { i2caddress = ir_i2c_addr[i]; -#ifndef CONFIG_DM_I2C - ret = i2c_read(i2caddress, - IR36021_MFR_ID_OFFSET, 1, (void *)&byte, - sizeof(byte)); -#else - ret = i2c_get_chip_for_busnum(0, i2caddress, 1, &dev); - if (!ret) - ret = dm_i2c_read(dev, IR36021_MFR_ID_OFFSET, - (void *)&byte, sizeof(byte)); -#endif - if ((ret >= 0) && (byte == IR36021_MFR_ID)) - return i2caddress; + ret = vid_get_device(i2caddress, &dev); + if (!ret) { + ret = I2C_READ(dev, IR36021_MFR_ID_OFFSET, + (void *)&mfrID, sizeof(mfrID)); + /* If manufacturer ID matches the IR36021 */ + if (!ret && byte == IR36021_MFR_ID) + return i2caddress; + } } return -1; } @@ -116,35 +195,33 @@ static int read_voltage_from_INA220(int i2caddress) int i, ret, voltage_read = 0; u16 vol_mon; u8 buf[2]; -#ifdef CONFIG_DM_I2C - struct udevice *dev; -#endif + DEVICE_HANDLE_T dev; + + /* Open device handle */ + ret = vid_get_device(i2caddress, &dev); + if (ret) + return ret; for (i = 0; i < NUM_READINGS; i++) { -#ifndef CONFIG_DM_I2C - ret = i2c_read(I2C_VOL_MONITOR_ADDR, - I2C_VOL_MONITOR_BUS_V_OFFSET, 1, - (void *)&buf, 2); -#else - ret = i2c_get_chip_for_busnum(0, I2C_VOL_MONITOR_ADDR, 1, &dev); - if (!ret) - ret = dm_i2c_read(dev, I2C_VOL_MONITOR_BUS_V_OFFSET, - (void *)&buf, 2); -#endif + ret = I2C_READ(dev, I2C_VOL_MONITOR_BUS_V_OFFSET, + (void *)&buf[0], sizeof(buf)); if (ret) { printf("VID: failed to read core voltage\n"); return ret; } + vol_mon = (buf[0] << 8) | buf[1]; if (vol_mon & I2C_VOL_MONITOR_BUS_V_OVF) { printf("VID: Core voltage sensor error\n"); return -1; } + debug("VID: bus voltage reads 0x%04x\n", vol_mon); /* LSB = 4mv */ voltage_read += (vol_mon >> I2C_VOL_MONITOR_BUS_V_SHIFT) * 4; udelay(WAIT_FOR_ADC); } + /* calculate the average */ voltage_read /= NUM_READINGS; @@ -152,30 +229,25 @@ static int read_voltage_from_INA220(int i2caddress) } #endif -/* read voltage from IR */ #ifdef CONFIG_VOL_MONITOR_IR36021_READ +/* read voltage from IR */ static int read_voltage_from_IR(int i2caddress) { int i, ret, voltage_read = 0; u16 vol_mon; u8 buf; -#ifdef CONFIG_DM_I2C - struct udevice *dev; -#endif + DEVICE_HANDLE_T dev; + + /* Open device handle */ + ret = vid_get_device(i2caddress, &dev); + if (ret) + return ret; for (i = 0; i < NUM_READINGS; i++) { -#ifndef CONFIG_DM_I2C - ret = i2c_read(i2caddress, - IR36021_LOOP1_VOUT_OFFSET, - 1, (void *)&buf, 1); -#else - ret = i2c_get_chip_for_busnum(0, i2caddress, 1, &dev); - if (!ret) - ret = dm_i2c_read(dev, IR36021_LOOP1_VOUT_OFFSET, - (void *)&buf, 1); -#endif + ret = I2C_READ(dev, IR36021_LOOP1_VOUT_OFFSET, (void *)&buf, + sizeof(buf)); if (ret) { - printf("VID: failed to read vcpu\n"); + printf("VID: failed to read core voltage\n"); return ret; } vol_mon = buf; @@ -187,7 +259,7 @@ static int read_voltage_from_IR(int i2caddress) /* Resolution is 1/128V. We scale up here to get 1/128mV * and divide at the end */ - voltage_read += vol_mon * 1000; + voltage_read += vol_mon * MV_PER_V; udelay(WAIT_FOR_ADC); } /* Scale down to the real mV as IR resolution is 1/128V, rounding up */ @@ -205,49 +277,94 @@ static int read_voltage_from_IR(int i2caddress) } #endif -#ifdef CONFIG_VOL_MONITOR_LTC3882_READ -/* read the current value of the LTC Regulator Voltage */ -static int read_voltage_from_LTC(int i2caddress) -{ - int ret, vcode = 0; - u8 chan = PWM_CHANNEL0; +#if defined(CONFIG_VOL_MONITOR_ISL68233_READ) || \ + defined(CONFIG_VOL_MONITOR_LTC3882_READ) || \ + defined(CONFIG_VOL_MONITOR_ISL68233_SET) || \ + defined(CONFIG_VOL_MONITOR_LTC3882_SET) -#ifndef CONFIG_DM_I2C - /* select the PAGE 0 using PMBus commands PAGE for VDD*/ - ret = i2c_write(I2C_VOL_MONITOR_ADDR, - PMBUS_CMD_PAGE, 1, &chan, 1); -#else - struct udevice *dev; +/* + * The message displayed if the VOUT exponent causes a resolution + * worse than 1.0 V (if exponent is >= 0). + */ +#define VOUT_WARNING "VID: VOUT_MODE exponent has resolution worse than 1 V!\n" - ret = i2c_get_chip_for_busnum(0, I2C_VOL_MONITOR_ADDR, 1, &dev); - if (!ret) - ret = dm_i2c_write(dev, PMBUS_CMD_PAGE, &chan, 1); -#endif +/* Checks the PMBus voltage monitor for the format used for voltage values */ +static int get_pmbus_multiplier(DEVICE_HANDLE_T dev) +{ + u8 mode; + int exponent, multiplier, ret; + + ret = I2C_READ(dev, PMBUS_CMD_VOUT_MODE, &mode, sizeof(mode)); if (ret) { - printf("VID: failed to select VDD Page 0\n"); + printf("VID: unable to determine voltage multiplier\n"); + return 1; + } + + /* Upper 3 bits is mode, lower 5 bits is exponent */ + exponent = (int)mode & 0x1F; + mode >>= 5; + switch (mode) { + case 0: + /* Linear, 5 bit twos component exponent */ + if (exponent & 0x10) { + multiplier = 1 << (16 - (exponent & 0xF)); + } else { + /* If exponent is >= 0, then resolution is 1 V! */ + printf(VOUT_WARNING); + multiplier = 1; + } + break; + case 1: + /* VID code identifier */ + printf("VID: custom VID codes are not supported\n"); + multiplier = MV_PER_V; + break; + default: + /* Direct, in mV */ + multiplier = MV_PER_V; + break; + } + + debug("VID: calculated multiplier is %d\n", multiplier); + return multiplier; +} +#endif + +#if defined(CONFIG_VOL_MONITOR_ISL68233_READ) || \ + defined(CONFIG_VOL_MONITOR_LTC3882_READ) +static int read_voltage_from_pmbus(int i2caddress) +{ + int ret, multiplier, vout; + u8 channel = PWM_CHANNEL0; + u16 vcode; + DEVICE_HANDLE_T dev; + + /* Open device handle */ + ret = vid_get_device(i2caddress, &dev); + if (ret) return ret; - } -#ifndef CONFIG_DM_I2C - /*read the output voltage using PMBus command READ_VOUT*/ - ret = i2c_read(I2C_VOL_MONITOR_ADDR, - PMBUS_CMD_READ_VOUT, 1, (void *)&vcode, 2); -#else - ret = dm_i2c_read(dev, PMBUS_CMD_READ_VOUT, (void *)&vcode, 2); + /* Select the right page */ + ret = I2C_WRITE(dev, PMBUS_CMD_PAGE, &channel, sizeof(channel)); if (ret) { - printf("VID: failed to read the volatge\n"); + printf("VID: failed to select VDD page %d\n", channel); return ret; } -#endif + + /* VOUT is little endian */ + ret = I2C_READ(dev, PMBUS_CMD_READ_VOUT, (void *)&vcode, sizeof(vcode)); if (ret) { - printf("VID: failed to read the volatge\n"); + printf("VID: failed to read core voltage\n"); return ret; } - /* Scale down to the real mV as LTC resolution is 1/4096V,rounding up */ - vcode = DIV_ROUND_UP(vcode * 1000, 4096); - - return vcode; + /* Scale down to the real mV */ + multiplier = get_pmbus_multiplier(dev); + vout = (int)vcode; + /* Multiplier 1000 (direct mode) requires no change to convert */ + if (multiplier != MV_PER_V) + vout = DIV_ROUND_UP(vout * MV_PER_V, multiplier); + return vout - board_vdd_drop_compensation(); } #endif @@ -258,10 +375,11 @@ static int read_voltage(int i2caddress) voltage_read = read_voltage_from_INA220(i2caddress); #elif defined CONFIG_VOL_MONITOR_IR36021_READ voltage_read = read_voltage_from_IR(i2caddress); -#elif defined CONFIG_VOL_MONITOR_LTC3882_READ - voltage_read = read_voltage_from_LTC(i2caddress); +#elif defined(CONFIG_VOL_MONITOR_ISL68233_READ) || \ + defined(CONFIG_VOL_MONITOR_LTC3882_READ) + voltage_read = read_voltage_from_pmbus(i2caddress); #else - return -1; + voltage_read = -1; #endif return voltage_read; } @@ -299,7 +417,7 @@ static int wait_for_new_voltage(int vdd, int i2caddress) } /* - * this function keeps reading the voltage until it is stable or until the + * Blocks and reads the VID voltage until it stabilizes, or the * timeout expires */ static int wait_for_voltage_stable(int i2caddress) @@ -309,9 +427,9 @@ static int wait_for_voltage_stable(int i2caddress) vdd = read_voltage(i2caddress); udelay(NUM_READINGS * WAIT_FOR_ADC); - /* wait until voltage is stable */ vdd_current = read_voltage(i2caddress); - /* The maximum timeout is + /* + * The maximum timeout is * MAX_LOOP_WAIT_VOL_STABLE * NUM_READINGS * WAIT_FOR_ADC */ for (timeout = MAX_LOOP_WAIT_VOL_STABLE; @@ -326,12 +444,18 @@ static int wait_for_voltage_stable(int i2caddress) return vdd_current; } -/* Set the voltage to the IR chip */ +/* Sets the VID voltage using the IR36021 */ static int set_voltage_to_IR(int i2caddress, int vdd) { int wait, vdd_last; int ret; u8 vid; + DEVICE_HANDLE_T dev; + + /* Open device handle */ + ret = vid_get_device(i2caddress, &dev); + if (ret) + return ret; /* Compensate for a board specific voltage drop between regulator and * SoC before converting into an IR VID value @@ -343,20 +467,10 @@ static int set_voltage_to_IR(int i2caddress, int vdd) vid = DIV_ROUND_UP(vdd - 245, 5); #endif -#ifndef CONFIG_DM_I2C - ret = i2c_write(i2caddress, IR36021_LOOP1_MANUAL_ID_OFFSET, - 1, (void *)&vid, sizeof(vid)); -#else - struct udevice *dev; - - ret = i2c_get_chip_for_busnum(0, i2caddress, 1, &dev); - if (!ret) - ret = dm_i2c_write(dev, IR36021_LOOP1_MANUAL_ID_OFFSET, - (void *)&vid, sizeof(vid)); - -#endif + ret = I2C_WRITE(dev, IR36021_LOOP1_MANUAL_ID_OFFSET, (void *)&vid, + sizeof(vid)); if (ret) { - printf("VID: failed to write VID\n"); + printf("VID: failed to write new voltage\n"); return -1; } wait = wait_for_new_voltage(vdd, i2caddress); @@ -370,81 +484,59 @@ static int set_voltage_to_IR(int i2caddress, int vdd) debug("VID: Current voltage is %d mV\n", vdd_last); return vdd_last; } - #endif -#ifdef CONFIG_VOL_MONITOR_LTC3882_SET -/* this function sets the VDD and returns the value set */ -static int set_voltage_to_LTC(int i2caddress, int vdd) +#if defined(CONFIG_VOL_MONITOR_ISL68233_SET) || \ + defined(CONFIG_VOL_MONITOR_LTC3882_SET) +static int set_voltage_to_pmbus(int i2caddress, int vdd) { int ret, vdd_last, vdd_target = vdd; - int count = 100, temp = 0; + int count = MAX_LOOP_WAIT_NEW_VOL, temp = 0, multiplier; unsigned char value; - /* Scale up to the LTC resolution is 1/4096V */ - vdd = (vdd * 4096) / 1000; + /* The data to be sent with the PMBus command PAGE_PLUS_WRITE */ + u8 buffer[5] = { 0x04, PWM_CHANNEL0, PMBUS_CMD_VOUT_COMMAND, 0, 0 }; + DEVICE_HANDLE_T dev; - /* 5-byte buffer which needs to be sent following the - * PMBus command PAGE_PLUS_WRITE. - */ - u8 buff[5] = {0x04, PWM_CHANNEL0, PMBUS_CMD_VOUT_COMMAND, - vdd & 0xFF, (vdd & 0xFF00) >> 8}; + /* Open device handle */ + ret = vid_get_device(i2caddress, &dev); + if (ret) + return ret; + + /* Scale up to the proper value for the VOUT command, little endian */ + multiplier = get_pmbus_multiplier(dev); + vdd += board_vdd_drop_compensation(); + if (multiplier != MV_PER_V) + vdd = DIV_ROUND_UP(vdd * multiplier, MV_PER_V); + buffer[3] = vdd & 0xFF; + buffer[4] = (vdd & 0xFF00) >> 8; - /* Write the desired voltage code to the regulator */ -#ifndef CONFIG_DM_I2C /* Check write protect state */ - ret = i2c_read(I2C_VOL_MONITOR_ADDR, - PMBUS_CMD_WRITE_PROTECT, 1, - (void *)&value, sizeof(value)); + ret = I2C_READ(dev, PMBUS_CMD_WRITE_PROTECT, (void *)&value, + sizeof(value)); if (ret) goto exit; if (value != EN_WRITE_ALL_CMD) { value = EN_WRITE_ALL_CMD; - ret = i2c_write(I2C_VOL_MONITOR_ADDR, - PMBUS_CMD_WRITE_PROTECT, 1, + ret = I2C_WRITE(dev, PMBUS_CMD_WRITE_PROTECT, (void *)&value, sizeof(value)); if (ret) goto exit; } - ret = i2c_write(I2C_VOL_MONITOR_ADDR, - PMBUS_CMD_PAGE_PLUS_WRITE, 1, - (void *)&buff, sizeof(buff)); -#else - struct udevice *dev; - - ret = i2c_get_chip_for_busnum(0, I2C_VOL_MONITOR_ADDR, 1, &dev); - if (!ret) { - /* Check write protect state */ - ret = dm_i2c_read(dev, - PMBUS_CMD_WRITE_PROTECT, - (void *)&value, sizeof(value)); - if (ret) - goto exit; - - if (value != EN_WRITE_ALL_CMD) { - value = EN_WRITE_ALL_CMD; - ret = dm_i2c_write(dev, - PMBUS_CMD_WRITE_PROTECT, - (void *)&value, sizeof(value)); - if (ret) - goto exit; - } - - ret = dm_i2c_write(dev, PMBUS_CMD_PAGE_PLUS_WRITE, - (void *)&buff, sizeof(buff)); - } -#endif -exit: + /* Write the desired voltage code to the regulator */ + ret = I2C_WRITE(dev, PMBUS_CMD_PAGE_PLUS_WRITE, (void *)&buffer[0], + sizeof(buffer)); if (ret) { - printf("VID: I2C failed to write to the volatge regulator\n"); + printf("VID: I2C failed to write to the voltage regulator\n"); return -1; } - /* Wait for the volatge to get to the desired value */ +exit: + /* Wait for the voltage to get to the desired value */ do { - vdd_last = read_voltage_from_LTC(i2caddress); + vdd_last = read_voltage_from_pmbus(i2caddress); if (vdd_last < 0) { printf("VID: Couldn't read sensor abort VID adjust\n"); return -1; @@ -463,325 +555,80 @@ static int set_voltage(int i2caddress, int vdd) #ifdef CONFIG_VOL_MONITOR_IR36021_SET vdd_last = set_voltage_to_IR(i2caddress, vdd); -#elif defined CONFIG_VOL_MONITOR_LTC3882_SET - vdd_last = set_voltage_to_LTC(i2caddress, vdd); +#elif defined(CONFIG_VOL_MONITOR_ISL68233_SET) || \ + defined(CONFIG_VOL_MONITOR_LTC3882_SET) + vdd_last = set_voltage_to_pmbus(i2caddress, vdd); #else #error Specific voltage monitor must be defined #endif return vdd_last; } -#ifdef CONFIG_FSL_LSCH3 int adjust_vdd(ulong vdd_override) { int re_enable = disable_interrupts(); +#if defined(CONFIG_FSL_LSCH2) || defined(CONFIG_FSL_LSCH3) struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); - u32 fusesr; -#if defined(CONFIG_VOL_MONITOR_IR36021_SET) || \ - defined(CONFIG_VOL_MONITOR_IR36021_READ) - u8 vid, buf; #else - u8 vid; + ccsr_gur_t __iomem *gur = + (void __iomem *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); #endif - int vdd_target, vdd_current, vdd_last; - int ret, i2caddress; + u8 vid; + u32 fusesr; + int vdd_current, vdd_last, vdd_target; + int ret, i2caddress = I2C_VOL_MONITOR_ADDR; unsigned long vdd_string_override; char *vdd_string; -#ifdef CONFIG_ARCH_LX2160A - static const u16 vdd[32] = { - 8250, - 7875, - 7750, - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 8000, - 8125, - 8250, - 0, /* reserved */ - 8500, - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - }; -#else -#ifdef CONFIG_ARCH_LS1088A - static const uint16_t vdd[32] = { - 10250, - 9875, - 9750, - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 9000, - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 10000, /* 1.0000V */ - 10125, - 10250, - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - }; - -#else - static const uint16_t vdd[32] = { - 10500, - 0, /* reserved */ - 9750, - 0, /* reserved */ - 9500, - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 9000, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 10000, /* 1.0000V */ - 0, /* reserved */ - 10250, - 0, /* reserved */ - 10500, - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - 0, /* reserved */ - }; -#endif -#endif - struct vdd_drive { - u8 vid; - unsigned voltage; - }; - ret = i2c_multiplexer_select_vid_channel(I2C_MUX_CH_VOL_MONITOR); - if (ret) { - debug("VID: I2C failed to switch channel\n"); - ret = -1; - goto exit; - } #if defined(CONFIG_VOL_MONITOR_IR36021_SET) || \ defined(CONFIG_VOL_MONITOR_IR36021_READ) - ret = find_ir_chip_on_i2c(); - if (ret < 0) { - printf("VID: Could not find voltage regulator on I2C.\n"); - ret = -1; - goto exit; - } else { - i2caddress = ret; - debug("VID: IR Chip found on I2C address 0x%02x\n", i2caddress); - } - - /* check IR chip work on Intel mode*/ -#ifndef CONFIG_DM_I2C - ret = i2c_read(i2caddress, - IR36021_INTEL_MODE_OOFSET, - 1, (void *)&buf, 1); -#else - struct udevice *dev; - - ret = i2c_get_chip_for_busnum(0, i2caddress, 1, &dev); - if (!ret) - ret = dm_i2c_read(dev, IR36021_INTEL_MODE_OOFSET, - (void *)&buf, 1); -#endif - if (ret) { - printf("VID: failed to read IR chip mode.\n"); - ret = -1; - goto exit; - } - - if ((buf & IR36021_MODE_MASK) != IR36021_INTEL_MODE) { - printf("VID: IR Chip is not used in Intel mode.\n"); - ret = -1; - goto exit; - } + u8 buf; + DEVICE_HANDLE_T dev; #endif - /* get the voltage ID from fuse status register */ + /* + * VID is used according to the table below + * --------------------------------------- + * | DA_V | + * |-------------------------------------| + * | 5b00000 | 5b00001-5b11110 | 5b11111 | + * ---------------+---------+-----------------+---------| + * | D | 5b00000 | NO VID | VID = DA_V | NO VID | + * | A |----------+---------+-----------------+---------| + * | _ | 5b00001 |VID = | VID = |VID = | + * | V | ~ | DA_V_ALT| DA_V_ALT | DA_A_VLT| + * | _ | 5b11110 | | | | + * | A |----------+---------+-----------------+---------| + * | L | 5b11111 | No VID | VID = DA_V | NO VID | + * | T | | | | | + * ------------------------------------------------------ + */ +#if defined(CONFIG_FSL_LSCH3) fusesr = in_le32(&gur->dcfg_fusesr); vid = (fusesr >> FSL_CHASSIS3_DCFG_FUSESR_ALTVID_SHIFT) & - FSL_CHASSIS3_DCFG_FUSESR_ALTVID_MASK; - if ((vid == 0) || (vid == FSL_CHASSIS3_DCFG_FUSESR_ALTVID_MASK)) { + FSL_CHASSIS3_DCFG_FUSESR_ALTVID_MASK; + if (vid == 0 || vid == FSL_CHASSIS3_DCFG_FUSESR_ALTVID_MASK) { vid = (fusesr >> FSL_CHASSIS3_DCFG_FUSESR_VID_SHIFT) & - FSL_CHASSIS3_DCFG_FUSESR_VID_MASK; - } - vdd_target = vdd[vid]; - - /* check override variable for overriding VDD */ - vdd_string = env_get(CONFIG_VID_FLS_ENV); - if (vdd_override == 0 && vdd_string && - !strict_strtoul(vdd_string, 10, &vdd_string_override)) - vdd_override = vdd_string_override; - - if (vdd_override >= VDD_MV_MIN && vdd_override <= VDD_MV_MAX) { - vdd_target = vdd_override * 10; /* convert to 1/10 mV */ - debug("VDD override is %lu\n", vdd_override); - } else if (vdd_override != 0) { - printf("Invalid value.\n"); + FSL_CHASSIS3_DCFG_FUSESR_VID_MASK; } - - /* divide and round up by 10 to get a value in mV */ - vdd_target = DIV_ROUND_UP(vdd_target, 10); - if (vdd_target == 0) { - debug("VID: VID not used\n"); - ret = 0; - goto exit; - } else if (vdd_target < VDD_MV_MIN || vdd_target > VDD_MV_MAX) { - /* Check vdd_target is in valid range */ - printf("VID: Target VID %d mV is not in range.\n", - vdd_target); - ret = -1; - goto exit; - } else { - debug("VID: vid = %d mV\n", vdd_target); - } - - /* - * Read voltage monitor to check real voltage. - */ - vdd_last = read_voltage(i2caddress); - if (vdd_last < 0) { - printf("VID: Couldn't read sensor abort VID adjustment\n"); - ret = -1; - goto exit; +#elif defined(CONFIG_FSL_LSCH2) + fusesr = in_be32(&gur->dcfg_fusesr); + vid = (fusesr >> FSL_CHASSIS2_DCFG_FUSESR_ALTVID_SHIFT) & + FSL_CHASSIS2_DCFG_FUSESR_ALTVID_MASK; + if (vid == 0 || vid == FSL_CHASSIS2_DCFG_FUSESR_ALTVID_MASK) { + vid = (fusesr >> FSL_CHASSIS2_DCFG_FUSESR_VID_SHIFT) & + FSL_CHASSIS2_DCFG_FUSESR_VID_MASK; } - vdd_current = vdd_last; - debug("VID: Core voltage is currently at %d mV\n", vdd_last); - -#ifdef CONFIG_VOL_MONITOR_LTC3882_SET - /* Set the target voltage */ - vdd_last = vdd_current = set_voltage(i2caddress, vdd_target); #else - /* - * Adjust voltage to at or one step above target. - * As measurements are less precise than setting the values - * we may run through dummy steps that cancel each other - * when stepping up and then down. - */ - while (vdd_last > 0 && - vdd_last < vdd_target) { - vdd_current += IR_VDD_STEP_UP; - vdd_last = set_voltage(i2caddress, vdd_current); - } - while (vdd_last > 0 && - vdd_last > vdd_target + (IR_VDD_STEP_DOWN - 1)) { - vdd_current -= IR_VDD_STEP_DOWN; - vdd_last = set_voltage(i2caddress, vdd_current); + fusesr = in_be32(&gur->dcfg_fusesr); + vid = (fusesr >> FSL_CORENET_DCFG_FUSESR_ALTVID_SHIFT) & + FSL_CORENET_DCFG_FUSESR_ALTVID_MASK; + if (vid == 0 || vid == FSL_CORENET_DCFG_FUSESR_ALTVID_MASK) { + vid = (fusesr >> FSL_CORENET_DCFG_FUSESR_VID_SHIFT) & + FSL_CORENET_DCFG_FUSESR_VID_MASK; } - #endif - if (board_adjust_vdd(vdd_target) < 0) { - ret = -1; - goto exit; - } - - if (vdd_last > 0) - printf("VID: Core voltage after adjustment is at %d mV\n", - vdd_last); - else - ret = -1; -exit: - if (re_enable) - enable_interrupts(); - i2c_multiplexer_select_vid_channel(I2C_MUX_CH_DEFAULT); - return ret; -} -#else /* !CONFIG_FSL_LSCH3 */ -int adjust_vdd(ulong vdd_override) -{ - int re_enable = disable_interrupts(); -#if defined(CONFIG_FSL_LSCH2) - struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); -#else - ccsr_gur_t __iomem *gur = - (void __iomem *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); -#endif - u32 fusesr; - u8 vid, buf; - int vdd_target, vdd_current, vdd_last; - int ret, i2caddress; - unsigned long vdd_string_override; - char *vdd_string; - static const uint16_t vdd[32] = { - 0, /* unused */ - 9875, /* 0.9875V */ - 9750, - 9625, - 9500, - 9375, - 9250, - 9125, - 9000, - 8875, - 8750, - 8625, - 8500, - 8375, - 8250, - 8125, - 10000, /* 1.0000V */ - 10125, - 10250, - 10375, - 10500, - 10625, - 10750, - 10875, - 11000, - 0, /* reserved */ - }; - struct vdd_drive { - u8 vid; - unsigned voltage; - }; + vdd_target = soc_get_fuse_vid((int)vid); ret = i2c_multiplexer_select_vid_channel(I2C_MUX_CH_VOL_MONITOR); if (ret) { @@ -789,6 +636,7 @@ int adjust_vdd(ulong vdd_override) ret = -1; goto exit; } + #if defined(CONFIG_VOL_MONITOR_IR36021_SET) || \ defined(CONFIG_VOL_MONITOR_IR36021_READ) ret = find_ir_chip_on_i2c(); @@ -801,19 +649,13 @@ int adjust_vdd(ulong vdd_override) debug("VID: IR Chip found on I2C address 0x%02x\n", i2caddress); } - /* check IR chip work on Intel mode*/ -#ifndef CONFIG_DM_I2C - ret = i2c_read(i2caddress, - IR36021_INTEL_MODE_OOFSET, - 1, (void *)&buf, 1); -#else - struct udevice *dev; + ret = vid_get_device(i2caddress, &dev); + if (ret) + return ret; - ret = i2c_get_chip_for_busnum(0, i2caddress, 1, &dev); - if (!ret) - ret = dm_i2c_read(dev, IR36021_INTEL_MODE_OOFSET, - (void *)&buf, 1); -#endif + /* check IR chip work on Intel mode */ + ret = I2C_READ(dev, IR36021_INTEL_MODE_OFFSET, (void *)&buf, + sizeof(buf)); if (ret) { printf("VID: failed to read IR chip mode.\n"); ret = -1; @@ -826,52 +668,18 @@ int adjust_vdd(ulong vdd_override) } #endif - /* get the voltage ID from fuse status register */ - fusesr = in_be32(&gur->dcfg_fusesr); - /* - * VID is used according to the table below - * --------------------------------------- - * | DA_V | - * |-------------------------------------| - * | 5b00000 | 5b00001-5b11110 | 5b11111 | - * ---------------+---------+-----------------+---------| - * | D | 5b00000 | NO VID | VID = DA_V | NO VID | - * | A |----------+---------+-----------------+---------| - * | _ | 5b00001 |VID = | VID = |VID = | - * | V | ~ | DA_V_ALT| DA_V_ALT | DA_A_VLT| - * | _ | 5b11110 | | | | - * | A |----------+---------+-----------------+---------| - * | L | 5b11111 | No VID | VID = DA_V | NO VID | - * | T | | | | | - * ------------------------------------------------------ - */ -#ifdef CONFIG_FSL_LSCH2 - vid = (fusesr >> FSL_CHASSIS2_DCFG_FUSESR_ALTVID_SHIFT) & - FSL_CHASSIS2_DCFG_FUSESR_ALTVID_MASK; - if ((vid == 0) || (vid == FSL_CHASSIS2_DCFG_FUSESR_ALTVID_MASK)) { - vid = (fusesr >> FSL_CHASSIS2_DCFG_FUSESR_VID_SHIFT) & - FSL_CHASSIS2_DCFG_FUSESR_VID_MASK; - } -#else - vid = (fusesr >> FSL_CORENET_DCFG_FUSESR_ALTVID_SHIFT) & - FSL_CORENET_DCFG_FUSESR_ALTVID_MASK; - if ((vid == 0) || (vid == FSL_CORENET_DCFG_FUSESR_ALTVID_MASK)) { - vid = (fusesr >> FSL_CORENET_DCFG_FUSESR_VID_SHIFT) & - FSL_CORENET_DCFG_FUSESR_VID_MASK; - } -#endif - vdd_target = vdd[vid]; - /* check override variable for overriding VDD */ vdd_string = env_get(CONFIG_VID_FLS_ENV); + debug("VID: Initial VDD value is %d mV\n", + DIV_ROUND_UP(vdd_target, 10)); if (vdd_override == 0 && vdd_string && !strict_strtoul(vdd_string, 10, &vdd_string_override)) vdd_override = vdd_string_override; if (vdd_override >= VDD_MV_MIN && vdd_override <= VDD_MV_MAX) { vdd_target = vdd_override * 10; /* convert to 1/10 mV */ - debug("VDD override is %lu\n", vdd_override); + debug("VID: VDD override is %lu\n", vdd_override); } else if (vdd_override != 0) { - printf("Invalid value.\n"); + printf("VID: Invalid VDD value.\n"); } if (vdd_target == 0) { debug("VID: VID not used\n"); @@ -894,6 +702,13 @@ int adjust_vdd(ulong vdd_override) } vdd_current = vdd_last; debug("VID: Core voltage is currently at %d mV\n", vdd_last); + +#if defined(CONFIG_VOL_MONITOR_LTC3882_SET) || \ + defined(CONFIG_VOL_MONITOR_ISL68233_SET) + /* Set the target voltage */ + vdd_current = set_voltage(i2caddress, vdd_target); + vdd_last = vdd_current; +#else /* * Adjust voltage to at or one step above target. * As measurements are less precise than setting the values @@ -910,6 +725,13 @@ int adjust_vdd(ulong vdd_override) vdd_current -= IR_VDD_STEP_DOWN; vdd_last = set_voltage(i2caddress, vdd_current); } +#endif + + /* Board specific adjustments */ + if (board_adjust_vdd(vdd_target) < 0) { + ret = -1; + goto exit; + } if (vdd_last > 0) printf("VID: Core voltage after adjustment is at %d mV\n", @@ -924,11 +746,10 @@ exit: return ret; } -#endif static int print_vdd(void) { - int vdd_last, ret, i2caddress = 0; + int vdd_last, ret, i2caddress = I2C_VOL_MONITOR_ADDR; ret = i2c_multiplexer_select_vid_channel(I2C_MUX_CH_VOL_MONITOR); if (ret) { diff --git a/board/freescale/common/vid.h b/board/freescale/common/vid.h index 65b348ee42..a805657d94 100644 --- a/board/freescale/common/vid.h +++ b/board/freescale/common/vid.h @@ -6,16 +6,17 @@ #ifndef __VID_H_ #define __VID_H_ +/* IR36021 command codes */ #define IR36021_LOOP1_MANUAL_ID_OFFSET 0x6A #define IR36021_LOOP1_VOUT_OFFSET 0x9A #define IR36021_MFR_ID_OFFSET 0x92 #define IR36021_MFR_ID 0x43 -#define IR36021_INTEL_MODE_OOFSET 0x14 +#define IR36021_INTEL_MODE_OFFSET 0x14 #define IR36021_MODE_MASK 0x20 #define IR36021_INTEL_MODE 0x00 #define IR36021_AMD_MODE 0x20 -/* step the IR regulator in 5mV increments */ +/* Step the IR regulator in 5mV increments */ #define IR_VDD_STEP_DOWN 5 #define IR_VDD_STEP_UP 5 @@ -37,6 +38,14 @@ */ #define EN_WRITE_ALL_CMD (0) +/* PM Bus command codes for standard PMBus chips */ +#define PMBUS_CMD_PAGE 0x0 +#define PMBUS_CMD_READ_VOUT 0x8B +#define PMBUS_CMD_PAGE_PLUS_WRITE 0x05 +#define PMBUS_CMD_VOUT_COMMAND 0x21 +#define PMBUS_CMD_VOUT_MODE 0x20 + int adjust_vdd(ulong vdd_override); +u16 soc_get_fuse_vid(int vid_index); #endif /* __VID_H_ */ diff --git a/board/freescale/ls1028a/ls1028a.c b/board/freescale/ls1028a/ls1028a.c index e37e3a3c16..a2d2e15787 100644 --- a/board/freescale/ls1028a/ls1028a.c +++ b/board/freescale/ls1028a/ls1028a.c @@ -130,6 +130,48 @@ int misc_init_r(void) } #endif +#ifdef CONFIG_VID +u16 soc_get_fuse_vid(int vid_index) +{ + static const u16 vdd[32] = { + 10500, + 0, /* reserved */ + 9750, + 0, /* reserved */ + 9500, + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 9000, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 10000, /* 1.0000V */ + 0, /* reserved */ + 10250, + 0, /* reserved */ + 10500, + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + }; + + return vdd[vid_index]; +}; +#endif + int board_early_init_f(void) { #ifdef CONFIG_LPUART diff --git a/board/freescale/ls1088a/ls1088a.c b/board/freescale/ls1088a/ls1088a.c index 5d19702a05..2dba62c524 100644 --- a/board/freescale/ls1088a/ls1088a.c +++ b/board/freescale/ls1088a/ls1088a.c @@ -185,6 +185,46 @@ int init_func_vid(void) return 0; } + +u16 soc_get_fuse_vid(int vid_index) +{ + static const u16 vdd[32] = { + 10250, + 9875, + 9750, + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 9000, + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 10000, /* 1.0000V */ + 10125, + 10250, + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + }; + + return vdd[vid_index]; +}; #endif int is_pb_board(void) diff --git a/board/freescale/ls2080a/ls2080a.c b/board/freescale/ls2080a/ls2080a.c index 62da2a7af1..fec3f7a835 100644 --- a/board/freescale/ls2080a/ls2080a.c +++ b/board/freescale/ls2080a/ls2080a.c @@ -50,6 +50,55 @@ void detail_board_ddr_info(void) #endif } +#if defined(CONFIG_ARCH_MISC_INIT) +int arch_misc_init(void) +{ + return 0; +} +#endif + +#ifdef CONFIG_VID +u16 soc_get_fuse_vid(int vid_index) +{ + static const u16 vdd[32] = { + 10500, + 0, /* reserved */ + 9750, + 0, /* reserved */ + 9500, + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 9000, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 10000, /* 1.0000V */ + 0, /* reserved */ + 10250, + 0, /* reserved */ + 10500, + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + }; + + return vdd[vid_index]; +}; +#endif + int board_eth_init(struct bd_info *bis) { int error = 0; diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c index 0ff987eeb4..35102e876d 100644 --- a/board/freescale/lx2160a/lx2160a.c +++ b/board/freescale/lx2160a/lx2160a.c @@ -645,6 +645,48 @@ int misc_init_r(void) } #endif +#ifdef CONFIG_VID +u16 soc_get_fuse_vid(int vid_index) +{ + static const u16 vdd[32] = { + 8250, + 7875, + 7750, + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 8000, + 8125, + 8250, + 0, /* reserved */ + 8500, + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + }; + + return vdd[vid_index]; +}; +#endif + #ifdef CONFIG_FSL_MC_ENET extern int fdt_fixup_board_phy(void *fdt); diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h index b92ec14c69..a2b21c697f 100644 --- a/include/configs/ls1088aqds.h +++ b/include/configs/ls1088aqds.h @@ -326,12 +326,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_VOL_MONITOR_LTC3882_SET #define CONFIG_VOL_MONITOR_LTC3882_READ -/* PM Bus commands code for LTC3882*/ -#define PMBUS_CMD_PAGE 0x0 -#define PMBUS_CMD_READ_VOUT 0x8B -#define PMBUS_CMD_PAGE_PLUS_WRITE 0x05 -#define PMBUS_CMD_VOUT_COMMAND 0x21 - #define PWM_CHANNEL0 0x0 /* diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h index f59a9f5574..6f36dd417a 100644 --- a/include/configs/ls1088ardb.h +++ b/include/configs/ls1088ardb.h @@ -203,7 +203,7 @@ #define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000 -#define I2C_MUX_CH_VOL_MONITOR 0xA +#define I2C_MUX_CH_VOL_MONITOR 0xA /* Voltage monitor on channel 2*/ #define I2C_VOL_MONITOR_ADDR 0x63 #define I2C_VOL_MONITOR_BUS_V_OFFSET 0x2 @@ -221,12 +221,6 @@ #define CONFIG_VOL_MONITOR_LTC3882_SET #define CONFIG_VOL_MONITOR_LTC3882_READ -/* PM Bus commands code for LTC3882*/ -#define PMBUS_CMD_PAGE 0x0 -#define PMBUS_CMD_READ_VOUT 0x8B -#define PMBUS_CMD_PAGE_PLUS_WRITE 0x05 -#define PMBUS_CMD_VOUT_COMMAND 0x21 - #define PWM_CHANNEL0 0x0 /* -- 2.17.1

3 2

[PATCH 0/3] mkimage usability fixes
by Joel Stanley 08 Dec '20

08 Dec '20

Hello, I was learning about signed FIT today and was unable to convince mkimage to produce a signature node in my control device tree. It turns out that Debian's packaged mkimage doesn't enable FIT_SIGNATURE, so the options I was passing were silently ignored. There's an existing Debian bug for that[1] but in the mean time this changes mkimage's behaviour to fail loudly when FIT_SIGNATURE is disabled. The first two patches fix some issues I found when testing the third patch under sandbox_defconfig with FIT_SIGNATURE=n. [1] https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=972513 Joel Stanley (3): tools/Makefile: FIT_CIPHER requires libssl image-cipher: Fix FIT_CIPHER linking mkimge: Reject signing-related flags without FIT_SIGNATURE common/image-cipher.c | 14 ++++++++++++++ tools/Makefile | 2 +- tools/mkimage.c | 9 +++++++-- 3 files changed, 22 insertions(+), 3 deletions(-) -- 2.28.0

2 8

[PATCH v2 0/9] spl: atf: add support for LOAD_IMAGE_V2
by Michael Walle 07 Dec '20

07 Dec '20

Newer TF-A versions provide a new image loading protocol. This is used on (newer?) NXP's SoCs. Normally, the bootflow is bl1 -> bl2 -> bl31 -> u-boot. With this series it is possible that U-Boot SPL loads the bl31 directly and thus replacing bl1 and bl2 from the TF-A. This was tested on the Kontron sl28 board using NXPs bl31 and the upstream version of the OP-TEE Trusted OS. Changes since v1: - removed firmware entry from loadable, suggested by Michal - use kernel-doc function annotation format - new patch "board: sl28: remove u-boot from loadable DT node" Michael Walle (9): treewide: use CONFIG_IS_ENABLED() for ARMV8_SEC_FIRMWARE_SUPPORT spl: atf: move storage for bl31_params into function spl: atf: provide a bl2_plat_get_bl31_params_default() spl: atf: remove helper structure from common header spl: atf: add support for LOAD_IMAGE_V2 armv8: layerscape: don't initialize GIC in SPL board: sl28: remove u-boot from loadable DT node board: sl28: add ATF support (bl31) board: sl28: add OP-TEE Trusted OS support (bl32) arch/arm/cpu/armv8/cpu-dt.c | 2 +- arch/arm/cpu/armv8/fsl-layerscape/fdt.c | 8 +- arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S | 2 + arch/arm/cpu/armv8/fsl-layerscape/ppa.c | 2 +- .../dts/fsl-ls1028a-kontron-sl28-u-boot.dtsi | 80 ++++++++++- arch/arm/lib/bootm-fdt.c | 2 +- arch/arm/lib/psci-dt.c | 6 +- board/kontron/sl28/Kconfig | 33 +++++ board/kontron/sl28/Makefile | 6 +- board/kontron/sl28/sl28.c | 7 + board/kontron/sl28/spl_atf.c | 54 ++++++++ common/spl/Kconfig | 9 ++ common/spl/spl_atf.c | 129 ++++++++++++++++-- include/atf_common.h | 42 ++++-- include/spl.h | 78 +++++++++-- 15 files changed, 410 insertions(+), 50 deletions(-) create mode 100644 board/kontron/sl28/spl_atf.c -- 2.20.1

3 29

[PATCH v2 00/12] bootm: Support substitions in bootargs and add tests
by Simon Glass 07 Dec '20

07 Dec '20

This series adds tests to the fixup_silent_linux() function and extends the 'zimage' command to use it. It also adds a new string-substition feature to allow bootargs to be a template, rather than having to build it up piece by piece with information obtained in a build script. It also updates zimage to use the same command-line processing. With these additions it is possible to boot Chrome OS from a U-Boot script on most Chromebooks. Changes in v2: - Add a new patch to support macro processing with a fixed-size buffer - Use ${} for subtitution instead of % - Tweak cover letter Simon Glass (12): env: Allow returning errors from hdelete_r() bootm: Add tests for fixup_silent_linux() bootm: Update fixup_silent_linux() to return an error bootm: Rename fixup_silent_linux() bootm: Add a bool parameter to bootm_process_cmdline_env() bootm: Use size rather than length for CONSOLE_ARG bootm: Split out bootargs environment reading / writing bootm: Update bootm_process_cmdline_env() to use flags bootm: Allow updating the bootargs in a buffer x86: zimage: Add silent-console processing cli: Support macro processing with a fixed-size buffer bootm: Support string substitution in bootargs arch/Kconfig | 2 + arch/x86/lib/zimage.c | 14 +++ cmd/nvedit.c | 6 +- cmd/pxe_utils.c | 6 +- common/Kconfig.boot | 17 +++ common/bootm.c | 172 +++++++++++++++++++++++------ common/cli_simple.c | 17 ++- include/bootm.h | 40 +++++++ include/cli.h | 4 +- include/search.h | 11 +- include/test/suites.h | 1 + lib/hashtable.c | 12 +- test/Makefile | 1 + test/bootm.c | 247 ++++++++++++++++++++++++++++++++++++++++++ test/cmd_ut.c | 1 + test/env/hashtable.c | 2 +- 16 files changed, 504 insertions(+), 49 deletions(-) create mode 100644 test/bootm.c -- 2.29.1.341.ge80a0c044ae-goog

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Please pull u-boot-marvell/master
by Stefan Roese 07 Dec '20

07 Dec '20

Hi Tom, please pull an update of Marvell Armada related fixes and minor additions. Here the summary log: ---------------------------------------------------------------- - Espressobin: Simplify DT handling of board variants (Pali) - Add Luka Perkov to maintainers of Puzzle-M801 (Luka) - Armada 38x: Enable board specific USB2 high-speed impedance threshold configuration (Joshua) ---------------------------------------------------------------- Here the Azure build, without any issues: https://dev.azure.com/sr0718/u-boot/_build/results?buildId=64&view=results Thanks, Stefan The following changes since commit ee1e04558ff8c8ed812b986939447f129bb0b0bb: Merge branch '2020-12-02-master-imports' (2020-12-03 09:43:47 -0500) are available in the Git repository at: git@gitlab.denx.de:u-boot/custodians/u-boot-marvell.git for you to fetch changes up to 061c6d1b238aa100728b3082fc943e8f679f8e7f: arm: mvebu: Espressobin: Detect presence of emmc at runtime (2020-12-07 07:11:37 +0100) ---------------------------------------------------------------- Joshua Scott (1): arm: mvebu: a38x: Configurable USB2 high-speed impedance threshold Luka Kovacic (1): arm: mvebu: puzzle-m801: Add a maintainer Pali Rohár (4): Revert "arm64: dts: armada-3720-espressobin: split common parts to .dtsi" Revert "arm64: dts: a3720: add support for espressobin with populated emmc" arm: mvebu: Espressobin: Add support for emmc into dts file arm: mvebu: Espressobin: Detect presence of emmc at runtime arch/arm/dts/Makefile | 1 - arch/arm/dts/armada-3720-espressobin-emmc.dts | 44 ----- arch/arm/dts/armada-3720-espressobin.dts | 186 ++++++++++++++++++++- arch/arm/dts/armada-3720-espressobin.dtsi | 167 ------------------ arch/arm/mach-mvebu/Kconfig | 6 + .../mach-mvebu/serdes/a38x/high_speed_env_spec.c | 6 +- board/Marvell/mvebu_armada-37xx/board.c | 6 +- board/Marvell/mvebu_armada-8k/MAINTAINERS | 1 + doc/README.marvell | 7 +- 9 files changed, 196 insertions(+), 228 deletions(-) delete mode 100644 arch/arm/dts/armada-3720-espressobin-emmc.dts delete mode 100644 arch/arm/dts/armada-3720-espressobin.dtsi

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[PATCH 1/1] efi_loader: remove EFI_HII_CONFIG_ROUTING_PROTOCOL
by Heinrich Schuchardt 07 Dec '20

07 Dec '20

Our implementation of the EFI_HII_CONFIG_ROUTING_PROTOCOL is a mere stub, where all services return an error code. The protocol is neither needed for the EFI shell nor for the UEFI SCT. To reduce the code size remove it from the U-Boot binary. Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- lib/efi_loader/Makefile | 2 +- lib/efi_loader/efi_hii_config.c | 10 +++++++--- lib/efi_loader/efi_root_node.c | 3 --- 3 files changed, 8 insertions(+), 7 deletions(-) diff --git a/lib/efi_loader/Makefile b/lib/efi_loader/Makefile index 0afcaf4813..462d4d9ac4 100644 --- a/lib/efi_loader/Makefile +++ b/lib/efi_loader/Makefile @@ -30,7 +30,7 @@ obj-y += efi_device_path.o obj-$(CONFIG_EFI_DEVICE_PATH_TO_TEXT) += efi_device_path_to_text.o obj-y += efi_device_path_utilities.o obj-y += efi_file.o -obj-$(CONFIG_EFI_LOADER_HII) += efi_hii.o efi_hii_config.o +obj-$(CONFIG_EFI_LOADER_HII) += efi_hii.o obj-y += efi_image_loader.o obj-y += efi_memory.o obj-y += efi_root_node.o diff --git a/lib/efi_loader/efi_hii_config.c b/lib/efi_loader/efi_hii_config.c index 26ea4b9bc0..237e8acf84 100644 --- a/lib/efi_loader/efi_hii_config.c +++ b/lib/efi_loader/efi_hii_config.c @@ -1,9 +1,13 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * EFI Human Interface Infrastructure ... Configuration + * EFI Human Interface Infrastructure ... Configuration * - * Copyright (c) 2017 Leif Lindholm - * Copyright (c) 2018 AKASHI Takahiro, Linaro Limited + * Copyright (c) 2017 Leif Lindholm + * Copyright (c) 2018 AKASHI Takahiro, Linaro Limited + * + * As this is still a non-working stub and the protocol is neither required + * by the EFI shell nor by the UEFI SCT this module has been removed from + * the Makefile. */ #include <common.h> diff --git a/lib/efi_loader/efi_root_node.c b/lib/efi_loader/efi_root_node.c index f68b0fdc61..b17db312f7 100644 --- a/lib/efi_loader/efi_root_node.c +++ b/lib/efi_loader/efi_root_node.c @@ -77,9 +77,6 @@ efi_status_t efi_root_node_register(void) /* HII database protocol */ &efi_guid_hii_database_protocol, (void *)&efi_hii_database, - /* HII configuration routing protocol */ - &efi_guid_hii_config_routing_protocol, - (void *)&efi_hii_config_routing, #endif NULL)); efi_root->type = EFI_OBJECT_TYPE_U_BOOT_FIRMWARE; -- 2.29.2

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