November 2020 - U-Boot

[PATCH 1/1] efi_selftest: provide unit test for the EFI_TCG2_PROTOCOL
by Heinrich Schuchardt 14 Nov '20

14 Nov '20

Provide a minimal test for the EFI_TCG2_PROTOCOL. Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- lib/efi_selftest/Makefile | 1 + lib/efi_selftest/efi_selftest_tcg2.c | 75 ++++++++++++++++++++++++++++ 2 files changed, 76 insertions(+) create mode 100644 lib/efi_selftest/efi_selftest_tcg2.c diff --git a/lib/efi_selftest/Makefile b/lib/efi_selftest/Makefile index aabb743ecb..58fb43fcdf 100644 --- a/lib/efi_selftest/Makefile +++ b/lib/efi_selftest/Makefile @@ -55,6 +55,7 @@ obj-$(CONFIG_EFI_LOADER_HII) += efi_selftest_hii.o obj-$(CONFIG_EFI_RNG_PROTOCOL) += efi_selftest_rng.o obj-$(CONFIG_EFI_GET_TIME) += efi_selftest_rtc.o obj-$(CONFIG_EFI_LOAD_FILE2_INITRD) += efi_selftest_load_initrd.o +obj-$(CONFIG_EFI_TCG2_PROTOCOL) += efi_selftest_tcg2.o ifeq ($(CONFIG_GENERATE_ACPI_TABLE),) obj-y += efi_selftest_fdt.o diff --git a/lib/efi_selftest/efi_selftest_tcg2.c b/lib/efi_selftest/efi_selftest_tcg2.c new file mode 100644 index 0000000000..dcaac34618 --- /dev/null +++ b/lib/efi_selftest/efi_selftest_tcg2.c @@ -0,0 +1,75 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * efi_selftest_devicepath + * + * Copyright (c) 2020 Heinrich Schuchardt <xypron.glpk(a)gmx.de> + * + * Test the EFI_TCG2_PROTOCOL + */ + +#include <efi_selftest.h> +#include <efi_tcg2.h> + +static struct efi_boot_services *boottime; +static const efi_guid_t guid_tcg2 = EFI_TCG2_PROTOCOL_GUID; + +/** + * efi_st_tcg2_setup() - setup test + * + * @handle: handle of the loaded image + * @systable: system table + * @return: status code + */ +static int efi_st_tcg2_setup(const efi_handle_t img_handle, + const struct efi_system_table *systable) +{ + boottime = systable->boottime; + + return EFI_ST_SUCCESS; +} + +/** + * efi_st_tcg2_execute() - execute test + * + * Call the GetCapability service of the EFI_TCG2_PROTOCOL. + * + * Return: status code + */ +static int efi_st_tcg2_execute(void) +{ + struct efi_tcg2_protocol *tcg2; + struct efi_tcg2_boot_service_capability capability; + efi_status_t ret; + + ret = boottime->locate_protocol(&guid_tcg2, NULL, (void **)&tcg2); + if (ret != EFI_SUCCESS) { + efi_st_error("TCG2 protocol is not available.\n"); + return EFI_ST_FAILURE; + } + capability.size = sizeof(struct efi_tcg2_boot_service_capability) - 1; + ret = tcg2->get_capability(tcg2, &capability); + if (ret != EFI_BUFFER_TOO_SMALL) { + efi_st_error("tcg2->get_capability on small buffer failed\n"); + return EFI_ST_FAILURE; + } + capability.size = sizeof(struct efi_tcg2_boot_service_capability); + ret = tcg2->get_capability(tcg2, &capability); + if (ret != EFI_SUCCESS) { + efi_st_error("tcg2->get_capability failed\n"); + return EFI_ST_FAILURE; + } + if (!capability.tpm_present_flag) { + efi_st_error("TPM not present\n"); + return EFI_ST_FAILURE; + } + efi_st_printf("TPM supports 0x%.8x event logs\n", + capability.supported_event_logs); + return EFI_ST_SUCCESS; +} + +EFI_UNIT_TEST(tcg2) = { + .name = "tcg2", + .phase = EFI_EXECUTE_BEFORE_BOOTTIME_EXIT, + .execute = efi_st_tcg2_execute, + .setup = efi_st_tcg2_setup, +}; -- 2.29.2

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[PATCH 1/1] efi_loader: missing \n in RNG log messages
by Heinrich Schuchardt 14 Nov '20

14 Nov '20

When setting up the EFI_RNG_PROTOCOL warning messages may be issued. The messages should end with a newline. Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- lib/efi_loader/efi_rng.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/efi_loader/efi_rng.c b/lib/efi_loader/efi_rng.c index a8a87007b6..8bdadad0a9 100644 --- a/lib/efi_loader/efi_rng.c +++ b/lib/efi_loader/efi_rng.c @@ -166,13 +166,13 @@ efi_status_t efi_rng_register(void) ret = platform_get_rng_device(&dev); if (ret != EFI_SUCCESS) { - log_warning("Missing RNG device for EFI_RNG_PROTOCOL"); + log_warning("Missing RNG device for EFI_RNG_PROTOCOL\n"); return EFI_SUCCESS; } ret = efi_add_protocol(efi_root, &efi_guid_rng_protocol, (void *)&efi_rng_protocol); if (ret != EFI_SUCCESS) - log_err("Cannot install EFI_RNG_PROTOCOL"); + log_err("Cannot install EFI_RNG_PROTOCOL\n"); return ret; } -- 2.28.0

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CONFIG: btrfs requires sha256
by Ferry Toth 13 Nov '20

13 Nov '20

In v2021.01-rc2 enabling CONFIG_FS_BTRFS=y produces: x86_64-poky-linux-ld.bfd: fs/built-in.o: in function `hash_sha256': u-boot/1_2021.01-rc2-r0/git/fs/btrfs/crypto/hash.c:25: undefined reference to `sha256_starts' x86_64-poky-linux-ld.bfd: u-boot/1_2021.01-rc2-r0/git/fs/btrfs/crypto/hash.c:26: undefined reference to `sha256_update' x86_64-poky-linux-ld.bfd: u-boot/1_2021.01-rc2-r0/git/fs/btrfs/crypto/hash.c:27: undefined reference to `sha256_finish' Enabling CONFIG_SHA256=y resolves this, however it is not a dependency.

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[PATCH RFC 0/2] Add DM driver for KSZ9477/KSZ9897/KSZ9567 GbE Switch
by Tim Harvey 13 Nov '20

13 Nov '20

This patch series adds a driver for the Microchip 7-port KSZ9477/KSZ9897/KSZ9567 GbE Switch. This was tested on an IMX8MM board that has its FEC MAC RGMII connected to the CPU uplink port of a KSZ9897 and I2C controlling the KSZ9897 registers. I found that the UCLASS_ETH_PHY class appears appropriate for binding an mii bus to a eth device however I had to remove some restrictions in the eth_phy_get_mdio_bus() and eth_phy_set_mdio_bus() in order to accomplish this as they only allowed binding a phy to an eth if it was a child node of the eth device. Specific comments I'm looking for here are: - Please verify that I'm using the correct class or if there is a better way to register such that the phy would be bound with a mac. - I'm hoping Peng and Yi Li can review and test my changes to eth-phy-uclass to make sure it still works with whatever boards they added that class - I'm not quite clear how best to handle the configuration of the LED mode. I feel like this should be a dt property honored by both the u-boot driver and the linux driver (ksz9477.c) as the linux driver does a reset on the phy and clobbers the LED configuration. Best Regards, Tim Tim Harvey (2): net: eth-phy-uclass: allow flexible mii to eth bindings net: add support for KSZ9477/KSZ9897/KSZ9567 GbE switch MAINTAINERS | 5 + drivers/net/eth-phy-uclass.c | 41 ++-- drivers/net/phy/Kconfig | 15 ++ drivers/net/phy/Makefile | 1 + drivers/net/phy/ksz9477.c | 533 +++++++++++++++++++++++++++++++++++++++++++ 5 files changed, 573 insertions(+), 23 deletions(-) create mode 100644 drivers/net/phy/ksz9477.c -- 2.7.4

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[PATCH] mpc83xx: Fix dcache setup in lock_ram_in_cache
by Joakim Tjernlund 13 Nov '20

13 Nov '20

Lock dcache before clearing INIT_RAM. More importantly, invalidate dcache contents before using it as RAM. Signed-off-by: Joakim Tjernlund <joakim.tjernlund(a)infinera.com> --- Something odd happend, on a stable mpc8321 board, small unrelated code changes made the board unbootable. Debugging with an emulator it looked like something pulled away the dcache while it was in early boot stages. I found that if I let the emulator init the DDR before executing, all was OK again. To me this looked like there was some garbage in the dcache causing some DDR access. All this led me to lock_ram_in_cache and the the resluting changes in this patch. 86xx could possible need the same fix arch/powerpc/cpu/mpc83xx/start.S | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/arch/powerpc/cpu/mpc83xx/start.S b/arch/powerpc/cpu/mpc83xx/start.S index c00bb31363..a1f3b56433 100644 --- a/arch/powerpc/cpu/mpc83xx/start.S +++ b/arch/powerpc/cpu/mpc83xx/start.S @@ -1071,18 +1071,22 @@ lock_ram_in_cache: ori r3, r3, (CONFIG_SYS_INIT_RAM_ADDR & ~31)@l li r4, ((CONFIG_SYS_INIT_RAM_SIZE & ~31) + \ (CONFIG_SYS_INIT_RAM_ADDR & 31) + 31) / 32 + /* Lock the data cache */ + mfspr r0, HID0 + ori r0, r0, HID0_DLOCK|HID0_DCFI + sync + mtspr HID0, r0 + rlwinm r0, r0, 0, ~HID0_DCFI /* Clear HID0_DCFI */ + sync + mtspr HID0, r0 + sync + mtctr r4 1: dcbz r0, r3 addi r3, r3, 32 bdnz 1b - /* Lock the data cache */ - mfspr r0, HID0 - ori r0, r0, HID0_DLOCK - sync - mtspr HID0, r0 - sync blr #ifndef MINIMAL_SPL -- 2.26.2

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[PATCH 1/2] pinctrl: k210: Fix inverted IE and OE for I2C
by Sean Anderson 13 Nov '20

13 Nov '20

I2C and SCCB previously shared defaults. However, SCCB needs OE_INV and IE_INV set, but I2C cannot have those bits set. This adds a separate default for SCCB. Signed-off-by: Sean Anderson <seanga2(a)gmail.com> Reported-by: Damien Le Moal <Damien.LeMoal(a)wdc.com> --- drivers/pinctrl/pinctrl-kendryte.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/pinctrl/pinctrl-kendryte.c b/drivers/pinctrl/pinctrl-kendryte.c index 5ad049d955..259a0b507b 100644 --- a/drivers/pinctrl/pinctrl-kendryte.c +++ b/drivers/pinctrl/pinctrl-kendryte.c @@ -55,8 +55,9 @@ #define K210_PC_MODE_IN (K210_PC_IE | K210_PC_ST) #define K210_PC_MODE_OUT (K210_PC_DRIVE_7 | K210_PC_OE) -#define K210_PC_MODE_I2C (K210_PC_MODE_IN | K210_PC_IE_INV | K210_PC_SL | \ - K210_PC_OE | K210_PC_OE_INV | K210_PC_PU) +#define K210_PC_MODE_I2C (K210_PC_MODE_IN | K210_PC_SL | K210_PC_OE | \ + K210_PC_PU) +#define K210_PC_MODE_SCCB (K210_PC_MODE_I2C | K210_PC_OE_INV | K210_PC_IE_INV) #define K210_PC_MODE_SPI (K210_PC_MODE_IN | K210_PC_IE_INV | \ K210_PC_MODE_OUT | K210_PC_OE_INV) #define K210_PC_MODE_GPIO (K210_PC_MODE_IN | K210_PC_MODE_OUT) @@ -189,6 +190,7 @@ static const u32 k210_pc_mode_id_to_mode[] = { [K210_PC_DEFAULT_IN_TIE] = K210_PC_MODE_IN, DEFAULT(OUT), DEFAULT(I2C), + DEFAULT(SCCB), DEFAULT(SPI), DEFAULT(GPIO), [K210_PC_DEFAULT_INT13] = K210_PC_MODE_IN | K210_PC_PU, @@ -362,8 +364,8 @@ static const struct k210_pcf_info k210_pcf_infos[] = { FUNC(DVP_D5, IN), FUNC(DVP_D6, IN), FUNC(DVP_D7, IN), - FUNC(SCCB_SCLK, I2C), - FUNC(SCCB_SDA, I2C), + FUNC(SCCB_SCLK, SCCB), + FUNC(SCCB_SDA, SCCB), FUNC(UART1_CTS, IN), FUNC(UART1_DSR, IN), FUNC(UART1_DCD, IN), -- 2.28.0

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[PATCH v2 1/2] pinctrl: k210: Fix inverted IE and OE for I2C
by Sean Anderson 13 Nov '20

13 Nov '20

I2C and SCCB previously shared defaults. However, SCCB needs OE_INV and IE_INV set, but I2C cannot have those bits set. This adds a separate default for SCCB. Signed-off-by: Sean Anderson <seanga2(a)gmail.com> Reported-by: Damien Le Moal <Damien.LeMoal(a)wdc.com> --- Changes in v2: - Fix build error drivers/pinctrl/pinctrl-kendryte.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/drivers/pinctrl/pinctrl-kendryte.c b/drivers/pinctrl/pinctrl-kendryte.c index 5ad049d955..dac3800cab 100644 --- a/drivers/pinctrl/pinctrl-kendryte.c +++ b/drivers/pinctrl/pinctrl-kendryte.c @@ -55,8 +55,9 @@ #define K210_PC_MODE_IN (K210_PC_IE | K210_PC_ST) #define K210_PC_MODE_OUT (K210_PC_DRIVE_7 | K210_PC_OE) -#define K210_PC_MODE_I2C (K210_PC_MODE_IN | K210_PC_IE_INV | K210_PC_SL | \ - K210_PC_OE | K210_PC_OE_INV | K210_PC_PU) +#define K210_PC_MODE_I2C (K210_PC_MODE_IN | K210_PC_SL | K210_PC_OE | \ + K210_PC_PU) +#define K210_PC_MODE_SCCB (K210_PC_MODE_I2C | K210_PC_OE_INV | K210_PC_IE_INV) #define K210_PC_MODE_SPI (K210_PC_MODE_IN | K210_PC_IE_INV | \ K210_PC_MODE_OUT | K210_PC_OE_INV) #define K210_PC_MODE_GPIO (K210_PC_MODE_IN | K210_PC_MODE_OUT) @@ -176,6 +177,7 @@ enum k210_pc_mode_id { K210_PC_DEFAULT_IN_TIE, K210_PC_DEFAULT_OUT, K210_PC_DEFAULT_I2C, + K210_PC_DEFAULT_SCCB, K210_PC_DEFAULT_SPI, K210_PC_DEFAULT_GPIO, K210_PC_DEFAULT_INT13, @@ -189,6 +191,7 @@ static const u32 k210_pc_mode_id_to_mode[] = { [K210_PC_DEFAULT_IN_TIE] = K210_PC_MODE_IN, DEFAULT(OUT), DEFAULT(I2C), + DEFAULT(SCCB), DEFAULT(SPI), DEFAULT(GPIO), [K210_PC_DEFAULT_INT13] = K210_PC_MODE_IN | K210_PC_PU, @@ -362,8 +365,8 @@ static const struct k210_pcf_info k210_pcf_infos[] = { FUNC(DVP_D5, IN), FUNC(DVP_D6, IN), FUNC(DVP_D7, IN), - FUNC(SCCB_SCLK, I2C), - FUNC(SCCB_SDA, I2C), + FUNC(SCCB_SCLK, SCCB), + FUNC(SCCB_SDA, SCCB), FUNC(UART1_CTS, IN), FUNC(UART1_DSR, IN), FUNC(UART1_DCD, IN), -- 2.29.2

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[patch v2 00/10] rk3399 (Pinebook pro) EDP support
by Arnaud Patard 13 Nov '20

13 Nov '20

This patchset add support for the rk3399 eDP. It has been tested on the pinebook pro and Google Kevin chromeos devices. The changes have been written by studying the linux code, since I didn't find any manual for theses part of the RK3399 SoC. For Kevin devices, this patchset is needed: https://patchwork.ozlabs.org/project/uboot/list/?series=209553 On the linux kernel side, on recent kernels, it needs commit "pwm: rockchip: Keep enabled PWMs running while probing" otherwise the pinebook pro will freeze when probing the display. Changes since v2: - Add reset support for the VOP and eDP. This was needed and it appears to also solve the issue with warm reset. - Fix a debug string in the vop driver - Drop the patch "drivers/video/rockchip/rk_edp.c: Change clock rate". - Address various comments

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[PATCH] rockchip: Pinebook Pro: Fix USB
by Peter Robinson 13 Nov '20

13 Nov '20

Improve USB config so keyboard and USB-A ports work. Signed-off-by: Peter Robinson <pbrobinson(a)gmail.com> --- configs/pinebook-pro-rk3399_defconfig | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig index 1ed54ad0ed..8fbd7280ac 100644 --- a/configs/pinebook-pro-rk3399_defconfig +++ b/configs/pinebook-pro-rk3399_defconfig @@ -55,6 +55,8 @@ CONFIG_SPI_FLASH_WINBOND=y CONFIG_DM_ETH=y CONFIG_NVME=y CONFIG_PCI=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_TYPEC=y CONFIG_DM_PMIC_FAN53555=y CONFIG_PMIC_RK8XX=y CONFIG_REGULATOR_PWM=y @@ -76,8 +78,9 @@ CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y CONFIG_USB_DWC3=y -CONFIG_ROCKCHIP_USB2_PHY=y +CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_KEYBOARD=y +CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_RTL8152=y -- 2.28.0

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[PATCH] video: rockchip: Restrict EDP, VOP, MIPI files to GPL-2.0
by Alper Nebi Yasak 13 Nov '20

13 Nov '20

These files have a lot of code in common with their counterparts in coreboot, especially in their earlier revisions: U-Boot | coreboot --------------------------------------|-------------------------------------------- drivers/video/rockchip/: | src/soc/rockchip/: - rk_edp.c (GPL-2.0+) | - common/edp.c (GPL-2.0-only) " | - rk3288/display.c (GPL-2.0-only) " | - rk3399/display.c (GPL-2.0-only) - rk_hdmi.h (GPL-2.0+) | (none) - rk_hdmi.c (GPL-2.0+) | - rk3288/hdmi.c (GPL-2.0-or-later) - rk3288_hdmi.c (GPL-2.0+) | - rk3288/hdmi.c (GPL-2.0-or-later) - rk3399_hdmi.c (GPL-2.0+) | (none) - rk_mipi.h (GPL-2.0+) | (none) - rk_mipi.c (GPL-2.0+) | - rk3399/mipi.c (GPL-2.0-only) - rk3288_mipi.c (GPL-2.0+) | - rk3399/mipi.c (GPL-2.0-only) - rk3399_mipi.c (GPL-2.0+) | - rk3399/mipi.c (GPL-2.0-only) - rk_lvds.c (GPL-2.0+) | (none) - rk_vop.h (GPL-2.0+) | (none) - rk_vop.c (GPL-2.0+) | - common/vop.c (GPL-2.0-only) - rk3288_vop.c (GPL-2.0+) | - common/vop.c (GPL-2.0-only) - rk3399_vop.c (GPL-2.0+) | (none) | arch/arm/include/asm/arch-rockchip/: | src/soc/rockchip/*/include/soc/*: - edp_rk3288.h (GPL-2.0+) | - common/.../edp.h (GPL-2.0-only) " | - rk3288/.../display.h (GPL-2.0-only) " | - rk3399/.../display.h (GPL-2.0-only) - vop_rk3288.h (GPL-2.0+) | - common/.../vop.h (GPL-2.0-only) Restrict the licenses to match coreboot's so that changes from coreboot can be imported to U-Boot as necessary. HDMI files are already 2.0+ there and rk_lvds.c has no counterpart, so keep them as is. Cc: Simon Glass <sjg(a)chromium.org> Cc: Philipp Tomsich <philipp.tomsich(a)theobroma-systems.com> Cc: Eric Gao <eric.gao(a)rock-chips.com> Cc: Jacob Chen <jacob-chen(a)iotwrt.com> Signed-off-by: Alper Nebi Yasak <alpernebiyasak(a)gmail.com> --- See Tom Rini's comment [1] and the preceding discussion for more context. [1] https://patchwork.ozlabs.org/comment/2554434/ arch/arm/include/asm/arch-rockchip/edp_rk3288.h | 2 +- arch/arm/include/asm/arch-rockchip/vop_rk3288.h | 2 +- drivers/video/rockchip/rk3288_mipi.c | 2 +- drivers/video/rockchip/rk3288_vop.c | 2 +- drivers/video/rockchip/rk3399_mipi.c | 2 +- drivers/video/rockchip/rk3399_vop.c | 2 +- drivers/video/rockchip/rk_edp.c | 2 +- drivers/video/rockchip/rk_mipi.c | 2 +- drivers/video/rockchip/rk_mipi.h | 2 +- drivers/video/rockchip/rk_vop.c | 2 +- drivers/video/rockchip/rk_vop.h | 2 +- 11 files changed, 11 insertions(+), 11 deletions(-) diff --git a/arch/arm/include/asm/arch-rockchip/edp_rk3288.h b/arch/arm/include/asm/arch-rockchip/edp_rk3288.h index 105a335dabac..94e5bb674f2d 100644 --- a/arch/arm/include/asm/arch-rockchip/edp_rk3288.h +++ b/arch/arm/include/asm/arch-rockchip/edp_rk3288.h @@ -1,4 +1,4 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ +/* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (c) 2015 Google, Inc * Copyright 2014 Rockchip Inc. diff --git a/arch/arm/include/asm/arch-rockchip/vop_rk3288.h b/arch/arm/include/asm/arch-rockchip/vop_rk3288.h index 872a158b714b..52446e97c691 100644 --- a/arch/arm/include/asm/arch-rockchip/vop_rk3288.h +++ b/arch/arm/include/asm/arch-rockchip/vop_rk3288.h @@ -1,4 +1,4 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ +/* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (c) 2015 Google, Inc * Copyright 2014 Rockchip Inc. diff --git a/drivers/video/rockchip/rk3288_mipi.c b/drivers/video/rockchip/rk3288_mipi.c index b232ff0b76b2..8ac0125b502e 100644 --- a/drivers/video/rockchip/rk3288_mipi.c +++ b/drivers/video/rockchip/rk3288_mipi.c @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0+ +// SPDX-License-Identifier: GPL-2.0 /* * Copyright (c) 2017, Fuzhou Rockchip Electronics Co., Ltd * Author: Eric Gao <eric.gao(a)rock-chips.com> diff --git a/drivers/video/rockchip/rk3288_vop.c b/drivers/video/rockchip/rk3288_vop.c index 68d1507cda46..9ec33e6e511b 100644 --- a/drivers/video/rockchip/rk3288_vop.c +++ b/drivers/video/rockchip/rk3288_vop.c @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0+ +// SPDX-License-Identifier: GPL-2.0 /* * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH * Copyright (c) 2015 Google, Inc diff --git a/drivers/video/rockchip/rk3399_mipi.c b/drivers/video/rockchip/rk3399_mipi.c index 113708d97e5a..e5534c36e6ef 100644 --- a/drivers/video/rockchip/rk3399_mipi.c +++ b/drivers/video/rockchip/rk3399_mipi.c @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0+ +// SPDX-License-Identifier: GPL-2.0 /* * Copyright (c) 2017, Fuzhou Rockchip Electronics Co., Ltd * Author: Eric Gao <eric.gao(a)rock-chips.com> diff --git a/drivers/video/rockchip/rk3399_vop.c b/drivers/video/rockchip/rk3399_vop.c index d5a7aa8ac1b3..55d1be0411db 100644 --- a/drivers/video/rockchip/rk3399_vop.c +++ b/drivers/video/rockchip/rk3399_vop.c @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0+ +// SPDX-License-Identifier: GPL-2.0 /* * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH * Copyright (c) 2015 Google, Inc diff --git a/drivers/video/rockchip/rk_edp.c b/drivers/video/rockchip/rk_edp.c index 000bd4814088..87301066ccf6 100644 --- a/drivers/video/rockchip/rk_edp.c +++ b/drivers/video/rockchip/rk_edp.c @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0+ +// SPDX-License-Identifier: GPL-2.0 /* * Copyright (c) 2015 Google, Inc * Copyright 2014 Rockchip Inc. diff --git a/drivers/video/rockchip/rk_mipi.c b/drivers/video/rockchip/rk_mipi.c index f811913ce5e2..d125a5ba7374 100644 --- a/drivers/video/rockchip/rk_mipi.c +++ b/drivers/video/rockchip/rk_mipi.c @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0+ +// SPDX-License-Identifier: GPL-2.0 /* * Copyright (c) 2017, Fuzhou Rockchip Electronics Co., Ltd * Author: Eric Gao <eric.gao(a)rock-chips.com> diff --git a/drivers/video/rockchip/rk_mipi.h b/drivers/video/rockchip/rk_mipi.h index 61920f23ad96..3d1e440b0ec5 100644 --- a/drivers/video/rockchip/rk_mipi.h +++ b/drivers/video/rockchip/rk_mipi.h @@ -1,4 +1,4 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ +/* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (c) 2017, Fuzhou Rockchip Electronics Co., Ltd * Author: Eric Gao <eric.gao(a)rock-chips.com> diff --git a/drivers/video/rockchip/rk_vop.c b/drivers/video/rockchip/rk_vop.c index 9032eb430e7f..6475b3e2aff5 100644 --- a/drivers/video/rockchip/rk_vop.c +++ b/drivers/video/rockchip/rk_vop.c @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0+ +// SPDX-License-Identifier: GPL-2.0 /* * Copyright (c) 2015 Google, Inc * Copyright 2014 Rockchip Inc. diff --git a/drivers/video/rockchip/rk_vop.h b/drivers/video/rockchip/rk_vop.h index 8fa2f3893900..53a79c04b5c5 100644 --- a/drivers/video/rockchip/rk_vop.h +++ b/drivers/video/rockchip/rk_vop.h @@ -1,4 +1,4 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ +/* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH */ -- 2.28.0

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