January 2020 - U-Boot

[U-Boot] [PATCH] cmd: pxe: Use internal FDT if external one cannot be retrieved
by Anton Leontiev 02 Dec '20

02 Dec '20

From: Anton Leontiev <aleontiev(a)elvees.com> Original commit c61d94d86035 ("pxe: implement fdtdir extlinux.conf tag") states, that if FDT file cannot be retrieved then FDT packaged in firmware should be used. If FDT file cannot be retrieved and it is specified explicitly using FDT keyword then the label is skipped. If it cannot be found in FDTDIR then internal FDT is tried first. Signed-off-by: Anton Leontiev <aleontiev(a)elvees.com> --- cmd/pxe.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/cmd/pxe.c b/cmd/pxe.c index 2059975446..28390c114c 100644 --- a/cmd/pxe.c +++ b/cmd/pxe.c @@ -795,9 +795,13 @@ static int label_boot(cmd_tbl_t *cmdtp, struct pxe_label *label) int err = get_relfile_envaddr(cmdtp, fdtfile, "fdt_addr_r"); free(fdtfilefree); if (err < 0) { - printf("Skipping %s for failure retrieving fdt\n", - label->name); - goto cleanup; + bootm_argv[3] = NULL; + + if (label->fdt) { + printf("Skipping %s for failure retrieving FDT\n", + label->name); + goto cleanup; + } } } else { bootm_argv[3] = NULL; -- 2.22.1

3 10

[U-Boot] [PATCH] Adds basic support for ProxyDHCP
by lylejfranklin＠gmail.com 02 Dec '20

02 Dec '20

From: Lyle Franklin <lylejfranklin(a)gmail.com> - ProxyDHCP allows a second DHCP server to exist alongside your main DHCP server and supply additional BOOTP related options - When u-boot sends out a DHCP request, the real DHCP server will respond with a normal response containing the new client IP address while simultaneously the ProxyDHCP server will respond with a blank client IP address and a `bootfile` option - This patch adds CONFIG_SERVERIP_FROM_PROXYDHCP (default false) to enable this behavior and CONFIG_SERVERIP_FROM_PROXYDHCP_DELAY_MS (default 100) which tells u-boot to wait additional time after receiving the main DHCP response to give the ProxyDHCP response time to arrive - The PXE spec for ProxyDHCP is more complicated than the solution added here as diagramed on page 16: http://www.pix.net/software/pxeboot/archive/pxespec.pdf: ``` DHCP Discover will be retried four times. The four timeouts are 4, 8, 16 and 32 seconds respectively. If a DHCPOFFER is received without an Option timeouts in an attempt to receive a PXE response. ``` - Adding a simple delay worked for my purposes but let me know if a more robust solution is required Signed-off-by: Lyle Franklin <lylejfranklin(a)gmail.com> --- net/Kconfig | 14 ++++++++++++++ net/bootp.c | 27 ++++++++++++++++++++++----- 2 files changed, 36 insertions(+), 5 deletions(-) diff --git a/net/Kconfig b/net/Kconfig index 68cecf75a2..e46eb7833a 100644 --- a/net/Kconfig +++ b/net/Kconfig @@ -35,4 +35,18 @@ config TFTP_BLOCKSIZE help Default TFTP block size. +config SERVERIP_FROM_PROXYDHCP + bool "Get serverip value from Proxy DHCP response" + help + Allows bootfile config to be fetched from Proxy DHCP server + while IP is obtained from main DHCP server. + +config SERVERIP_FROM_PROXYDHCP_DELAY_MS + int "# of additional milliseconds to wait for ProxyDHCP response" + default 100 + help + Amount of additional time to wait for ProxyDHCP response after + receiving response from main DHCP server. Has no effect if + SERVERIP_FROM_PROXYDHCP is false. + endif # if NET diff --git a/net/bootp.c b/net/bootp.c index 9a2b512e4a..218dfde728 100644 --- a/net/bootp.c +++ b/net/bootp.c @@ -140,10 +140,7 @@ static int check_reply_packet(uchar *pkt, unsigned dest, unsigned src, return retval; } -/* - * Copy parameters of interest from BOOTP_REPLY/DHCP_OFFER packet - */ -static void store_net_params(struct bootp_hdr *bp) +static void store_bootp_params(struct bootp_hdr *bp) { #if !defined(CONFIG_BOOTP_SERVERIP) struct in_addr tmp_ip; @@ -176,6 +173,16 @@ static void store_net_params(struct bootp_hdr *bp) */ if (*net_boot_file_name) env_set("bootfile", net_boot_file_name); +#endif +} + +/* + * Copy parameters of interest from BOOTP_REPLY/DHCP_OFFER packet + */ +static void store_net_params(struct bootp_hdr *bp) +{ +#if !defined(CONFIG_SERVERIP_FROM_PROXYDHCP) + store_bootp_params(bp); #endif net_copy_ip(&net_ip, &bp->bp_yiaddr); } @@ -1049,8 +1056,12 @@ static void dhcp_handler(uchar *pkt, unsigned dest, struct in_addr sip, debug("DHCPHandler: got DHCP packet: (src=%d, dst=%d, len=%d) state: " "%d\n", src, dest, len, dhcp_state); - if (net_read_ip(&bp->bp_yiaddr).s_addr == 0) + if (net_read_ip(&bp->bp_yiaddr).s_addr == 0) { +#if defined(CONFIG_SERVERIP_FROM_PROXYDHCP) + store_bootp_params(bp); +#endif return; + } switch (dhcp_state) { case SELECTING: @@ -1069,6 +1080,12 @@ static void dhcp_handler(uchar *pkt, unsigned dest, struct in_addr sip, dhcp_packet_process_options(bp); efi_net_set_dhcp_ack(pkt, len); +#if defined(CONFIG_SERVERIP_FROM_PROXYDHCP) + if (!net_server_ip.s_addr) + udelay(CONFIG_SERVERIP_FROM_PROXYDHCP_DELAY_MS * + 1000); +#endif /* CONFIG_SERVERIP_FROM_PROXYDHCP */ + debug("TRANSITIONING TO REQUESTING STATE\n"); dhcp_state = REQUESTING; -- 2.22.0

2 1

[U-Boot] Booting on RK3399
by Simon Glass 19 Nov '20

19 Nov '20

Hi Kever, I have a firefly-rk3399 and would like to boot it into U-Boot (as a start) from an uSD card. Are there instructions somewhere on how to do this? I gather that I need OP-TEE but not how to build it or how to put the image together. I would like to have instructions in README.rockchip if possible. I'm planning to add U-Boot support for bob and maybe kevin (both Chromebooks) but am not sure where to start. I thought the firefly might be best since it is pretty common. Thanks for any help you can provide. Regards, Simon

6 22

[PATCH] arm64: versal: Generate position-independent pre-relocation code
by Michal Simek 23 Sep '20

23 Sep '20

Enable position independent pre-relocation to let users options to put u-boot to different locations. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- configs/xilinx_versal_virt_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig index 6488bca2c004..c7d9c22f4454 100644 --- a/configs/xilinx_versal_virt_defconfig +++ b/configs/xilinx_versal_virt_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_POSITION_INDEPENDENT=y CONFIG_ARCH_VERSAL=y CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_SYS_MALLOC_F_LEN=0x100000 -- 2.24.0

2 1

[U-Boot] [PATCH] board: Add support for iMX8QXP AI_ML board
by Manivannan Sadhasivam 27 Jul '20

27 Jul '20

This commit adds initial board support for iMX8QXP AI_ML board from Einfochips. This board is one of the 96Boards Consumer Edition and AI boards of the 96Boards family based on i.MX8QXP SoC from NXP/Freescale. This initial supports contains following peripherals which are tested and known to work: 1. Debug serial via UART2 2. SD card 3. Ethernet More information about this board can be found in arrow website: https://www.arrow.com/en/products/imx8-ai-ml/arrow-development-tools Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam(a)linaro.org> Reviewed-by: Peng Fan <peng.fan(a)nxp.com> --- arch/arm/mach-imx/imx8/Kconfig | 6 ++ board/einfochips/imx8qxp_ai_ml/Kconfig | 21 ++++ board/einfochips/imx8qxp_ai_ml/MAINTAINERS | 6 ++ board/einfochips/imx8qxp_ai_ml/Makefile | 8 ++ board/einfochips/imx8qxp_ai_ml/README | 49 ++++++++++ .../einfochips/imx8qxp_ai_ml/imx8qxp_ai_ml.c | 78 +++++++++++++++ board/einfochips/imx8qxp_ai_ml/imximage.cfg | 24 +++++ board/einfochips/imx8qxp_ai_ml/spl.c | 39 ++++++++ configs/imx8qxp_ai_ml_defconfig | 83 ++++++++++++++++ include/configs/imx8qxp_ai_ml.h | 95 +++++++++++++++++++ 10 files changed, 409 insertions(+) create mode 100644 board/einfochips/imx8qxp_ai_ml/Kconfig create mode 100644 board/einfochips/imx8qxp_ai_ml/MAINTAINERS create mode 100644 board/einfochips/imx8qxp_ai_ml/Makefile create mode 100644 board/einfochips/imx8qxp_ai_ml/README create mode 100644 board/einfochips/imx8qxp_ai_ml/imx8qxp_ai_ml.c create mode 100644 board/einfochips/imx8qxp_ai_ml/imximage.cfg create mode 100644 board/einfochips/imx8qxp_ai_ml/spl.c create mode 100644 configs/imx8qxp_ai_ml_defconfig create mode 100644 include/configs/imx8qxp_ai_ml.h diff --git a/arch/arm/mach-imx/imx8/Kconfig b/arch/arm/mach-imx/imx8/Kconfig index cdb78afacf..25fe4e2be0 100644 --- a/arch/arm/mach-imx/imx8/Kconfig +++ b/arch/arm/mach-imx/imx8/Kconfig @@ -55,6 +55,11 @@ config TARGET_COLIBRI_IMX8X select BOARD_LATE_INIT select IMX8QXP +config TARGET_IMX8QXP_AI_ML + bool "Support i.MX8QXP AI_ML board" + select BOARD_EARLY_INIT_F + select IMX8QXP + config TARGET_IMX8QM_MEK bool "Support i.MX8QM MEK board" select BOARD_LATE_INIT @@ -73,6 +78,7 @@ config TARGET_IMX8QXP_MEK endchoice +source "board/einfochips/imx8qxp_ai_ml/Kconfig" source "board/freescale/imx8qm_mek/Kconfig" source "board/freescale/imx8qxp_mek/Kconfig" source "board/advantech/imx8qm_rom7720_a1/Kconfig" diff --git a/board/einfochips/imx8qxp_ai_ml/Kconfig b/board/einfochips/imx8qxp_ai_ml/Kconfig new file mode 100644 index 0000000000..b6806b8859 --- /dev/null +++ b/board/einfochips/imx8qxp_ai_ml/Kconfig @@ -0,0 +1,21 @@ +if TARGET_IMX8QXP_AI_ML + +config SYS_BOARD + default "imx8qxp_ai_ml" + +config SYS_VENDOR + default "einfochips" + +config SYS_CONFIG_NAME + default "imx8qxp_ai_ml" + +config SYS_MALLOC_LEN + default 0x2400000 + +config ENV_SIZE + default 0x1000 + +config ENV_OFFSET + default 0x400000 + +endif diff --git a/board/einfochips/imx8qxp_ai_ml/MAINTAINERS b/board/einfochips/imx8qxp_ai_ml/MAINTAINERS new file mode 100644 index 0000000000..add0bd9431 --- /dev/null +++ b/board/einfochips/imx8qxp_ai_ml/MAINTAINERS @@ -0,0 +1,6 @@ +i.MX8QXP AI_ML BOARD +M: Manivannan Sadhasivam <manivannan.sadhasivam(a)linaro.org> +S: Maintained +F: board/einfochips/imx8qxp_ai_ml/ +F: include/configs/imx8qxp_ai_ml.h +F: configs/imx8qxp_ai_ml_defconfig diff --git a/board/einfochips/imx8qxp_ai_ml/Makefile b/board/einfochips/imx8qxp_ai_ml/Makefile new file mode 100644 index 0000000000..e08774dc6e --- /dev/null +++ b/board/einfochips/imx8qxp_ai_ml/Makefile @@ -0,0 +1,8 @@ +# +# Copyright 2019 Linaro Ltd. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += imx8qxp_ai_ml.o +obj-$(CONFIG_SPL_BUILD) += spl.o diff --git a/board/einfochips/imx8qxp_ai_ml/README b/board/einfochips/imx8qxp_ai_ml/README new file mode 100644 index 0000000000..488920580f --- /dev/null +++ b/board/einfochips/imx8qxp_ai_ml/README @@ -0,0 +1,49 @@ +U-Boot for the Einfochips i.MX8QXP AI_ML board + +Quick Start +=========== + +- Get and Build the ARM Trusted firmware +- Get scfw_tcm.bin and ahab-container.img +- Build U-Boot +- Flash the binary into the SD card +- Boot + +Get and Build the ARM Trusted firmware +====================================== + +$ git clone https://source.codeaurora.org/external/imx/imx-atf +$ cd imx-atf/ +$ git checkout origin/imx_4.9.88_imx8qxp_beta2 -b imx_4.9.88_imx8qxp_beta2 +$ make PLAT=imx8qxp bl31 + +Get scfw_tcm.bin and ahab-container.img +======================================= + +$ wget https://raw.githubusercontent.com/96boards-ai-ml/binaries/master/mx8qx-aiml… +$ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.1.bin +$ chmod +x firmware-imx-8.1.bin +$ ./firmware-imx-8.1.bin + +Copy the following binaries to U-Boot folder: + +$ cp imx-atf/build/imx8qxp/release/bl31.bin . +$ cp firmware-imx-8.1/firmware/seco/mx8qx-ahab-container.img . + +Build U-Boot +============ + +$ make imx8qxp_ai_ml_defconfig +$ make u-boot-dtb.imx + +Flash the binary into the SD card +================================= + +Burn the u-boot-dtb.imx binary to SD card offset 32KB: + +$ sudo dd if=u-boot-dtb.imx of=/dev/sd[x] bs=1024 seek=32 + +Boot +==== + +Set Boot switch SW2: 1100. diff --git a/board/einfochips/imx8qxp_ai_ml/imx8qxp_ai_ml.c b/board/einfochips/imx8qxp_ai_ml/imx8qxp_ai_ml.c new file mode 100644 index 0000000000..465fea65f8 --- /dev/null +++ b/board/einfochips/imx8qxp_ai_ml/imx8qxp_ai_ml.c @@ -0,0 +1,78 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2018 NXP + * Copyright 2019 Linaro Ltd. + */ + +#include <common.h> +#include <errno.h> +#include <linux/libfdt.h> +#include <fsl_esdhc.h> +#include <asm/io.h> +#include <asm/arch/clock.h> +#include <asm/arch/sci/sci.h> +#include <asm/arch/imx8-pins.h> +#include <asm/arch/iomux.h> +#include <asm/arch/sys_proto.h> + +DECLARE_GLOBAL_DATA_PTR; + +int board_early_init_f(void) +{ + sc_pm_clock_rate_t rate = SC_80MHZ; + int ret; + + /* Set UART2 clock root to 80 MHz */ + ret = sc_pm_setup_uart(SC_R_UART_2, rate); + if (ret) + return ret; + + return 0; +} + +#if IS_ENABLED(CONFIG_FEC_MXC) +#include <miiphy.h> + +int board_phy_config(struct phy_device *phydev) +{ + phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f); + phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8); + + phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); + phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100); + + if (phydev->drv->config) + phydev->drv->config(phydev); + + return 0; +} +#endif + +int checkboard(void) +{ + puts("Board: iMX8QXP AI_ML\n"); + + build_info(); + print_bootinfo(); + + return 0; +} + +int board_init(void) +{ + return 0; +} + +/* Board specific reset that is system reset */ + +void reset_cpu(ulong addr) +{ + /* TODO */ +} + +#ifdef CONFIG_OF_BOARD_SETUP +int ft_board_setup(void *blob, bd_t *bd) +{ + return 0; +} +#endif diff --git a/board/einfochips/imx8qxp_ai_ml/imximage.cfg b/board/einfochips/imx8qxp_ai_ml/imximage.cfg new file mode 100644 index 0000000000..4fc5ade313 --- /dev/null +++ b/board/einfochips/imx8qxp_ai_ml/imximage.cfg @@ -0,0 +1,24 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2018 NXP + * + * Refer doc/README.imx8image for more details about how-to configure + * and create imx8image boot image + */ + +#define __ASSEMBLY__ + +/* Boot from SD, sector size 0x400 */ +BOOT_FROM SD 0x400 +/* SoC type IMX8QX */ +SOC_TYPE IMX8QX +/* Append seco container image */ +APPEND mx8qx-ahab-container.img +/* Create the 2nd container */ +CONTAINER +/* Add scfw image with exec attribute */ +IMAGE SCU mx8qx-aiml-scfw-tcm.bin +/* Add ATF image with exec attribute */ +IMAGE A35 bl31.bin 0x80000000 +/* Add U-Boot image with load attribute */ +DATA A35 u-boot-dtb.bin 0x80020000 diff --git a/board/einfochips/imx8qxp_ai_ml/spl.c b/board/einfochips/imx8qxp_ai_ml/spl.c new file mode 100644 index 0000000000..2e6e0741e5 --- /dev/null +++ b/board/einfochips/imx8qxp_ai_ml/spl.c @@ -0,0 +1,39 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2018 NXP + * Copyright 2019 Linaro Ltd. + * + */ + +#include <common.h> +#include <dm.h> +#include <spl.h> +#include <dm/uclass.h> +#include <dm/device.h> +#include <dm/uclass-internal.h> +#include <dm/device-internal.h> +#include <dm/lists.h> + +DECLARE_GLOBAL_DATA_PTR; + +void spl_board_init(void) +{ + arch_cpu_init(); + + timer_init(); + + preloader_console_init(); + + puts("Normal Boot\n"); +} + +void board_init_f(ulong dummy) +{ + /* Clear global data */ + memset((void *)gd, 0, sizeof(gd_t)); + + /* Clear the BSS. */ + memset(__bss_start, 0, __bss_end - __bss_start); + + board_init_r(NULL, 0); +} diff --git a/configs/imx8qxp_ai_ml_defconfig b/configs/imx8qxp_ai_ml_defconfig new file mode 100644 index 0000000000..e20a0c783e --- /dev/null +++ b/configs/imx8qxp_ai_ml_defconfig @@ -0,0 +1,83 @@ +CONFIG_ARM=y +CONFIG_ARCH_IMX8=y +CONFIG_SYS_TEXT_BASE=0x80020000 +CONFIG_DISTRO_DEFAULTS=y +CONFIG_SPL_GPIO_SUPPORT=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SYS_MALLOC_F_LEN=0x4000 +CONFIG_TARGET_IMX8QXP_AI_ML=y +CONFIG_SPL_MMC_SUPPORT=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_NR_DRAM_BANKS=4 +CONFIG_SPL=y +CONFIG_FIT=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/einfochips/imx8qxp_ai_ml/imximage.cfg" +CONFIG_BOOTDELAY=3 +CONFIG_LOG=y +CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SPL_POWER_SUPPORT=y +CONFIG_SPL_POWER_DOMAIN=y +CONFIG_SPL_WATCHDOG_SUPPORT=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_CPU=y +# CONFIG_CMD_IMPORTENV is not set +CONFIG_CMD_CLK=y +CONFIG_CMD_DM=y +CONFIG_CMD_FUSE=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_FAT_WRITE=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8qxp-ai_ml" +CONFIG_ENV_IS_IN_MMC=y +CONFIG_SPL_DM=y +CONFIG_SPL_CLK=y +CONFIG_CLK_IMX8=y +CONFIG_CPU=y +CONFIG_DM_GPIO=y +CONFIG_MXC_GPIO=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_IMX_LPI2C=y +CONFIG_MISC=y +CONFIG_DM_MMC=y +CONFIG_FSL_ESDHC=y +CONFIG_PHYLIB=y +CONFIG_PHY_ADDR_ENABLE=y +CONFIG_PHY_ATHEROS=y +CONFIG_DM_ETH=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_PHY_GIGE=y +CONFIG_FEC_MXC_SHARE_MDIO=y +CONFIG_FEC_MXC_MDIO_BASE=0x5B040000 +CONFIG_FEC_MXC=y +CONFIG_MII=y +CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y +CONFIG_PINCTRL_IMX8=y +CONFIG_POWER_DOMAIN=y +CONFIG_IMX8_POWER_DOMAIN=y +CONFIG_DM_REGULATOR=y +CONFIG_SPL_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_SPL_DM_REGULATOR_GPIO=y +CONFIG_DM_SERIAL=y +CONFIG_FSL_LPUART=y +CONFIG_SPL_TINY_MEMSET=y +# CONFIG_EFI_LOADER is not set diff --git a/include/configs/imx8qxp_ai_ml.h b/include/configs/imx8qxp_ai_ml.h new file mode 100644 index 0000000000..bdac710103 --- /dev/null +++ b/include/configs/imx8qxp_ai_ml.h @@ -0,0 +1,95 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2018 NXP + * Copyright 2019 Linaro Ltd. + */ + +#ifndef __IMX8QXP_AI_ML_H +#define __IMX8QXP_AI_ML_H + +#include <linux/sizes.h> +#include <asm/arch/imx-regs.h> + +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SPL_MAX_SIZE (124 * SZ_1K) +#define CONFIG_SYS_MONITOR_LEN (SZ_1K * SZ_1K) +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x250 +#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 0 + +#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds" +#define CONFIG_SPL_STACK 0x013E000 +#define CONFIG_SPL_BSS_START_ADDR 0x00128000 +#define CONFIG_SPL_BSS_MAX_SIZE SZ_4K /* 4 KB */ +#define CONFIG_SYS_SPL_MALLOC_START 0x00120000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x3000 /* 12 KB */ +#define CONFIG_SERIAL_LPUART_BASE 0x5a080000 +#define CONFIG_MALLOC_F_ADDR 0x00120000 + +#define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE + +#define CONFIG_SPL_ABORT_ON_RAW_IMAGE + +#define CONFIG_OF_SEPARATE +#endif + +#define CONFIG_REMAKE_ELF + +/* Flat Device Tree Definitions */ +#define CONFIG_OF_BOARD_SETUP + +#define CONFIG_FSL_USDHC + +#define CONFIG_ENV_OVERWRITE + +#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG + +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 1) \ + func(DHCP, dhcp, na) + +#include <config_distro_bootcmd.h> +/* Initial environment variables */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "console=ttyLP2 earlycon\0" \ + "fdt_addr_r=0x83000000\0" \ + "kernel_addr_r=0x81000000\0" \ + "ramdisk_addr_r=0x94400000\0" \ + "scriptaddr=0x89000000\0" \ + "fdtfile=imx8qxp-ai_ml.dtb\0" \ + "fdt_high=0xffffffffffffffff\0" \ + "image=Image\0" \ + "initrd_addr=0x83800000\0" \ + "initrd_high=0xffffffffffffffff\0" \ + "netargs=setenv bootargs console=${console},${baudrate} " \ + "root=/dev/nfs ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp" \ + "\0" \ + "nfsboot=run netargs; dhcp ${loadaddr} ${image}; tftp ${fdt_addr} " \ + "imx8qxp-ai_ml/${fdt_file}; booti ${loadaddr} - ${fdt_addr}\0" \ + BOOTENV + +/* Link Definitions */ +#define CONFIG_LOADADDR 0x80280000 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_SYS_INIT_SP_ADDR 0x80200000 + +/* USDHC2 is the SD card interface */ +#define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */ +#define CONFIG_SYS_FSL_USDHC_NUM 2 + +#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define PHYS_SDRAM_1 0x80000000 +#define PHYS_SDRAM_2 0x880000000 +#define PHYS_SDRAM_1_SIZE SZ_2G /* 2 GB */ +#define PHYS_SDRAM_2_SIZE 0x00000000 /* 0 GB */ + +/* Generic Timer Definitions */ +#define COUNTER_FREQUENCY 8000000 /* 8MHz */ + +/* Networking */ +#define CONFIG_FEC_XCV_TYPE RGMII +#define FEC_QUIRK_ENET_MAC + +#endif /* __IMX8QXP_AI_ML_H */ -- 2.17.1

3 3

[PATCH 0/3] cmd: dtimg: Rename to adtimg and refactor usage style
by Eugeniu Rosca 08 Jul '20

08 Jul '20

The main focus of this series is to prepare the ground for: - adding the id/rev-based DT lookup in dtimg/adtimg [1] - adding the abootimg command [2] To be more clear, the above topics are handled _outside_ of this series, but they treat this series as hard dependency. The per-patch motivation and testing are described meticulously in each commit. [1] https://patchwork.ozlabs.org/patch/1202580/ ("cmd: dtimg: Get start and size based on --id and --rev") [2] https://patchwork.ozlabs.org/patch/1182212/ ("cmd: bootimg: Add bootimg command") Eugeniu Rosca (3): dtimg/am57xx_evm_defconfig: Rename dtimg to adtimg cmd: adtimg: Rename internal symbols cmd: adtimg: Refactor usage style cmd/Kconfig | 4 +- cmd/Makefile | 2 +- cmd/adtimg.c | 242 ++++++++++++++++++++++++++++ cmd/dtimg.c | 142 ---------------- common/Makefile | 2 +- configs/am57xx_evm_defconfig | 2 +- configs/am57xx_hs_evm_defconfig | 2 +- configs/am57xx_hs_evm_usb_defconfig | 2 +- 8 files changed, 249 insertions(+), 149 deletions(-) create mode 100644 cmd/adtimg.c delete mode 100644 cmd/dtimg.c -- 2.24.0

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[U-Boot] [PATCH v1 00/10] arm: pxa: mmc: add driver model support
by Marcel Ziswiler 30 Jun '20

30 Jun '20

This series, after some initial clean-up, ultimately adds support for the driver model (DM) in the PXA MMC driver. Marcel Ziswiler (10): mmc: add missing space before comment delimiter mmc: fsl_esdhc: annotate endifs serial: pxa: clean-up platform data include file Makefile: allow dm_mmc without of_control dm: core: gracefully handle alias seq without of kconfig: mmc: move pxa_mmc_generic to kconfig arm: pxa: mmc: add driver model support colibri_pxa270_defconfig: enable cmd_dm colibri_pxa270: add mmc platform data colibri_pxa270_defconfig: enable dm_mmc Makefile | 2 +- board/toradex/colibri_pxa270/colibri_pxa270.c | 20 ++- configs/colibri_pxa270_defconfig | 3 + configs/zipitz2_defconfig | 1 + drivers/core/read.c | 4 +- drivers/mmc/Kconfig | 8 + drivers/mmc/fsl_esdhc.c | 4 +- drivers/mmc/mmc.c | 2 +- drivers/mmc/pxa_mmc_gen.c | 160 +++++++++++++++--- include/configs/pxa-common.h | 7 - include/configs/zipitz2.h | 8 - include/dm/platform_data/pxa_mmc_gen.h | 22 +++ include/dm/platform_data/serial_pxa.h | 8 +- include/dm/read.h | 4 + scripts/config_whitelist.txt | 1 - 15 files changed, 196 insertions(+), 58 deletions(-) create mode 100644 include/dm/platform_data/pxa_mmc_gen.h -- 2.21.0

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U-Boot Logo showing incorrect colors with eLCDIF
by Fabio Estevam 29 Jun '20

29 Jun '20

Hi, We are converting imx7d-sdb and imx6sx-sdb boards to DM_VIDEO, but we are seeing the Freescale logo with incorrect colors (white area is being shown blue, for example). imx6ul-evk has already been converted to DM_VIDEO and also show the incorrect colors. We haven't started to investigate this issue yet, but just wanted to report in case this is a known issue. Does U-Boot logo appear with the correct color on your boards with eLCDIF controller? Thanks, Fabio Estevam

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[PATCH v2 1/1] travis-ci: Fix "ResourceWarning: unclosed file"
by Cristian Ciocaltea 24 Jun '20

24 Jun '20

This patch gets rid of the warning messages like: uboot-test-hooks/py/travis-ci/travis_tftp.py:43: ResourceWarning: unclosed file <_io.BufferedReader name='.bm-work/qemu_arm/u-boot.bin'> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea(a)gmail.com> --- Changes in v2: * The warning line number in the comment relies on Heinrich Schuchardt's work 'travis-ci: provide env__efi_fit_tftp_file', but my initial patch was based on the master version. Even though it is still applicable, to avoid any confusion, I rebased it on Heinrich's latest patch (v2): https://lists.denx.de/pipermail/u-boot/2019-December/395029.html py/travis-ci/travis_tftp.py | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/py/travis-ci/travis_tftp.py b/py/travis-ci/travis_tftp.py index 884823c..f9a44aa 100644 --- a/py/travis-ci/travis_tftp.py +++ b/py/travis-ci/travis_tftp.py @@ -40,8 +40,11 @@ def file2env(file_name, addr=None): ret = { "fn": file_name, "size": os.path.getsize(file_full), - "crc32": hex(binascii.crc32(open(file_full, 'rb').read()) & 0xffffffff)[2:], } + + with open(file_full, 'rb') as fd: + ret["crc32"] = hex(binascii.crc32(fd.read()) & 0xffffffff)[2:] + if addr is not None: ret['addr'] = addr -- 2.17.1

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[PATCH 1/3] ram: rk3328: only do data traning for cs0
by Kever Yang 21 Jun '20

21 Jun '20

No need to do twice data training for rk3328 ddr sdram, we re-use the setting for both channel. And adjust the sdram_init properly for correct init flow. Signed-off-by: Kever Yang <kever.yang(a)rock-chips.com> Signed-off-by: YouMin Chen <cym(a)rock-chips.com> --- drivers/ram/rockchip/sdram_rk3328.c | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) diff --git a/drivers/ram/rockchip/sdram_rk3328.c b/drivers/ram/rockchip/sdram_rk3328.c index 69521cef69..8329f4a352 100644 --- a/drivers/ram/rockchip/sdram_rk3328.c +++ b/drivers/ram/rockchip/sdram_rk3328.c @@ -377,16 +377,12 @@ static int sdram_init(struct dram_info *dram, printf("data training error\n"); return -1; } - if (data_training(dram, 1, sdram_params->base.dramtype) != 0) { - printf("data training error\n"); - return -1; - } if (sdram_params->base.dramtype == DDR4) pctl_write_vrefdq(dram->pctl, 0x3, 5670, sdram_params->base.dramtype); - if (pre_init == 0) { + if (pre_init != 0) { rx_deskew_switch_adjust(dram); tx_deskew_switch_adjust(dram); } @@ -482,7 +478,7 @@ static int sdram_init_detect(struct dram_info *dram, memcpy(&sdram_ch, &sdram_params->ch, sizeof(struct rk3328_sdram_channel)); - sdram_init(dram, sdram_params, 1); + sdram_init(dram, sdram_params, 0); dram_detect_cap(dram, sdram_params, 0); /* modify bw, cs related timing */ @@ -495,7 +491,7 @@ static int sdram_init_detect(struct dram_info *dram, sdram_ch.noc_timings.ddrtiming.b.bwratio = 1; /* reinit sdram by real dram cap */ - sdram_init(dram, sdram_params, 0); + sdram_init(dram, sdram_params, 1); /* redetect cs1 row */ sdram_detect_cs1_row(cap_info, sdram_params->base.dramtype); -- 2.17.1

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