September 2019 - U-Boot

[U-Boot] [PATCH 1/1] efi_loader: correct text conversion for vendor DP
by Heinrich Schuchardt 04 Sep '19

04 Sep '19

Vendor device paths may contain data. When converting vendor device paths to text this binary data has to be rendered. UEFI SCT, 2017, 5.4.7.1.3 Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- lib/efi_loader/efi_device_path_to_text.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/lib/efi_loader/efi_device_path_to_text.c b/lib/efi_loader/efi_device_path_to_text.c index 96fd08971b..133542ad40 100644 --- a/lib/efi_loader/efi_device_path_to_text.c +++ b/lib/efi_loader/efi_device_path_to_text.c @@ -60,9 +60,18 @@ static char *dp_hardware(char *s, struct efi_device_path *dp) break; } case DEVICE_PATH_SUB_TYPE_VENDOR: { + int i, n; struct efi_device_path_vendor *vdp = (struct efi_device_path_vendor *)dp; - s += sprintf(s, "VenHw(%pUl)", &vdp->guid); + + s += sprintf(s, "VenHw(%pUl", &vdp->guid); + n = (int)vdp->dp.length - sizeof(struct efi_device_path_vendor); + if (n > 0) { + s += sprintf(s, ","); + for (i = 0; i < n; ++i) + s += sprintf(s, "%02x", vdp->vendor_data[i]); + } + s += sprintf(s, ")"); break; } default: -- 2.23.0.rc1

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[U-Boot] [PATCH] lx2160: Correct serdes frequency print.
by Meenakshi Aggarwal 04 Sep '19

04 Sep '19

Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal(a)nxp.com> --- changed for v2: - corrected typo in commit message. --- board/freescale/lx2160a/lx2160a.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c index 8140f3e..eff5d9f 100644 --- a/board/freescale/lx2160a/lx2160a.c +++ b/board/freescale/lx2160a/lx2160a.c @@ -372,7 +372,7 @@ int checkboard(void) puts("SERDES1 Reference: Clock1 = 161.13MHz Clock2 = 161.13MHz\n"); puts("SERDES2 Reference: Clock1 = 100MHz Clock2 = 100MHz\n"); - puts("SERDES3 Reference: Clock1 = 100MHz Clock2 = 100Hz\n"); + puts("SERDES3 Reference: Clock1 = 100MHz Clock2 = 100MHz\n"); #endif return 0; } -- 1.9.1

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[U-Boot] DFU and UBIFS Volume upgrade
by Loic Poulain 04 Sep '19

04 Sep '19

Hi, AFAIU, today it's possible to update a UBI partition via DFU with a new UBI blob using 'partubi'. However, this causes two issues/limitations: - It erases the partition, causing PEB erase counters amnesia (contrary to Linux ubiformat) - It's no possible to have a volume-grained upgrade (per UBIFS volume) I saw some (very) old threads on this subject but no conclusion. Did I miss something? any recommendations? Regards, Loic

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[U-Boot] [PATCH] microblaze: Enable Xilinx AXI emac driver by default
by Michal Simek 04 Sep '19

04 Sep '19

Enable Xilinx AXI emac ethernet driver for Microblaze. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- arch/microblaze/configs/mmu_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/microblaze/configs/mmu_defconfig b/arch/microblaze/configs/mmu_defconfig index 000da33365c4..43ede33da900 100644 --- a/arch/microblaze/configs/mmu_defconfig +++ b/arch/microblaze/configs/mmu_defconfig @@ -45,6 +45,7 @@ CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_SIZE=8192 CONFIG_NETDEVICES=y CONFIG_XILINX_EMACLITE=y +CONFIG_XILINX_AXI_EMAC=y CONFIG_XILINX_LL_TEMAC=y # CONFIG_INPUT is not set # CONFIG_SERIO is not set -- 2.17.1

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[U-Boot] [PATCHv2] armv8: ls1028a: Updated lane C configuration to PCIe2 for 0x13BB
by Z.q. Hou 04 Sep '19

04 Sep '19

From: Hou Zhiqiang <Zhiqiang.Hou(a)nxp.com> In SerDes protocol 0x13BB, lane C was erroneously assigned to PCIe1, so fix it. Fixes: 36f50b75238e ("armv8: ls1028a: Add other serdes protocal support") Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou(a)nxp.com> --- V2: - Fixed a typo in changelog. arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c index 5835a3a69e..313f3f1e8a 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c @@ -24,7 +24,7 @@ static struct serdes_config serdes1_cfg_tbl[] = { {0xDDDD, {PCIE1, PCIE1, PCIE1, PCIE1} }, {0xE031, {SXGMII1, QXGMII2, NONE, SATA1} }, {0xB991, {SXGMII1, SGMII1, SGMII2, PCIE1} }, - {0xBB31, {SXGMII1, QXGMII2, PCIE1, PCIE1} }, + {0xBB31, {SXGMII1, QXGMII2, PCIE2, PCIE1} }, {0xCC31, {SXGMII1, QXGMII2, PCIE2, PCIE2} }, {0xBB51, {SXGMII1, QSGMII_B, PCIE2, PCIE1} }, {0xBB38, {SGMII_T1, QXGMII2, PCIE2, PCIE1} }, -- 2.17.1

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[U-Boot] [PATCH 00/25] remoteproc: Add support for R5F and DSP processors
by Lokesh Vutla 04 Sep '19

04 Sep '19

This series addds support loading and starting for the following remote processors: - ARM Cortex-R5F in lockstep and split mode - C66x DSP - C7x DSP Enable these remoteprocessor in AM654-evm and J721E evm. Kedar Chitnis (1): armv8: K3: j721e: Updated ddr address regions in MMU table Lokesh Vutla (14): dm: core: Add a function to count the children of a device remoteproc: ops: Add elf section size as input parameter to device_to_virt api remoteproc: elf_loader: Always check the validity of the image before loading remoteproc: elf-loader: Add 64 bit elf loading support remoteproc: elf_loader: Introduce a common elf loader function remoteproc: elf_loader: Introduce rproc_elf_get_boot_addr() api remoteproc: tisci_proc: Add helper api for controlling core power domain remoteproc: Introduce K3 remoteproc driver for R5F subsystem remoteproc: Introduce K3 C66 and C71 remoteproc driver arm: dts: k3-j721e-mcu: Add MCU domain R5F cluster node arm: dts: k3-j721e-main: Add MAIN domain R5F cluster nodes arm: dts: k3-j721e-main: Add C66x DSP nodes arm: dts: k3-j721e-main: Add C71x DSP node configs: j721e_evm_a72: Enable R5F and DSP remoteproc driver Suman Anna (10): dt-bindings: remoteproc: Add bindings for R5F subsystem on TI K3 SoCs dt-bindings: remoteproc: Add bindings for DSP C66x clusters on TI K3 SoCs arm: dts: k3-am65-mcu: Add MCU domain R5F DT nodes env: ti: k3_rproc: Add common rproc environment variables env: ti: j721e-evm: Add support to boot rprocs including R5Fs and DSPs env: ti: am65x_evm: Add env support to boot the MCU R5F rprocs configs: j721e_evm_a72: Enhance bootcmd to start remoteprocs configs: am65x_evm_a53: Enable R5F remoteproc driver configs: am65x_evm_a53: Enhance bootcmd to start remoteprocs armv8: K3: am65x: Update DDR address regions in MMU table arch/arm/dts/k3-am65-mcu.dtsi | 40 +- arch/arm/dts/k3-am654-base-board.dts | 5 + arch/arm/dts/k3-j721e-common-proc-board.dts | 12 + arch/arm/dts/k3-j721e-main.dtsi | 111 +++ arch/arm/dts/k3-j721e-mcu-wakeup.dtsi | 38 + arch/arm/mach-k3/arm64-mmu.c | 24 +- configs/am65x_evm_a53_defconfig | 4 +- configs/j721e_evm_a72_defconfig | 5 +- .../remoteproc/ti,k3-dsp-rproc.txt | 101 +++ .../remoteproc/ti,k3-r5f-rproc.txt | 164 ++++ drivers/core/device.c | 11 + drivers/remoteproc/Kconfig | 20 + drivers/remoteproc/Makefile | 2 + drivers/remoteproc/rproc-elf-loader.c | 164 +++- drivers/remoteproc/sandbox_testproc.c | 4 +- drivers/remoteproc/stm32_copro.c | 13 +- drivers/remoteproc/ti_k3_dsp_rproc.c | 354 ++++++++ drivers/remoteproc/ti_k3_r5f_rproc.c | 816 ++++++++++++++++++ drivers/remoteproc/ti_sci_proc.h | 27 + include/configs/am65x_evm.h | 11 +- include/configs/j721e_evm.h | 14 +- include/dm/device.h | 9 + include/environment/ti/k3_rproc.h | 52 ++ include/remoteproc.h | 59 +- test/dm/bus.c | 41 +- test/dm/remoteproc.c | 9 +- 26 files changed, 2037 insertions(+), 73 deletions(-) create mode 100644 doc/device-tree-bindings/remoteproc/ti,k3-dsp-rproc.txt create mode 100644 doc/device-tree-bindings/remoteproc/ti,k3-r5f-rproc.txt create mode 100644 drivers/remoteproc/ti_k3_dsp_rproc.c create mode 100644 drivers/remoteproc/ti_k3_r5f_rproc.c create mode 100644 include/environment/ti/k3_rproc.h -- 2.22.0

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[U-Boot] [PATCH] armv8: ls1028a: Updated lane C configuration to PCIe2 for 0x13BB
by Z.q. Hou 04 Sep '19

04 Sep '19

From: Hou Zhiqiang <Zhiqiang.Hou(a)nxp.com> In SerDes protocol 0x13BB, lane C was erroneously asigned to PCIe1, so fix it. Fixes: 36f50b75238e ("armv8: ls1028a: Add other serdes protocal support") Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou(a)nxp.com> --- arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c index 5835a3a69e..313f3f1e8a 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c @@ -24,7 +24,7 @@ static struct serdes_config serdes1_cfg_tbl[] = { {0xDDDD, {PCIE1, PCIE1, PCIE1, PCIE1} }, {0xE031, {SXGMII1, QXGMII2, NONE, SATA1} }, {0xB991, {SXGMII1, SGMII1, SGMII2, PCIE1} }, - {0xBB31, {SXGMII1, QXGMII2, PCIE1, PCIE1} }, + {0xBB31, {SXGMII1, QXGMII2, PCIE2, PCIE1} }, {0xCC31, {SXGMII1, QXGMII2, PCIE2, PCIE2} }, {0xBB51, {SXGMII1, QSGMII_B, PCIE2, PCIE1} }, {0xBB38, {SGMII_T1, QXGMII2, PCIE2, PCIE1} }, -- 2.17.1

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[U-Boot] Please pull from u-boot-i2c
by Heiko Schocher 04 Sep '19

04 Sep '19

Hello Tom, one late pull request for u-boot-i2c as I missed Pengs patch... The following changes since commit 877294b56a52f1cb60bbfa7e4722fcc33451f7b2: Merge tag 'efi-2019-10-rc4' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi (2019-08-29 07:26:42 -0400) are available in the Git repository at: origin/master for-v2019.10-v2 for you to fetch changes up to 6dba0864ece3f4006abae8ff9e2ad74f4374359d: i2c: mxc: add CONFIG_CLK support (2019-09-02 06:35:08 +0200) ---------------------------------------------------------------- i2c bugfixes for 2019.10 take 2 - i2c: mxc: add CONFIG_CLK support If CONFIG_CLK is enabled use clk framework for clock settings. ---------------------------------------------------------------- Peng Fan (1): i2c: mxc: add CONFIG_CLK support arch/arm/include/asm/mach-imx/mxc_i2c.h | 6 ++++++ drivers/i2c/mxc_i2c.c | 18 ++++++++++++++++++ 2 files changed, 24 insertions(+) Clean travis build: https://travis-ci.org/hsdenx/u-boot-i2c/builds/579626889 bye, Heiko -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-52 Fax: +49-8142-66989-80 Email: hs(a)denx.de

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[U-Boot] Please pull ARC fixes for 2019.10-rc4
by Alexey Brodkin 04 Sep '19

04 Sep '19

Hi Tom, The following changes since commit d22c8be964a870f59d2fdab6c67cefa0c4799364: Merge branch 'master' of git://git.denx.de/u-boot-sh (2019-09-01 13:33:12 -0400) are available in the Git repository at: git@gitlab.denx.de:u-boot/custodians/u-boot-arc.git tags/arc-for-2019.10-rc4 for you to fetch changes up to 968b98bc27c2b228323c53761075422ebbb098bd: arc: emsdp: Add more platform-specific compiler options (2019-09-03 19:05:34 +0300) ---------------------------------------------------------------- These are some very late changes mostly required to get 64-bit division working on ARC boards. For that we had to import missing parts of libgcc and add compiler flags to EMSDP which otherwise used very simple profile for compliation. And while at it another fix for EM SDP initialization is inluded as well. ---------------------------------------------------------------- Alexey Brodkin (3): arc: emsdp: Add initialization of PSRAM arc: libgcc: Import __udivdi3 & __udivmoddi4 to allow 64-bit division arc: emsdp: Add more platform-specific compiler options arch/arc/lib/libgcc2.c | 75 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ board/synopsys/emsdp/config.mk | 2 ++ board/synopsys/emsdp/emsdp.c | 37 +++++++++++++++++++++++++++++++++++++ configs/emsdp_defconfig | 1 + 4 files changed, 115 insertions(+) create mode 100644 board/synopsys/emsdp/config.mk Regards, Alexey

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[U-Boot] Pull request: u-boot-riscv/master
by uboot＠andestech.com 04 Sep '19

04 Sep '19

Hi Tom, Please pull some riscv updates: - Skip unavailable hart in the get_count(). - fu540 set serial env from otp. - fu540 add mmc0 as a boot target device. - Update fix_rela_dyn and add absolute reloc addend. - Andestech PLIC driver will skip unavailable hart. - Support Andestech V5L2 cache driver. https://travis-ci.org/rickchen36/u-boot-riscv/builds/579707002 Thanks Rick The following changes since commit d22c8be964a870f59d2fdab6c67cefa0c4799364: Merge branch 'master' of git://git.denx.de/u-boot-sh (2019-09-01 13:33:12 -0400) are available in the Git repository at: git@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git for you to fetch changes up to 61ce84b2cf1a6672c8e402ce8174554b25629692: riscv: cache: use CCTL to flush d-cache (2019-09-03 09:31:03 +0800) ---------------------------------------------------------------- Alistair Francis (1): sifive-fu540: config: Add mmc0 as a boot target device Bin Meng (1): riscv: cpu: Skip unavailable hart in the get_count() op Marcus Comstedt (2): riscv: tools: Handle addend to absolute reloc in prelink-riscv riscv: update fix_rela_dyn Rick Chen (9): riscv: andes_plic: init plic by scanning each cpu node dm: cache: Add enable and disable ops for cache uclass dm: cache: Add enable and disable ops for sandbox and test dm: cache: add v5l2 cache controller driver riscv: ae350: use the v5l2 driver to configure the cache riscv: ax25: add imply v5l2 cache controller riscv: cache: Flush L2 cache before jump to linux riscv: dts: move out AE350 L2 node from cpus node riscv: cache: use CCTL to flush d-cache Sagar Shrikant Kadam (1): riscv: sifive: fu540: set serial environment variable from otp arch/riscv/cpu/ax25/Kconfig | 1 + arch/riscv/cpu/ax25/cache.c | 39 +++++++++++++++++------ arch/riscv/cpu/start.S | 10 +++--- arch/riscv/dts/ae350_32.dts | 17 ++++++---- arch/riscv/dts/ae350_64.dts | 17 ++++++---- arch/riscv/lib/andes_plic.c | 36 ++++++++++++++------- board/AndesTech/ax25-ae350/ax25-ae350.c | 9 ++++++ board/sifive/fu540/fu540.c | 18 ++++++++--- drivers/cache/Kconfig | 9 ++++++ drivers/cache/Makefile | 1 + drivers/cache/cache-uclass.c | 20 ++++++++++++ drivers/cache/cache-v5l2.c | 186 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ drivers/cache/sandbox_cache.c | 13 ++++++++ drivers/cpu/riscv_cpu.c | 4 +++ include/cache.h | 31 +++++++++++++++++++ include/configs/sifive-fu540.h | 1 + test/dm/cache.c | 2 ++ tools/prelink-riscv.inc | 8 +++-- 18 files changed, 379 insertions(+), 43 deletions(-) create mode 100644 drivers/cache/cache-v5l2.c

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