August 2019 - U-Boot

Re: [U-Boot] [RFC/RESEND 01/22] arm: introduce ARCH_THUNDERX
by Suneel Garapati 29 Oct '19

29 Oct '19

Hi Matthias, Hard deadline is Aug 15th, so you should see first series before that. Regards, Suneel On Wed, Jul 24, 2019 at 3:30 AM Matthias Brugger <mbrugger(a)suse.com> wrote: > > Hi Suneel, > Hi Chandrakala, > > On 16/05/2019 19:07, Suneel Garapati wrote: > > Hi Tim, > > > > Missed aggressive timeline, first RFC series should be out in three weeks > > time as priority. > > > > Any news on the patch set? > > Regards, > Matthias > > > Regards, > > Suneel > > > > > > On Tue, May 7, 2019 at 8:10 AM Tim Harvey <tharvey(a)gateworks.com> wrote: > >> > >> On Fri, Mar 22, 2019 at 11:23 AM Suneel Garapati <suneelglinux(a)gmail.com> > > wrote: > >>> > >>> Hi Tim, > >>> > >>> First series will be out week ending April 20th. > >>> > >>> Regards, > >>> Suneel > >> > >> Suneel, > >> > >> Any update on a Marvell submitted/maintained patch series for Octeon-TX > > support? > >> > >> Best Regards, > >> > >> Tim > > _______________________________________________ > > U-Boot mailing list > > U-Boot(a)lists.denx.de > > https://lists.denx.de/listinfo/u-boot > >

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[U-Boot] [PATCH 00/14] net: ti: icssg: Add prueth support
by Keerthy 29 Oct '19

29 Oct '19

The series adds support for icssg_prueth functionality on u-boot. This series is based on top of master branch. rproc init needs to be done from uboot command prompt. The pru/rtu firmware loading is done by prueth driver soon after config paramters are setup. Currently only slice0/1 of icssg2 instance on am6-evm is supported. i.e Both slices of icssg2 instance are supported. On u-boot prompt following commands to test icssg2_port 0 on am654-evm: setenv ethact pruss2_eth; setenv serverip 172.24.191.45; fatload mmc 1 ${pru0loadaddr} am65x-pru0-prueth-fw.elf; fatload mmc 1 ${rtu0loadaddr} am65x-rtu0-prueth-fw.elf; rproc init; setenv autoload no; dhcp; tftp 0x82000000 Image; tftp 0x83000000 k3-am654-base-board.dtb; booti 0x82000000 - 0x83000000 This tests tftp on prueth. Note: Uboot ethernet driver architecture supports once instance per probe. So only one of the ports are supported per instance. So DT of prueth node should have either ethernet-mii0 or ethernet-mii1. Keerthy (14): net: eth-uclass: eth_get_dev based on SEQ_ALIAS instead of probe order net: eth-uclass: call stop only for active devices misc: uclass: Introduce misc_init_by_ofnode soc: ti: pruss: add a misc driver for PRUSS in TI SoCs remoteproc: pruss: add PRU remoteproc driver net: ti: icssg-prueth: Add ICSSG ethernet driver net: ti: icssg-prueth: Workaround to shutdown the prueth firmware arm: dts: k3-am65-main: Add msmc_ram node arm: dts: k3-am654-base-board-u-boot: Add icssg specific msmc_ram carveout nodes arm: dts: k3-am65-main: Add scm_conf node arm: dts: k3-am65-main: Add pruss nodes for ICSSG2 arm64: dts: ti: am654-base-board: add ICSSG2 Ethernet support configs: am65x_evm_a53_defconfig: Enable CONFIG_REMOTEPROC_TI_PRU configs: am65x_evm_a53_defconfig: Enable CONFIG_CMD_REMOTEPROC arch/arm/dts/k3-am65-main.dtsi | 212 ++++++++ arch/arm/dts/k3-am65.dtsi | 4 +- arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 130 +++++ configs/am65x_evm_a53_defconfig | 5 + drivers/misc/misc-uclass.c | 25 + drivers/net/ti/Kconfig | 8 + drivers/net/ti/Makefile | 1 + drivers/net/ti/icssg-prueth.c | 525 +++++++++++++++++++ drivers/net/ti/icssg.h | 31 ++ drivers/net/ti/icssg_classifier.c | 397 ++++++++++++++ drivers/remoteproc/Kconfig | 11 + drivers/remoteproc/Makefile | 1 + drivers/remoteproc/pru_rproc.c | 384 ++++++++++++++ drivers/soc/ti/Kconfig | 13 + drivers/soc/ti/Makefile | 1 + drivers/soc/ti/pruss.c | 143 +++++ include/misc.h | 9 + include/ti-pruss.h | 13 + net/eth-uclass.c | 7 +- 19 files changed, 1916 insertions(+), 4 deletions(-) create mode 100644 drivers/net/ti/icssg-prueth.c create mode 100644 drivers/net/ti/icssg.h create mode 100644 drivers/net/ti/icssg_classifier.c create mode 100644 drivers/remoteproc/pru_rproc.c create mode 100644 drivers/soc/ti/pruss.c create mode 100644 include/ti-pruss.h -- 2.17.1

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[U-Boot] [PATCH v3 0/6] Extend mv88e61xx driver to support 88E6071
by Anatolij Gustschin 27 Oct '19

27 Oct '19

This series adds support for 88E6071 switches in the mv88e61xx driver. Changes in v3: - Add Reviewed-/Tested-by tags patch 1 - drop DEVADDR_PORT to avoid macros with local variable - describe variables added to priv struct - reword comments in mv88e61xx_priv_reg_offs_pre_init() - add comment in get_phy_id() to explain why calling mv88e61xx_priv_reg_offs_pre_init() is required patch 2 - remove unused PORT_REG_STATUS_SPEED_WIDTH macro patch 4 - describe model numbers in numerical order Changes in v2: - fix port init for 6096/6097 devices in patch 1/6 - update commit description in patch 4/6 Anatolij Gustschin (6): net: phy: mv88e61xx: rework to enable detection of 88E6071 devices net: phy: mv88e61xx: add CPU port parameter init for 88E6071 net: phy: mv88E61xx: fix ENERGY_DET init for mv88E6071 net: phy: mv88E61xx: add config option for mv88E6071 support net: phy: mv88e61xx: register phy_driver struct for 88E6071 net: phy: fix switch vendor name drivers/net/phy/Kconfig | 9 +- drivers/net/phy/mv88e61xx.c | 189 ++++++++++++++++++++++++++++-------- 2 files changed, 156 insertions(+), 42 deletions(-) -- 2.17.1

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[U-Boot] [PATCH v2 0/6] Extend mv88e61xx driver to support 88E6071
by Anatolij Gustschin 27 Oct '19

27 Oct '19

This series adds support for 88E6071 switches in the mv88e61xx driver. Changes in v2: - fix port init for 6096/6097 devices in patch 1/6 - update commit description in patch 4/6 Anatolij Gustschin (6): net: phy: mv88e61xx: rework to enable detection of 88E6071 devices net: phy: mv88e61xx: add CPU port parameter init for 88E6071 net: phy: mv88E61xx: fix ENERGY_DET init for mv88E6071 net: phy: mv88E61xx: add config option for mv88E6071 support net: phy: mv88e61xx: register phy_driver struct for 88E6071 net: phy: fix switch vendor name drivers/net/phy/Kconfig | 9 +- drivers/net/phy/mv88e61xx.c | 168 +++++++++++++++++++++++++++--------- 2 files changed, 137 insertions(+), 40 deletions(-) -- 2.17.1

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[U-Boot] [PATCH] sunxi: set PIO voltage to hardware-detected value on startup on H6
by Icenowy Zheng 25 Oct '19

25 Oct '19

The Allwinner H6 SoC has a register to set the PIO banks' voltage. When it mismatches the real voltage supplied to the VCC to the PIO supply, the PIO will work improperly. The PIO controller also has a register that contains the status of each VCC rail of the PIO supplies, and it has the same definition with the configuration register. so we can just copy the content of this register to the configuration register at startup, to ensure the configuration is correct at startup stage. Signed-off-by: Icenowy Zheng <icenowy(a)aosc.io> --- arch/arm/include/asm/arch-sunxi/gpio.h | 3 +++ arch/arm/mach-sunxi/board.c | 9 +++++++++ 2 files changed, 12 insertions(+) diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h index 40a3f845d0..a646ea6a3c 100644 --- a/arch/arm/include/asm/arch-sunxi/gpio.h +++ b/arch/arm/include/asm/arch-sunxi/gpio.h @@ -73,6 +73,9 @@ struct sunxi_gpio_reg { struct sunxi_gpio_int gpio_int; }; +#define SUN50I_H6_GPIO_POW_MOD_SEL 0x340 +#define SUN50I_H6_GPIO_POW_MOD_VAL 0x348 + #define BANK_TO_GPIO(bank) (((bank) < SUNXI_GPIO_L) ? \ &((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)->gpio_bank[bank] : \ &((struct sunxi_gpio_reg *)SUNXI_R_PIO_BASE)->gpio_bank[(bank) - SUNXI_GPIO_L]) diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c index c6dd7b8e54..bd3b5d8303 100644 --- a/arch/arm/mach-sunxi/board.c +++ b/arch/arm/mach-sunxi/board.c @@ -65,6 +65,7 @@ struct mm_region *mem_map = sunxi_mem_map; static int gpio_init(void) { + __maybe__unused uint val; #if CONFIG_CONS_INDEX == 1 && defined(CONFIG_UART0_PORT_F) #if defined(CONFIG_MACH_SUN4I) || \ defined(CONFIG_MACH_SUN7I) || \ @@ -139,6 +140,14 @@ static int gpio_init(void) #error Unsupported console port number. Please fix pin mux settings in board.c #endif +#ifdef CONFIG_MACH_SUN50I_H6 + /* Update PIO power bias configuration by copy hardware detected value */ + val = readl(SUNXI_PIO_BASE + SUN50I_H6_GPIO_POW_MOD_VAL); + writel(val, SUNXI_PIO_BASE + SUN50I_H6_GPIO_POW_MOD_SEL); + val = readl(SUNXI_R_PIO_BASE + SUN50I_H6_GPIO_POW_MOD_VAL); + writel(val, SUNXI_R_PIO_BASE + SUN50I_H6_GPIO_POW_MOD_SEL); +#endif + return 0; } -- 2.18.1

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[U-Boot] python3 support for pylibfdt
by Peter Robinson 25 Oct '19

25 Oct '19

Hi Simon, With the EOL of python2 soon I've been looking at the Fedora U-Boot builds to see what it would take to move over to python3. There's a couple of issues building the bundled pylibfdt, the first is the Makefile hard codes python2, the second is that the generated libfdt_wrap.c doesn't seem to find the python3 version of Python.h (errors below). It seems upstream now supports building pylibfdt with dtc 1.5.0 but I couldn't quite work out how this fits into the U-Boot bundled version. Is there plans to be able to support pylibfdt with python3? Regards, Peter gcc -O2 -g -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS -fexceptions -fstack-protector-strong -grecord-gcc-switches -specs=/usr/lib/rpm/redhat/redhat-hardened-cc1 -specs=/usr/lib/rpm/redhat/redhat-annobin-cc1 -fasynchronous-unwind-tables -fstack-clash-protection -o scripts/dtc/dtc scripts/dtc/dtc.o scripts/dtc/flattree.o scripts/dtc/fstree.o scripts/dtc/data.o scripts/dtc/livetree.o scripts/dtc/treesource.o scripts/dtc/srcpos.o scripts/dtc/checks.o scripts/dtc/util.o scripts/dtc/dtc-lexer.lex.o scripts/dtc/dtc-parser.tab.o BUILDSTDERR: set -e; : ' CHK include/generated/generic-asm-offsets.h'; mkdir -p include/generated/; (set -e; echo "#ifndef __GENERIC_ASM_OFFSETS_H__"; echo "#define __GENERIC_ASM_OFFSETS_H__"; echo "/*"; echo " * DO NOT MODIFY."; echo " *"; echo " * This file was generated by Kbuild"; escripts/dtc/pylibfdt/libfdt_wrap.c:154:11: fatal error: Python.h: No such file or directory BUILDSTDERR: 154 | # include <Python.h> BUILDSTDERR: | ^~~~~~~~~~ BUILDSTDERR: compilation terminated. BUILDSTDERR: error: command 'gcc' failed with exit status 1 BUILDSTDERR: make[4]: *** [/builddir/build/BUILD/u-boot-2019.07-rc4/scripts/dtc/pylibfdt/Makefile:27: scripts/dtc/pylibfdt/_libfdt.so] Error 1 BUILDSTDERR: make[3]: *** [/builddir/build/BUILD/u-boot-2019.07-rc4/scripts/Makefile.build:432: scripts/dtc/pylibfdt] Error 2 BUILDSTDERR: make[2]: *** [/builddir/build/BUILD/u-boot-2019.07-rc4/scripts/Makefile.build:432: scripts/dtc] Error 2 BUILDSTDERR: make[1]: *** [/builddir/build/BUILD/u-boot-2019.07-rc4/Makefile:528: scripts] Error 2 BUILDSTDERR: make: *** [Makefile:148: sub-make] Error 2 BUILDSTDERR: error: Bad exit status from /var/tmp/rpm-tmp.Ca2SD2 (%build)

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[U-Boot] [PATCH 1/6] spi: fsl_qspi: Fix DDR mode setting for latest iMX platforms
by Ye Li 23 Oct '19

23 Oct '19

On latest iMX platforms like iMX7D/iMX6UL/iMX8MQ, the QSPI controller is updated to have TDH field in FLSHCR register. According to reference manual, this TDH must be set to 1 when DDR_EN is set. Otherwise, the TX DDR delay logic won't be enabled. Another issue in DDR mode is the MCR register will be overwritten in every read/write/erase operation. This causes DDR_EN been cleared while TDH=1, then no clk2x output for TX data shift and all operations will fail. Signed-off-by: Ye Li <ye.li(a)nxp.com> --- drivers/spi/fsl_qspi.c | 30 ++++++++++++++++-------------- 1 file changed, 16 insertions(+), 14 deletions(-) diff --git a/drivers/spi/fsl_qspi.c b/drivers/spi/fsl_qspi.c index 41abe19..8845986 100644 --- a/drivers/spi/fsl_qspi.c +++ b/drivers/spi/fsl_qspi.c @@ -399,7 +399,7 @@ static inline void qspi_ahb_read(struct fsl_qspi_priv *priv, u8 *rxbuf, int len) qspi_write32(priv->flags, &regs->mcr, QSPI_MCR_CLR_RXF_MASK | QSPI_MCR_CLR_TXF_MASK | - QSPI_MCR_RESERVED_MASK | QSPI_MCR_END_CFD_LE); + mcr_reg); rx_addr = (void *)(uintptr_t)(priv->cur_amba_base + priv->sf_addr); /* Read out the data directly from the AHB buffer. */ @@ -429,6 +429,14 @@ static void qspi_enable_ddr_mode(struct fsl_qspi_priv *priv) reg |= BIT(29); qspi_write32(priv->flags, &regs->mcr, reg); + + /* Enable the TDH to 1 for some platforms like imx6ul, imx7d, etc + * These two bits are reserved on other platforms + */ + reg = qspi_read32(priv->flags, &regs->flshcr); + reg &= ~(BIT(17)); + reg |= BIT(16); + qspi_write32(priv->flags, &regs->flshcr, reg); } /* @@ -482,7 +490,7 @@ static void qspi_op_rdbank(struct fsl_qspi_priv *priv, u8 *rxbuf, u32 len) mcr_reg = qspi_read32(priv->flags, &regs->mcr); qspi_write32(priv->flags, &regs->mcr, QSPI_MCR_CLR_RXF_MASK | QSPI_MCR_CLR_TXF_MASK | - QSPI_MCR_RESERVED_MASK | QSPI_MCR_END_CFD_LE); + mcr_reg); qspi_write32(priv->flags, &regs->rbct, QSPI_RBCT_RXBRD_USEIPS); qspi_write32(priv->flags, &regs->sfar, priv->cur_amba_base); @@ -527,7 +535,7 @@ static void qspi_op_rdid(struct fsl_qspi_priv *priv, u32 *rxbuf, u32 len) mcr_reg = qspi_read32(priv->flags, &regs->mcr); qspi_write32(priv->flags, &regs->mcr, QSPI_MCR_CLR_RXF_MASK | QSPI_MCR_CLR_TXF_MASK | - QSPI_MCR_RESERVED_MASK | QSPI_MCR_END_CFD_LE); + mcr_reg); qspi_write32(priv->flags, &regs->rbct, QSPI_RBCT_RXBRD_USEIPS); qspi_write32(priv->flags, &regs->sfar, priv->cur_amba_base); @@ -573,7 +581,7 @@ static void qspi_op_read(struct fsl_qspi_priv *priv, u32 *rxbuf, u32 len) mcr_reg = qspi_read32(priv->flags, &regs->mcr); qspi_write32(priv->flags, &regs->mcr, QSPI_MCR_CLR_RXF_MASK | QSPI_MCR_CLR_TXF_MASK | - QSPI_MCR_RESERVED_MASK | QSPI_MCR_END_CFD_LE); + mcr_reg); qspi_write32(priv->flags, &regs->rbct, QSPI_RBCT_RXBRD_USEIPS); to_or_from = priv->sf_addr + priv->cur_amba_base; @@ -625,7 +633,7 @@ static void qspi_op_write(struct fsl_qspi_priv *priv, u8 *txbuf, u32 len) mcr_reg = qspi_read32(priv->flags, &regs->mcr); qspi_write32(priv->flags, &regs->mcr, QSPI_MCR_CLR_RXF_MASK | QSPI_MCR_CLR_TXF_MASK | - QSPI_MCR_RESERVED_MASK | QSPI_MCR_END_CFD_LE); + mcr_reg); qspi_write32(priv->flags, &regs->rbct, QSPI_RBCT_RXBRD_USEIPS); status_reg = 0; @@ -700,7 +708,7 @@ static void qspi_op_rdsr(struct fsl_qspi_priv *priv, void *rxbuf, u32 len) mcr_reg = qspi_read32(priv->flags, &regs->mcr); qspi_write32(priv->flags, &regs->mcr, QSPI_MCR_CLR_RXF_MASK | QSPI_MCR_CLR_TXF_MASK | - QSPI_MCR_RESERVED_MASK | QSPI_MCR_END_CFD_LE); + mcr_reg); qspi_write32(priv->flags, &regs->rbct, QSPI_RBCT_RXBRD_USEIPS); qspi_write32(priv->flags, &regs->sfar, priv->cur_amba_base); @@ -737,7 +745,7 @@ static void qspi_op_erase(struct fsl_qspi_priv *priv) mcr_reg = qspi_read32(priv->flags, &regs->mcr); qspi_write32(priv->flags, &regs->mcr, QSPI_MCR_CLR_RXF_MASK | QSPI_MCR_CLR_TXF_MASK | - QSPI_MCR_RESERVED_MASK | QSPI_MCR_END_CFD_LE); + mcr_reg); qspi_write32(priv->flags, &regs->rbct, QSPI_RBCT_RXBRD_USEIPS); to_or_from = priv->sf_addr + priv->cur_amba_base; @@ -900,15 +908,9 @@ static int fsl_qspi_probe(struct udevice *bus) return ret; } - mcr_val = qspi_read32(priv->flags, &priv->regs->mcr); - - /* Set endianness to LE for i.mx */ - if (IS_ENABLED(CONFIG_MX6) || IS_ENABLED(CONFIG_MX7)) - mcr_val = QSPI_MCR_END_CFD_LE; - qspi_write32(priv->flags, &priv->regs->mcr, QSPI_MCR_RESERVED_MASK | QSPI_MCR_MDIS_MASK | - (mcr_val & QSPI_MCR_END_CFD_MASK)); + QSPI_MCR_END_CFD_LE); qspi_cfg_smpr(priv, ~(QSPI_SMPR_FSDLY_MASK | QSPI_SMPR_DDRSMP_MASK | QSPI_SMPR_FSPHS_MASK | QSPI_SMPR_HSENA_MASK), 0); -- 2.7.4

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[U-Boot] [PATCH] cmd: avb: Fix requested partitions list
by Sam Protsenko 21 Oct '19

21 Oct '19

The requested_partitions[] array should contain only boot partitions. Usually it's only 'boot' partition, as can be seen in [1]. Also, seems like the requested_partitions[] are only used when there is no 'vbmeta' partition [2], which is not a regular use-case. Make requested_partitions[] contain only 'boot' partition as it was supposed to be, and also make that array to be a local in do_avb_verify_part() function, as nobody else needs that. [1] https://android.googlesource.com/platform/external/avb/+/master/test/avb_sl… [2] https://android.googlesource.com/platform/external/avb/+/master/libavb/avb_… Signed-off-by: Sam Protsenko <semen.protsenko(a)linaro.org> --- cmd/avb.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/cmd/avb.c b/cmd/avb.c index d1942d6605..8f2bb85fce 100644 --- a/cmd/avb.c +++ b/cmd/avb.c @@ -14,11 +14,6 @@ #define AVB_BOOTARGS "avb_bootargs" static struct AvbOps *avb_ops; -static const char * const requested_partitions[] = {"boot", - "system", - "vendor", - NULL}; - int do_avb_init(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { unsigned long mmc_dev; @@ -231,6 +226,7 @@ int do_avb_get_uuid(cmd_tbl_t *cmdtp, int flag, int do_avb_verify_part(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) { + const char * const requested_partitions[] = {"boot", NULL}; AvbSlotVerifyResult slot_result; AvbSlotVerifyData *out_data; char *cmdline; -- 2.20.1

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[U-Boot] [PATCH] cmd: avb: Support A/B slots
by Sam Protsenko 21 Oct '19

21 Oct '19

Add optional parameter to 'avb verify' sub-command, so that user is able to specify which slot to use, in case when user's partitions are slotted. If that parameter is omitted, the behavior of 'avb verify' will be the same as before, so user API is content. Signed-off-by: Sam Protsenko <semen.protsenko(a)linaro.org> --- cmd/avb.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/cmd/avb.c b/cmd/avb.c index 3f6fd763a0..d1942d6605 100644 --- a/cmd/avb.c +++ b/cmd/avb.c @@ -235,6 +235,7 @@ int do_avb_verify_part(cmd_tbl_t *cmdtp, int flag, AvbSlotVerifyData *out_data; char *cmdline; char *extra_args; + char *slot_suffix = ""; bool unlocked = false; int res = CMD_RET_FAILURE; @@ -244,9 +245,12 @@ int do_avb_verify_part(cmd_tbl_t *cmdtp, int flag, return CMD_RET_FAILURE; } - if (argc != 1) + if (argc < 1 || argc > 2) return CMD_RET_USAGE; + if (argc == 2) + slot_suffix = argv[1]; + printf("## Android Verified Boot 2.0 version %s\n", avb_version_string()); @@ -259,7 +263,7 @@ int do_avb_verify_part(cmd_tbl_t *cmdtp, int flag, slot_result = avb_slot_verify(avb_ops, requested_partitions, - "", + slot_suffix, unlocked, AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE, &out_data); @@ -419,7 +423,7 @@ static cmd_tbl_t cmd_avb[] = { U_BOOT_CMD_MKENT(read_part, 5, 0, do_avb_read_part, "", ""), U_BOOT_CMD_MKENT(read_part_hex, 4, 0, do_avb_read_part_hex, "", ""), U_BOOT_CMD_MKENT(write_part, 5, 0, do_avb_write_part, "", ""), - U_BOOT_CMD_MKENT(verify, 1, 0, do_avb_verify_part, "", ""), + U_BOOT_CMD_MKENT(verify, 2, 0, do_avb_verify_part, "", ""), #ifdef CONFIG_OPTEE_TA_AVB U_BOOT_CMD_MKENT(read_pvalue, 3, 0, do_avb_read_pvalue, "", ""), U_BOOT_CMD_MKENT(write_pvalue, 3, 0, do_avb_write_pvalue, "", ""), @@ -462,6 +466,7 @@ U_BOOT_CMD( "avb read_pvalue <name> <bytes> - read a persistent value <name>\n" "avb write_pvalue <name> <value> - write a persistent value <name>\n" #endif - "avb verify - run verification process using hash data\n" + "avb verify [slot_suffix] - run verification process using hash data\n" " from vbmeta structure\n" + " [slot_suffix] - _a, _b, etc (if vbmeta partition is slotted)\n" ); -- 2.20.1

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[U-Boot] [PATCH v5 1/5] spl: dm: disable SPI DM flash for non-DM SPL
by Xiaowei Bao 21 Oct '19

21 Oct '19

From: Chuanhua Han <chuanhua.han(a)nxp.com> This patch solves the problem that spiboot cannot be performed in non-DM SPL. Signed-off-by: Pan Jiafei <Jiafei.Pan(a)freescale.com> Signed-off-by: Chuanhua Han <chuanhua.han(a)nxp.com> --- Changes in v5: - No change. Changes in v4: - No change. Changes in v3: - Add a cover-letter for this patch set. Changes in v2: - No change. include/config_uncmd_spl.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/config_uncmd_spl.h b/include/config_uncmd_spl.h index c2f9735..da94b3d 100644 --- a/include/config_uncmd_spl.h +++ b/include/config_uncmd_spl.h @@ -15,6 +15,7 @@ #undef CONFIG_DM_GPIO #undef CONFIG_DM_I2C #undef CONFIG_DM_SPI +#undef CONFIG_DM_SPI_FLASH #endif #undef CONFIG_DM_WARN -- 2.9.5

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