July 2019 - U-Boot

[U-Boot] [PATCH 1/1] efi_loader: bump UEFI specification number to 2.8
by Heinrich Schuchardt 02 Jul '19

02 Jul '19

We are implementing UEFI variable RuntimeServicesSupported and set the unimplemented runtime functions return EFI_UNSUPPORTED as described in UEFI specification 2.8. So let's also advertise this specification version in our system table. Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- include/efi_api.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/efi_api.h b/include/efi_api.h index 4de5d208f5..1962bc9e4b 100644 --- a/include/efi_api.h +++ b/include/efi_api.h @@ -23,8 +23,8 @@ #include <asm/setjmp.h> #endif -/* UEFI spec version 2.7 */ -#define EFI_SPECIFICATION_VERSION (2 << 16 | 70) +/* UEFI spec version 2.8 */ +#define EFI_SPECIFICATION_VERSION (2 << 16 | 80) /* Types and defines for EFI CreateEvent */ enum efi_timer_delay { -- 2.20.1

2 1

[U-Boot] [PATCH 1/1] efi_loader: correct signature of ConvertPointer()
by Heinrich Schuchardt 02 Jul '19

02 Jul '19

ConvertPointer() must be EFIAPI. The first parameter should be of type efi_uint_t. Use the same parameter name as the UEFI specification. Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- include/efi_api.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/include/efi_api.h b/include/efi_api.h index 1962bc9e4b..d4f32dbdc8 100644 --- a/include/efi_api.h +++ b/include/efi_api.h @@ -242,7 +242,8 @@ struct efi_runtime_services { unsigned long descriptor_size, uint32_t descriptor_version, struct efi_mem_desc *virtmap); - efi_status_t (*convert_pointer)(unsigned long dbg, void **address); + efi_status_t (EFIAPI *convert_pointer)( + efi_uintn_t debug_disposition, void **address); efi_status_t (EFIAPI *get_variable)(u16 *variable_name, const efi_guid_t *vendor, u32 *attributes, -- 2.20.1

2 1

[U-Boot] [PATCH 1/1] efi_selftest: description of CMD_BOOTEFI_SELFTEST
by Heinrich Schuchardt 02 Jul '19

02 Jul '19

The current short description has a typo. Let it stand out clear that we provide unit tests. Improve the description of the CMD_BOOTEFI_SELFTEST configuration option. Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- lib/efi_selftest/Kconfig | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/lib/efi_selftest/Kconfig b/lib/efi_selftest/Kconfig index 59f9f36801..52ad439220 100644 --- a/lib/efi_selftest/Kconfig +++ b/lib/efi_selftest/Kconfig @@ -1,9 +1,9 @@ config CMD_BOOTEFI_SELFTEST - bool "Allow booting an EFI efi_selftest" + bool "UEFI unit tests" depends on CMD_BOOTEFI imply FAT imply FAT_WRITE help - This adds an EFI test application to U-Boot that can be executed - with the 'bootefi selftest' command. It provides extended tests of - the EFI API implementation. + This adds an UEFI test application to U-Boot that can be executed + via the 'bootefi selftest' command. It provides extended tests of + the UEFI API implementation. -- 2.20.1

2 1

[U-Boot] [PATCH v2 8/8] x86: Skip setting up MTRRs in slimbootloader
by Park, Aiden 02 Jul '19

02 Jul '19

The setting up MTRRs have already been done in previous Slim Bootloader stages. Signed-off-by: Aiden Park <aiden.park(a)intel.com> --- arch/x86/lib/init_helpers.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/x86/lib/init_helpers.c b/arch/x86/lib/init_helpers.c index 0481f453ca..5e19f13720 100644 --- a/arch/x86/lib/init_helpers.c +++ b/arch/x86/lib/init_helpers.c @@ -18,7 +18,8 @@ __weak ulong board_get_usable_ram_top(ulong total_size) int init_cache_f_r(void) { -#if CONFIG_IS_ENABLED(X86_32BIT_INIT) && !defined(CONFIG_HAVE_FSP) +#if CONFIG_IS_ENABLED(X86_32BIT_INIT) && !defined(CONFIG_HAVE_FSP) && \ + !defined(CONFIG_SYS_SLIMBOOTLOADER) int ret; ret = mtrr_commit(false); -- 2.20.1

2 1

[U-Boot] [PATCH v2] cmd: mem: Add a command to fill the memory with random data
by Jean-Jacques Hiblot 02 Jul '19

02 Jul '19

This command fills the memory with data produced by rand(). This command depends on CONFIG_LIB_RAND. Signed-off-by: Jean-Jacques Hiblot <jjhiblot(a)ti.com> --- changes in v2: - Do not include the command if CONFIG_LIB_RAND is not set - make do_random() static cmd/Kconfig | 3 ++- cmd/mem.c | 52 ++++++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 54 insertions(+), 1 deletion(-) diff --git a/cmd/Kconfig b/cmd/Kconfig index cda7931fe3..f9385fcc08 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -537,7 +537,7 @@ config CMD_MEMINFO Display memory information. config CMD_MEMORY - bool "md, mm, nm, mw, cp, cmp, base, loop" + bool "md, mm, nm, mw, cp, cmp, base, loop, random" default y help Memory commands. @@ -549,6 +549,7 @@ config CMD_MEMORY cmp - memory compare base - print or set address offset loop - initialize loop on address range + random - fill memory with random data config CMD_MEMTEST bool "memtest" diff --git a/cmd/mem.c b/cmd/mem.c index 392ed1756b..e5af12db57 100644 --- a/cmd/mem.c +++ b/cmd/mem.c @@ -1082,6 +1082,49 @@ static int do_mem_crc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) #endif +#ifdef CONFIG_LIB_RAND +static int do_random(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + unsigned long addr, len; + unsigned long seed; // NOT INITIALIZED ON PURPOSE + unsigned int *buf, *start; + unsigned char *buf8; + unsigned int i; + + if (argc < 3 || argc > 4) { + printf("usage: %s <addr> <len> [<seed>]\n", argv[0]); + return 0; + } + + len = simple_strtoul(argv[2], NULL, 16); + addr = simple_strtoul(argv[1], NULL, 16); + + if (argc == 4) { + seed = simple_strtoul(argv[3], NULL, 16); + if (seed == 0) { + printf("The seed cannot be 0. Using 0xDEADBEEF.\n"); + seed = 0xDEADBEEF; + } + } else { + seed = get_timer(0) ^ rand(); + } + + srand(seed); + start = map_sysmem(addr, len); + buf = start; + for (i = 0; i < (len / 4); i++) + *buf++ = rand(); + + buf8 = (unsigned char *)buf; + for (i = 0; i < (len % 4); i++) + *buf8++ = rand() & 0xFF; + + unmap_sysmem(start); + printf("%lu bytes filled with random data\n", len); + return 1; +} +#endif + /**************************************************/ U_BOOT_CMD( md, 3, 1, do_mem_md, @@ -1250,3 +1293,12 @@ U_BOOT_CMD( "" ); #endif + +#ifdef CONFIG_LIB_RAND +U_BOOT_CMD( + random, 4, 0, do_random, + "fill memory with random pattern", + "<addr> <len> [<seed>]\n" + " - Fill 'len' bytes of memory starting at 'addr' with random data\n" +); +#endif -- 2.17.1

2 2

[U-Boot] [PATCH 1/3] ARM: dts: dh-imx6: Refactor DT with som and board level defs for use with imx6 duallite
by Ludwig Zenz 02 Jul '19

02 Jul '19

To use the device tree definitions imx6q-dhcom-som.dtsi for all imx6 derivatives rename it to imx6qdl-dhcom.dtsi. We omit the '-som', because it simplifies further mainlinening of already existing device trees. To reuse board level common stuff imx6qdl-dhcom-pdk2.dtsi is created and included by imx6q-dhcom-pdk2.dts. Signed-off-by Ludwig Zenz <lzenz(a)dh-electronics.com> --- arch/arm/dts/imx6q-dhcom-pdk2.dts | 143 +-------------------- arch/arm/dts/imx6qdl-dhcom-pdk2.dtsi | 140 ++++++++++++++++++++ .../{imx6q-dhcom-som.dtsi => imx6qdl-dhcom.dtsi} | 1 - 3 files changed, 146 insertions(+), 138 deletions(-) create mode 100644 arch/arm/dts/imx6qdl-dhcom-pdk2.dtsi rename arch/arm/dts/{imx6q-dhcom-som.dtsi => imx6qdl-dhcom.dtsi} (99%) diff --git a/arch/arm/dts/imx6q-dhcom-pdk2.dts b/arch/arm/dts/imx6q-dhcom-pdk2.dts index 9c61e3be2d..49ef3552bd 100644 --- a/arch/arm/dts/imx6q-dhcom-pdk2.dts +++ b/arch/arm/dts/imx6q-dhcom-pdk2.dts @@ -1,151 +1,20 @@ // SPDX-License-Identifier: (GPL-2.0+) /* - * Copyright (C) 2015 DH electronics GmbH - * Copyright (C) 2018 Marek Vasut <marex(a)denx.de> + * Copyright (C) 2019 DH electronics GmbH */ /dts-v1/; -#include "imx6q-dhcom-som.dtsi" +#include "imx6q.dtsi" +#include "imx6qdl-dhcom.dtsi" +#include "imx6qdl-dhcom-pdk2.dtsi" / { - model = "Freescale i.MX6 Quad DHCOM Premium Developer Kit (2)"; - compatible = "dh,imx6q-dhcom-pdk2", "dh,imx6q-dhcom-som", "fsl,imx6q"; - - chosen { - stdout-path = &uart1; - }; - - clk_ext_audio_codec: clock-codec { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <24000000>; - }; - - sound { - compatible = "fsl,imx-audio-sgtl5000"; - model = "imx-sgtl5000"; - ssi-controller = <&ssi1>; - audio-codec = <&sgtl5000>; - audio-routing = - "MIC_IN", "Mic Jack", - "Mic Jack", "Mic Bias", - "LINE_IN", "Line In Jack", - "Headphone Jack", "HP_OUT"; - mux-int-port = <1>; - mux-ext-port = <3>; - }; -}; - -&audmux { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_audmux_ext>; - status = "okay"; -}; - -&hdmi { - ddc-i2c-bus = <&i2c2>; - status = "okay"; -}; - -&i2c2 { - sgtl5000: codec@a { - compatible = "fsl,sgtl5000"; - reg = <0x0a>; - #sound-dai-cells = <0>; - clocks = <&clk_ext_audio_codec>; - VDDA-supply = <&reg_3p3v>; - VDDIO-supply = <&reg_3p3v>; - }; -}; - -&iomuxc { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_hog_base &pinctrl_hog>; - - pinctrl_hog: hog-grp { - fsl,pins = < - MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x400120b0 - MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x400120b0 - MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x400120b0 - MX6QDL_PAD_CSI0_DAT17__GPIO6_IO03 0x400120b0 - MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x120b0 - MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x400120b0 - MX6QDL_PAD_EIM_D27__GPIO3_IO27 0x120b0 - MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x120b0 - MX6QDL_PAD_KEY_COL1__GPIO4_IO08 0x400120b0 - MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x400120b0 - MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x400120b0 - MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x400120b0 - MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x400120b0 - MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x400120b0 - MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x400120b0 - MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x400120b0 - MX6QDL_PAD_SD1_CMD__GPIO1_IO18 0x400120b0 - MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x400120b0 - MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x400120b0 - MX6QDL_PAD_SD1_DAT2__GPIO1_IO19 0x400120b0 - MX6QDL_PAD_SD1_CLK__GPIO1_IO20 0x400120b0 - MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x400120b0 - MX6QDL_PAD_CSI0_MCLK__GPIO5_IO19 0x400120b0 - MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x400120b0 - >; - }; - - pinctrl_audmux_ext: audmux-ext-grp { - fsl,pins = < - MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0 - MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0 - MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0 - MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0 - >; - }; - - pinctrl_enet_1G: enet-1G-grp { - fsl,pins = < - MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0 - MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0 - MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b0 - MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b0 - MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b0 - MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b0 - MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0 - MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0 - MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0 - MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 - MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 - MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 - MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 - MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 - MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 - MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x000b0 - MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x000b1 - MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x000b1 - >; - }; - - pinctrl_pcie: pcie-grp { - fsl,pins = < - MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x1b0b1 - >; - }; -}; - -&pcie { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pcie>; - reset-gpio = <&gpio6 14 GPIO_ACTIVE_LOW>; - status = "okay"; -}; - -&ssi1 { - status = "okay"; + model = "Freescale i.MX6 Quad/Dual DHCOM Premium Developer Kit (2)"; + compatible = "dh,imx6q-dhcom-pdk2", "dh,imx6q-dhcom", "fsl,imx6q"; }; &sata { status = "okay"; }; -&usdhc3 { - status = "okay"; -}; diff --git a/arch/arm/dts/imx6qdl-dhcom-pdk2.dtsi b/arch/arm/dts/imx6qdl-dhcom-pdk2.dtsi new file mode 100644 index 0000000000..e08afcb297 --- /dev/null +++ b/arch/arm/dts/imx6qdl-dhcom-pdk2.dtsi @@ -0,0 +1,140 @@ +// SPDX-License-Identifier: (GPL-2.0+) +/* + * Copyright (C) 2015 DH electronics GmbH + * Copyright (C) 2018 Marek Vasut <marex(a)denx.de> + */ + +/ { + chosen { + stdout-path = &uart1; + }; + + clk_ext_audio_codec: clock-codec { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24000000>; + }; + + sound { + compatible = "fsl,imx-audio-sgtl5000"; + model = "imx-sgtl5000"; + ssi-controller = <&ssi1>; + audio-codec = <&sgtl5000>; + audio-routing = + "MIC_IN", "Mic Jack", + "Mic Jack", "Mic Bias", + "LINE_IN", "Line In Jack", + "Headphone Jack", "HP_OUT"; + mux-int-port = <1>; + mux-ext-port = <3>; + }; +}; + +&audmux { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_audmux_ext>; + status = "okay"; +}; + +&hdmi { + ddc-i2c-bus = <&i2c2>; + status = "okay"; +}; + +&i2c2 { + sgtl5000: codec@a { + compatible = "fsl,sgtl5000"; + reg = <0x0a>; + #sound-dai-cells = <0>; + clocks = <&clk_ext_audio_codec>; + VDDA-supply = <&reg_3p3v>; + VDDIO-supply = <&reg_3p3v>; + }; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hog_base &pinctrl_hog>; + + pinctrl_hog: hog-grp { + fsl,pins = < + MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x400120b0 + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x400120b0 + MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x400120b0 + MX6QDL_PAD_CSI0_DAT17__GPIO6_IO03 0x400120b0 + MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x120b0 + MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x400120b0 + MX6QDL_PAD_EIM_D27__GPIO3_IO27 0x120b0 + MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x120b0 + MX6QDL_PAD_KEY_COL1__GPIO4_IO08 0x400120b0 + MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x400120b0 + MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x400120b0 + MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x400120b0 + MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x400120b0 + MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x400120b0 + MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x400120b0 + MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x400120b0 + MX6QDL_PAD_SD1_CMD__GPIO1_IO18 0x400120b0 + MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x400120b0 + MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x400120b0 + MX6QDL_PAD_SD1_DAT2__GPIO1_IO19 0x400120b0 + MX6QDL_PAD_SD1_CLK__GPIO1_IO20 0x400120b0 + MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x400120b0 + MX6QDL_PAD_CSI0_MCLK__GPIO5_IO19 0x400120b0 + MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x400120b0 + >; + }; + + pinctrl_audmux_ext: audmux-ext-grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0 + MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0 + MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0 + MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0 + >; + }; + + pinctrl_enet_1G: enet-1G-grp { + fsl,pins = < + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b0 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b0 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b0 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b0 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0 + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 + MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x000b0 + MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x000b1 + MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x000b1 + >; + }; + + pinctrl_pcie: pcie-grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x1b0b1 + >; + }; +}; + +&pcie { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pcie>; + reset-gpio = <&gpio6 14 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +&ssi1 { + status = "okay"; +}; + +&usdhc3 { + status = "okay"; +}; diff --git a/arch/arm/dts/imx6q-dhcom-som.dtsi b/arch/arm/dts/imx6qdl-dhcom.dtsi similarity index 99% rename from arch/arm/dts/imx6q-dhcom-som.dtsi rename to arch/arm/dts/imx6qdl-dhcom.dtsi index 524cd287c6..5952c96086 100644 --- a/arch/arm/dts/imx6q-dhcom-som.dtsi +++ b/arch/arm/dts/imx6qdl-dhcom.dtsi @@ -4,7 +4,6 @@ * Copyright (C) 2018 Marek Vasut <marex(a)denx.de> */ -#include "imx6q.dtsi" #include <dt-bindings/pwm/pwm.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/clock/imx6qdl-clock.h> -- 2.11.0

2 3

Re: [U-Boot] [PATCH] video: backlight: fix pwm invertation
by Stefan Mavrodiev 02 Jul '19

02 Jul '19

Hi, On 6/27/19 9:56 PM, marvin24(a)posteo.de wrote: > Am Freitag, 21. Juni 2019, 22:01:35 CEST schrieb Marc Dietrich: >> Fixes: 57e7775413 ("video: backlight: Parse PWM polarity cell") >> >> set_pwm will always fail if pwm_set_invert is not implemented, leaving the >> backlight dark. Fix this by calling pwm_set_invert only if pwm is inverted. I'm not sure if this is true. pwm_set_invert() checks for .set_invert. Which pwm driver you're using? >> >> Signed-off-by: Marc Dietrich <marvin24(a)gmx.de> > ping? > > >> --- >> drivers/video/pwm_backlight.c | 7 ++++--- >> 1 file changed, 4 insertions(+), 3 deletions(-) >> >> diff --git a/drivers/video/pwm_backlight.c b/drivers/video/pwm_backlight.c >> index a587977c22..26bcbeb42b 100644 >> --- a/drivers/video/pwm_backlight.c >> +++ b/drivers/video/pwm_backlight.c >> @@ -61,12 +61,13 @@ static int set_pwm(struct pwm_backlight_priv *priv) >> >> duty_cycle = priv->period_ns * (priv->cur_level - priv->min_level) / >> (priv->max_level - priv->min_level + 1); >> + >> ret = pwm_set_config(priv->pwm, priv->channel, priv->period_ns, >> duty_cycle); >> - if (ret) >> - return log_ret(ret); >> >> - ret = pwm_set_invert(priv->pwm, priv->channel, priv->polarity); >> + if (!ret && priv->polarity) >> + ret = pwm_set_invert(priv->pwm, priv->channel, priv->polarity); This shouldn't be a problem. Rather the driver doesn't handle polarity correctly. >> + >> return log_ret(ret); >> } >> >> -- >> 2.17.1 P.S. You should cc to all maintainers. You can use ./scripts/get_maintainer.pl. Best regards, Stefan Mavrodiev

2 3

[U-Boot] [PATCH 01/18] arm64: dts: uniphier: add reserved-memory for secure memory
by Masahiro Yamada 02 Jul '19

02 Jul '19

[ Linux commit aa38571246c6ac279ebebd141157297bcb959d76 ] The memory regions specified by /memreserve/ are passed to early_init_dt_reserve_memory_arch() with nomap=false, so it is not suitable for reserving memory for Trusted Firmware-A etc. Use the more robust /reserved-memory node with the no-map property to prevent the kernel from mapping it. Signed-off-by: Masahiro Yamada <yamada.masahiro(a)socionext.com> --- arch/arm/dts/uniphier-ld11.dtsi | 13 +++++++++++-- arch/arm/dts/uniphier-ld20.dtsi | 13 +++++++++++-- arch/arm/dts/uniphier-pxs3.dtsi | 13 +++++++++++-- 3 files changed, 33 insertions(+), 6 deletions(-) diff --git a/arch/arm/dts/uniphier-ld11.dtsi b/arch/arm/dts/uniphier-ld11.dtsi index a3cd475b48d2..337a3537ed28 100644 --- a/arch/arm/dts/uniphier-ld11.dtsi +++ b/arch/arm/dts/uniphier-ld11.dtsi @@ -8,8 +8,6 @@ #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/gpio/uniphier-gpio.h> -/memreserve/ 0x80000000 0x02000000; - / { compatible = "socionext,uniphier-ld11"; #address-cells = <2>; @@ -110,6 +108,17 @@ <1 10 4>; }; + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + secure-memory@81000000 { + reg = <0x0 0x81000000 0x0 0x01000000>; + no-map; + }; + }; + soc@0 { compatible = "simple-bus"; #address-cells = <1>; diff --git a/arch/arm/dts/uniphier-ld20.dtsi b/arch/arm/dts/uniphier-ld20.dtsi index baf23268366f..3721110b17a7 100644 --- a/arch/arm/dts/uniphier-ld20.dtsi +++ b/arch/arm/dts/uniphier-ld20.dtsi @@ -9,8 +9,6 @@ #include <dt-bindings/gpio/uniphier-gpio.h> #include <dt-bindings/thermal/thermal.h> -/memreserve/ 0x80000000 0x02000000; - / { compatible = "socionext,uniphier-ld20"; #address-cells = <2>; @@ -215,6 +213,17 @@ }; }; + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + secure-memory@81000000 { + reg = <0x0 0x81000000 0x0 0x01000000>; + no-map; + }; + }; + soc@0 { compatible = "simple-bus"; #address-cells = <1>; diff --git a/arch/arm/dts/uniphier-pxs3.dtsi b/arch/arm/dts/uniphier-pxs3.dtsi index 961d4d3621f4..b1aff285c8b7 100644 --- a/arch/arm/dts/uniphier-pxs3.dtsi +++ b/arch/arm/dts/uniphier-pxs3.dtsi @@ -8,8 +8,6 @@ #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/gpio/uniphier-gpio.h> -/memreserve/ 0x80000000 0x02000000; - / { compatible = "socionext,uniphier-pxs3"; #address-cells = <2>; @@ -138,6 +136,17 @@ <1 10 4>; }; + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + secure-memory@81000000 { + reg = <0x0 0x81000000 0x0 0x01000000>; + no-map; + }; + }; + soc@0 { compatible = "simple-bus"; #address-cells = <1>; -- 2.17.1

1 17

[U-Boot] [PATCH v2 1/5] armv8: ls2088a: The ls2088a platform supports the I2C driver model.
by Chuanhua Han 02 Jul '19

02 Jul '19

DM_I2C_COMPAT is a compatibility layer that allows using the non-DM I2C API when DM_I2C is used.When DM_I2C_COMPAT is not enabled for compilation, a compilation error will be generated. This patch solves the problem that the i2c-related api of the ls2088a platform does not support dm. Signed-off-by: Chuanhua Han <chuanhua.han(a)nxp.com> --- depends on: - http://patchwork.ozlabs.org/project/uboot/list/?series=109459 - http://patchwork.ozlabs.org/project/uboot/list/?series=113103 Change in v2: - No change. arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 4 ---- board/freescale/ls2080ardb/ls2080ardb.c | 9 +++++++++ include/configs/ls2080a_common.h | 3 --- include/configs/ls2080ardb.h | 1 - 4 files changed, 9 insertions(+), 8 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index ffda02a..8a69af4 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -205,10 +205,6 @@ config ARCH_LS2080A select ARCH_EARLY_INIT_R select BOARD_EARLY_INIT_F select SYS_I2C_MXC - select SYS_I2C_MXC_I2C1 - select SYS_I2C_MXC_I2C2 - select SYS_I2C_MXC_I2C3 - select SYS_I2C_MXC_I2C4 imply DISTRO_DEFAULTS imply PANIC_HANG diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c index ce419df..8833ed3 100644 --- a/board/freescale/ls2080ardb/ls2080ardb.c +++ b/board/freescale/ls2080ardb/ls2080ardb.c @@ -163,7 +163,16 @@ int select_i2c_ch_pca9547(u8 ch) { int ret; +#ifndef CONFIG_DM_I2C ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1); +#else + struct udevice *dev; + + ret = i2c_get_chip_for_busnum(0, I2C_MUX_PCA_ADDR_PRI, 1, &dev); + if (!ret) + ret = dm_i2c_write(dev, 0, &ch, 1); +#endif + if (ret) { puts("PCA: failed to select proper channel\n"); return ret; diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index c7d8a3b..e776b5c 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -74,9 +74,6 @@ /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2048 * 1024) -/* I2C */ -#define CONFIG_SYS_I2C - /* Serial Port */ #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1 diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index bfb54be..db22f59 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -13,7 +13,6 @@ #ifdef CONFIG_TARGET_LS2081ARDB #define CONFIG_QIXIS_I2C_ACCESS #endif -#define CONFIG_SYS_I2C_EARLY_INIT #endif #define I2C_MUX_CH_VOL_MONITOR 0xa -- 1.7.1

1 4

[U-Boot] [PATCH v3 1/4] armv8: ls1028a: The ls1028a platform supports the I2C driver model
by Chuanhua Han 02 Jul '19

02 Jul '19

DM_I2C_COMPAT is a compatibility layer that allows using the non-DM I2C API when DM_I2C is used.When DM_I2C_COMPAT is not enabled for compilation, a compilation error will be generated. This patch solves the problem that the i2c-related api of the ls1028a platform does not support dm. Signed-off-by: Chuanhua Han <chuanhua.han(a)nxp.com> --- depends on: - https://patchwork.ozlabs.org/project/uboot/list/?series=113364 - https://patchwork.ozlabs.org/project/uboot/list/?series=110856 - https://patchwork.ozlabs.org/project/uboot/list/?series=109677 Changes in v3: - No change. Changes in v2: - No change. arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 8 -------- board/freescale/ls1028a/ls1028a.c | 8 ++++++++ include/configs/ls1028a_common.h | 3 --- include/configs/ls1028ardb.h | 1 - 4 files changed, 8 insertions(+), 12 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index ffda02a..d6ef7fc 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -40,14 +40,6 @@ config ARCH_LS1028A select ARCH_EARLY_INIT_R select BOARD_EARLY_INIT_F select SYS_I2C_MXC - select SYS_I2C_MXC_I2C1 - select SYS_I2C_MXC_I2C2 - select SYS_I2C_MXC_I2C3 - select SYS_I2C_MXC_I2C4 - select SYS_I2C_MXC_I2C5 - select SYS_I2C_MXC_I2C6 - select SYS_I2C_MXC_I2C7 - select SYS_I2C_MXC_I2C8 select SYS_FSL_ERRATUM_A008997 select SYS_FSL_ERRATUM_A009007 select SYS_FSL_ERRATUM_A008514 if !TFABOOT diff --git a/board/freescale/ls1028a/ls1028a.c b/board/freescale/ls1028a/ls1028a.c index e5de4eb..49a9292 100644 --- a/board/freescale/ls1028a/ls1028a.c +++ b/board/freescale/ls1028a/ls1028a.c @@ -73,7 +73,15 @@ int board_init(void) #if defined(CONFIG_TARGET_LS1028ARDB) u8 val = I2C_MUX_CH_DEFAULT; +#ifndef CONFIG_DM_I2C i2c_write(I2C_MUX_PCA_ADDR_PRI, 0x0b, 1, &val, 1); +#else + struct udevice *dev; + + if (!i2c_get_chip_for_busnum(0, I2C_MUX_PCA_ADDR_PRI, 1, &dev)) + dm_i2c_write(dev, 0x0b, &val, 1); +#endif + #endif return 0; } diff --git a/include/configs/ls1028a_common.h b/include/configs/ls1028a_common.h index d3d787f..0fa5095 100644 --- a/include/configs/ls1028a_common.h +++ b/include/configs/ls1028a_common.h @@ -41,9 +41,6 @@ /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2048 * 1024) -/* I2C */ -#define CONFIG_SYS_I2C - /* Serial Port */ #define CONFIG_CONS_INDEX 1 #define CONFIG_SYS_NS16550_SERIAL diff --git a/include/configs/ls1028ardb.h b/include/configs/ls1028ardb.h index 10791be..b77c36d 100644 --- a/include/configs/ls1028ardb.h +++ b/include/configs/ls1028ardb.h @@ -22,7 +22,6 @@ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_QIXIS_I2C_ACCESS -#define CONFIG_SYS_I2C_EARLY_INIT /* * QIXIS Definitions -- 1.7.1

1 3