July 2019 - U-Boot

[U-Boot] [RFC PATCH] pxe: add support for FDT overlays
by Neil Armstrong 17 Jan '20

17 Jan '20

This adds support for specicyinf FDT overlays in an extlinux/pxelinux configuration file. Without this, there is no simple way to apply overlays when the kernel and ftd is loaded by the pxe command. This change adds the 'fdtoverlays' keyword for a label, supporting multiple overlay files to be applied on top of the fdt specific in the 'fdt' or 'devicetree' keyword. Cc: Jernej Škrabec <jernej.skrabec(a)siol.net> Cc: Jonas Karlman <jonas(a)kwiboo.se> Signed-off-by: Neil Armstrong <narmstrong(a)baylibre.com> --- cmd/pxe.c | 104 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 104 insertions(+) diff --git a/cmd/pxe.c b/cmd/pxe.c index 1dd0a74ea3..8d19e6f99f 100644 --- a/cmd/pxe.c +++ b/cmd/pxe.c @@ -13,6 +13,8 @@ #include <linux/ctype.h> #include <errno.h> #include <linux/list.h> +#include <fdt_support.h> +#include <linux/libfdt.h> #include <fs.h> #include <splash.h> #include <asm/io.h> @@ -481,6 +483,7 @@ struct pxe_label { char *initrd; char *fdt; char *fdtdir; + char *fdtoverlays; int ipappend; int attempted; int localboot; @@ -561,6 +564,9 @@ static void label_destroy(struct pxe_label *label) if (label->fdtdir) free(label->fdtdir); + if (label->fdtoverlays) + free(label->fdtoverlays); + free(label); } @@ -608,6 +614,92 @@ static int label_localboot(struct pxe_label *label) return run_command_list(localcmd, strlen(localcmd), 0); } +/* + * Loads fdt overlays specified in 'fdtoverlays'. + */ +#ifdef CONFIG_OF_LIBFDT_OVERLAY +static void label_boot_fdtoverlay(cmd_tbl_t *cmdtp, struct pxe_label *label) +{ + char *fdtoverlay = label->fdtoverlays; + struct fdt_header *working_fdt; + char *fdtoverlay_addr_env; + ulong fdtoverlay_addr; + ulong fdt_addr; + int err; + + /* Get the main fdt and map it */ + fdt_addr = simple_strtoul(env_get("fdt_addr_r"), NULL, 16); + working_fdt = map_sysmem(fdt_addr, 0); + err = fdt_check_header(working_fdt); + if (err) + return; + + /* Get the specific overlay loading address */ + fdtoverlay_addr_env = env_get("fdtoverlay_addr_r"); + if (!fdtoverlay_addr_env) { + printf("Invalid fdtoverlay_addr_r for loading overlays\n"); + return; + } + + fdtoverlay_addr = simple_strtoul(fdtoverlay_addr_env, NULL, 16); + + /* Cycle over the overlay files and apply them in order */ + do { + struct fdt_header *blob; + char *overlayfile; + char *end; + int len; + + /* Drop leading spaces */ + while (*fdtoverlay == ' ') + ++fdtoverlay; + + /* Copy a single filename if multiple provided */ + end = strstr(fdtoverlay, " "); + if (end) { + len = (int)(end - fdtoverlay); + overlayfile = malloc(len + 1); + strncpy(overlayfile, fdtoverlay, len); + overlayfile[len] = '\0'; + } else + overlayfile = fdtoverlay; + + if (!strlen(overlayfile)) + goto skip_overlay; + + /* Load overlay file */ + err = get_relfile_envaddr(cmdtp, overlayfile, + "fdtoverlay_addr_r"); + if (err < 0) { + printf("Failed loading overlay %s\n", overlayfile); + goto skip_overlay; + } + + /* Resize main fdt */ + fdt_shrink_to_minimum(working_fdt, 8192); + + blob = map_sysmem(fdtoverlay_addr, 0); + err = fdt_check_header(blob); + if (err) { + printf("Invalid overlay %s, skipping\n", + overlayfile); + goto skip_overlay; + } + + err = fdt_overlay_apply_verbose(working_fdt, blob); + if (err) { + printf("Failed to apply overlay %s, skipping\n", + overlayfile); + goto skip_overlay; + } + +skip_overlay: + if (end) + free(overlayfile); + } while ((fdtoverlay = strstr(fdtoverlay, " "))); +} +#endif + /* * Boot according to the contents of a pxe_label. * @@ -798,6 +890,11 @@ static int label_boot(cmd_tbl_t *cmdtp, struct pxe_label *label) label->name); goto cleanup; } + +#ifdef CONFIG_OF_LIBFDT_OVERLAY + if (label->fdtoverlays) + label_boot_fdtoverlay(cmdtp, label); +#endif } else { bootm_argv[3] = NULL; } @@ -855,6 +952,7 @@ enum token_type { T_INCLUDE, T_FDT, T_FDTDIR, + T_FDTOVERLAYS, T_ONTIMEOUT, T_IPAPPEND, T_BACKGROUND, @@ -889,6 +987,7 @@ static const struct token keywords[] = { {"fdt", T_FDT}, {"devicetreedir", T_FDTDIR}, {"fdtdir", T_FDTDIR}, + {"fdtoverlays", T_FDTOVERLAYS}, {"ontimeout", T_ONTIMEOUT,}, {"ipappend", T_IPAPPEND,}, {"background", T_BACKGROUND,}, @@ -1322,6 +1421,11 @@ static int parse_label(char **c, struct pxe_menu *cfg) err = parse_sliteral(c, &label->fdtdir); break; + case T_FDTOVERLAYS: + if (!label->fdtoverlays) + err = parse_sliteral(c, &label->fdtoverlays); + break; + case T_LOCALBOOT: label->localboot = 1; err = parse_integer(c, &label->localboot_val); -- 2.21.0

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[U-Boot] Question about GPL v3 font
by Masahiro Yamada 13 Jan '20

13 Jan '20

Hi. According to the Kconfig entry, drivers/video/fonts/nimbus_sans_l_regular.ttf is licensed under GPL v3. How the license is handled when U-Boot is compiled with CONFIG_CONSOLE_TRUETYPE_NIMBUS=y ? I am asking this since many companies, I guess, have GPL-v3 allergy. config CONSOLE_TRUETYPE_NIMBUS bool "Nimbus Sans Regular" depends on CONSOLE_TRUETYPE default y help Nimbus Sans L is a version of Nimbus Sans using Adobe font sources. It was designed in 1987. A subset of Nimbus Sans L were released under the GPL. Although the characters are not exactly the same, Nimbus Sans L has metrics almost identical to Helvetica and Arial. (From Wikipedia, the free encyclopedia) From: https://fontlibrary.org/en/font/nimbus-sans-l License: GNU GPL v3 http://www.gnu.org/copyleft/gpl.html -- Best Regards Masahiro Yamada

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[U-Boot] [PATCH v2 00/15] AVB using OP-TEE
by Jens Wiklander 08 Jan '20

08 Jan '20

Hi, This adds support for storing AVB rollback indexes in the RPMB partition. The RPMB partition (content and key) is managed by OP-TEE (https://www.op-tee.org/) which is a secure OS leveraging ARM TrustZone. The Linux kernel can already support OP-TEE with reading and updating rollback indexes in the RPMB partition, the catch is that this is needed before the kernel has booted. The design here is the same as what is in the Linux kernel, with the exception that the user space daemon tee-supplicant is integrated in the OP-TEE driver here (drivers/tee/optee/supplicant.c) instead. A new uclass (UCLASS_TEE) is introduced to provide an abstraction for interfacing with a Trusted Execution Environment (TEE). There's also the OP-TEE driver using UCLASS_TEE for registration. A Trusted Application (TA) interface is added to be used by the AVB verify functions which are updated accordingly. The TA is managed by OP-TEE and is executed in a secure TrustZone protected environment. The header files drivers/tee/optee/optee_{msg,msg_supplicant,smc}.h and include/tee/optee_ta_avb.h are copied from https://github.com/OP-TEE/optee_os/tree/master more or less unmodified. They may need to be updated from time to time in order to support new features. In MMC there's a new function, mmc_rpmb_route_frames(), which as the name suggests is used to route RPMB frames to/from the MMC. This saves OP-TEE from implementing an MMC driver which would need to share resources with its counterpart here in U-boot. This was tested on a Hikey (Kirin 620) board. I've added myself as maintainer of the TEE stuff. v2: * Added sandbox driver and a test in test/dm for the new TEE uclass: Commit ("test: tee: test TEE uclass") and the enabling commits ("sandbox: dt: add sandbox_tee node") and ("configs: sandbox: enable CONFIG_TEE (TEE uclass)") * Added descriptions of exported structs and functions * Added documentation for the TEE uclass and the OP-TEE driver with the new commit ("Documentation: tee uclass and op-tee driver") * Added documentation for the changes in avb_verify * Addressed review comments from Simon Glass * Added the commit ("cmd: avb: print error message if command fails") * Made a few functions static in the OP-TEE driver * Commit ("cmd: avb read_rb: print rb_idx in hexadecimal") and ("tee: optee: support AVB trusted application"); Reviewed-by: Igor Opaniuk <igor.opaniuk(a)linaro.org> Thanks, Jens Jens Wiklander (15): dm: fdt: scan for devices under /firmware too cmd: avb read_rb: print rb_idx in hexadecimal cmd: avb: print error message if command fails mmc: rpmb: add mmc_rpmb_route_frames() Add UCLASS_TEE for Trusted Execution Environment dt/bindings: add bindings for optee tee: add OP-TEE driver Documentation: tee uclass and op-tee driver test: tee: test TEE uclass sandbox: dt: add sandbox_tee node configs: sandbox: enable CONFIG_TEE (TEE uclass) arm: dt: hikey: Add optee node optee: support routing of rpmb data frames to mmc tee: optee: support AVB trusted application avb_verify: support using OP-TEE TA AVB MAINTAINERS | 7 + arch/arm/dts/hi6220-hikey.dts | 7 + arch/sandbox/dts/sandbox.dts | 4 + arch/sandbox/dts/sandbox64.dts | 4 + arch/sandbox/dts/test.dts | 4 + cmd/avb.c | 19 +- common/avb_verify.c | 132 +++- configs/sandbox64_defconfig | 1 + configs/sandbox_defconfig | 1 + configs/sandbox_flattree_defconfig | 1 + configs/sandbox_noblk_defconfig | 1 + configs/sandbox_spl_defconfig | 1 + doc/README.avb2 | 13 + doc/README.tee | 112 ++++ .../firmware/linaro,optee-tz.txt | 31 + drivers/Kconfig | 2 + drivers/Makefile | 1 + drivers/core/root.c | 15 +- drivers/mmc/rpmb.c | 160 +++++ drivers/tee/Kconfig | 17 + drivers/tee/Makefile | 4 + drivers/tee/optee/Kconfig | 23 + drivers/tee/optee/Makefile | 5 + drivers/tee/optee/core.c | 622 ++++++++++++++++++ drivers/tee/optee/optee_msg.h | 423 ++++++++++++ drivers/tee/optee/optee_msg_supplicant.h | 234 +++++++ drivers/tee/optee/optee_private.h | 41 ++ drivers/tee/optee/optee_smc.h | 444 +++++++++++++ drivers/tee/optee/rpmb.c | 184 ++++++ drivers/tee/optee/supplicant.c | 92 +++ drivers/tee/tee-uclass.c | 192 ++++++ include/avb_verify.h | 4 + include/dm/uclass-id.h | 1 + include/mmc.h | 2 + include/tee.h | 297 +++++++++ include/tee/optee_ta_avb.h | 48 ++ test/dm/Makefile | 1 + test/dm/tee.c | 182 +++++ 38 files changed, 3325 insertions(+), 7 deletions(-) create mode 100644 doc/README.tee create mode 100644 doc/device-tree-bindings/firmware/linaro,optee-tz.txt create mode 100644 drivers/tee/Kconfig create mode 100644 drivers/tee/Makefile create mode 100644 drivers/tee/optee/Kconfig create mode 100644 drivers/tee/optee/Makefile create mode 100644 drivers/tee/optee/core.c create mode 100644 drivers/tee/optee/optee_msg.h create mode 100644 drivers/tee/optee/optee_msg_supplicant.h create mode 100644 drivers/tee/optee/optee_private.h create mode 100644 drivers/tee/optee/optee_smc.h create mode 100644 drivers/tee/optee/rpmb.c create mode 100644 drivers/tee/optee/supplicant.c create mode 100644 drivers/tee/tee-uclass.c create mode 100644 include/tee.h create mode 100644 include/tee/optee_ta_avb.h create mode 100644 test/dm/tee.c -- 2.17.1

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[U-Boot] [PATCH 0/9] efi_loader: rework bootefi/bootmgr
by AKASHI Takahiro 06 Jan '20

06 Jan '20

There are several reasons that I want to rework/refactor bootefi command as well as bootmgr: * Some previous commits on bootefi.c have made the code complicated and a bit hard to understand. * do_bootefi_exec() would better be implemented using load_image() along with start_image() to be aligned with UEFI interfaces. * Contrary to the other part, efi_selftest part of the code is unusual in terms of loading/execution path in do_bootefi(). * When we will support "secure boot" in the future, EFI Boot Manager is expected to be invoked as a standalone command without any arguments to mitigate security surfaces. In this patch set, Patch#1 to #7 are preparatory patches for patch#8. Patch#8 is a core part of reworking. Patch#9 is for standalone boot manager. # Please note that some patches, say patch#2 and #3, can be combined into one # but I intentionally keep them separated to clarify my intentions of changes. Issues: * It would be better off to change the semantics of efi_dp_from_name(). no chance to free loaded_image_info->load_options. (see patch #8) -Takahiro Akashi Changes in v1 (Apr 19, 2019) * Travis CI: https://travis-ci.org/t-akashi/u-boot/builds/521984187 * rebased on efi-2019-07 * delete already-merged patches * rework set_load_options() (patch#1 and #8) * fix compile/Travis CI errors (patch#2, #7 and #8) * rename do_boot_efi() to do_bootefi_image() (patch#7) * free file_path in do_bootefi_image() (patch#8) * use EFI_PRINT instead of debug() (patch#8) * remove improper warning messages (patch#8) Changes in RFC v3 (Apr 16, 2019) * rebased on v2019.04 * delete already-merged patches * add patch#2 for exporting root node * use correct/more appropriate return code (CMD_RET_xxx) (patch#3,5,7) * remove a message at starting an image in bootefi command, instead adding a debug message in efi_start_image() * use root node as a dummy parent handle when calling efi_start_image() * remove efi_unload_image() in bootefi command Changes in RFC v2 (Mar 27, 2019) * rebased on v2019.04-rc4 * use load_image API in do_bootmgr_load() * merge efi_install_fdt() and efi_process_fdt() * add EFI_LOADED_IMAGE_DEVICE_PATH_PROTOCOL to image (patch#1) * lots of minor changes AKASHI Takahiro (9): cmd: bootefi: rework set_load_options() cmd: bootefi: carve out fdt handling from do_bootefi() cmd: bootefi: merge efi_install_fdt() and efi_process_fdt() cmd: bootefi: carve out efi_selftest code from do_bootefi() cmd: bootefi: move do_bootefi_bootmgr_exec() forward cmd: bootefi: carve out bootmgr code from do_bootefi() cmd: bootefi: carve out do_bootefi_image() from do_bootefi() efi_loader: rework bootmgr/bootefi using load_image API cmd: add efibootmgr command cmd/Kconfig | 8 + cmd/bootefi.c | 540 ++++++++++++++++++++++------------ include/efi_loader.h | 5 +- lib/efi_loader/efi_bootmgr.c | 43 +-- lib/efi_loader/efi_boottime.c | 2 + 5 files changed, 383 insertions(+), 215 deletions(-) -- 2.20.1

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[U-Boot] SUNXI : CONFIG_VIDEO_SUNXI is never set
by Arjan van Vught 22 Dec '19

22 Dec '19

Version: u-boot-2018.09 This is a follow-up for : "SUNXI : setenv video-mode not working" Although I have added CONFIG_VIDEO_SUNXI=y in configs/orangepi_one_defconfig the source file sunxi_display.c is not compiled. Hence the setenv video-mode is not working ? Please advice. Many thanks in advance, Arjan http://www.orangepi-dmx.org/allwinner-h3

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[U-Boot] [PATCHv2 1/2] PCI: layerscape: Add Support for ls2088 PCIe EP mode
by Xiaowei Bao 05 Dec '19

05 Dec '19

From: Xiaowei Bao <xiaowei.bao(a)nxp.com> Signed-off-by: hongbo.wang <hongbo.wang(a)nxp.com> Signed-off-by: Minghuan Lian <Minghuan.Lian(a)nxp.com> Signed-off-by: Xiaowei Bao <xiaowei.bao(a)nxp.com> --- v2: - Add the NXP copyright and make the function readability. drivers/pci/pcie_layerscape.c | 117 +++++++++++++++++++++++++++-------------- drivers/pci/pcie_layerscape.h | 19 +++++-- 2 files changed, 91 insertions(+), 45 deletions(-) diff --git a/drivers/pci/pcie_layerscape.c b/drivers/pci/pcie_layerscape.c index db1375a..8f5ebda 100644 --- a/drivers/pci/pcie_layerscape.c +++ b/drivers/pci/pcie_layerscape.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright 2017 NXP + * Copyright 2017, 2019 NXP * Copyright 2014-2015 Freescale Semiconductor, Inc. * Layerscape PCIe driver */ @@ -105,13 +105,14 @@ static void ls_pcie_atu_outbound_set(struct ls_pcie *pcie, int idx, int type, } /* Use bar match mode and MEM type as default */ -static void ls_pcie_atu_inbound_set(struct ls_pcie *pcie, int idx, - int bar, u64 phys) +static void ls_pcie_atu_inbound_set(struct ls_pcie *pcie, u32 pf, int idx, + int bar, u64 phys) { dbi_writel(pcie, PCIE_ATU_REGION_INBOUND | idx, PCIE_ATU_VIEWPORT); dbi_writel(pcie, (u32)phys, PCIE_ATU_LOWER_TARGET); dbi_writel(pcie, phys >> 32, PCIE_ATU_UPPER_TARGET); - dbi_writel(pcie, PCIE_ATU_TYPE_MEM, PCIE_ATU_CR1); + dbi_writel(pcie, PCIE_ATU_TYPE_MEM | PCIE_CTRL1_FUNC_NUM(pf), + PCIE_ATU_CR1); dbi_writel(pcie, PCIE_ATU_ENABLE | PCIE_ATU_BAR_MODE_ENABLE | PCIE_ATU_BAR_NUM(bar), PCIE_ATU_CR2); } @@ -341,50 +342,61 @@ static void ls_pcie_setup_ctrl(struct ls_pcie *pcie) ls_pcie_disable_bars(pcie); } -static void ls_pcie_ep_setup_atu(struct ls_pcie *pcie) +static void ls_pcie_ep_setup_atu(struct ls_pcie *pcie, u32 pf) { - u64 phys = CONFIG_SYS_PCI_EP_MEMORY_BASE; + pci_size_t atu_size = CONFIG_SYS_PCI_MEMORY_SIZE; + u64 phys = 0; + phys = CONFIG_SYS_PCI_EP_MEMORY_BASE + pf * SZ_2M; + + phys = ALIGN(phys, PCIE_BAR0_SIZE); /* ATU 0 : INBOUND : map BAR0 */ - ls_pcie_atu_inbound_set(pcie, 0, 0, phys); + ls_pcie_atu_inbound_set(pcie, pf, 0 + pf * BAR_NUM, 0, phys); /* ATU 1 : INBOUND : map BAR1 */ - phys += PCIE_BAR1_SIZE; - ls_pcie_atu_inbound_set(pcie, 1, 1, phys); + phys = ALIGN(phys + PCIE_BAR0_SIZE, PCIE_BAR1_SIZE); + ls_pcie_atu_inbound_set(pcie, pf, 1 + pf * BAR_NUM, 1, phys); /* ATU 2 : INBOUND : map BAR2 */ - phys += PCIE_BAR2_SIZE; - ls_pcie_atu_inbound_set(pcie, 2, 2, phys); - /* ATU 3 : INBOUND : map BAR4 */ - phys = CONFIG_SYS_PCI_EP_MEMORY_BASE + PCIE_BAR4_SIZE; - ls_pcie_atu_inbound_set(pcie, 3, 4, phys); + phys = ALIGN(phys + PCIE_BAR1_SIZE, PCIE_BAR2_SIZE); + ls_pcie_atu_inbound_set(pcie, pf, 2 + pf * BAR_NUM, 2, phys); + /* ATU 3 : INBOUND : map BAR2 */ + phys = ALIGN(phys + PCIE_BAR2_SIZE, PCIE_BAR2_SIZE); + ls_pcie_atu_inbound_set(pcie, pf, 3 + pf * BAR_NUM, 4, phys); /* ATU 0 : OUTBOUND : map MEM */ - ls_pcie_atu_outbound_set(pcie, 0, - PCIE_ATU_TYPE_MEM, - pcie->cfg_res.start, - 0, - CONFIG_SYS_PCI_MEMORY_SIZE); + ls_pcie_atu_outbound_set(pcie, PCIE_ATU_REGION_INDEX0, + PCIE_ATU_TYPE_MEM, (u64)pcie->cfg_res.start, + 0, atu_size); + + /* ATU 1 : OUTBOUND : map MEM */ + ls_pcie_atu_outbound_set(pcie, PCIE_ATU_REGION_INDEX1, + PCIE_ATU_TYPE_MEM, (u64)pcie->cfg_res.start + + atu_size, atu_size, atu_size); } /* BAR0 and BAR1 are 32bit BAR2 and BAR4 are 64bit */ static void ls_pcie_ep_setup_bar(void *bar_base, int bar, u32 size) { + u32 mask; + /* The least inbound window is 4KiB */ - if (size < 4 * 1024) - return; + if (size < SZ_4K) + mask = 0; + else + mask = size - 1; switch (bar) { case 0: - writel(size - 1, bar_base + PCI_BASE_ADDRESS_0); + writel(mask, bar_base + PCI_BASE_ADDRESS_0); break; case 1: - writel(size - 1, bar_base + PCI_BASE_ADDRESS_1); + writel(mask, bar_base + PCI_BASE_ADDRESS_1); break; case 2: - writel(size - 1, bar_base + PCI_BASE_ADDRESS_2); + writel(mask, bar_base + PCI_BASE_ADDRESS_2); writel(0, bar_base + PCI_BASE_ADDRESS_3); break; case 4: - writel(size - 1, bar_base + PCI_BASE_ADDRESS_4); + writel(mask, bar_base + PCI_BASE_ADDRESS_4); writel(0, bar_base + PCI_BASE_ADDRESS_5); break; default: @@ -394,13 +406,28 @@ static void ls_pcie_ep_setup_bar(void *bar_base, int bar, u32 size) static void ls_pcie_ep_setup_bars(void *bar_base) { - /* BAR0 - 32bit - 4K configuration */ + /* BAR0 - 32bit - configuration */ + ls_pcie_ep_setup_bar(bar_base, 0, PCIE_BAR0_SIZE); + /* BAR1 - 32bit - MSIX*/ + ls_pcie_ep_setup_bar(bar_base, 1, PCIE_BAR1_SIZE); + /* BAR2 - 64bit - MEM descriptor */ + ls_pcie_ep_setup_bar(bar_base, 2, PCIE_BAR2_SIZE); + /* BAR4 - 64bit - MEM*/ + ls_pcie_ep_setup_bar(bar_base, 4, PCIE_BAR4_SIZE); +} + +static void ls_pcie_ep_setup_vf_bars(void *bar_base) +{ + /* VF BAR0 MASK register at offset 0x19c*/ + bar_base += PCIE_SRIOV_VFBAR0 - PCI_BASE_ADDRESS_0; + + /* VF-BAR0 - 32bit - configuration */ ls_pcie_ep_setup_bar(bar_base, 0, PCIE_BAR0_SIZE); - /* BAR1 - 32bit - 8K MSIX*/ + /* VF-BAR1 - 32bit - MSIX*/ ls_pcie_ep_setup_bar(bar_base, 1, PCIE_BAR1_SIZE); - /* BAR2 - 64bit - 4K MEM desciptor */ + /* VF-BAR2 - 64bit - MEM descriptor */ ls_pcie_ep_setup_bar(bar_base, 2, PCIE_BAR2_SIZE); - /* BAR4 - 64bit - 1M MEM*/ + /* VF-BAR4 - 64bit - MEM*/ ls_pcie_ep_setup_bar(bar_base, 4, PCIE_BAR4_SIZE); } @@ -412,25 +439,33 @@ static void ls_pcie_ep_enable_cfg(struct ls_pcie *pcie) static void ls_pcie_setup_ep(struct ls_pcie *pcie) { u32 sriov; + u32 pf, vf; + void *bar_base = NULL; sriov = readl(pcie->dbi + PCIE_SRIOV); if (PCI_EXT_CAP_ID(sriov) == PCI_EXT_CAP_ID_SRIOV) { - int pf, vf; - + pcie->sriov_flag = 1; for (pf = 0; pf < PCIE_PF_NUM; pf++) { - for (vf = 0; vf <= PCIE_VF_NUM; vf++) { - ctrl_writel(pcie, PCIE_LCTRL0_VAL(pf, vf), - PCIE_PF_VF_CTRL); - - ls_pcie_ep_setup_bars(pcie->dbi); - ls_pcie_ep_setup_atu(pcie); + if (pcie->cfg2_flag) { + for (vf = 0; vf <= PCIE_VF_NUM; vf++) { + ctrl_writel(pcie, + PCIE_LCTRL0_VAL(pf, vf), + PCIE_PF_VF_CTRL); + } } + bar_base = pcie->dbi + + PCIE_MASK_OFFSET(pcie->cfg2_flag, pf); + ls_pcie_ep_setup_bars(bar_base); + ls_pcie_ep_setup_vf_bars(bar_base); + + ls_pcie_ep_setup_atu(pcie, pf); } - /* Disable CFG2 */ - ctrl_writel(pcie, 0, PCIE_PF_VF_CTRL); + + if (pcie->cfg2_flag) /* Disable CFG2 */ + ctrl_writel(pcie, 0, PCIE_PF_VF_CTRL); } else { ls_pcie_ep_setup_bars(pcie->dbi + PCIE_NO_SRIOV_BAR_BASE); - ls_pcie_ep_setup_atu(pcie); + ls_pcie_ep_setup_atu(pcie, 0); } ls_pcie_ep_enable_cfg(pcie); @@ -502,6 +537,7 @@ static int ls_pcie_probe(struct udevice *dev) * for LS2088A series SoCs */ svr = get_svr(); + pcie->cfg2_flag = 1; svr = (svr >> SVR_VAR_PER_SHIFT) & 0xFFFFFE; if (svr == SVR_LS2088A || svr == SVR_LS2084A || svr == SVR_LS2048A || svr == SVR_LS2044A || @@ -511,6 +547,7 @@ static int ls_pcie_probe(struct udevice *dev) LS2088A_PCIE_PHYS_SIZE * pcie->idx; pcie->cfg_res.end = pcie->cfg_res.start + cfg_size; pcie->ctrl = pcie->lut + 0x40000; + pcie->cfg2_flag = 0; } pcie->cfg0 = map_physmem(pcie->cfg_res.start, diff --git a/drivers/pci/pcie_layerscape.h b/drivers/pci/pcie_layerscape.h index ddfbba6..eb910ba 100644 --- a/drivers/pci/pcie_layerscape.h +++ b/drivers/pci/pcie_layerscape.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright 2017 NXP + * Copyright 2017, 2019 NXP * Copyright 2014-2015 Freescale Semiconductor, Inc. * Layerscape PCIe driver */ @@ -9,6 +9,7 @@ #define _PCIE_LAYERSCAPE_H_ #include <pci.h> #include <dm.h> +#include <linux/sizes.h> #ifndef CONFIG_SYS_PCI_MEMORY_BUS #define CONFIG_SYS_PCI_MEMORY_BUS CONFIG_SYS_SDRAM_BASE @@ -85,11 +86,17 @@ #define PCIE_PF_NUM 2 #define PCIE_VF_NUM 64 +#define BAR_NUM 4 -#define PCIE_BAR0_SIZE (4 * 1024) /* 4K */ -#define PCIE_BAR1_SIZE (8 * 1024) /* 8K for MSIX */ -#define PCIE_BAR2_SIZE (4 * 1024) /* 4K */ -#define PCIE_BAR4_SIZE (1 * 1024 * 1024) /* 1M */ +#define PCIE_BAR0_SIZE SZ_4K /* 4K */ +#define PCIE_BAR1_SIZE SZ_8K /* 8K for MSIX */ +#define PCIE_BAR2_SIZE SZ_4K /* 4K */ +#define PCIE_BAR4_SIZE SZ_1M /* 1M */ + +#define PCIE_SRIOV_VFBAR0 0x19C +#define PCIE_CTRL1_FUNC_NUM(pf) (pf << 20) + +#define PCIE_MASK_OFFSET(flag, pf) ((flag) ? 0 : (0x1000 + 0x20000 * (pf))) /* LUT registers */ #define PCIE_LUT_UDR(n) (0x800 + (n) * 8) @@ -144,6 +151,8 @@ struct ls_pcie { bool big_endian; bool enabled; int next_lut_index; + uint sriov_flag; + uint cfg2_flag; int mode; }; -- 1.7.1

4 16

[U-Boot] [PATCH v4 1/2] common: Add support for Android DT image
by Sam Protsenko 02 Dec '19

02 Dec '19

Android documentation recommends new image format for storing DTB/DTBO files: [1]. To support that format, this patch adds helper functions for Android DTB/DTBO format. In image-android-dt.* files you can find helper functions to work with Android DT image format, such us routines for: - printing the dump of image structure - getting the address and size of desired dtb/dtbo file This patch uses dt_table.h file, that was added in commit 643cefa4d848 ("Import Android's dt_table.h for DT image format") by Alex Deymo. [1] https://source.android.com/devices/architecture/dto/partitions Signed-off-by: Sam Protsenko <semen.protsenko(a)linaro.org> --- Changes in v4: - fix SPDX tags - renamed .reserved[] to .version (just reflect changes in dt_image.h) Changes in v3: - dropped include/dt_image.h (was sent in another patch by Alex Deymo) - rebased on top of last master common/image-android-dt.c | 156 +++++++++++++++++++++++++++++++++++++ include/image-android-dt.h | 20 +++++ 2 files changed, 176 insertions(+) create mode 100644 common/image-android-dt.c create mode 100644 include/image-android-dt.h diff --git a/common/image-android-dt.c b/common/image-android-dt.c new file mode 100644 index 0000000000..c0683ee70f --- /dev/null +++ b/common/image-android-dt.c @@ -0,0 +1,156 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2018 Linaro Ltd. + * Sam Protsenko <semen.protsenko(a)linaro.org> + */ + +#include <image-android-dt.h> +#include <dt_table.h> +#include <common.h> +#include <linux/libfdt.h> +#include <mapmem.h> + +/** + * Check if image header is correct. + * + * @param hdr_addr Start address of DT image + * @return true if header is correct or false if header is incorrect + */ +bool android_dt_check_header(ulong hdr_addr) +{ + const struct dt_table_header *hdr; + u32 magic; + + hdr = map_sysmem(hdr_addr, sizeof(*hdr)); + magic = fdt32_to_cpu(hdr->magic); + unmap_sysmem(hdr); + + return magic == DT_TABLE_MAGIC; +} + +/** + * Get the address of FDT (dtb or dtbo) in memory by its index in image. + * + * @param hdr_addr Start address of DT image + * @param index Index of desired FDT in image (starting from 0) + * @param[out] addr If not NULL, will contain address to specified FDT + * @param[out] size If not NULL, will contain size of specified FDT + * + * @return true on success or false on error + */ +bool android_dt_get_fdt_by_index(ulong hdr_addr, u32 index, ulong *addr, + u32 *size) +{ + const struct dt_table_header *hdr; + const struct dt_table_entry *e; + u32 entry_count, entries_offset, entry_size; + ulong e_addr; + u32 dt_offset, dt_size; + + hdr = map_sysmem(hdr_addr, sizeof(*hdr)); + entry_count = fdt32_to_cpu(hdr->dt_entry_count); + entries_offset = fdt32_to_cpu(hdr->dt_entries_offset); + entry_size = fdt32_to_cpu(hdr->dt_entry_size); + unmap_sysmem(hdr); + + if (index > entry_count) { + printf("Error: index > dt_entry_count (%u > %u)\n", index, + entry_count); + return false; + } + + e_addr = hdr_addr + entries_offset + index * entry_size; + e = map_sysmem(e_addr, sizeof(*e)); + dt_offset = fdt32_to_cpu(e->dt_offset); + dt_size = fdt32_to_cpu(e->dt_size); + unmap_sysmem(e); + + if (addr) + *addr = hdr_addr + dt_offset; + if (size) + *size = dt_size; + + return true; +} + +#if !defined(CONFIG_SPL_BUILD) +static void android_dt_print_fdt_info(const struct fdt_header *fdt) +{ + u32 fdt_size; + int root_node_off; + const char *compatible = NULL; + + fdt_size = fdt_totalsize(fdt); + root_node_off = fdt_path_offset(fdt, "/"); + if (root_node_off < 0) { + printf("Error: Root node not found\n"); + } else { + compatible = fdt_getprop(fdt, root_node_off, "compatible", + NULL); + } + + printf(" (FDT)size = %d\n", fdt_size); + printf(" (FDT)compatible = %s\n", + compatible ? compatible : "(unknown)"); +} + +/** + * Print information about DT image structure. + * + * @param hdr_addr Start address of DT image + */ +void android_dt_print_contents(ulong hdr_addr) +{ + const struct dt_table_header *hdr; + u32 entry_count, entries_offset, entry_size; + u32 i; + + hdr = map_sysmem(hdr_addr, sizeof(*hdr)); + entry_count = fdt32_to_cpu(hdr->dt_entry_count); + entries_offset = fdt32_to_cpu(hdr->dt_entries_offset); + entry_size = fdt32_to_cpu(hdr->dt_entry_size); + + /* Print image header info */ + printf("dt_table_header:\n"); + printf(" magic = %08x\n", fdt32_to_cpu(hdr->magic)); + printf(" total_size = %d\n", fdt32_to_cpu(hdr->total_size)); + printf(" header_size = %d\n", fdt32_to_cpu(hdr->header_size)); + printf(" dt_entry_size = %d\n", entry_size); + printf(" dt_entry_count = %d\n", entry_count); + printf(" dt_entries_offset = %d\n", entries_offset); + printf(" page_size = %d\n", fdt32_to_cpu(hdr->page_size)); + printf(" version = %d\n", fdt32_to_cpu(hdr->version)); + + unmap_sysmem(hdr); + + /* Print image entries info */ + for (i = 0; i < entry_count; ++i) { + const ulong e_addr = hdr_addr + entries_offset + i * entry_size; + const struct dt_table_entry *e; + const struct fdt_header *fdt; + u32 dt_offset, dt_size; + u32 j; + + e = map_sysmem(e_addr, sizeof(*e)); + dt_offset = fdt32_to_cpu(e->dt_offset); + dt_size = fdt32_to_cpu(e->dt_size); + + printf("dt_table_entry[%d]:\n", i); + printf(" dt_size = %d\n", dt_size); + printf(" dt_offset = %d\n", dt_offset); + printf(" id = %08x\n", fdt32_to_cpu(e->id)); + printf(" rev = %08x\n", fdt32_to_cpu(e->rev)); + for (j = 0; j < 4; ++j) { + printf(" custom[%d] = %08x\n", j, + fdt32_to_cpu(e->custom[j])); + } + + unmap_sysmem(e); + + /* Print FDT info for this entry */ + fdt = map_sysmem(hdr_addr + dt_offset, sizeof(*fdt)); + android_dt_print_fdt_info(fdt); + unmap_sysmem(fdt); + } +} +#endif diff --git a/include/image-android-dt.h b/include/image-android-dt.h new file mode 100644 index 0000000000..9a3aa8fa30 --- /dev/null +++ b/include/image-android-dt.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2018 Linaro Ltd. + * Sam Protsenko <semen.protsenko(a)linaro.org> + */ + +#ifndef IMAGE_ANDROID_DT_H +#define IMAGE_ANDROID_DT_H + +#include <linux/types.h> + +bool android_dt_check_header(ulong hdr_addr); +bool android_dt_get_fdt_by_index(ulong hdr_addr, u32 index, ulong *addr, + u32 *size); + +#if !defined(CONFIG_SPL_BUILD) +void android_dt_print_contents(ulong hdr_addr); +#endif + +#endif /* IMAGE_ANDROID_DT_H */ -- 2.18.0

5 11

[U-Boot] [PATCH] ARM: socfpga: Fix FPGA bitstream loading code
by Marek Vasut 01 Dec '19

01 Dec '19

According to SoCFPGA Cyclone V datasheet rev.2018.01.26 page 175 (Chapter 5, FPGA Manager, data register) and Arria10 datasheet rev.2017.07.22 page 211 (Chapter 5.4.1.2, FPGA Manager, img_data_w register), the FPGA data register must be written with writes with non-incrementing address. The current code increments the address in 32-byte bursts. Fix the code so it does not increment the address and writes the register repeatedly instead. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Chin Liang See <chin.liang.see(a)intel.com> Cc: Dinh Nguyen <dinguyen(a)kernel.org> Cc: Simon Goldschmidt <simon.k.r.goldschmidt(a)gmail.com> Cc: Tien Fong Chee <tien.fong.chee(a)intel.com> --- drivers/fpga/socfpga.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/fpga/socfpga.c b/drivers/fpga/socfpga.c index 685957626b..6ecea771ce 100644 --- a/drivers/fpga/socfpga.c +++ b/drivers/fpga/socfpga.c @@ -55,8 +55,7 @@ void fpgamgr_program_write(const void *rbf_data, size_t rbf_size) " cmp %2, #0\n" " beq 2f\n" "1: ldmia %0!, {r0-r7}\n" - " stmia %1!, {r0-r7}\n" - " sub %1, #32\n" + " stmia %1, {r0-r7}\n" " subs %2, #1\n" " bne 1b\n" "2: cmp %3, #0\n" -- 2.20.1

4 17

[U-Boot] [PATCH v2 0/8] rockchip: rk3399: Use spl_board_init in SPL, TPL
by Jagan Teki 28 Nov '19

28 Nov '19

This is v2 set for previous v1. No much diff, except the latest rebase. Usually spl_board_init has preloader_console_init which would help to print boot up banner during SPL and TPL. The current rk3399 lacking that in few of the boards, this series make reuse of spl_board_init in SPL and TPL stages. with this series: ================ U-Boot TPL 2019.07-rc1-00243-g3f0cad6bd2 (May 08 2019 - 11:29:32 +0530) Trying to boot from BOOTROM Returning to boot ROM... U-Boot SPL 2019.07-rc1-00243-g3f0cad6bd2 (May 08 2019 - 11:29:32 +0530) Trying to boot from MMC1 U-Boot 2019.07-rc1-00243-g3f0cad6bd2 (May 08 2019 - 11:29:32 +0530) Model: FriendlyElec NanoPC-T4 DRAM: 3.9 GiB MMC: dwmmc@fe310000: 2, dwmmc@fe320000: 1, sdhci@fe330000: 0 Loading Environment from MMC... *** Warning - bad CRC, using default environment In: serial@ff1a0000 Out: serial@ff1a0000 Err: serial@ff1a0000 Model: FriendlyElec NanoPC-T4 Net: eth0: ethernet@fe300000 Hit any key to stop autoboot: 0 => without this series: =================== U-Boot TPL board init Trying to boot from BOOTROM Returning to boot ROM... U-Boot SPL board init Trying to boot from MMC1 U-Boot 2019.07-rc1-00243-g3f0cad6bd2 (May 08 2019 - 11:29:32 +0530) Model: FriendlyElec NanoPC-T4 DRAM: 3.9 GiB MMC: dwmmc@fe310000: 2, dwmmc@fe320000: 1, sdhci@fe330000: 0 Loading Environment from MMC... *** Warning - bad CRC, using default environment In: serial@ff1a0000 Out: serial@ff1a0000 Err: serial@ff1a0000 Model: FriendlyElec NanoPC-T4 Net: eth0: ethernet@fe300000 Hit any key to stop autoboot: 0 => Any inputs? Jagan. Jagan Teki (8): board: rk3399: Drop explicit uart enablement in spl_board_init rockchip: rk3399: Support common spl_board_init rockchip: rk3399: spl: Mark printascii into debug rockchip: rk3399: Move u-boot, dm-pre-reloc of uart0, uart2 rockchip: rk3399: Enable SPL_BOARD_INIT rockchip: rk3399: tpl: Add spl_board_init rockchip: rk3399: tpl: Mark printascii into debug rockchip: rk3399: Enable TPL_BOARD_INIT arch/arm/dts/rk3399-gru.dtsi | 1 - arch/arm/dts/rk3399-puma.dtsi | 1 - arch/arm/dts/rk3399-u-boot.dtsi | 8 +++ arch/arm/mach-rockchip/Kconfig | 2 + arch/arm/mach-rockchip/rk3399-board-spl.c | 65 ++++++++++++++++++- arch/arm/mach-rockchip/rk3399-board-tpl.c | 9 ++- board/rockchip/evb_rk3399/evb-rk3399.c | 29 --------- .../puma_rk3399/puma-rk3399.c | 58 ----------------- board/vamrs/rock960_rk3399/rock960-rk3399.c | 31 --------- configs/puma-rk3399_defconfig | 1 - 10 files changed, 82 insertions(+), 123 deletions(-) -- 2.18.0.321.gffc6fa0e3

3 17

[U-Boot] [PATCH 1/1] env: Exit tools when invalid CRC found
by Molloy, Philip 25 Nov '19

25 Nov '19

fw_setenv and fw_printenv currently print a warning and use a default environment compiled into the binary when an invalid CRC is found. This modifies the default behavior to print an error and exit. This is especially important when calling the tools from a script since the script depends on the exit code of the tool to know something went wrong. If the default environment is desired it should be read explicitly by the caller. A better model is to store a default environment as a separate binary or text file rather than storing it in the executable. Signed-off-by: Philip Molloy <philip-molloy(a)idexx.com> --- tools/env/fw_env.c | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/tools/env/fw_env.c b/tools/env/fw_env.c index a5d75958e1..ef33e9e1be 100644 --- a/tools/env/fw_env.c +++ b/tools/env/fw_env.c @@ -1438,9 +1438,8 @@ int fw_env_open(struct env_opts *opts) if (!have_redund_env) { if (!crc0_ok) { fprintf(stderr, - "Warning: Bad CRC, using default environment\n"); - memcpy(environment.data, default_environment, - sizeof(default_environment)); + "Invalid CRC found in environment\n"); + return -1; } } else { flag0 = *environment.flags; @@ -1500,10 +1499,8 @@ int fw_env_open(struct env_opts *opts) dev_current = 1; } else if (!crc0_ok && !crc1_ok) { fprintf(stderr, - "Warning: Bad CRC, using default environment\n"); - memcpy(environment.data, default_environment, - sizeof(default_environment)); - dev_current = 0; + "Invalid CRC found in both redundant environments\n"); + return -1; } else { switch (environment.flag_scheme) { case FLAG_BOOLEAN: -- 2.20.1

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