June 2019 - U-Boot

[U-Boot] [PATCH] arm: mvebu: set 38x and 39x AVS on lower frequency
by Baruch Siach 10 Jul '19

10 Jul '19

Reduce Auto Voltage Scaling VDD limit when core frequency is lower than 1600MHz. This reduces core voltage level from 1.25V to 1.15V, which saves power. The code is taken from Marvell's U-Boot 2013.01 revision 18.06. Signed-off-by: Baruch Siach <baruch(a)tkos.co.il> --- arch/arm/mach-mvebu/include/mach/cpu.h | 3 +++ arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c | 26 +++++++++++++++++++ arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h | 4 +++ arch/arm/mach-mvebu/spl.c | 3 +++ 4 files changed, 36 insertions(+) diff --git a/arch/arm/mach-mvebu/include/mach/cpu.h b/arch/arm/mach-mvebu/include/mach/cpu.h index e6140d67293e..e1128ee90f01 100644 --- a/arch/arm/mach-mvebu/include/mach/cpu.h +++ b/arch/arm/mach-mvebu/include/mach/cpu.h @@ -163,6 +163,9 @@ int serdes_phy_config(void); */ int ddr3_init(void); +/* Auto Voltage Scaling */ +void mv_avs_init(void); + /* * get_ref_clk * diff --git a/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c b/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c index d387893af37d..e9dd096ad0f5 100644 --- a/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c +++ b/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c @@ -256,3 +256,29 @@ u8 sys_env_device_rev_get(void) value = reg_read(DEV_VERSION_ID_REG); return (value & (REVISON_ID_MASK)) >> REVISON_ID_OFFS; } + +void mv_avs_init(void) +{ + u32 sar_freq; + + if (!(IS_ENABLED(CONFIG_ARMADA_38X) || IS_ENABLED(CONFIG_ARMADA_39X))) + return; + + reg_write(AVS_DEBUG_CNTR_REG, AVS_DEBUG_CNTR_DEFAULT_VALUE); + reg_write(AVS_DEBUG_CNTR_REG, AVS_DEBUG_CNTR_DEFAULT_VALUE); + + sar_freq = reg_read(DEVICE_SAMPLE_AT_RESET1_REG); + sar_freq = sar_freq >> SAR_FREQ_OFFSET & SAR_FREQ_MASK; + + /* Set AVS value only for core frequency of 1600MHz or less. + * For higher frequency leave the default value. + */ + if (sar_freq <= 0xd) { + u32 avs_reg_data = reg_read(AVS_ENABLED_CONTROL); + + avs_reg_data &= ~(AVS_LOW_VDD_LIMIT_MASK + | AVS_HIGH_VDD_LIMIT_MASK); + avs_reg_data |= AVS_LOW_VDD_SLOW_VAL | AVS_HIGH_VDD_SLOW_VAL; + reg_write(AVS_ENABLED_CONTROL, avs_reg_data); + } +} diff --git a/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h b/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h index 365332d2b048..1774a5b780ca 100644 --- a/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h +++ b/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h @@ -33,6 +33,8 @@ #define DEV_ID_REG_DEVICE_ID_OFFS 16 #define DEV_ID_REG_DEVICE_ID_MASK 0xffff0000 +#define SAR_FREQ_OFFSET 10 +#define SAR_FREQ_MASK 0x1f #define SAR_DEV_ID_OFFS 27 #define SAR_DEV_ID_MASK 0x7 @@ -155,10 +157,12 @@ #define AVS_LOW_VDD_LIMIT_OFFS 4 #define AVS_LOW_VDD_LIMIT_MASK (0xff << AVS_LOW_VDD_LIMIT_OFFS) #define AVS_LOW_VDD_LIMIT_VAL (0x27 << AVS_LOW_VDD_LIMIT_OFFS) +#define AVS_LOW_VDD_SLOW_VAL (0x23 << AVS_LOW_VDD_LIMIT_OFFS) #define AVS_HIGH_VDD_LIMIT_OFFS 12 #define AVS_HIGH_VDD_LIMIT_MASK (0xff << AVS_HIGH_VDD_LIMIT_OFFS) #define AVS_HIGH_VDD_LIMIT_VAL (0x27 << AVS_HIGH_VDD_LIMIT_OFFS) +#define AVS_HIGH_VDD_SLOW_VAL (0x23 << AVS_HIGH_VDD_LIMIT_OFFS) /* Board ID numbers */ #define MARVELL_BOARD_ID_MASK 0x10 diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c index d54de5195624..3cb27b7f4b20 100644 --- a/arch/arm/mach-mvebu/spl.c +++ b/arch/arm/mach-mvebu/spl.c @@ -126,6 +126,9 @@ void board_init_f(ulong dummy) ddr3_init(); #endif + /* Initialize Auto Voltage Scaling */ + mv_avs_init(); + /* * Return to the BootROM to continue the Marvell xmodem * UART boot protocol. As initiated by the kwboot tool. -- 2.20.1

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[U-Boot] [PATCH v3 0/4] Add SDHCI card detection support
by Michal Simek 10 Jul '19

10 Jul '19

Hi, This patch series adds card detection support in sdhci framework & added functionality to read card detect dt properties. Thanks, Michal Changes in v3: - New patch in this series to release macros - Changed MMC_CAP_SD_NONREMOVABLE, MMC_CAP_SD_NEEDS_POLL names to align with Linux bit definitions by removing SD. - Use new MMC_SD.. macros Changes in v2: - Moved reading CD devicetree properties functionality from sdhci.c to mmc-uclass.c & moved mmc capability macros to mmc.h from sdhci.h. - Created a new patch for reading "cd-gpio" property from DT. - Used CARD_PRESENT instead of SDHCI_CARD_DETECT_PIN_LEVEL for reading sd card presence detection. T Karthik Reddy (4): mmc: mvebu: Remove unused MMC_CAP.. macros mmc: Read sd card detect properties from DT mmc: sdhci: Read cd-gpio from devicetree mmc: sdhci: Implement SDHCI card detect drivers/mmc/mmc-uclass.c | 9 +++++++++ drivers/mmc/sdhci.c | 38 ++++++++++++++++++++++++++++++++++++++ include/mmc.h | 4 ++++ include/mvebu_mmc.h | 4 ---- 4 files changed, 51 insertions(+), 4 deletions(-) -- 2.17.1

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[U-Boot] [PATCH] mmc: rpmb: fix response type of CMD25
by Masahiro Yamada 10 Jul '19

10 Jul '19

From: Akio Hirayama <hirayama.akio(a)socionext.com> The response type of CMD25 is R1 instead of R1b. Signed-off-by: Akio Hirayama <hirayama.akio(a)socionext.com> [masahiro: add log ] Signed-off-by: Masahiro Yamada <yamada.masahiro(a)socionext.com> --- drivers/mmc/rpmb.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/rpmb.c b/drivers/mmc/rpmb.c index 908f19208955..33371fe562e1 100644 --- a/drivers/mmc/rpmb.c +++ b/drivers/mmc/rpmb.c @@ -103,7 +103,7 @@ static int mmc_rpmb_request(struct mmc *mmc, const struct s_rpmb *s, cmd.cmdidx = MMC_CMD_WRITE_MULTIPLE_BLOCK; cmd.cmdarg = 0; - cmd.resp_type = MMC_RSP_R1b; + cmd.resp_type = MMC_RSP_R1; data.src = (const char *)s; data.blocks = 1; @@ -327,7 +327,7 @@ static int send_write_mult_block(struct mmc *mmc, const struct s_rpmb *frm, { struct mmc_cmd cmd = { .cmdidx = MMC_CMD_WRITE_MULTIPLE_BLOCK, - .resp_type = MMC_RSP_R1b, + .resp_type = MMC_RSP_R1, }; struct mmc_data data = { .src = (const void *)frm, -- 2.17.1

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[U-Boot] [PATCH 1/4 v3] net: add MDIO_MUX DM class
by Alexandru Marginean 10 Jul '19

10 Jul '19

Adds a class for MDIO MUXes, which control access to a series of downstream child MDIOs. MDIO MUX drivers are required to implement a select function used to switch between child buses. MUX children are registered as MDIO buses and they can be used just like regular MDIOs. Signed-off-by: Alex Marginean <alexm.osslist(a)gmail.com> --- Changes in v2: - no change Changes in v3: - no change, just fighting with the email server drivers/net/Kconfig | 12 +++ include/dm/uclass-id.h | 1 + include/miiphy.h | 20 ++++ net/Makefile | 1 + net/mdio-mux-uclass.c | 232 +++++++++++++++++++++++++++++++++++++++++ 5 files changed, 266 insertions(+) create mode 100644 net/mdio-mux-uclass.c diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 635f8d72c2..0dc26ac254 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -24,6 +24,18 @@ config DM_MDIO This is currently implemented in net/mdio-uclass.c Look in include/miiphy.h for details. +config DM_MDIO_MUX + bool "Enable Driver Model for MDIO MUX devices" + depends on DM_MDIO + help + Enable driver model for MDIO MUX devices + + Adds UCLASS_MDIO_MUX DM class supporting MDIO MUXes. Useful for + systems that support DM_MDIO and integrate one or multiple muxes on + the MDIO bus. + This is currently implemented in net/mdio-mux-uclass.c + Look in include/miiphy.h for details. + config MDIO_SANDBOX depends on DM_MDIO && SANDBOX default y diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h index 90667e62cf..b859a9ec04 100644 --- a/include/dm/uclass-id.h +++ b/include/dm/uclass-id.h @@ -59,6 +59,7 @@ enum uclass_id { UCLASS_MAILBOX, /* Mailbox controller */ UCLASS_MASS_STORAGE, /* Mass storage device */ UCLASS_MDIO, /* MDIO bus */ + UCLASS_MDIO_MUX, /* MDIO MUX/switch */ UCLASS_MISC, /* Miscellaneous device */ UCLASS_MMC, /* SD / MMC card or chip */ UCLASS_MOD_EXP, /* RSA Mod Exp device */ diff --git a/include/miiphy.h b/include/miiphy.h index e6dd441983..9b97d09f18 100644 --- a/include/miiphy.h +++ b/include/miiphy.h @@ -167,4 +167,24 @@ struct phy_device *dm_mdio_phy_connect(struct udevice *dev, int addr, #endif +#ifdef CONFIG_DM_MDIO_MUX + +/* indicates none of the child buses is selected */ +#define MDIO_MUX_SELECT_NONE -1 + +/** + * struct mdio_mux_ops - MDIO MUX operations + * + * @select: Selects a child bus + * @deselect: Clean up selection. Optional, can be NULL + */ +struct mdio_mux_ops { + int (*select)(struct udevice *mux, int cur, int sel); + int (*deselect)(struct udevice *mux, int sel); +}; + +#define mdio_mux_get_ops(dev) ((struct mdio_mux_ops *)(dev)->driver->ops) + +#endif + #endif diff --git a/net/Makefile b/net/Makefile index 6251ff3991..826544f05f 100644 --- a/net/Makefile +++ b/net/Makefile @@ -16,6 +16,7 @@ else obj-$(CONFIG_NET) += eth_legacy.o endif obj-$(CONFIG_DM_MDIO) += mdio-uclass.o +obj-$(CONFIG_DM_MDIO_MUX) += mdio-mux-uclass.o obj-$(CONFIG_NET) += eth_common.o obj-$(CONFIG_CMD_LINK_LOCAL) += link_local.o obj-$(CONFIG_NET) += net.o diff --git a/net/mdio-mux-uclass.c b/net/mdio-mux-uclass.c new file mode 100644 index 0000000000..e3fe12a531 --- /dev/null +++ b/net/mdio-mux-uclass.c @@ -0,0 +1,232 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2019 + * Alex Marginean, NXP + */ + +#include <common.h> +#include <dm.h> +#include <miiphy.h> +#include <dm/device-internal.h> +#include <dm/uclass-internal.h> +#include <dm/lists.h> + +#define MDIO_MUX_CHILD_DRV_NAME "mdio-mux-bus-drv" + +/** + * struct mdio_mux_perdev_priv - Per-device class data for MDIO MUX DM + * + * @parent_mdio: Parent DM MDIO device, this is called for actual MDIO I/O after + * setting up the mux. Typically this is a real MDIO device, + * unless there are cascaded muxes. + * @selected: Current child bus selection. Defaults to -1 + */ +struct mdio_mux_perdev_priv { + struct udevice *mdio_parent; + int selected; +}; + +/* + * This source file uses three types of devices, as follows: + * - mux is the hardware MDIO MUX which selects between the existing child MDIO + * buses, this is the device relevant for MDIO MUX class of drivers. + * - ch is a child MDIO bus, this is just a representation of an mux selection, + * not a real piece of hardware. + * - mdio_parent is the actual MDIO bus called to perform reads/writes after + * the MUX is configured. Typically this is a real MDIO device, unless there + * are cascaded muxes. + */ + +/** + * struct mdio_mux_ch_data - Per-device data for child MDIOs + * + * @sel: Selection value used by the MDIO MUX to access this child MDIO bus + */ +struct mdio_mux_ch_data { + int sel; +}; + +static struct udevice *mmux_get_parent_mdio(struct udevice *mux) +{ + struct mdio_mux_perdev_priv *pdata = dev_get_uclass_priv(mux); + + return pdata->mdio_parent; +} + +static struct mdio_ops *mmux_get_mdio_parent_ops(struct udevice *mux) +{ + return mdio_get_ops(mmux_get_parent_mdio(mux)); +} + +/* call driver select function before performing MDIO r/w */ +static int mmux_change_sel(struct udevice *ch, bool sel) +{ + struct udevice *mux = ch->parent; + struct mdio_mux_perdev_priv *priv = dev_get_uclass_priv(mux); + struct mdio_mux_ops *ops = mdio_mux_get_ops(mux); + struct mdio_mux_ch_data *ch_data = dev_get_parent_platdata(ch); + int err = 0; + + if (sel) { + err = ops->select(mux, priv->selected, ch_data->sel); + if (err) + return err; + + priv->selected = ch_data->sel; + } else { + if (ops->deselect) { + ops->deselect(mux, ch_data->sel); + priv->selected = MDIO_MUX_SELECT_NONE; + } + } + + return 0; +} + +/* Read wrapper, sets up the mux before issuing a read on parent MDIO bus */ +static int mmux_read(struct udevice *ch, int addr, int devad, + int reg) +{ + struct udevice *mux = ch->parent; + struct udevice *parent_mdio = mmux_get_parent_mdio(mux); + struct mdio_ops *parent_ops = mmux_get_mdio_parent_ops(mux); + int err; + + err = mmux_change_sel(ch, true); + if (err) + return err; + + err = parent_ops->read(parent_mdio, addr, devad, reg); + mmux_change_sel(ch, false); + + return err; +} + +/* Write wrapper, sets up the mux before issuing a write on parent MDIO bus */ +static int mmux_write(struct udevice *ch, int addr, int devad, + int reg, u16 val) +{ + struct udevice *mux = ch->parent; + struct udevice *parent_mdio = mmux_get_parent_mdio(mux); + struct mdio_ops *parent_ops = mmux_get_mdio_parent_ops(mux); + int err; + + err = mmux_change_sel(ch, true); + if (err) + return err; + + err = parent_ops->write(parent_mdio, addr, devad, reg, val); + mmux_change_sel(ch, false); + + return err; +} + +/* Reset wrapper, sets up the mux before issuing a reset on parent MDIO bus */ +static int mmux_reset(struct udevice *ch) +{ + struct udevice *mux = ch->parent; + struct udevice *parent_mdio = mmux_get_parent_mdio(mux); + struct mdio_ops *parent_ops = mmux_get_mdio_parent_ops(mux); + int err; + + /* reset is optional, if it's not implemented just exit */ + if (!parent_ops->reset) + return 0; + + err = mmux_change_sel(ch, true); + if (err) + return err; + + err = parent_ops->reset(parent_mdio); + mmux_change_sel(ch, false); + + return err; +} + +/* Picks up the mux selection value for each child */ +static int dm_mdio_mux_child_post_bind(struct udevice *ch) +{ + struct mdio_mux_ch_data *ch_data = dev_get_parent_platdata(ch); + + ch_data->sel = dev_read_u32_default(ch, "reg", MDIO_MUX_SELECT_NONE); + + if (ch_data->sel == MDIO_MUX_SELECT_NONE) + return -EINVAL; + + return 0; +} + +/* Explicitly bind child MDIOs after binding the mux */ +static int dm_mdio_mux_post_bind(struct udevice *mux) +{ + ofnode ch_node; + int err, first_err = 0; + + if (!ofnode_valid(mux->node)) { + debug("%s: no mux node found, no child MDIO busses set up\n", + __func__); + return 0; + } + + /* + * we're going by Linux bindings so the child nodes do not have + * compatible strings. We're going through them here and binding to + * them. + */ + dev_for_each_subnode(ch_node, mux) { + struct udevice *ch_dev; + const char *ch_name; + + ch_name = ofnode_get_name(ch_node); + + err = device_bind_driver_to_node(mux, MDIO_MUX_CHILD_DRV_NAME, + ch_name, ch_node, &ch_dev); + /* try to bind all, but keep 1st error */ + if (err && !first_err) + first_err = err; + } + + return first_err; +} + +/* Get a reference to the parent MDIO bus, it should be bound by now */ +static int dm_mdio_mux_post_probe(struct udevice *mux) +{ + struct mdio_mux_perdev_priv *priv = dev_get_uclass_priv(mux); + int err; + + priv->selected = MDIO_MUX_SELECT_NONE; + + /* pick up mdio parent from device tree */ + err = uclass_get_device_by_phandle(UCLASS_MDIO, mux, "mdio-parent-bus", + &priv->mdio_parent); + if (err) { + debug("%s: didn't find mdio-parent-bus\n", __func__); + return err; + } + + return 0; +} + +const struct mdio_ops mmux_child_mdio_ops = { + .read = mmux_read, + .write = mmux_write, + .reset = mmux_reset, +}; + +/* MDIO class driver used for MUX child MDIO buses */ +U_BOOT_DRIVER(mdio_mux_child) = { + .name = MDIO_MUX_CHILD_DRV_NAME, + .id = UCLASS_MDIO, + .ops = &mmux_child_mdio_ops, +}; + +UCLASS_DRIVER(mdio_mux) = { + .id = UCLASS_MDIO_MUX, + .name = "mdio-mux", + .child_post_bind = dm_mdio_mux_child_post_bind, + .post_bind = dm_mdio_mux_post_bind, + .post_probe = dm_mdio_mux_post_probe, + .per_device_auto_alloc_size = sizeof(struct mdio_mux_perdev_priv), + .per_child_platdata_auto_alloc_size = sizeof(struct mdio_mux_ch_data), +}; -- 2.17.1

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[U-Boot] [PATCH 0/2] Add RTC driver for STM32MP1
by Benjamin Gaignard 09 Jul '19

09 Jul '19

This series add support of RTC driver for stm32mp1 SoC. First it adds the missing clocks for RTC hadrware block and after the driver itself (enabled for basic and trusted configurations). Benjamin Gaignard (1): rtc: Add rtc driver for stm32mp1 Patrick Delaunay (1): clk: stm32mp1: Add RTC clock entry configs/stm32mp15_basic_defconfig | 2 + configs/stm32mp15_trusted_defconfig | 2 + drivers/clk/clk_stm32mp1.c | 9 + drivers/rtc/Kconfig | 6 + drivers/rtc/Makefile | 1 + drivers/rtc/stm32_rtc.c | 321 ++++++++++++++++++++++++++++++++++++ 6 files changed, 341 insertions(+) create mode 100644 drivers/rtc/stm32_rtc.c -- 2.15.0

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Re: [U-Boot] Pull request for mmc sub-system for v2019.07-rc4 round 2
by Tom Rini 09 Jul '19

09 Jul '19

On Mon, Jun 24, 2019 at 05:35:17AM +0000, Peng Fan wrote: > Hi Tom, > > This patchset is to cleanup code, not bug fix, but it has been long time since v1 > and there will be conflicts if defconfig changes or driver code change, and then > there will surely need v9. So I pick up this patchset after collected several > R-b and A-b tags. > > CI: https://travis-ci.org/MrVan/u-boot/builds/549278965 > > Thanks, > Peng > > The following changes since commit bdf97b5d393fc94666a847e9bac1c358b2c63c59: > > Merge tag 'efi-2019-07-rc5-3' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi (2019-06-21 14:12:28 -0400) > > are available in the Git repository at: > > https://github.com/MrVan/u-boot.git tags/mmc-6-23 > > for you to fetch changes up to 5053da2e4aa297d888cdfc7d216d935504a9472a: > > mmc: fsl_esdhc_imx: drop useless code (2019-06-23 14:18:48 +0800) > Applied to u-boot/next, thanks! -- Tom

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[U-Boot] [PATCH v2 7/8] board: Add new slimbootloader board
by Park, Aiden 09 Jul '19

09 Jul '19

- Add new board/slimbootloader directory with minimum codes - Add slimbootloader configuration files - Add README in board/slimbootloader/slimbootloader/ Signed-off-by: Aiden Park <aiden.park(a)intel.com> --- arch/x86/Kconfig | 4 ++ board/slimbootloader/Kconfig | 25 ++++++++ board/slimbootloader/slimbootloader/Kconfig | 51 +++++++++++++++ board/slimbootloader/slimbootloader/Makefile | 5 ++ board/slimbootloader/slimbootloader/README | 58 +++++++++++++++++ .../slimbootloader/slimbootloader.c | 17 +++++ board/slimbootloader/slimbootloader/start.S | 9 +++ configs/slimbootloader_defconfig | 64 +++++++++++++++++++ include/configs/slimbootloader.h | 54 ++++++++++++++++ 9 files changed, 287 insertions(+) create mode 100644 board/slimbootloader/Kconfig create mode 100644 board/slimbootloader/slimbootloader/Kconfig create mode 100644 board/slimbootloader/slimbootloader/Makefile create mode 100644 board/slimbootloader/slimbootloader/README create mode 100644 board/slimbootloader/slimbootloader/slimbootloader.c create mode 100644 board/slimbootloader/slimbootloader/start.S create mode 100644 configs/slimbootloader_defconfig create mode 100644 include/configs/slimbootloader.h diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 1612246dfc..3d57466a63 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -77,6 +77,9 @@ config VENDOR_GOOGLE config VENDOR_INTEL bool "Intel" +config VENDOR_SLIMBOOTLOADER + bool "slimbootloader" + endchoice # subarchitectures-specific options below @@ -104,6 +107,7 @@ source "board/efi/Kconfig" source "board/emulation/Kconfig" source "board/google/Kconfig" source "board/intel/Kconfig" +source "board/slimbootloader/Kconfig" # platform-specific options below source "arch/x86/cpu/baytrail/Kconfig" diff --git a/board/slimbootloader/Kconfig b/board/slimbootloader/Kconfig new file mode 100644 index 0000000000..33c6fdf0aa --- /dev/null +++ b/board/slimbootloader/Kconfig @@ -0,0 +1,25 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (C) 2019 Intel Corporation <www.intel.com> + +if VENDOR_SLIMBOOTLOADER + +choice + prompt "Select a board" + optional + +config TARGET_SLIMBOOTLOADER + bool "slimbootloader" + help + This target is used for running U-Boot on top of Slim Bootloader + boot firmware as a payload. Slim Bootloader does memory initialization + and silicon initialization, and it passes necessary information in + HOB(Hand Off Block) to a payload. The payload is responsible for OS + load from media and booting OS. + Refer to board/slimbootloader/slimbootloader/README for the details. + +endchoice + +source "board/slimbootloader/slimbootloader/Kconfig" + +endif diff --git a/board/slimbootloader/slimbootloader/Kconfig b/board/slimbootloader/slimbootloader/Kconfig new file mode 100644 index 0000000000..7262f2bf1b --- /dev/null +++ b/board/slimbootloader/slimbootloader/Kconfig @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (C) 2019 Intel Corporation <www.intel.com> + +if TARGET_SLIMBOOTLOADER + +config SYS_BOARD + default "slimbootloader" + +config SYS_VENDOR + default "slimbootloader" + +config SYS_SOC + default "slimbootloader" + +config SYS_TEXT_BASE + default 0x00100000 + +comment "slimbootloader-specific options" + +config SYS_CONFIG_NAME + string "Board configuration file" + default "slimbootloader" + help + This option selects the board configuration file in include/configs/ + directory to be used to build U-Boot for Slim Bootloader. + +config DEFAULT_DEVICE_TREE + string "Board Device Tree Source (dts) file" + default "slimbootloader" + help + This option selects the board Device Tree Source (dts) file in + arch/x86/dts/ directory to be used to build U-Boot for Slim Bootloader. + +config SYS_CAR_ADDR + hex "Board specific Cache-As-RAM (CAR) address" + default 0x00000000 + help + This option specifies the board specific Cache-As-RAM (CAR) address. + But, CAR is not required for Slim Bootloader environment since it + has already initialized memory and launched u-boot as a payload. + +config SYS_CAR_SIZE + hex "Board specific Cache-As-RAM (CAR) size" + default 0x0000 + help + This option specifies the board specific Cache-As-RAM (CAR) size. + But, CAR is not required for Slim Bootloader environment since it + has already initialized memory and launched u-boot as a payload. + +endif diff --git a/board/slimbootloader/slimbootloader/Makefile b/board/slimbootloader/slimbootloader/Makefile new file mode 100644 index 0000000000..fd8fa98a8d --- /dev/null +++ b/board/slimbootloader/slimbootloader/Makefile @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (C) 2019 Intel Corporation <www.intel.com> + +obj-y += start.o slimbootloader.o diff --git a/board/slimbootloader/slimbootloader/README b/board/slimbootloader/slimbootloader/README new file mode 100644 index 0000000000..5492dc8883 --- /dev/null +++ b/board/slimbootloader/slimbootloader/README @@ -0,0 +1,58 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (C) 2019 Intel Corporation <www.intel.com> + +Introduction +============ +This target is to enable U-Boot as a payload of Slim Bootloader(a.k.a SBL) +boot firmware(https://github.com/slimbootloader/slimbootloader) which currently +supports QEMU, Apollolake, Whiskeylake, Coffeelake-Refresh platforms. + +The Slim Bootloader is designed with multi-stages(Stage1A/B, Stage2, Payload) +architecture to cover from reset vector to OS booting and it consumes Intel FSP +(https://github.com/IntelFsp/FSP) for silicon initialization. +* Stage1A: Reset vector, CAR init with FSP-T +* Stage1B: Memory init with FSP-M, CAR teardown, Continue execution in memory +* Stage2 : Rest of Silicon init with FSP-S, Create HOB, Hand-off to Payload +* Payload: Load OS from media, Booting OS + + +Here is the step-by-step to launch U-Boot on Slim Bootloader. + +Compile U-Boot +============== + + > make slimbootloader_defconfig all + > strip u-boot (To make it smaller size by removing debug symbols) + + +Compile Slim Bootloader with U-Boot +=================================== + +For build environment: + https://slimbootloader.github.io/getting-started/build-host-setup.html + +Get source code: + > git clone https://github.com/slimbootloader/slimbootloader.git + +Copy the built u-boot elf to Slim Bootloader source tree: + > mkdir -p <slimbootloader_home>/PayloadPkg/PayloadBins/ + > cp <u-boot_home>/u-boot <slimbootloader_home>/PayloadPkg/PayloadBins/ + +Update default payload to U-Boot (PayloadId is 4 Bytes): + > vi Platform/QemuBoardPkg/CfgData/CfgDataExt_Brd1.dlt + -GEN_CFG_DATA.PayloadId | 'AUTO' + +GEN_CFG_DATA.PayloadId | 'U-BT' + +Compile for QEMU target: + The output is Outputs/qemu/SlimBootloader.bin + > python BuildLoader.py build qemu -p "OsLoader.efi:LLDR:Lz4;u-boot:U-BT:Lzma" + + +Launch Slim Bootloader on QEMU +============================== + + > qemu-system-x86_64 -machine q35 -m 256 -nographic -serial mon:stdio + -pflash Outputs/qemu/SlimBootloader.bin + +Now, you should reach at U-Boot serial console. \ No newline at end of file diff --git a/board/slimbootloader/slimbootloader/slimbootloader.c b/board/slimbootloader/slimbootloader/slimbootloader.c new file mode 100644 index 0000000000..d88aa622a0 --- /dev/null +++ b/board/slimbootloader/slimbootloader/slimbootloader.c @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019 Intel Corporation <www.intel.com> + */ + +#include <common.h> + +int board_early_init_r(void) +{ + /* + * Make sure PCI bus is enumerated so that peripherals on the PCI bus + * can be discovered by their drivers + */ + pci_init(); + + return 0; +} diff --git a/board/slimbootloader/slimbootloader/start.S b/board/slimbootloader/slimbootloader/start.S new file mode 100644 index 0000000000..5c3f3df09e --- /dev/null +++ b/board/slimbootloader/slimbootloader/start.S @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2019 Intel Corporation <www.intel.com> + */ + +/* board early initialization */ +.globl early_board_init +early_board_init: + jmp early_board_init_ret diff --git a/configs/slimbootloader_defconfig b/configs/slimbootloader_defconfig new file mode 100644 index 0000000000..77ff3257b6 --- /dev/null +++ b/configs/slimbootloader_defconfig @@ -0,0 +1,64 @@ +CONFIG_X86=y +CONFIG_VENDOR_SLIMBOOTLOADER=y +CONFIG_TARGET_SLIMBOOTLOADER=y +CONFIG_X86_LOAD_FROM_32_BIT=y +CONFIG_REGMAP=y +CONFIG_SYSCON=y +CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_BOARD_EARLY_INIT_R=y +CONFIG_LAST_STAGE_INIT=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_MMC=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_FAT=y +CONFIG_CMD_USB=y +CONFIG_DOS_PARTITION=y +CONFIG_EFI_PARTITION=y +CONFIG_OF_CONTROL=y +CONFIG_OF_EMBED=y +CONFIG_BOOTSTAGE=y +CONFIG_BOOTSTAGE_REPORT=y +CONFIG_BOOTDELAY=10 +CONFIG_CONSOLE_SCROLL_LINES=5 +# CONFIG_PCI_PNP is not set +# CONFIG_I8259_PIC is not set +# CONFIG_APIC is not set +# CONFIG_CMD_EXT4_WRITE is not set +# CONFIG_CMD_FS_GENERIC is not set +# CONFIG_CMD_PART is not set +# CONFIG_CMD_TIME is not set +# CONFIG_CMD_BOOTSTAGE is not set +# CONFIG_CMD_DM is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_SF_TEST is not set +# CONFIG_CMD_ECHO is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_BOOTP is not set +# CONFIG_CMD_BLOCK_CACHE is not set +# CONFIG_CMD_DATE is not set +# CONFIG_CMD_GETTIME is not set +# CONFIG_CMD_MISC is not set +# CONFIG_CMD_IRQ is not set +# CONFIG_CMD_ELF is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EXPORTENV is not set +# CONFIG_CMD_IMPORTENV is not set +# CONFIG_CMD_FDT is not set +# CONFIG_CMD_GO is not set +# CONFIG_CMD_SAVEENV is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_DM_KEYBOARD is not set +# CONFIG_DM_VIDEO is not set +# CONFIG_DM_GPIO is not set +# CONFIG_MMC_VERBOSE is not set +# CONFIG_GZIP is not set +# CONFIG_HEXDUMP is not set +# CONFIG_EFI_LOADER is not set +# CONFIG_GENERATE_SMBIOS_TABLE is not set +# CONFIG_IMAGE_FORMAT_LEGACY is not set +# CONFIG_FIT is not set diff --git a/include/configs/slimbootloader.h b/include/configs/slimbootloader.h new file mode 100644 index 0000000000..bfd188de2c --- /dev/null +++ b/include/configs/slimbootloader.h @@ -0,0 +1,54 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2019 Intel Corporation <www.intel.com> + */ + +#ifndef __SLIMBOOTLOADER_CONFIG_H__ +#define __SLIMBOOTLOADER_CONFIG_H__ + +#include <configs/x86-common.h> + +#undef CONFIG_NFSBOOTCOMMAND +#undef CONFIG_RAMBOOTCOMMAND +#undef CONFIG_EXTRA_ENV_SETTINGS +#undef CONFIG_BOOTCOMMAND + +/*----------------------------------------------------------------------- + * For MEM32 uart + */ +/*#define CONFIG_SYS_NS16550_MEM32*/ +#ifdef CONFIG_SYS_NS16550_MEM32 +#undef CONFIG_SYS_NS16550_PORT_MAPPED +#endif + +#define CONFIG_STD_DEVICES_SETTINGS \ + "stdin=serial,i8042-kbd,usbkbd\0" \ + "stdout=serial\0" \ + "stderr=serial\0" + +#define CONFIG_EXTRA_ENV_SETTINGS \ + CONFIG_STD_DEVICES_SETTINGS \ + "netdev=eth0\0" \ + "consoledev=ttyS0\0" \ + "ramdiskaddr=0x4000000\0" \ + "ramdiskfile=initrd\0" \ + "bootdev=usb\0" \ + "bootdevnum=0\0" \ + "bootdevpart=0\0" \ + "bootfsload=fatload\0" \ + "bootusb=setenv bootdev usb; boot\0" \ + "bootscsi=setenv bootdev scsi; boot\0" \ + "bootmmc=setenv bootdev mmc; boot\0" \ + "bootargs=console=ttyS0,115200 console=tty0\0" + +#define CONFIG_BOOTCOMMAND \ + "if test ${bootdev} = \"usb\"; then ${bootdev} start; fi; " \ + "if test ${bootdev} = \"scsi\"; then ${bootdev} scan; fi; " \ + "${bootdev} info; " \ + "${bootfsload} ${bootdev} ${bootdevnum}:${bootdevpart} " \ + "${loadaddr} ${bootfile}; " \ + "${bootfsload} ${bootdev} ${bootdevnum}:${bootdevpart} " \ + "${ramdiskaddr} ${ramdiskfile}; " \ + "zboot ${loadaddr} 0 ${ramdiskaddr} ${filesize}" + +#endif /* __SLIMBOOTLOADER_CONFIG_H__ */ -- 2.20.1

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[U-Boot] [PATCH v5 0/5] net: ethernet: ti: Introduce am654 gigabit eth switch subsystem driver
by Keerthy 09 Jul '19

09 Jul '19

Add new driver for the TI AM65x SoC Gigabit Ethernet Switch subsystem (CPSW NUSS). It has two ports and provides Ethernet packet communication for the device and can be configured as an Ethernet switch. CPSW NUSS features: the Reduced Gigabit Media Independent Interface (RGMII), Reduced Media Independent Interface (RMII), and the Management Data Input/Output (MDIO) interface for physical layer device (PHY) management. The TI AM65x SoC has integrated two-port Gigabit Ethernet Switch subsystem into device MCU domain named MCU_CPSW0. One Ethernet port (port 1) with selectable RGMII and RMII interfaces and an internal Communications Port Programming Interface (CPPI) port (Host port 0). Host Port 0 CPPI Packet Streaming Interface interface supports 8 TX channels and on RX channels operating by TI am654 NAVSS Unified DMA Peripheral Root Complex (UDMA-P) controller. Tested for tftp and booting to kernel on am654-evm. Changes in v5: * Rebased to latest which meant adapting to pinmux macro change. Changes in v4: * Patch1 caused dra7 config build warnings corrected them. Grygorii Strashko (4): net: ethernet: ti: Introduce am654 gigabit eth switch subsystem driver arm64: dts: ti: k3-am65: add mcu cpsw node arm64: dts: k3-am654-base-board: add mcu cpsw nuss pinmux and phy defs configs: am65x_evm_a53: enable networking Keerthy (1): driver: net: ti: cpsw-mdio: use phys_addr_t for mdio_base addr arch/arm/dts/k3-am65.dtsi | 2 + arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 170 ++++ configs/am65x_evm_a53_defconfig | 7 + drivers/net/ti/Kconfig | 8 + drivers/net/ti/Makefile | 1 + drivers/net/ti/am65-cpsw-nuss.c | 794 +++++++++++++++++++ drivers/net/ti/cpsw_mdio.c | 4 +- drivers/net/ti/cpsw_mdio.h | 2 +- 8 files changed, 985 insertions(+), 3 deletions(-) create mode 100644 drivers/net/ti/am65-cpsw-nuss.c -- 2.17.1

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[U-Boot] [PATCH v2 3/8] x86: slimbootloader: Add memory configuration
by Park, Aiden 08 Jul '19

08 Jul '19

- Get memory size from the memory map info hob - Set ram top for U-Boot relocation lower than 4GB - Provide e820 entries from the memory map info hob Signed-off-by: Aiden Park <aiden.park(a)intel.com> --- arch/x86/cpu/slimbootloader/Makefile | 2 +- arch/x86/cpu/slimbootloader/dram.c | 139 ++++++++++++++++++ .../asm/arch-slimbootloader/slimbootloader.h | 38 +++++ 3 files changed, 178 insertions(+), 1 deletion(-) create mode 100644 arch/x86/cpu/slimbootloader/dram.c diff --git a/arch/x86/cpu/slimbootloader/Makefile b/arch/x86/cpu/slimbootloader/Makefile index 620fc8a139..4b0b3e71c9 100644 --- a/arch/x86/cpu/slimbootloader/Makefile +++ b/arch/x86/cpu/slimbootloader/Makefile @@ -2,4 +2,4 @@ # # Copyright (C) 2019 Intel Corporation <www.intel.com> -obj-y += car.o slimbootloader.o hob.o +obj-y += car.o slimbootloader.o hob.o dram.o diff --git a/arch/x86/cpu/slimbootloader/dram.c b/arch/x86/cpu/slimbootloader/dram.c new file mode 100644 index 0000000000..1defdad1c9 --- /dev/null +++ b/arch/x86/cpu/slimbootloader/dram.c @@ -0,0 +1,139 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019 Intel Corporation <www.intel.com> + */ + +#include <common.h> +#include <linux/sizes.h> +#include <asm/e820.h> +#include <asm/arch/slimbootloader.h> + +DECLARE_GLOBAL_DATA_PTR; + +/** + * This returns a data pointer of memory map info from the guid hob. + * + * @return: A data pointer of memory map info hob + */ +static void *get_memory_map_info(void) +{ + const struct efi_guid guid = LOADER_MEMORY_MAP_INFO_GUID; + + return get_next_guid_hob_data(&guid, gd->arch.hob_list); +} + +/** + * This is to give usable memory region information for u-boot relocation. + * so search usable memory region lower than 4GB. + * The memory map entries from Slim Bootloader hob are already sorted. + * + * @total_size: The memory size that u-boot occupies + * @return : The top available memory address lower than 4GB + */ +ulong board_get_usable_ram_top(ulong total_size) +{ + struct memory_map_info *data = NULL; + int i = 0; + phys_addr_t addr_start = 0; + phys_addr_t addr_end = 0; + ulong ram_top = 0; + + data = (struct memory_map_info *)get_memory_map_info(); + if (!data) + panic("memory map info hob not found\n"); + + /* sorted memory map entries, so reversed search */ + for (i = data->count - 1; i >= 0; i--) { + if (data->entry[i].type != E820_RAM) + continue; + + addr_start = data->entry[i].addr; + addr_end = addr_start + data->entry[i].size; + + if (addr_start > SZ_4G) + continue; + + if (addr_end > SZ_4G) + addr_end = SZ_4G; + + if (addr_end < total_size) + continue; + + /* to relocate u-boot at 4K aligned memory */ + addr_end = rounddown(addr_end - total_size, SZ_4K); + if (addr_end >= addr_start) { + ram_top = (ulong)addr_end + total_size; + break; + } + } + + if (!ram_top) + panic("failed to find available memory for relocation!"); + + return ram_top; +} + +/** + * The memory initialization has already been done in previous Slim Bootloader + * stage thru FSP-M. Instead, this sets the ram_size from the memory map info + * hob. + */ +int dram_init(void) +{ + struct memory_map_info *data = NULL; + int i = 0; + phys_size_t ram_size = 0; + + data = (struct memory_map_info *)get_memory_map_info(); + if (!data) + panic("memory map info hob not found\n"); + + /* sorted memory map entries, so reversed search */ + for (i = data->count - 1; i >= 0; i--) { + if (data->entry[i].type != E820_RAM) + continue; + + /* simply use the highest usable memory address as ram size */ + ram_size = data->entry[i].addr + data->entry[i].size; + break; + } + + if (!ram_size) + panic("failed to detect memory size"); + + gd->ram_size = ram_size; + return 0; +} + +int dram_init_banksize(void) +{ + /* simply use a single bank to have whole size for now */ + if (CONFIG_NR_DRAM_BANKS) { + gd->bd->bi_dram[0].start = 0; + gd->bd->bi_dram[0].size = gd->ram_size; + } + return 0; +} + +unsigned int install_e820_map(unsigned int max_entries, + struct e820_entry *entries) +{ + struct memory_map_info *data = NULL; + int i = 0; + unsigned int num_entries = 0; + + data = (struct memory_map_info *)get_memory_map_info(); + if (!data) { + debug("memory map info hob not found\n"); + return 0; + } + + for (i = 0; i < data->count; i++) { + entries[num_entries].addr = data->entry[i].addr; + entries[num_entries].size = data->entry[i].size; + entries[num_entries].type = data->entry[i].type; + num_entries++; + } + + return num_entries; +} diff --git a/arch/x86/include/asm/arch-slimbootloader/slimbootloader.h b/arch/x86/include/asm/arch-slimbootloader/slimbootloader.h index bd1f4ee374..c85201e711 100644 --- a/arch/x86/include/asm/arch-slimbootloader/slimbootloader.h +++ b/arch/x86/include/asm/arch-slimbootloader/slimbootloader.h @@ -10,6 +10,44 @@ #include <asm/fsp/fsp_types.h> #include <asm/fsp/fsp_hob.h> +#define LOADER_MEMORY_MAP_INFO_GUID \ + { \ + 0xa1ff7424, 0x7a1a, 0x478e, \ + { 0xa9, 0xe4, 0x92, 0xf3, 0x57, 0xd1, 0x28, 0x32 } \ + } + +/** + * A single entry of memory map information + * + * @addr: start address of a memory map entry + * @size: size of a memory map entry + * @type: ram:1, reserved:2, acpi:3, nvs:4, unusable:5 + * @flag: only used in Slim Bootloader + * @rsvd: padding for alignment + */ +struct memory_map_entry { + phys_addr_t addr; + phys_size_t size; + u8 type; + u8 flag; + u8 rsvd[6]; +} __packed; + +/** + * This includes all memory map entries which are sorted. + * + * @rev : revision of memory_map_info structure. currently 1. + * @rsvd : padding for alignment + * @count: the number of memory map entries + * @entry: array of all memory map entries + */ +struct memory_map_info { + u8 rev; + u8 rsvd[3]; + u32 count; + struct memory_map_entry entry[0]; +} __packed; + /** * This returns a pointer to hob data buffer if the given guid hob is found. * -- 2.20.1

2 2

[U-Boot] [PATCH v2 4/8] x86: slimbootloader: Add serial driver
by Park, Aiden 08 Jul '19

08 Jul '19

- Get serial port information from the serial port info hob - Leverage ns16550 driver with slimbootloader specific platform data Signed-off-by: Aiden Park <aiden.park(a)intel.com> --- arch/x86/cpu/slimbootloader/Makefile | 2 +- arch/x86/cpu/slimbootloader/serial.c | 62 +++++++++++++++++++ .../asm/arch-slimbootloader/slimbootloader.h | 33 ++++++++++ 3 files changed, 96 insertions(+), 1 deletion(-) create mode 100644 arch/x86/cpu/slimbootloader/serial.c diff --git a/arch/x86/cpu/slimbootloader/Makefile b/arch/x86/cpu/slimbootloader/Makefile index 4b0b3e71c9..3e62f564cd 100644 --- a/arch/x86/cpu/slimbootloader/Makefile +++ b/arch/x86/cpu/slimbootloader/Makefile @@ -2,4 +2,4 @@ # # Copyright (C) 2019 Intel Corporation <www.intel.com> -obj-y += car.o slimbootloader.o hob.o dram.o +obj-y += car.o slimbootloader.o hob.o dram.o serial.o diff --git a/arch/x86/cpu/slimbootloader/serial.c b/arch/x86/cpu/slimbootloader/serial.c new file mode 100644 index 0000000000..186c7a79ef --- /dev/null +++ b/arch/x86/cpu/slimbootloader/serial.c @@ -0,0 +1,62 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019 Intel Corporation <www.intel.com> + */ + +#include <common.h> +#include <dm.h> +#include <ns16550.h> +#include <serial.h> +#include <asm/arch/slimbootloader.h> + +int slimbootloader_serial_ofdata_to_platdata(struct udevice *dev) +{ + const struct efi_guid guid = LOADER_SERIAL_PORT_INFO_GUID; + struct serial_port_info *serial_info = NULL; + struct ns16550_platdata *plat = dev->platdata; + + serial_info = (struct serial_port_info *) + get_next_guid_hob_data(&guid, gd->arch.hob_list); + + if (!serial_info) { + debug("failed to get serial port information\n"); + return -ENOENT; + } + debug("type:%d base=0x%08x baudrate=%d stride=%d clk=%d\n", + serial_info->type, + serial_info->base, + serial_info->baud, + serial_info->stride, + serial_info->clk); + + /* + * The serial_info->type provides port io or mmio access type info, + * but the access type will be controlled by + * CONFIG_SYS_NS16550_PORT_MAPPED or CONFIG_SYS_NS16550_MEM32. + * + * TBD: ns16550 access type configuration in runtime. + * ex) plat->access_type = serial_info->type + */ + plat->base = serial_info->base; + /* ns16550 uses reg_shift, then covert stride to shift */ + plat->reg_shift = (serial_info->stride >> 1); + plat->clock = serial_info->clk; + + return 0; +} + +static const struct udevice_id slimbootloader_serial_ids[] = { + { .compatible = "intel,slimbootloader-uart" }, + {} +}; + +U_BOOT_DRIVER(serial_slimbootloader) = { + .name = "serial_slimbootloader", + .id = UCLASS_SERIAL, + .of_match = slimbootloader_serial_ids, + .ofdata_to_platdata = slimbootloader_serial_ofdata_to_platdata, + .platdata_auto_alloc_size = sizeof(struct ns16550_platdata), + .priv_auto_alloc_size = sizeof(struct NS16550), + .probe = ns16550_serial_probe, + .ops = &ns16550_serial_ops, +}; diff --git a/arch/x86/include/asm/arch-slimbootloader/slimbootloader.h b/arch/x86/include/asm/arch-slimbootloader/slimbootloader.h index c85201e711..b05e527148 100644 --- a/arch/x86/include/asm/arch-slimbootloader/slimbootloader.h +++ b/arch/x86/include/asm/arch-slimbootloader/slimbootloader.h @@ -16,6 +16,12 @@ { 0xa9, 0xe4, 0x92, 0xf3, 0x57, 0xd1, 0x28, 0x32 } \ } +#define LOADER_SERIAL_PORT_INFO_GUID \ + { \ + 0x6c6872fe, 0x56a9, 0x4403, \ + { 0xbb, 0x98, 0x95, 0x8d, 0x62, 0xde, 0x87, 0xf1 } \ + } + /** * A single entry of memory map information * @@ -48,6 +54,33 @@ struct memory_map_info { struct memory_map_entry entry[0]; } __packed; +/** + * This includes serial port info which has already been initialized in previous + * Slim Bootloader stage. + * The Slim Bootloader initializes serial port regardless of debug/release build + * modes, and it passes the information to a payload thru hob. So, a payload can + * re-use the serial information without re-initializing serial port. + * + * @rev : revision of serial_port_info structure. currently 1. + * @rsvd : padding for alignment + * @type : port io: 1, mmio: 2 + * @base : io base address. ex) 0x3f8, 0x80001000 + * @baud : uart baud rate + * @stride: register stride in Bytes + * @clk : uart frequency in Hz + * @rsvd1 : reserved + */ +struct serial_port_info { + u8 rev; + u8 rsvd[3]; + u32 type; + u32 base; + u32 baud; + u32 stride; + u32 clk; + u32 rsvd1; +} __packed; + /** * This returns a pointer to hob data buffer if the given guid hob is found. * -- 2.20.1

2 2