June 2019 - U-Boot

[U-Boot] [PATCH 1/1] colibri_imx7: introduce androidboot wrapper
by Igor Opaniuk 20 Jul '19

20 Jul '19

From: Igor Opaniuk <igor.opaniuk(a)toradex.com> 1. Introduce androidboot wrapper for booting AOSP. 2. Add partitions_android env var for simplifying the process of writing new gpt table from U-boot shell/fastboot. Signed-off-by: Igor Opaniuk <igor.opaniuk(a)toradex.com> --- configs/colibri_imx7_emmc_defconfig | 2 +- include/configs/colibri_imx7.h | 41 +++++++++++++++++++++++++++-- 2 files changed, 40 insertions(+), 3 deletions(-) diff --git a/configs/colibri_imx7_emmc_defconfig b/configs/colibri_imx7_emmc_defconfig index 2fa9f1f532..864234eac4 100644 --- a/configs/colibri_imx7_emmc_defconfig +++ b/configs/colibri_imx7_emmc_defconfig @@ -28,7 +28,7 @@ CONFIG_CMD_MEMTEST=y CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y -# CONFIG_RANDOM_UUID is not set +CONFIG_RANDOM_UUID=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h index 3e4f63e7ba..4889de2114 100644 --- a/include/configs/colibri_imx7.h +++ b/include/configs/colibri_imx7.h @@ -48,6 +48,43 @@ #define CONFIG_NETMASK 255.255.255.0 #define CONFIG_SERVERIP 192.168.10.1 +#ifndef PARTS_DEFAULT +/* Define the default GPT table for eMMC */ +#define PARTS_DEFAULT \ + /* Android partitions */ \ + "partitions_android=" \ + "uuid_disk=${uuid_gpt_disk};" \ + "name=boot,start=1M,size=32M,uuid=${uuid_gpt_boot};" \ + "name=environment,size=4M,uuid=${uuid_gpt_environment};" \ + "name=recovery,size=16M,uuid=${uuid_gpt_recovery};" \ + "name=system,size=1536M,uuid=${uuid_gpt_system};" \ + "name=cache,size=512M,uuid=${uuid_gpt_cache};" \ + "name=device,size=8M,uuid=${uuid_gpt_device};" \ + "name=misc,size=4M,uuid=${uuid_gpt_misc};" \ + "name=datafooter,size=2M,uuid=${uuid_gpt_datafooter};" \ + "name=metadata,size=2M,uuid=${uuid_gpt_metadata};" \ + "name=persistdata,size=2M,uuid=${uuid_gpt_persistdata};" \ + "name=userdata,size=128M,uuid=${uuid_gpt_userdata};" \ + "name=fbmisc,size=-,uuid=${uuid_gpt_fbmisc}\0" +#endif /* PARTS_DEFAULT */ + +#define EMMC_ANDROID_BOOTCMD \ + "android_args=androidboot.serialno=0000000006449092 " \ + "androidboot.storage_type=emmc\0" \ + PARTS_DEFAULT \ + "android_fdt_addr=0x83700000\0" \ + "android_mmc_dev=0\0" \ + "androidboot=setenv loadaddr 0x88000000; " \ + "setenv bootm_boot_mode sec;" \ + "setenv bootargs $android_args; " \ + "part start mmc ${android_mmc_dev} boot boot_start; " \ + "part size mmc ${android_mmc_dev} boot boot_size; " \ + "mmc read ${loadaddr} ${boot_start} ${boot_size}; " \ + "part start mmc ${android_mmc_dev} environment env_start; " \ + "part size mmc ${android_mmc_dev} environment env_size; " \ + "mmc read ${android_fdt_addr} ${env_start} ${env_size}; " \ + "bootm ${loadaddr} ${loadaddr} ${android_fdt_addr}\0 " + #define EMMC_BOOTCMD \ "set_emmcargs=setenv emmcargs ip=off root=PARTUUID=${uuid} ro " \ "rootfstype=ext4 rootwait\0" \ @@ -65,7 +102,6 @@ "emmcfinduuid=part uuid mmc ${emmcdev}:${emmcrootpart} uuid\0" \ "emmcrootpart=2\0" - #define MEM_LAYOUT_ENV_SETTINGS \ "bootm_size=0x10000000\0" \ "fdt_addr_r=0x82000000\0" \ @@ -127,7 +163,8 @@ "setenv fdtfile ${soc}-colibri-emmc-${fdt_board}.dtb && run distro_bootcmd;" #define MODULE_EXTRA_ENV_SETTINGS \ "variant=-emmc\0" \ - EMMC_BOOTCMD + EMMC_BOOTCMD \ + EMMC_ANDROID_BOOTCMD #endif #if defined(CONFIG_TARGET_COLIBRI_IMX7_NAND) -- 2.17.1

2 1

[U-Boot] [PATCH] configs: icore: Fix U-Boot proper loading from nand
by Shyam Saini 20 Jul '19

20 Jul '19

SPL on Engicam i.Core M6 boards enabled DM, so it would require some malloc() pool before relocation in order to load U-Boot proper properly. So, enable SPL malloc() pool of 0x2000 size similarly like what we have used for icore mmc defconfigs. Signed-off-by: Shyam Saini <shyam.saini(a)amarulasolutions.com> --- configs/imx6qdl_icore_nand_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/imx6qdl_icore_nand_defconfig b/configs/imx6qdl_icore_nand_defconfig index ad4b930a39..630ad30491 100644 --- a/configs/imx6qdl_icore_nand_defconfig +++ b/configs/imx6qdl_icore_nand_defconfig @@ -8,6 +8,7 @@ CONFIG_TARGET_MX6Q_ENGICAM=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 # CONFIG_CMD_BMODE is not set CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y -- 2.11.0

2 1

[U-Boot] [PATCH] board: engicam: Remove bogus check for mmc for imx6ul isiot
by Shyam Saini 20 Jul '19

20 Jul '19

imx6ul-isiot-mmc.dts was removed in uboot version v2018.03 and from then onwards IMX6UL isiot uses imx6ul-isiot-emmc.dts for mmc, so remove unnecessary check for mmc. Signed-off-by: Shyam Saini <shyam.saini(a)amarulasolutions.com> --- board/engicam/common/board.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/board/engicam/common/board.c b/board/engicam/common/board.c index 7486f0ac2d..567b9f63e5 100644 --- a/board/engicam/common/board.c +++ b/board/engicam/common/board.c @@ -53,8 +53,6 @@ static void setenv_fdt_file(void) env_set("fdt_file", "imx6dl-icore-rqs.dtb"); } else if (!strcmp(cmp_dtb, "imx6ul-geam")) env_set("fdt_file", "imx6ul-geam.dtb"); - else if (!strcmp(cmp_dtb, "imx6ul-isiot-mmc")) - env_set("fdt_file", "imx6ul-isiot-emmc.dtb"); else if (!strcmp(cmp_dtb, "imx6ul-isiot-emmc")) env_set("fdt_file", "imx6ul-isiot-emmc.dtb"); else if (!strcmp(cmp_dtb, "imx6ul-isiot-nand")) -- 2.11.0

2 1

[U-Boot] [PATCH 1/6] ARM: dts: imx: imx53: Synchronize iMX53 DT with Linux
by Marek Vasut 20 Jul '19

20 Jul '19

Synchronize iMX53 device tree from Linux next-20190607 3f310e51ceb1 , this is needed to get NFC, UART, USBOTG DT nodes. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Fabio Estevam <fabio.estevam(a)nxp.com> Cc: Stefano Babic <sbabic(a)denx.de> --- arch/arm/dts/imx53.dtsi | 745 +++++++++++++++++++++++++++++++--------- 1 file changed, 588 insertions(+), 157 deletions(-) diff --git a/arch/arm/dts/imx53.dtsi b/arch/arm/dts/imx53.dtsi index 211ff5f69e..ed341cfd9d 100644 --- a/arch/arm/dts/imx53.dtsi +++ b/arch/arm/dts/imx53.dtsi @@ -1,17 +1,8 @@ -/* - * Copyright 2016 Beckhoff Automation - * Copyright 2011 Freescale Semiconductor, Inc. - * Copyright 2011 Linaro Ltd. - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html - */ - -#include "skeleton.dtsi" +// SPDX-License-Identifier: GPL-2.0+ +// +// Copyright 2011 Freescale Semiconductor, Inc. +// Copyright 2011 Linaro Ltd. + #include "imx53-pinfunc.h" #include <dt-bindings/clock/imx5-clock.h> #include <dt-bindings/gpio/gpio.h> @@ -19,8 +10,17 @@ #include <dt-bindings/interrupt-controller/irq.h> / { + #address-cells = <1>; + #size-cells = <1>; + /* + * The decompressor and also some bootloaders rely on a + * pre-existing /chosen node to be available to insert the + * command line and merge other ATAGS info. + */ + chosen {}; + aliases { - serial1 = &uart2; + ethernet0 = &fec; gpio0 = &gpio1; gpio1 = &gpio2; gpio2 = &gpio3; @@ -36,7 +36,45 @@ mmc1 = &esdhc2; mmc2 = &esdhc3; mmc3 = &esdhc4; - usb1 = &usbh1; + serial0 = &uart1; + serial1 = &uart2; + serial2 = &uart3; + serial3 = &uart4; + serial4 = &uart5; + spi0 = &ecspi1; + spi1 = &ecspi2; + spi2 = &cspi; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a8"; + reg = <0x0>; + clocks = <&clks IMX5_CLK_ARM>; + clock-latency = <61036>; + voltage-tolerance = <5>; + operating-points = < + /* kHz */ + 166666 850000 + 400000 900000 + 800000 1050000 + 1000000 1200000 + 1200000 1300000 + >; + }; + }; + + display-subsystem { + compatible = "fsl,imx-display-subsystem"; + ports = <&ipu_di0>, <&ipu_di1>; + }; + + capture_subsystem { + compatible = "fsl,imx-capture-subsystem"; + ports = <&ipu_csi0>, <&ipu_csi1>; }; tzic: tz-interrupt-controller@fffc000 { @@ -46,13 +84,143 @@ reg = <0x0fffc000 0x4000>; }; + clocks { + ckil { + compatible = "fsl,imx-ckil", "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + }; + + ckih1 { + compatible = "fsl,imx-ckih1", "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <22579200>; + }; + + ckih2 { + compatible = "fsl,imx-ckih2", "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + + osc { + compatible = "fsl,imx-osc", "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24000000>; + }; + }; + + pmu: pmu { + compatible = "arm,cortex-a8-pmu"; + interrupt-parent = <&tzic>; + interrupts = <77>; + }; + + usbphy0: usbphy-0 { + compatible = "usb-nop-xceiv"; + clocks = <&clks IMX5_CLK_USB_PHY1_GATE>; + clock-names = "main_clk"; + #phy-cells = <0>; + status = "okay"; + }; + + usbphy1: usbphy-1 { + compatible = "usb-nop-xceiv"; + clocks = <&clks IMX5_CLK_USB_PHY2_GATE>; + clock-names = "main_clk"; + #phy-cells = <0>; + status = "okay"; + }; + soc { #address-cells = <1>; #size-cells = <1>; compatible = "simple-bus"; interrupt-parent = <&tzic>; ranges; - u-boot,dm-pre-reloc; + + sata: sata@10000000 { + compatible = "fsl,imx53-ahci"; + reg = <0x10000000 0x1000>; + interrupts = <28>; + clocks = <&clks IMX5_CLK_SATA_GATE>, + <&clks IMX5_CLK_SATA_REF>, + <&clks IMX5_CLK_AHB>; + clock-names = "sata", "sata_ref", "ahb"; + status = "disabled"; + }; + + ipu: ipu@18000000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx53-ipu"; + reg = <0x18000000 0x08000000>; + interrupts = <11 10>; + clocks = <&clks IMX5_CLK_IPU_GATE>, + <&clks IMX5_CLK_IPU_DI0_GATE>, + <&clks IMX5_CLK_IPU_DI1_GATE>; + clock-names = "bus", "di0", "di1"; + resets = <&src 2>; + + ipu_csi0: port@0 { + reg = <0>; + + ipu_csi0_from_parallel_sensor: endpoint { + }; + }; + + ipu_csi1: port@1 { + reg = <1>; + + ipu_csi1_from_parallel_sensor: endpoint { + }; + }; + + ipu_di0: port@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + + ipu_di0_disp0: endpoint@0 { + reg = <0>; + }; + + ipu_di0_lvds0: endpoint@1 { + reg = <1>; + remote-endpoint = <&lvds0_in>; + }; + }; + + ipu_di1: port@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + + ipu_di1_disp1: endpoint@0 { + reg = <0>; + }; + + ipu_di1_lvds1: endpoint@1 { + reg = <1>; + remote-endpoint = <&lvds1_in>; + }; + + ipu_di1_tve: endpoint@2 { + reg = <2>; + remote-endpoint = <&tve_in>; + }; + }; + }; + + gpu: gpu@30000000 { + compatible = "amd,imageon-200.0", "amd,imageon"; + reg = <0x30000000 0x20000>; + reg-names = "kgsl_3d0_reg_memory"; + interrupts = <12>; + interrupt-names = "kgsl_3d0_irq"; + clocks = <&clks IMX5_CLK_GPU3D_GATE>, <&clks IMX5_CLK_GARB_GATE>; + clock-names = "core_clk", "mem_iface_clk"; + }; aips@50000000 { /* AIPS1 */ compatible = "fsl,aips-bus", "simple-bus"; @@ -92,6 +260,47 @@ status = "disabled"; }; + uart3: serial@5000c000 { + compatible = "fsl,imx53-uart", "fsl,imx21-uart"; + reg = <0x5000c000 0x4000>; + interrupts = <33>; + clocks = <&clks IMX5_CLK_UART3_IPG_GATE>, + <&clks IMX5_CLK_UART3_PER_GATE>; + clock-names = "ipg", "per"; + dmas = <&sdma 42 4 0>, <&sdma 43 4 0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + ecspi1: spi@50010000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi"; + reg = <0x50010000 0x4000>; + interrupts = <36>; + clocks = <&clks IMX5_CLK_ECSPI1_IPG_GATE>, + <&clks IMX5_CLK_ECSPI1_PER_GATE>; + clock-names = "ipg", "per"; + status = "disabled"; + }; + + ssi2: ssi@50014000 { + #sound-dai-cells = <0>; + compatible = "fsl,imx53-ssi", + "fsl,imx51-ssi", + "fsl,imx21-ssi"; + reg = <0x50014000 0x4000>; + interrupts = <30>; + clocks = <&clks IMX5_CLK_SSI2_IPG_GATE>, + <&clks IMX5_CLK_SSI2_ROOT_GATE>; + clock-names = "ipg", "baud"; + dmas = <&sdma 24 1 0>, + <&sdma 25 1 0>; + dma-names = "rx", "tx"; + fsl,fifo-depth = <15>; + status = "disabled"; + }; + esdhc3: esdhc@50020000 { compatible = "fsl,imx53-esdhc"; reg = <0x50020000 0x4000>; @@ -117,25 +326,18 @@ }; }; - iomuxc: iomuxc@53fa8000 { - compatible = "fsl,imx53-iomuxc"; - reg = <0x53fa8000 0x4000>; - }; - - gpr: iomuxc-gpr@53fa8000 { - compatible = "fsl,imx53-iomuxc-gpr", "syscon"; - reg = <0x53fa8000 0xc>; + aipstz1: bridge@53f00000 { + compatible = "fsl,imx53-aipstz"; + reg = <0x53f00000 0x60>; }; - uart2: serial@53fc0000 { - compatible = "fsl,imx7d-uart", "fsl,imx53-uart", "fsl,imx21-uart"; - reg = <0x53fc0000 0x4000>; - interrupts = <32>; - clocks = <&clks IMX5_CLK_UART2_IPG_GATE>, - <&clks IMX5_CLK_UART2_PER_GATE>; - clock-names = "ipg", "per"; - dmas = <&sdma 12 4 0>, <&sdma 13 4 0>; - dma-names = "rx", "tx"; + usbotg: usb@53f80000 { + compatible = "fsl,imx53-usb", "fsl,imx27-usb"; + reg = <0x53f80000 0x0200>; + interrupts = <18>; + clocks = <&clks IMX5_CLK_USBOH3_GATE>; + fsl,usbmisc = <&usbmisc 0>; + fsl,usbphy = <&usbphy0>; status = "disabled"; }; @@ -144,15 +346,37 @@ reg = <0x53f80200 0x0200>; interrupts = <14>; clocks = <&clks IMX5_CLK_USBOH3_GATE>; + fsl,usbmisc = <&usbmisc 1>; + fsl,usbphy = <&usbphy1>; dr_mode = "host"; status = "disabled"; }; - clks: ccm@53fd4000{ - compatible = "fsl,imx53-ccm"; - reg = <0x53fd4000 0x4000>; - interrupts = <0 71 0x04 0 72 0x04>; - #clock-cells = <1>; + usbh2: usb@53f80400 { + compatible = "fsl,imx53-usb", "fsl,imx27-usb"; + reg = <0x53f80400 0x0200>; + interrupts = <16>; + clocks = <&clks IMX5_CLK_USBOH3_GATE>; + fsl,usbmisc = <&usbmisc 2>; + dr_mode = "host"; + status = "disabled"; + }; + + usbh3: usb@53f80600 { + compatible = "fsl,imx53-usb", "fsl,imx27-usb"; + reg = <0x53f80600 0x0200>; + interrupts = <17>; + clocks = <&clks IMX5_CLK_USBOH3_GATE>; + fsl,usbmisc = <&usbmisc 3>; + dr_mode = "host"; + status = "disabled"; + }; + + usbmisc: usbmisc@53f80800 { + #index-cells = <1>; + compatible = "fsl,imx53-usbmisc"; + reg = <0x53f80800 0x200>; + clocks = <&clks IMX5_CLK_USBOH3_GATE>; }; gpio1: gpio@53f84000 { @@ -195,6 +419,188 @@ #interrupt-cells = <2>; }; + kpp: kpp@53f94000 { + compatible = "fsl,imx53-kpp", "fsl,imx21-kpp"; + reg = <0x53f94000 0x4000>; + interrupts = <60>; + clocks = <&clks IMX5_CLK_DUMMY>; + status = "disabled"; + }; + + wdog1: wdog@53f98000 { + compatible = "fsl,imx53-wdt", "fsl,imx21-wdt"; + reg = <0x53f98000 0x4000>; + interrupts = <58>; + clocks = <&clks IMX5_CLK_DUMMY>; + }; + + wdog2: wdog@53f9c000 { + compatible = "fsl,imx53-wdt", "fsl,imx21-wdt"; + reg = <0x53f9c000 0x4000>; + interrupts = <59>; + clocks = <&clks IMX5_CLK_DUMMY>; + status = "disabled"; + }; + + gpt: timer@53fa0000 { + compatible = "fsl,imx53-gpt", "fsl,imx31-gpt"; + reg = <0x53fa0000 0x4000>; + interrupts = <39>; + clocks = <&clks IMX5_CLK_GPT_IPG_GATE>, + <&clks IMX5_CLK_GPT_HF_GATE>; + clock-names = "ipg", "per"; + }; + + srtc: rtc@53fa4000 { + compatible = "fsl,imx53-rtc"; + reg = <0x53fa4000 0x4000>; + interrupts = <24>; + clocks = <&clks IMX5_CLK_SRTC_GATE>; + }; + + iomuxc: iomuxc@53fa8000 { + compatible = "fsl,imx53-iomuxc"; + reg = <0x53fa8000 0x4000>; + }; + + gpr: iomuxc-gpr@53fa8000 { + compatible = "fsl,imx53-iomuxc-gpr", "syscon"; + reg = <0x53fa8000 0xc>; + }; + + ldb: ldb@53fa8008 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx53-ldb"; + reg = <0x53fa8008 0x4>; + gpr = <&gpr>; + clocks = <&clks IMX5_CLK_LDB_DI0_SEL>, + <&clks IMX5_CLK_LDB_DI1_SEL>, + <&clks IMX5_CLK_IPU_DI0_SEL>, + <&clks IMX5_CLK_IPU_DI1_SEL>, + <&clks IMX5_CLK_LDB_DI0_GATE>, + <&clks IMX5_CLK_LDB_DI1_GATE>; + clock-names = "di0_pll", "di1_pll", + "di0_sel", "di1_sel", + "di0", "di1"; + status = "disabled"; + + lvds-channel@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + status = "disabled"; + + port@0 { + reg = <0>; + + lvds0_in: endpoint { + remote-endpoint = <&ipu_di0_lvds0>; + }; + }; + + port@2 { + reg = <2>; + }; + }; + + lvds-channel@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + status = "disabled"; + + port@1 { + reg = <1>; + + lvds1_in: endpoint { + remote-endpoint = <&ipu_di1_lvds1>; + }; + }; + + port@2 { + reg = <2>; + }; + }; + }; + + pwm1: pwm@53fb4000 { + #pwm-cells = <2>; + compatible = "fsl,imx53-pwm", "fsl,imx27-pwm"; + reg = <0x53fb4000 0x4000>; + clocks = <&clks IMX5_CLK_PWM1_IPG_GATE>, + <&clks IMX5_CLK_PWM1_HF_GATE>; + clock-names = "ipg", "per"; + interrupts = <61>; + }; + + pwm2: pwm@53fb8000 { + #pwm-cells = <2>; + compatible = "fsl,imx53-pwm", "fsl,imx27-pwm"; + reg = <0x53fb8000 0x4000>; + clocks = <&clks IMX5_CLK_PWM2_IPG_GATE>, + <&clks IMX5_CLK_PWM2_HF_GATE>; + clock-names = "ipg", "per"; + interrupts = <94>; + }; + + uart1: serial@53fbc000 { + compatible = "fsl,imx53-uart", "fsl,imx21-uart"; + reg = <0x53fbc000 0x4000>; + interrupts = <31>; + clocks = <&clks IMX5_CLK_UART1_IPG_GATE>, + <&clks IMX5_CLK_UART1_PER_GATE>; + clock-names = "ipg", "per"; + dmas = <&sdma 18 4 0>, <&sdma 19 4 0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + uart2: serial@53fc0000 { + compatible = "fsl,imx53-uart", "fsl,imx21-uart"; + reg = <0x53fc0000 0x4000>; + interrupts = <32>; + clocks = <&clks IMX5_CLK_UART2_IPG_GATE>, + <&clks IMX5_CLK_UART2_PER_GATE>; + clock-names = "ipg", "per"; + dmas = <&sdma 12 4 0>, <&sdma 13 4 0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + can1: can@53fc8000 { + compatible = "fsl,imx53-flexcan", "fsl,imx25-flexcan"; + reg = <0x53fc8000 0x4000>; + interrupts = <82>; + clocks = <&clks IMX5_CLK_CAN1_IPG_GATE>, + <&clks IMX5_CLK_CAN1_SERIAL_GATE>; + clock-names = "ipg", "per"; + status = "disabled"; + }; + + can2: can@53fcc000 { + compatible = "fsl,imx53-flexcan", "fsl,imx25-flexcan"; + reg = <0x53fcc000 0x4000>; + interrupts = <83>; + clocks = <&clks IMX5_CLK_CAN2_IPG_GATE>, + <&clks IMX5_CLK_CAN2_SERIAL_GATE>; + clock-names = "ipg", "per"; + status = "disabled"; + }; + + src: src@53fd0000 { + compatible = "fsl,imx53-src", "fsl,imx51-src"; + reg = <0x53fd0000 0x4000>; + #reset-cells = <1>; + }; + + clks: ccm@53fd4000{ + compatible = "fsl,imx53-ccm"; + reg = <0x53fd4000 0x4000>; + interrupts = <0 71 0x04 0 72 0x04>; + #clock-cells = <1>; + }; + gpio5: gpio@53fdc000 { compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; reg = <0x53fdc000 0x4000>; @@ -234,6 +640,18 @@ clocks = <&clks IMX5_CLK_I2C3_GATE>; status = "disabled"; }; + + uart4: serial@53ff0000 { + compatible = "fsl,imx53-uart", "fsl,imx21-uart"; + reg = <0x53ff0000 0x4000>; + interrupts = <13>; + clocks = <&clks IMX5_CLK_UART4_IPG_GATE>, + <&clks IMX5_CLK_UART4_PER_GATE>; + clock-names = "ipg", "per"; + dmas = <&sdma 2 4 0>, <&sdma 3 4 0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; }; aips@60000000 { /* AIPS2 */ @@ -243,25 +661,74 @@ reg = <0x60000000 0x10000000>; ranges; + aipstz2: bridge@63f00000 { + compatible = "fsl,imx53-aipstz"; + reg = <0x63f00000 0x60>; + }; + + iim: iim@63f98000 { + compatible = "fsl,imx53-iim", "fsl,imx27-iim"; + reg = <0x63f98000 0x4000>; + interrupts = <69>; + clocks = <&clks IMX5_CLK_IIM_GATE>; + }; + + uart5: serial@63f90000 { + compatible = "fsl,imx53-uart", "fsl,imx21-uart"; + reg = <0x63f90000 0x4000>; + interrupts = <86>; + clocks = <&clks IMX5_CLK_UART5_IPG_GATE>, + <&clks IMX5_CLK_UART5_PER_GATE>; + clock-names = "ipg", "per"; + dmas = <&sdma 16 4 0>, <&sdma 17 4 0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + tigerp: tigerp@63fa0000 { + compatible = "fsl,imx53-tigerp", "fsl,imx51-tigerp"; + reg = <0x63fa0000 0x28>; + }; + + owire: owire@63fa4000 { + compatible = "fsl,imx53-owire", "fsl,imx21-owire"; + reg = <0x63fa4000 0x4000>; + clocks = <&clks IMX5_CLK_OWIRE_GATE>; + status = "disabled"; + }; + + ecspi2: spi@63fac000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi"; + reg = <0x63fac000 0x4000>; + interrupts = <37>; + clocks = <&clks IMX5_CLK_ECSPI2_IPG_GATE>, + <&clks IMX5_CLK_ECSPI2_PER_GATE>; + clock-names = "ipg", "per"; + status = "disabled"; + }; + sdma: sdma@63fb0000 { compatible = "fsl,imx53-sdma", "fsl,imx35-sdma"; reg = <0x63fb0000 0x4000>; interrupts = <6>; clocks = <&clks IMX5_CLK_SDMA_GATE>, - <&clks IMX5_CLK_SDMA_GATE>; + <&clks IMX5_CLK_AHB>; clock-names = "ipg", "ahb"; #dma-cells = <3>; fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin"; }; - fec: ethernet@63fec000 { - compatible = "fsl,imx53-fec", "fsl,imx25-fec"; - reg = <0x63fec000 0x4000>; - interrupts = <87>; - clocks = <&clks IMX5_CLK_FEC_GATE>, - <&clks IMX5_CLK_FEC_GATE>, - <&clks IMX5_CLK_FEC_GATE>; - clock-names = "ipg", "ahb", "ptp"; + cspi: spi@63fc0000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx53-cspi", "fsl,imx35-cspi"; + reg = <0x63fc0000 0x4000>; + interrupts = <38>; + clocks = <&clks IMX5_CLK_CSPI_IPG_GATE>, + <&clks IMX5_CLK_CSPI_IPG_GATE>; + clock-names = "ipg", "per"; status = "disabled"; }; @@ -284,66 +751,65 @@ clocks = <&clks IMX5_CLK_I2C1_GATE>; status = "disabled"; }; - }; - - ipu: ipu@18000000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,imx53-ipu"; - reg = <0x18000000 0x08000000>; - interrupts = <11 10>; - clocks = <&clks IMX5_CLK_IPU_GATE>, - <&clks IMX5_CLK_IPU_DI0_GATE>, - <&clks IMX5_CLK_IPU_DI1_GATE>; - clock-names = "bus", "di0", "di1"; - resets = <&src 2>; - u-boot,dm-pre-reloc; - ipu_csi0: port@0 { - reg = <0>; + ssi1: ssi@63fcc000 { + #sound-dai-cells = <0>; + compatible = "fsl,imx53-ssi", "fsl,imx51-ssi", + "fsl,imx21-ssi"; + reg = <0x63fcc000 0x4000>; + interrupts = <29>; + clocks = <&clks IMX5_CLK_SSI1_IPG_GATE>, + <&clks IMX5_CLK_SSI1_ROOT_GATE>; + clock-names = "ipg", "baud"; + dmas = <&sdma 28 0 0>, + <&sdma 29 0 0>; + dma-names = "rx", "tx"; + fsl,fifo-depth = <15>; + status = "disabled"; }; - ipu_csi1: port@1 { - reg = <1>; + audmux: audmux@63fd0000 { + compatible = "fsl,imx53-audmux", "fsl,imx31-audmux"; + reg = <0x63fd0000 0x4000>; + status = "disabled"; }; - ipu_di0: port@2 { - #address-cells = <1>; - #size-cells = <0>; - reg = <2>; - - ipu_di0_disp0: endpoint@0 { - reg = <0>; - }; - - ipu_di0_lvds0: endpoint@1 { - reg = <1>; - remote-endpoint = <&lvds0_in>; - }; + nfc: nand@63fdb000 { + compatible = "fsl,imx53-nand"; + reg = <0x63fdb000 0x1000 0xf7ff0000 0x10000>; + interrupts = <8>; + clocks = <&clks IMX5_CLK_NFC_GATE>; + status = "disabled"; }; - ipu_di1: port@3 { - #address-cells = <1>; - #size-cells = <0>; - reg = <3>; - - ipu_di1_disp1: endpoint@0 { - reg = <0>; - }; - - ipu_di1_lvds1: endpoint@1 { - reg = <1>; - remote-endpoint = <&lvds1_in>; - }; + ssi3: ssi@63fe8000 { + #sound-dai-cells = <0>; + compatible = "fsl,imx53-ssi", "fsl,imx51-ssi", + "fsl,imx21-ssi"; + reg = <0x63fe8000 0x4000>; + interrupts = <96>; + clocks = <&clks IMX5_CLK_SSI3_IPG_GATE>, + <&clks IMX5_CLK_SSI3_ROOT_GATE>; + clock-names = "ipg", "baud"; + dmas = <&sdma 46 0 0>, + <&sdma 47 0 0>; + dma-names = "rx", "tx"; + fsl,fifo-depth = <15>; + status = "disabled"; + }; - ipu_di1_tve: endpoint@2 { - reg = <2>; - remote-endpoint = <&tve_in>; - }; + fec: ethernet@63fec000 { + compatible = "fsl,imx53-fec", "fsl,imx25-fec"; + reg = <0x63fec000 0x4000>; + interrupts = <87>; + clocks = <&clks IMX5_CLK_FEC_GATE>, + <&clks IMX5_CLK_FEC_GATE>, + <&clks IMX5_CLK_FEC_GATE>; + clock-names = "ipg", "ahb", "ptp"; + status = "disabled"; }; - }; - tve: tve@63ff0000 { + tve: tve@63ff0000 { compatible = "fsl,imx53-tve"; reg = <0x63ff0000 0x1000>; interrupts = <92>; @@ -357,68 +823,33 @@ remote-endpoint = <&ipu_di1_tve>; }; }; - }; - - src: src@53fd0000 { - compatible = "fsl,imx53-src", "fsl,imx51-src"; - reg = <0x53fd0000 0x4000>; - #reset-cells = <1>; - }; - - ldb: ldb@53fa8008 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,imx53-ldb"; - reg = <0x53fa8008 0x4>; - gpr = <&gpr>; - clocks = <&clks IMX5_CLK_LDB_DI0_SEL>, - <&clks IMX5_CLK_LDB_DI1_SEL>, - <&clks IMX5_CLK_IPU_DI0_SEL>, - <&clks IMX5_CLK_IPU_DI1_SEL>, - <&clks IMX5_CLK_LDB_DI0_GATE>, - <&clks IMX5_CLK_LDB_DI1_GATE>; - clock-names = "di0_pll", "di1_pll", - "di0_sel", "di1_sel", - "di0", "di1"; - status = "disabled"; - - lvds-channel@0 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - status = "disabled"; - - port@0 { - reg = <0>; - - lvds0_in: endpoint { - remote-endpoint = <&ipu_di0_lvds0>; - }; - }; - - port@2 { - reg = <2>; - }; - }; - - lvds-channel@1 { - #address-cells = <1>; - #size-cells = <0>; - reg = <1>; - status = "disabled"; + }; - port@1 { - reg = <1>; + vpu: vpu@63ff4000 { + compatible = "fsl,imx53-vpu", "cnm,coda7541"; + reg = <0x63ff4000 0x1000>; + interrupts = <9>; + clocks = <&clks IMX5_CLK_VPU_REFERENCE_GATE>, + <&clks IMX5_CLK_VPU_GATE>; + clock-names = "per", "ahb"; + resets = <&src 1>; + iram = <&ocram>; + }; - lvds1_in: endpoint { - remote-endpoint = <&ipu_di1_lvds1>; - }; - }; + sahara: crypto@63ff8000 { + compatible = "fsl,imx53-sahara"; + reg = <0x63ff8000 0x4000>; + interrupts = <19 20>; + clocks = <&clks IMX5_CLK_SAHARA_IPG_GATE>, + <&clks IMX5_CLK_SAHARA_IPG_GATE>; + clock-names = "ipg", "ahb"; + }; + }; - port@2 { - reg = <2>; - }; - }; + ocram: sram@f8000000 { + compatible = "mmio-sram"; + reg = <0xf8000000 0x20000>; + clocks = <&clks IMX5_CLK_OCRAM>; }; }; }; -- 2.20.1

3 8

[U-Boot] [PATCH] arm: dts: imx: fsl-imx8dx.dtsi: add gpio aliases to fix gpio command
by Anatolij Gustschin 20 Jul '19

20 Jul '19

The gpio command currently uses equal bank names "GPIO0_" for all existing gpio banks, i. e.: U-Boot# gpio status -a Bank GPIO0_: GPIO0_0: input: 0 [ ] GPIO0_1: output: 1 [x] dbg1.gpios ... Bank GPIO0_: GPIO0_0: input: 0 [ ] GPIO0_1: input: 0 [ ] ... So the command is broken, it is not possible to address a desired bank. Add gpio aliases to fix this. Signed-off-by: Anatolij Gustschin <agust(a)denx.de> --- arch/arm/dts/fsl-imx8dx.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/dts/fsl-imx8dx.dtsi b/arch/arm/dts/fsl-imx8dx.dtsi index 715abb413d..1c3ca999e2 100644 --- a/arch/arm/dts/fsl-imx8dx.dtsi +++ b/arch/arm/dts/fsl-imx8dx.dtsi @@ -30,6 +30,14 @@ i2c1 = &i2c1; i2c2 = &i2c2; i2c3 = &i2c3; + gpio0 = &gpio0; + gpio1 = &gpio1; + gpio2 = &gpio2; + gpio3 = &gpio3; + gpio4 = &gpio4; + gpio5 = &gpio5; + gpio6 = &gpio6; + gpio7 = &gpio7; }; memory@80000000 { -- 2.17.1

2 1

[U-Boot] [PATCH] IMX: serial: dm: Set DM_FLAG_PRE_RELOC in the IMX uart driver
by Lukasz Majewski 20 Jul '19

20 Jul '19

The DM_FLAG_PRE_RELOC shall be set unconditionally as this driver is going to be re-used in both early SPL and U-Boot proper's pre-reloc. For i.MX based devices it is crucial to have available the serial console before relocation (otherwise the board may hand). The device definition may be provided either via device tree description or with U_BOOT_DEVICE(mxc_serial) definition. In the latter case the device will not bind in U-Boot proper when DM_FLAG_PRE_RELOC is not set. The !CONFIG_IS_ENABLED(OF_CONTROL) #if check was set as a "workaround" for DM problem described in following commit 4687919684e0 ("serial: Remove DM_FLAG_PRE_RELOC flag in various drivers"). Let's look on this check more thoroughly - we add this flag if the board doesn't support OF_CONTROL. This is a bit strange as the serial_mxc.c can be used with CONFIG_DM_SERIAL but without corresponding device tree description (OF_CONTROL). In such case the aforementioned U_BOOT_DEVICE(mxc_serial) definition is used. Other boards/SoCs have this flag set unconditionally for serial driver. Signed-off-by: Lukasz Majewski <lukma(a)denx.de> --- drivers/serial/serial_mxc.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/serial/serial_mxc.c b/drivers/serial/serial_mxc.c index c9e7bddb7a..3996ddcf3a 100644 --- a/drivers/serial/serial_mxc.c +++ b/drivers/serial/serial_mxc.c @@ -366,9 +366,7 @@ U_BOOT_DRIVER(serial_mxc) = { #endif .probe = mxc_serial_probe, .ops = &mxc_serial_ops, -#if !CONFIG_IS_ENABLED(OF_CONTROL) .flags = DM_FLAG_PRE_RELOC, -#endif }; #endif -- 2.11.0

2 1

[U-Boot] [PATCH v2 0/4] efi_loader: rework loading and starting of images
by Heinrich Schuchardt 19 Jul '19

19 Jul '19

This patch series starts the necessary changes needed to correctly implement the unloading of images in Exit(). If we want to properly unload images in Exit() the memory should always be allocated in the same way. As we allocate memory when reading from file we should do the same when the original image is in memory. Up to now efi_load_pe() returns the entry point or NULL in case of an error. This does not allow to return correct error codes from LoadImage(). Let efi_load_pe() return a status code and fill in the entry point in the corresponding field of the image object. Remove the duplicate code in efi_do_enter() and use efi_start_image() to start the image invoked by the bootefi command. Clean up bootefi_test_prepare(). Further patches will be needed: - use LoadImage() in bootefi and bootmgr - implement correct unloading of images in Exit() Heinrich Schuchardt (4): efi_loader: LoadImage: always allocate new pages efi_loader: set entry point in efi_load_pe() efi_loader: use efi_start_image() for bootefi efi_loader: clean up bootefi_test_prepare() cmd/bootefi.c | 91 ++++++++++-------------- include/efi_loader.h | 10 ++- lib/efi_loader/efi_bootmgr.c | 2 +- lib/efi_loader/efi_boottime.c | 112 ++++++++++++++++++++---------- lib/efi_loader/efi_image_loader.c | 37 +++++----- 5 files changed, 141 insertions(+), 111 deletions(-) -- 2.20.1

4 16

[U-Boot] [PATCH] menu: don't bother going interactive with just one menu item
by Leon Yu 19 Jul '19

19 Jul '19

If there is only one menu item available, prompting user to enter choice makes little sense and just causes unnecessary boot delay. This change makes menu_get_choice return the only one item when there is no other choices. Signed-off-by: Leon Yu <leoyu(a)nvidia.com> Cc: Tom Warren <twarren(a)nvidia.com> Cc: Stephen Warren <swarren(a)nvidia.com> Cc: Thierry Reding <treding(a)nvidia.com> --- common/menu.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/common/menu.c b/common/menu.c index 0f0a29ac2ee3..7b66d199a9b1 100644 --- a/common/menu.c +++ b/common/menu.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2010-2011 Calxeda, Inc. + * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. */ #include <common.h> @@ -39,6 +40,7 @@ struct menu { char *(*item_choice)(void *); void *item_choice_data; struct list_head items; + int item_cnt; }; /* @@ -271,7 +273,7 @@ int menu_get_choice(struct menu *m, void **choice) if (!m || !choice) return -EINVAL; - if (!m->prompt) + if (!m->prompt || m->item_cnt == 1) return menu_default_choice(m, choice); return menu_interactive_choice(m, choice); @@ -323,6 +325,7 @@ int menu_item_add(struct menu *m, char *item_key, void *item_data) item->data = item_data; list_add_tail(&item->list, &m->items); + m->item_cnt++; return 1; } @@ -374,6 +377,7 @@ struct menu *menu_create(char *title, int timeout, int prompt, m->item_data_print = item_data_print; m->item_choice = item_choice; m->item_choice_data = item_choice_data; + m->item_cnt = 0; if (title) { m->title = strdup(title); -- 2.7.4 ----------------------------------------------------------------------------------- This email message is for the sole use of the intended recipient(s) and may contain confidential information. Any unauthorized review, use, disclosure or distribution is prohibited. If you are not the intended recipient, please contact the sender by reply email and destroy all copies of the original message. -----------------------------------------------------------------------------------

3 4

[U-Boot] [PATCH v8 00/14] Add Support for eMMC in AM65x-evm
by Faiz Abbas 19 Jul '19

19 Jul '19

Add Support for eMMC in TI's AM65x-evm. The series starts by syncing the sdhci0 node from the kernel. Then it adds APIs and changes to the driver required for handling the driver's integrated phy. The current maximum supported speed is DDR52. Higher speeds and tuning support will be added in a subsequent series. Tested with Andreas's latest series[1] on top. Can be applied independently of that series though. Changes in v8: 1. Fixed build issues with some xylinx configs. 2. Fixed-up patch 10 to patch 8 so it makes more sense now. Changes in v7: Fixed a device tree entry in patch 1 and tested eMMC boot as well with Andreas's latest series[1]. Changes in v6: 1. Squashed one more dependency for clk_200mhz from Andreas's patches[1] into patch 1. Patches now build without any help from the other series. 2. Improved line wrapping in patch 8. Changes in v5: Patches were tested with Andreas's system firmware patches[1] but can now be independently merged cleanly on latest U-boot. Changes in v4: 1. Dropped the patch including regmap_read_poll_timeout() because that support was already added by someone else 2. Fixed a NULL pointer exception in patch 8. 3. Rebased on top of latest master 4. Added extra patches to support GPT partitions in user partition 5. Added Support for environment in eMMC by default Changes in v3: Patch 9: Got rid of variable ret Changes in v2: Patch 9: Fixed return value Patch 12: Fixed spacing [1] https://patchwork.ozlabs.org/project/uboot/list/?series=111844 Faiz Abbas (14): arm64: dts: k3: Sync sdhci0 node from kernel and change driver name mmc: am654_sdhci: Remove quirks regmap: Add API regmap_init_mem_index() mmc: sdhci: Add support for sdhci-caps-mask mmc: sdhci: Make sdhci_set_clock() non static arm: dts: k3: Add phy specific properties to SD card node mmc: sdhci: Make set_ios_post() return int mmc: am654_sdhci: Add Support for PHY configs: am65x_evm: Enable CONFIG_REGMAP mmc: sdhci: Add support for HOST_CONTROL2 and setting UHS timings mmc: am654_sdhci: Add a platform specific set_control_reg() callback configs: am65x: Add configs to support environment in eMMC am65x_evm: Add Support for creating a filesystem GPT partition in eMMC configs: am65x_evm_a53: Add Support for creating GPT partitions arch/arm/dts/k3-am65-main.dtsi | 22 ++ arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 30 +- arch/arm/dts/k3-am654-base-board.dts | 28 ++ arch/arm/dts/k3-am654-r5-base-board.dts | 39 +++ configs/am65x_evm_a53_defconfig | 11 +- configs/am65x_evm_r5_defconfig | 4 +- drivers/core/regmap.c | 42 +++ drivers/mmc/Kconfig | 9 +- drivers/mmc/Makefile | 2 +- drivers/mmc/am654_sdhci.c | 333 +++++++++++++++++++ drivers/mmc/k3_arsan_sdhci.c | 109 ------ drivers/mmc/sdhci.c | 50 ++- drivers/mmc/xenon_sdhci.c | 4 +- drivers/mmc/zynq_sdhci.c | 45 +-- include/configs/am65x_evm.h | 19 +- include/regmap.h | 2 + include/sdhci.h | 22 +- 17 files changed, 581 insertions(+), 190 deletions(-) create mode 100644 drivers/mmc/am654_sdhci.c delete mode 100644 drivers/mmc/k3_arsan_sdhci.c -- 2.19.2

2 28

[U-Boot] [PATCH v3 00/18] Add EEPROM-based board detect support for TI K3 SoCs
by Andreas Dannenberg 19 Jul '19

19 Jul '19

This is an updated EEPROM-based board detection series that can applied if staged with other patches in the sequence proposed earlier [1]. For completeness here is the proposed sequence again, avoiding merge conflicts, but this time from the perspective of this patch series. Step 1) Faiz' "Add Support for eMMC in Am65x-evm" series [2]. It needs a small update to actuall allow for eMMC boot I posted earlier. Step 2) The updated (v2) SYSFW loader series just posted [3] Step 3) The updated AM654x EEPROM support proposed with this series Step 4) An updated version of Lokesh's "arm: k3: Allow for exclusive and shared device requests" series [4]. In addition to a rebase such an updated series should include updating power domain properties for devices that were added during the previous steps. Step 5) An updated version of Lokesh's "arm: k3: arm64: Initial support Texas Instrument's J721E Platform" series [5] also adding in the few lines of codes to leverage SYSFW. Step 6 & beyond) Various rproc patches, etc. Changes since v2: - Re-based for proposed staging K3 AM654x patch staging sequence Changes since initial submission: - Re-based onto latest 'master' branch - Collected all review tags - Re-tested [1] https://lists.denx.de/pipermail/u-boot/2019-June/371739.html [2] https://patchwork.ozlabs.org/project/uboot/list/?series=111723 [3] https://patchwork.ozlabs.org/project/uboot/list/?series=111844 [4] https://patchwork.ozlabs.org/project/uboot/list/?series=109163 [5] https://patchwork.ozlabs.org/project/uboot/list/?series=109296 -- Andreas Dannenberg Texas Instruments Inc Andreas Dannenberg (16): arm: dts: k3-am65: Move pinctrl nodes out of U-Boot specific dtsi arm: dts: k3-am65: Add I2C nodes arm: dts: k3-am654-base-board: Enable wkup_i2c0 across all boot stages configs: am65x_evm_defconfig: Enable I2C support configs: am65x_hs_evm_defconfig: Enable I2C support arm64: dts: k3-am654-base-board: Add I2C GPIO expander @ 0x38 configs: am65x_evm_a53: Enable PCA953X-type GPIO driver configs: am65x_hs_evm_a53: Enable PCA953X-type GPIO driver configs: am65x_evm_a53: Increase malloc pool before relocation configs: am65x_hs_evm_a53: Increase malloc pool before relocation arm: K3: am654: Map common EEPROM data into SRAM scratch space ti: common: am6: Add support for board description EEPROM ti: common: am6: Add support for setting MAC addresses board: ti: am654: Use EEPROM-based board detection configs: am65x_evm: Add support for applying overlays configs: am65x_hs_evm: Add support for applying overlays Vignesh R (2): i2c: omap24xx_i2c: Adapt driver to support K3 devices arm: omap_i2c: Remove unwanted header file inclusion arch/arm/dts/k3-am65-main.dtsi | 52 ++++ arch/arm/dts/k3-am65-mcu.dtsi | 11 + arch/arm/dts/k3-am65-wakeup.dtsi | 19 ++ arch/arm/dts/k3-am65.dtsi | 7 + arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 27 +- arch/arm/dts/k3-am654-base-board.dts | 22 ++ arch/arm/dts/k3-am654-r5-base-board.dts | 13 + arch/arm/include/asm/omap_i2c.h | 2 - arch/arm/mach-k3/am6_init.c | 4 + arch/arm/mach-k3/include/mach/am6_hardware.h | 3 + arch/arm/mach-k3/include/mach/sys_proto.h | 2 + board/ti/am65x/Kconfig | 7 + board/ti/am65x/evm.c | 241 ++++++++++++++++++ board/ti/common/board_detect.c | 246 +++++++++++++++++++ board/ti/common/board_detect.h | 206 ++++++++++++++++ configs/am65x_evm_a53_defconfig | 11 +- configs/am65x_evm_r5_defconfig | 4 + configs/am65x_hs_evm_a53_defconfig | 11 +- configs/am65x_hs_evm_r5_defconfig | 4 + drivers/i2c/Kconfig | 2 +- include/configs/am65x_evm.h | 18 +- 21 files changed, 884 insertions(+), 28 deletions(-) -- 2.17.1

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