April 2019 - U-Boot

[U-Boot] [PATCH 0/3] Add network support for ServalT SoCs
by Horatiu Vultur 10 Apr '19

10 Apr '19

This patch series adds network support for ServalT SoCs family. There is only one pcb in this family: ServalT(pcb116). This patch series is based on: u-boot-mips/next. Horatiu Vultur (3): net: Add MSCC ServalT network driver. net: mscc: servalt: Add ethernet nodes for ServalT configs: mscc_servalt: Add network support arch/mips/dts/mscc,servalt.dtsi | 40 ++ arch/mips/dts/servalt_pcb116.dts | 25 + .../include/mach/servalt/servalt_devcpu_gcb.h | 2 + configs/mscc_servalt_defconfig | 6 +- drivers/net/mscc_eswitch/Kconfig | 7 + drivers/net/mscc_eswitch/Makefile | 1 + drivers/net/mscc_eswitch/servalt_switch.c | 622 +++++++++++++++++++++ 7 files changed, 702 insertions(+), 1 deletion(-) create mode 100644 drivers/net/mscc_eswitch/servalt_switch.c -- 2.7.4

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[U-Boot] Bug in saveenv handling?
by U.Mutlu 10 Apr '19

10 Apr '19

I just made this unpleasant observation while playing with u-boot: On the u-boot CLI I changed an envvar and saved the env: setenv bootdelay 5 ; saveenv Then I issued, just for fun, the command "scsi scan", but it crashed and rebooted the device. But this time on the display only the tuxx logo and the very first u-boot line is displayed, nothing else happens. It seems u-boot has overwritten parts of itself on the storage medium (uSD with FAT boot partition). I had this experience some more times in the past; after writing u-boot anew to the uSD it continued working again. Btw, I once even had the case where saveenv overwrote boot.cmd (but nothing else) with garbage (IIRC it was filled full with the char @ ). I mention this just because it seems that there's maybe a bug in u-boot's saveenv handling (maybe data was not completely flushed, file handle was not closed, or maybe the fat write routine is buggy?...). => setenv bootdelay 5 ; saveenv Saving Environment to FAT... OK => printenv bootdelay bootdelay=5 => scsi scan scanning bus for devices... data abort pc : [<7ef94f8e>] lr : [<7ef911a1>] reloc pc : [<4a01af8e>] lr : [<4a0171a1>] sp : 7af51bf8 ip : 0000001c fp : 000000c0 r10: 00000000 r9 : 7af59ed8 r8 : 00000000 r7 : 7af51e78 r6 : 7efd3f54 r5 : 7efdb9b8 r4 : 7efdb9b8 r3 : 00000000 r2 : 00000000 r1 : ea000016 r0 : 7efdb9b8 Flags: nZcv IRQs off FIQs off Mode SVC_32 Code: e92dbd10 f8d045f0 b0858080 1000f8d8 (f8d14604) Resetting CPU ... resetting ...

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[U-Boot] mmc tests incorrectly implemented
by Stephen Warren 10 Apr '19

10 Apr '19

I see that some mmc tests have been added to test/py, but I see problems with them: 1) test_mmc_rescan assumes that each entry in env__mmc_rd_configs is a separate device that can be rescanned. This isn't actually true; entries in that array are intended to drive the mmc read test, and so can point at partitions or specific sector numbers. Running an mmc rescan test on the entire array results in duplicated tests. A new data array should be created for different tests. 2) It relies on test data that was not previously required. In particular, I see new test failures because the "info_device" key is now required. New tests should either (a) use new optional data arrays to configure their operation, or (b) access any new data in an optional way, skipping the test if it's not present, so as not to cause test failures. Also, shouldn't things like new tests be announced to the board maintainers list, so that people can update their test/py configurations to enable new tests if they're appropriate for their platform? [-] Section: test_mmc_info[emmc-boot0] FAILED: u_boot_console = <u_boot_console_exec_attach.ConsoleExecAttach object at 0x7fafd88f2d10> env__mmc_rd_config = {'count': 1, 'devid': 0, 'fixture_id': 'emmc-boot0', 'is_emmc': True, ...} @pytest.mark.buildconfigspec('cmd_mmc') def test_mmc_info(u_boot_console, env__mmc_rd_config): """Test the "mmc info" command. Args: u_boot_console: A U-Boot console connection. env__mmc_rd_config: The single MMC configuration on which to run the test. See the file-level comment above for details of the format. Returns: Nothing. """ is_emmc = env__mmc_rd_config['is_emmc'] devid = env__mmc_rd_config['devid'] partid = env__mmc_rd_config.get('partid', 0) > info_device = env__mmc_rd_config['info_device'] E KeyError: 'info_device' src/u-boot/test/py/tests/test_mmc_rd.py:151: KeyError

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[U-Boot] [PATCH v1] fdt: Fix mkimage list to try every header type
by Jordan Hand 10 Apr '19

10 Apr '19

Signed-off-by: Jordan Hand <jorhand(a)microsoft.com> --- Image type is not supplied to `mkimage -l`. For this reason, we cannot use imagetool_verify_print_header_by_type. Instead, this patch uses imagetool_verify_print_header to look through all header types to find one where image validation succeeds. This patch fixes failures in test/image/test-imagetools.sh tools/mkimage.c | 23 +++++++++++++++-------- 1 file changed, 15 insertions(+), 8 deletions(-) diff --git a/tools/mkimage.c b/tools/mkimage.c index 2899adff81..d1e1a6743d 100644 --- a/tools/mkimage.c +++ b/tools/mkimage.c @@ -403,14 +403,21 @@ int main(int argc, char **argv) exit (EXIT_FAILURE); } - /* - * scan through mkimage registry for all supported image types - * and verify the input image file header for match - * Print the image information for matched image type - * Returns the error code if not matched - */ - retval = imagetool_verify_print_header_by_type(ptr, &sbuf, - tparams, &params); + if (params.fflag) { + /* + * Verifies the header format based on the expected header for image + * type in tparams + */ + retval = imagetool_verify_print_header_by_type(ptr, &sbuf, + tparams, &params); + } else { + /** + * When listing the image, we are not given the image type. Simply check all + * image types to find one that matches our header + */ + retval = imagetool_verify_print_header(ptr, &sbuf, + tparams, &params); + } (void) munmap((void *)ptr, sbuf.st_size); (void) close (ifd); -- 2.17.1

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Re: [U-Boot] uboot sandbox tracing
by Simon Glass 10 Apr '19

10 Apr '19

Hi Andrzej, On Mon, 1 Apr 2019 at 08:26, Witkowski, Andrzej <andrzej.witkowski(a)intel.com> wrote: > > Hi, > > > > I’m SW Developer at Intel, Poland. > > I try to enable tracing in u-boot to see how it works. > > I follow the procedure described in “doc/README.trace” file. > > Unfortunately, I always receive segmentation fault. > > > > I compile and run u-boot on my development machine with Fedora 28. > > - for the latest u-boot code on master branch I receive segmentation fault (refer to latest_u-boot_master_branch.log in attachment) > > After setting CONFIG_TRACE_EARLY_SIZE to 8725512 in “include/configs/sandbox.h” file, I receive different segmentation fault (refer to latest_u-boot_maseter_branch_1.log in attachment). > > > > What I do wrong? (Please always send emails to the mailing list - it is OK to cc me but it should go to this list. In this instance I'm copying the list in the reply.) I found that the early console conflicts with the early trace buffer, which causes the segfault. Also the early trace buffer as given in sandbox.h is too small (although you got around that one). I've sent some patches to fix this and a few other things I think could be improved. Thanks for the report. Regards, Simon > > > > Andrzej Witkowski > > NSG Poland > > Host Storage SW & FW Development > > > > Intel Technology Poland > > ul. Slowackiego 173 > > 80-298 Gdansk > > Poland > > > > --------------------------------------------------------------------- > Intel Technology Poland sp. z o.o. > ul. S&#322owackiego 173 | 80-298 Gda&#324sk | S&#261d Rejonowy Gda&#324sk P&#243&#322noc | VII Wydzia&#322 Gospodarczy Krajowego Rejestru S&#261dowego - KRS 101882 | NIP 957-07-52-316 | Kapita&#322 zak&#322adowy 200.000 PLN. > > Ta wiadomo&#347&#263 wraz z za&#322&#261cznikami jest przeznaczona dla okre&#347lonego adresata i mo&#380e zawiera&#263 informacje poufne. W razie przypadkowego otrzymania tej wiadomo&#347ci, prosimy o powiadomienie nadawcy oraz trwa&#322e jej usuni&#281cie; jakiekolwiek przegl&#261danie lub rozpowszechnianie jest zabronione. > This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). If you are not the intended recipient, please contact the sender and delete all copies; any review or distribution by others is strictly prohibited.

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[U-Boot] [PATCH 0/6] ARM: meson: Add support for G12A based U200 board
by Neil Armstrong 10 Apr '19

10 Apr '19

This patchset adds basic support for the recent Amlogic G12A SoC family. This SoC family embeds 4xCortex A53 CPUs, and is very similar to the AXG SoC Family with the multimedia features of previous families. This patchset adds : - pinctrl support - clk driver atfer a rework of the drivers files - import Linux 5.1-rc1 G12A & U200 DT files - add board/amlogic/u200 to support the U200 reference design Jerome Brunet (5): pinctrl: meson: add g12a support clk: create meson directory and move related drivers clk: meson: add g12a support ARM: meson: add G12a support boards: meson: add g12a u200 Neil Armstrong (1): ARM: dts: Import Amlogic G12A u200 DT from Linux 5.1-rc1 MAINTAINERS | 2 +- arch/arm/dts/Makefile | 3 +- arch/arm/dts/meson-g12a-u200.dts | 29 + arch/arm/dts/meson-g12a.dtsi | 192 +++ arch/arm/include/asm/arch-meson/clock-g12a.h | 104 ++ arch/arm/include/asm/arch-meson/g12a.h | 66 + arch/arm/mach-meson/Kconfig | 9 +- arch/arm/mach-meson/Makefile | 1 + arch/arm/mach-meson/board-g12a.c | 150 ++ board/amlogic/u200/MAINTAINERS | 5 + board/amlogic/u200/Makefile | 6 + board/amlogic/u200/README | 128 ++ board/amlogic/u200/u200.c | 22 + configs/u200_defconfig | 40 + drivers/clk/Kconfig | 1 + drivers/clk/Makefile | 2 +- drivers/clk/meson/Kconfig | 23 + drivers/clk/meson/Makefile | 9 + drivers/clk/{clk_meson_axg.c => meson/axg.c} | 0 drivers/clk/{ => meson}/clk_meson.h | 0 drivers/clk/meson/g12a.c | 315 ++++ drivers/clk/{clk_meson.c => meson/gxbb.c} | 0 drivers/pinctrl/meson/Kconfig | 4 + drivers/pinctrl/meson/Makefile | 1 + drivers/pinctrl/meson/pinctrl-meson-g12a.c | 1294 +++++++++++++++++ drivers/pinctrl/meson/pinctrl-meson.c | 17 +- drivers/pinctrl/meson/pinctrl-meson.h | 1 + include/dt-bindings/clock/g12a-aoclkc.h | 34 + include/dt-bindings/clock/g12a-clkc.h | 135 ++ include/dt-bindings/gpio/meson-g12a-gpio.h | 114 ++ .../reset/amlogic,meson-g12a-reset.h | 134 ++ include/dt-bindings/reset/g12a-aoclkc.h | 18 + 32 files changed, 2850 insertions(+), 9 deletions(-) create mode 100644 arch/arm/dts/meson-g12a-u200.dts create mode 100644 arch/arm/dts/meson-g12a.dtsi create mode 100644 arch/arm/include/asm/arch-meson/clock-g12a.h create mode 100644 arch/arm/include/asm/arch-meson/g12a.h create mode 100644 arch/arm/mach-meson/board-g12a.c create mode 100644 board/amlogic/u200/MAINTAINERS create mode 100644 board/amlogic/u200/Makefile create mode 100644 board/amlogic/u200/README create mode 100644 board/amlogic/u200/u200.c create mode 100644 configs/u200_defconfig create mode 100644 drivers/clk/meson/Kconfig create mode 100644 drivers/clk/meson/Makefile rename drivers/clk/{clk_meson_axg.c => meson/axg.c} (100%) rename drivers/clk/{ => meson}/clk_meson.h (100%) create mode 100644 drivers/clk/meson/g12a.c rename drivers/clk/{clk_meson.c => meson/gxbb.c} (100%) create mode 100644 drivers/pinctrl/meson/pinctrl-meson-g12a.c create mode 100644 include/dt-bindings/clock/g12a-aoclkc.h create mode 100644 include/dt-bindings/clock/g12a-clkc.h create mode 100644 include/dt-bindings/gpio/meson-g12a-gpio.h create mode 100644 include/dt-bindings/reset/amlogic,meson-g12a-reset.h create mode 100644 include/dt-bindings/reset/g12a-aoclkc.h -- 2.21.0

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[U-Boot] [PATCH] pinctrl: meson: axg: Fix PIN and BANK offsets
by Guillaume La Roque 10 Apr '19

10 Apr '19

Periphs bank offset must be applied on all pins and PMX bank to prevent issue in meson_pinconf_set call. Without offset on pins when a call to pinconf is done meson_gpio_calc_reg_and_bit return wrong offset. To avoid breaking pmx function offset is needed in pmx bank structure too. Signed-off-by: Guillaume La Roque <glaroque(a)baylibre.com> --- drivers/pinctrl/meson/pinctrl-meson-axg.c | 358 +++++++++++----------- 1 file changed, 179 insertions(+), 179 deletions(-) diff --git a/drivers/pinctrl/meson/pinctrl-meson-axg.c b/drivers/pinctrl/meson/pinctrl-meson-axg.c index 3bbbe817b4..8f23c8cef1 100644 --- a/drivers/pinctrl/meson/pinctrl-meson-axg.c +++ b/drivers/pinctrl/meson/pinctrl-meson-axg.c @@ -17,239 +17,239 @@ #define EE_OFF 15 /* emmc */ -static const unsigned int emmc_nand_d0_pins[] = {BOOT_0}; -static const unsigned int emmc_nand_d1_pins[] = {BOOT_1}; -static const unsigned int emmc_nand_d2_pins[] = {BOOT_2}; -static const unsigned int emmc_nand_d3_pins[] = {BOOT_3}; -static const unsigned int emmc_nand_d4_pins[] = {BOOT_4}; -static const unsigned int emmc_nand_d5_pins[] = {BOOT_5}; -static const unsigned int emmc_nand_d6_pins[] = {BOOT_6}; -static const unsigned int emmc_nand_d7_pins[] = {BOOT_7}; - -static const unsigned int emmc_clk_pins[] = {BOOT_8}; -static const unsigned int emmc_cmd_pins[] = {BOOT_10}; -static const unsigned int emmc_ds_pins[] = {BOOT_13}; +static const unsigned int emmc_nand_d0_pins[] = { PIN(BOOT_0, EE_OFF) }; +static const unsigned int emmc_nand_d1_pins[] = { PIN(BOOT_1, EE_OFF) }; +static const unsigned int emmc_nand_d2_pins[] = { PIN(BOOT_2, EE_OFF) }; +static const unsigned int emmc_nand_d3_pins[] = { PIN(BOOT_3, EE_OFF) }; +static const unsigned int emmc_nand_d4_pins[] = { PIN(BOOT_4, EE_OFF) }; +static const unsigned int emmc_nand_d5_pins[] = { PIN(BOOT_5, EE_OFF) }; +static const unsigned int emmc_nand_d6_pins[] = { PIN(BOOT_6, EE_OFF) }; +static const unsigned int emmc_nand_d7_pins[] = { PIN(BOOT_7, EE_OFF) }; + +static const unsigned int emmc_clk_pins[] = { PIN(BOOT_8, EE_OFF) }; +static const unsigned int emmc_cmd_pins[] = { PIN(BOOT_10, EE_OFF) }; +static const unsigned int emmc_ds_pins[] = { PIN(BOOT_13, EE_OFF) }; /* nand */ -static const unsigned int nand_ce0_pins[] = {BOOT_8}; -static const unsigned int nand_ale_pins[] = {BOOT_9}; -static const unsigned int nand_cle_pins[] = {BOOT_10}; -static const unsigned int nand_wen_clk_pins[] = {BOOT_11}; -static const unsigned int nand_ren_wr_pins[] = {BOOT_12}; -static const unsigned int nand_rb0_pins[] = {BOOT_13}; +static const unsigned int nand_ce0_pins[] = { PIN(BOOT_8, EE_OFF) }; +static const unsigned int nand_ale_pins[] = { PIN(BOOT_9, EE_OFF) }; +static const unsigned int nand_cle_pins[] = { PIN(BOOT_10, EE_OFF) }; +static const unsigned int nand_wen_clk_pins[] = { PIN(BOOT_11, EE_OFF) }; +static const unsigned int nand_ren_wr_pins[] = { PIN(BOOT_12, EE_OFF) }; +static const unsigned int nand_rb0_pins[] = { PIN(BOOT_13, EE_OFF) }; /* nor */ -static const unsigned int nor_hold_pins[] = {BOOT_3}; -static const unsigned int nor_d_pins[] = {BOOT_4}; -static const unsigned int nor_q_pins[] = {BOOT_5}; -static const unsigned int nor_c_pins[] = {BOOT_6}; -static const unsigned int nor_wp_pins[] = {BOOT_9}; -static const unsigned int nor_cs_pins[] = {BOOT_14}; +static const unsigned int nor_hold_pins[] = { PIN(BOOT_3, EE_OFF) }; +static const unsigned int nor_d_pins[] = { PIN(BOOT_4, EE_OFF) }; +static const unsigned int nor_q_pins[] = { PIN(BOOT_5, EE_OFF) }; +static const unsigned int nor_c_pins[] = { PIN(BOOT_6, EE_OFF) }; +static const unsigned int nor_wp_pins[] = { PIN(BOOT_9, EE_OFF) }; +static const unsigned int nor_cs_pins[] = { PIN(BOOT_14, EE_OFF) }; /* sdio */ -static const unsigned int sdio_d0_pins[] = {GPIOX_0}; -static const unsigned int sdio_d1_pins[] = {GPIOX_1}; -static const unsigned int sdio_d2_pins[] = {GPIOX_2}; -static const unsigned int sdio_d3_pins[] = {GPIOX_3}; -static const unsigned int sdio_clk_pins[] = {GPIOX_4}; -static const unsigned int sdio_cmd_pins[] = {GPIOX_5}; +static const unsigned int sdio_d0_pins[] = { PIN(GPIOX_0, EE_OFF) }; +static const unsigned int sdio_d1_pins[] = { PIN(GPIOX_1, EE_OFF) }; +static const unsigned int sdio_d2_pins[] = { PIN(GPIOX_2, EE_OFF) }; +static const unsigned int sdio_d3_pins[] = { PIN(GPIOX_3, EE_OFF) }; +static const unsigned int sdio_clk_pins[] = { PIN(GPIOX_4, EE_OFF) }; +static const unsigned int sdio_cmd_pins[] = { PIN(GPIOX_5, EE_OFF) }; /* spi0 */ -static const unsigned int spi0_clk_pins[] = {GPIOZ_0}; -static const unsigned int spi0_mosi_pins[] = {GPIOZ_1}; -static const unsigned int spi0_miso_pins[] = {GPIOZ_2}; -static const unsigned int spi0_ss0_pins[] = {GPIOZ_3}; -static const unsigned int spi0_ss1_pins[] = {GPIOZ_4}; -static const unsigned int spi0_ss2_pins[] = {GPIOZ_5}; +static const unsigned int spi0_clk_pins[] = { PIN(GPIOZ_0, EE_OFF) }; +static const unsigned int spi0_mosi_pins[] = { PIN(GPIOZ_1, EE_OFF) }; +static const unsigned int spi0_miso_pins[] = { PIN(GPIOZ_2, EE_OFF) }; +static const unsigned int spi0_ss0_pins[] = { PIN(GPIOZ_3, EE_OFF) }; +static const unsigned int spi0_ss1_pins[] = { PIN(GPIOZ_4, EE_OFF) }; +static const unsigned int spi0_ss2_pins[] = { PIN(GPIOZ_5, EE_OFF) }; /* spi1 */ -static const unsigned int spi1_clk_x_pins[] = {GPIOX_19}; -static const unsigned int spi1_mosi_x_pins[] = {GPIOX_17}; -static const unsigned int spi1_miso_x_pins[] = {GPIOX_18}; -static const unsigned int spi1_ss0_x_pins[] = {GPIOX_16}; +static const unsigned int spi1_clk_x_pins[] = { PIN(GPIOX_19, EE_OFF) }; +static const unsigned int spi1_mosi_x_pins[] = { PIN(GPIOX_17, EE_OFF) }; +static const unsigned int spi1_miso_x_pins[] = { PIN(GPIOX_18, EE_OFF) }; +static const unsigned int spi1_ss0_x_pins[] = { PIN(GPIOX_16, EE_OFF) }; -static const unsigned int spi1_clk_a_pins[] = {GPIOA_4}; -static const unsigned int spi1_mosi_a_pins[] = {GPIOA_2}; -static const unsigned int spi1_miso_a_pins[] = {GPIOA_3}; -static const unsigned int spi1_ss0_a_pins[] = {GPIOA_5}; -static const unsigned int spi1_ss1_pins[] = {GPIOA_6}; +static const unsigned int spi1_clk_a_pins[] = { PIN(GPIOA_4, EE_OFF) }; +static const unsigned int spi1_mosi_a_pins[] = { PIN(GPIOA_2, EE_OFF) }; +static const unsigned int spi1_miso_a_pins[] = { PIN(GPIOA_3, EE_OFF) }; +static const unsigned int spi1_ss0_a_pins[] = { PIN(GPIOA_5, EE_OFF) }; +static const unsigned int spi1_ss1_pins[] = { PIN(GPIOA_6, EE_OFF) }; /* i2c0 */ -static const unsigned int i2c0_sck_pins[] = {GPIOZ_6}; -static const unsigned int i2c0_sda_pins[] = {GPIOZ_7}; +static const unsigned int i2c0_sck_pins[] = { PIN(GPIOZ_6, EE_OFF) }; +static const unsigned int i2c0_sda_pins[] = { PIN(GPIOZ_7, EE_OFF) }; /* i2c1 */ -static const unsigned int i2c1_sck_z_pins[] = {GPIOZ_8}; -static const unsigned int i2c1_sda_z_pins[] = {GPIOZ_9}; +static const unsigned int i2c1_sck_z_pins[] = { PIN(GPIOZ_8, EE_OFF) }; +static const unsigned int i2c1_sda_z_pins[] = { PIN(GPIOZ_9, EE_OFF) }; -static const unsigned int i2c1_sck_x_pins[] = {GPIOX_16}; -static const unsigned int i2c1_sda_x_pins[] = {GPIOX_17}; +static const unsigned int i2c1_sck_x_pins[] = { PIN(GPIOX_16, EE_OFF) }; +static const unsigned int i2c1_sda_x_pins[] = { PIN(GPIOX_17, EE_OFF) }; /* i2c2 */ -static const unsigned int i2c2_sck_x_pins[] = {GPIOX_18}; -static const unsigned int i2c2_sda_x_pins[] = {GPIOX_19}; +static const unsigned int i2c2_sck_x_pins[] = { PIN(GPIOX_18, EE_OFF) }; +static const unsigned int i2c2_sda_x_pins[] = { PIN(GPIOX_19, EE_OFF) }; -static const unsigned int i2c2_sda_a_pins[] = {GPIOA_17}; -static const unsigned int i2c2_sck_a_pins[] = {GPIOA_18}; +static const unsigned int i2c2_sda_a_pins[] = { PIN(GPIOA_17, EE_OFF) }; +static const unsigned int i2c2_sck_a_pins[] = { PIN(GPIOA_18, EE_OFF) }; /* i2c3 */ -static const unsigned int i2c3_sda_a6_pins[] = {GPIOA_6}; -static const unsigned int i2c3_sck_a7_pins[] = {GPIOA_7}; +static const unsigned int i2c3_sda_a6_pins[] = { PIN(GPIOA_6, EE_OFF) }; +static const unsigned int i2c3_sck_a7_pins[] = { PIN(GPIOA_7, EE_OFF) }; -static const unsigned int i2c3_sda_a12_pins[] = {GPIOA_12}; -static const unsigned int i2c3_sck_a13_pins[] = {GPIOA_13}; +static const unsigned int i2c3_sda_a12_pins[] = { PIN(GPIOA_12, EE_OFF) }; +static const unsigned int i2c3_sck_a13_pins[] = { PIN(GPIOA_13, EE_OFF) }; -static const unsigned int i2c3_sda_a19_pins[] = {GPIOA_19}; -static const unsigned int i2c3_sck_a20_pins[] = {GPIOA_20}; +static const unsigned int i2c3_sda_a19_pins[] = { PIN(GPIOA_19, EE_OFF) }; +static const unsigned int i2c3_sck_a20_pins[] = { PIN(GPIOA_20, EE_OFF) }; /* uart_a */ -static const unsigned int uart_rts_a_pins[] = {GPIOX_11}; -static const unsigned int uart_cts_a_pins[] = {GPIOX_10}; -static const unsigned int uart_tx_a_pins[] = {GPIOX_8}; -static const unsigned int uart_rx_a_pins[] = {GPIOX_9}; +static const unsigned int uart_rts_a_pins[] = { PIN(GPIOX_11, EE_OFF) }; +static const unsigned int uart_cts_a_pins[] = { PIN(GPIOX_10, EE_OFF) }; +static const unsigned int uart_tx_a_pins[] = { PIN(GPIOX_8, EE_OFF) }; +static const unsigned int uart_rx_a_pins[] = { PIN(GPIOX_9, EE_OFF) }; /* uart_b */ -static const unsigned int uart_rts_b_z_pins[] = {GPIOZ_0}; -static const unsigned int uart_cts_b_z_pins[] = {GPIOZ_1}; -static const unsigned int uart_tx_b_z_pins[] = {GPIOZ_2}; -static const unsigned int uart_rx_b_z_pins[] = {GPIOZ_3}; +static const unsigned int uart_rts_b_z_pins[] = { PIN(GPIOZ_0, EE_OFF) }; +static const unsigned int uart_cts_b_z_pins[] = { PIN(GPIOZ_1, EE_OFF) }; +static const unsigned int uart_tx_b_z_pins[] = { PIN(GPIOZ_2, EE_OFF) }; +static const unsigned int uart_rx_b_z_pins[] = { PIN(GPIOZ_3, EE_OFF) }; -static const unsigned int uart_rts_b_x_pins[] = {GPIOX_18}; -static const unsigned int uart_cts_b_x_pins[] = {GPIOX_19}; -static const unsigned int uart_tx_b_x_pins[] = {GPIOX_16}; -static const unsigned int uart_rx_b_x_pins[] = {GPIOX_17}; +static const unsigned int uart_rts_b_x_pins[] = { PIN(GPIOX_18, EE_OFF) }; +static const unsigned int uart_cts_b_x_pins[] = { PIN(GPIOX_19, EE_OFF) }; +static const unsigned int uart_tx_b_x_pins[] = { PIN(GPIOX_16, EE_OFF) }; +static const unsigned int uart_rx_b_x_pins[] = { PIN(GPIOX_17, EE_OFF) }; /* uart_ao_b */ -static const unsigned int uart_ao_tx_b_z_pins[] = {GPIOZ_8}; -static const unsigned int uart_ao_rx_b_z_pins[] = {GPIOZ_9}; -static const unsigned int uart_ao_cts_b_z_pins[] = {GPIOZ_6}; -static const unsigned int uart_ao_rts_b_z_pins[] = {GPIOZ_7}; +static const unsigned int uart_ao_tx_b_z_pins[] = { PIN(GPIOZ_8, EE_OFF) }; +static const unsigned int uart_ao_rx_b_z_pins[] = { PIN(GPIOZ_9, EE_OFF) }; +static const unsigned int uart_ao_cts_b_z_pins[] = { PIN(GPIOZ_6, EE_OFF) }; +static const unsigned int uart_ao_rts_b_z_pins[] = { PIN(GPIOZ_7, EE_OFF) }; /* pwm_a */ -static const unsigned int pwm_a_z_pins[] = {GPIOZ_5}; +static const unsigned int pwm_a_z_pins[] = { PIN(GPIOZ_5, EE_OFF) }; -static const unsigned int pwm_a_x18_pins[] = {GPIOX_18}; -static const unsigned int pwm_a_x20_pins[] = {GPIOX_20}; +static const unsigned int pwm_a_x18_pins[] = { PIN(GPIOX_18, EE_OFF) }; +static const unsigned int pwm_a_x20_pins[] = { PIN(GPIOX_20, EE_OFF) }; -static const unsigned int pwm_a_a_pins[] = {GPIOA_14}; +static const unsigned int pwm_a_a_pins[] = { PIN(GPIOA_14, EE_OFF) }; /* pwm_b */ -static const unsigned int pwm_b_z_pins[] = {GPIOZ_4}; +static const unsigned int pwm_b_z_pins[] = { PIN(GPIOZ_4, EE_OFF) }; -static const unsigned int pwm_b_x_pins[] = {GPIOX_19}; +static const unsigned int pwm_b_x_pins[] = { PIN(GPIOX_19, EE_OFF) }; -static const unsigned int pwm_b_a_pins[] = {GPIOA_15}; +static const unsigned int pwm_b_a_pins[] = { PIN(GPIOA_15, EE_OFF) }; /* pwm_c */ -static const unsigned int pwm_c_x10_pins[] = {GPIOX_10}; -static const unsigned int pwm_c_x17_pins[] = {GPIOX_17}; +static const unsigned int pwm_c_x10_pins[] = { PIN(GPIOX_10, EE_OFF) }; +static const unsigned int pwm_c_x17_pins[] = { PIN(GPIOX_17, EE_OFF) }; -static const unsigned int pwm_c_a_pins[] = {GPIOA_16}; +static const unsigned int pwm_c_a_pins[] = { PIN(GPIOA_16, EE_OFF) }; /* pwm_d */ -static const unsigned int pwm_d_x11_pins[] = {GPIOX_11}; -static const unsigned int pwm_d_x16_pins[] = {GPIOX_16}; +static const unsigned int pwm_d_x11_pins[] = { PIN(GPIOX_11, EE_OFF) }; +static const unsigned int pwm_d_x16_pins[] = { PIN(GPIOX_16, EE_OFF) }; /* pwm_vs */ -static const unsigned int pwm_vs_pins[] = {GPIOA_0}; +static const unsigned int pwm_vs_pins[] = { PIN(GPIOA_0, EE_OFF) }; /* spdif_in */ -static const unsigned int spdif_in_z_pins[] = {GPIOZ_4}; +static const unsigned int spdif_in_z_pins[] = { PIN(GPIOZ_4, EE_OFF) }; -static const unsigned int spdif_in_a1_pins[] = {GPIOA_1}; -static const unsigned int spdif_in_a7_pins[] = {GPIOA_7}; -static const unsigned int spdif_in_a19_pins[] = {GPIOA_19}; -static const unsigned int spdif_in_a20_pins[] = {GPIOA_20}; +static const unsigned int spdif_in_a1_pins[] = { PIN(GPIOA_1, EE_OFF) }; +static const unsigned int spdif_in_a7_pins[] = { PIN(GPIOA_7, EE_OFF) }; +static const unsigned int spdif_in_a19_pins[] = { PIN(GPIOA_19, EE_OFF) }; +static const unsigned int spdif_in_a20_pins[] = { PIN(GPIOA_20, EE_OFF) }; /* spdif_out */ -static const unsigned int spdif_out_z_pins[] = {GPIOZ_5}; +static const unsigned int spdif_out_z_pins[] = { PIN(GPIOZ_5, EE_OFF) }; -static const unsigned int spdif_out_a1_pins[] = {GPIOA_1}; -static const unsigned int spdif_out_a11_pins[] = {GPIOA_11}; -static const unsigned int spdif_out_a19_pins[] = {GPIOA_19}; -static const unsigned int spdif_out_a20_pins[] = {GPIOA_20}; +static const unsigned int spdif_out_a1_pins[] = { PIN(GPIOA_1, EE_OFF) }; +static const unsigned int spdif_out_a11_pins[] = { PIN(GPIOA_11, EE_OFF) }; +static const unsigned int spdif_out_a19_pins[] = { PIN(GPIOA_19, EE_OFF) }; +static const unsigned int spdif_out_a20_pins[] = { PIN(GPIOA_20, EE_OFF) }; /* jtag_ee */ -static const unsigned int jtag_tdo_x_pins[] = {GPIOX_0}; -static const unsigned int jtag_tdi_x_pins[] = {GPIOX_1}; -static const unsigned int jtag_clk_x_pins[] = {GPIOX_4}; -static const unsigned int jtag_tms_x_pins[] = {GPIOX_5}; +static const unsigned int jtag_tdo_x_pins[] = { PIN(GPIOX_0, EE_OFF) }; +static const unsigned int jtag_tdi_x_pins[] = { PIN(GPIOX_1, EE_OFF) }; +static const unsigned int jtag_clk_x_pins[] = { PIN(GPIOX_4, EE_OFF) }; +static const unsigned int jtag_tms_x_pins[] = { PIN(GPIOX_5, EE_OFF) }; /* eth */ -static const unsigned int eth_txd0_x_pins[] = {GPIOX_8}; -static const unsigned int eth_txd1_x_pins[] = {GPIOX_9}; -static const unsigned int eth_txen_x_pins[] = {GPIOX_10}; -static const unsigned int eth_rgmii_rx_clk_x_pins[] = {GPIOX_12}; -static const unsigned int eth_rxd0_x_pins[] = {GPIOX_13}; -static const unsigned int eth_rxd1_x_pins[] = {GPIOX_14}; -static const unsigned int eth_rx_dv_x_pins[] = {GPIOX_15}; -static const unsigned int eth_mdio_x_pins[] = {GPIOX_21}; -static const unsigned int eth_mdc_x_pins[] = {GPIOX_22}; - -static const unsigned int eth_txd0_y_pins[] = {GPIOY_10}; -static const unsigned int eth_txd1_y_pins[] = {GPIOY_11}; -static const unsigned int eth_txen_y_pins[] = {GPIOY_9}; -static const unsigned int eth_rgmii_rx_clk_y_pins[] = {GPIOY_2}; -static const unsigned int eth_rxd0_y_pins[] = {GPIOY_4}; -static const unsigned int eth_rxd1_y_pins[] = {GPIOY_5}; -static const unsigned int eth_rx_dv_y_pins[] = {GPIOY_3}; -static const unsigned int eth_mdio_y_pins[] = {GPIOY_0}; -static const unsigned int eth_mdc_y_pins[] = {GPIOY_1}; - -static const unsigned int eth_rxd2_rgmii_pins[] = {GPIOY_6}; -static const unsigned int eth_rxd3_rgmii_pins[] = {GPIOY_7}; -static const unsigned int eth_rgmii_tx_clk_pins[] = {GPIOY_8}; -static const unsigned int eth_txd2_rgmii_pins[] = {GPIOY_12}; -static const unsigned int eth_txd3_rgmii_pins[] = {GPIOY_13}; +static const unsigned int eth_txd0_x_pins[] = { PIN(GPIOX_8, EE_OFF) }; +static const unsigned int eth_txd1_x_pins[] = { PIN(GPIOX_9, EE_OFF) }; +static const unsigned int eth_txen_x_pins[] = { PIN(GPIOX_10, EE_OFF) }; +static const unsigned int eth_rgmii_rx_clk_x_pins[] = { PIN(GPIOX_12, EE_OFF) }; +static const unsigned int eth_rxd0_x_pins[] = { PIN(GPIOX_13, EE_OFF) }; +static const unsigned int eth_rxd1_x_pins[] = { PIN(GPIOX_14, EE_OFF) }; +static const unsigned int eth_rx_dv_x_pins[] = { PIN(GPIOX_15, EE_OFF) }; +static const unsigned int eth_mdio_x_pins[] = { PIN(GPIOX_21, EE_OFF) }; +static const unsigned int eth_mdc_x_pins[] = { PIN(GPIOX_22, EE_OFF) }; + +static const unsigned int eth_txd0_y_pins[] = { PIN(GPIOY_10, EE_OFF) }; +static const unsigned int eth_txd1_y_pins[] = { PIN(GPIOY_11, EE_OFF) }; +static const unsigned int eth_txen_y_pins[] = { PIN(GPIOY_9, EE_OFF) }; +static const unsigned int eth_rgmii_rx_clk_y_pins[] = { PIN(GPIOY_2, EE_OFF) }; +static const unsigned int eth_rxd0_y_pins[] = { PIN(GPIOY_4, EE_OFF) }; +static const unsigned int eth_rxd1_y_pins[] = { PIN(GPIOY_5, EE_OFF) }; +static const unsigned int eth_rx_dv_y_pins[] = { PIN(GPIOY_3, EE_OFF) }; +static const unsigned int eth_mdio_y_pins[] = { PIN(GPIOY_0, EE_OFF) }; +static const unsigned int eth_mdc_y_pins[] = { PIN(GPIOY_1, EE_OFF) }; + +static const unsigned int eth_rxd2_rgmii_pins[] = { PIN(GPIOY_6, EE_OFF) }; +static const unsigned int eth_rxd3_rgmii_pins[] = { PIN(GPIOY_7, EE_OFF) }; +static const unsigned int eth_rgmii_tx_clk_pins[] = { PIN(GPIOY_8, EE_OFF) }; +static const unsigned int eth_txd2_rgmii_pins[] = { PIN(GPIOY_12, EE_OFF) }; +static const unsigned int eth_txd3_rgmii_pins[] = { PIN(GPIOY_13, EE_OFF) }; /* pdm */ -static const unsigned int pdm_dclk_a14_pins[] = {GPIOA_14}; -static const unsigned int pdm_dclk_a19_pins[] = {GPIOA_19}; -static const unsigned int pdm_din0_pins[] = {GPIOA_15}; -static const unsigned int pdm_din1_pins[] = {GPIOA_16}; -static const unsigned int pdm_din2_pins[] = {GPIOA_17}; -static const unsigned int pdm_din3_pins[] = {GPIOA_18}; +static const unsigned int pdm_dclk_a14_pins[] = { PIN(GPIOA_14, EE_OFF) }; +static const unsigned int pdm_dclk_a19_pins[] = { PIN(GPIOA_19, EE_OFF) }; +static const unsigned int pdm_din0_pins[] = { PIN(GPIOA_15, EE_OFF) }; +static const unsigned int pdm_din1_pins[] = { PIN(GPIOA_16, EE_OFF) }; +static const unsigned int pdm_din2_pins[] = { PIN(GPIOA_17, EE_OFF) }; +static const unsigned int pdm_din3_pins[] = { PIN(GPIOA_18, EE_OFF) }; /* mclk */ -static const unsigned int mclk_c_pins[] = {GPIOA_0}; -static const unsigned int mclk_b_pins[] = {GPIOA_1}; +static const unsigned int mclk_c_pins[] = { PIN(GPIOA_0, EE_OFF) }; +static const unsigned int mclk_b_pins[] = { PIN(GPIOA_1, EE_OFF) }; /* tdm */ -static const unsigned int tdma_sclk_pins[] = {GPIOX_12}; -static const unsigned int tdma_sclk_slv_pins[] = {GPIOX_12}; -static const unsigned int tdma_fs_pins[] = {GPIOX_13}; -static const unsigned int tdma_fs_slv_pins[] = {GPIOX_13}; -static const unsigned int tdma_din0_pins[] = {GPIOX_14}; -static const unsigned int tdma_dout0_x14_pins[] = {GPIOX_14}; -static const unsigned int tdma_dout0_x15_pins[] = {GPIOX_15}; -static const unsigned int tdma_dout1_pins[] = {GPIOX_15}; -static const unsigned int tdma_din1_pins[] = {GPIOX_15}; - -static const unsigned int tdmc_sclk_pins[] = {GPIOA_2}; -static const unsigned int tdmc_sclk_slv_pins[] = {GPIOA_2}; -static const unsigned int tdmc_fs_pins[] = {GPIOA_3}; -static const unsigned int tdmc_fs_slv_pins[] = {GPIOA_3}; -static const unsigned int tdmc_din0_pins[] = {GPIOA_4}; -static const unsigned int tdmc_dout0_pins[] = {GPIOA_4}; -static const unsigned int tdmc_din1_pins[] = {GPIOA_5}; -static const unsigned int tdmc_dout1_pins[] = {GPIOA_5}; -static const unsigned int tdmc_din2_pins[] = {GPIOA_6}; -static const unsigned int tdmc_dout2_pins[] = {GPIOA_6}; -static const unsigned int tdmc_din3_pins[] = {GPIOA_7}; -static const unsigned int tdmc_dout3_pins[] = {GPIOA_7}; - -static const unsigned int tdmb_sclk_pins[] = {GPIOA_8}; -static const unsigned int tdmb_sclk_slv_pins[] = {GPIOA_8}; -static const unsigned int tdmb_fs_pins[] = {GPIOA_9}; -static const unsigned int tdmb_fs_slv_pins[] = {GPIOA_9}; -static const unsigned int tdmb_din0_pins[] = {GPIOA_10}; -static const unsigned int tdmb_dout0_pins[] = {GPIOA_10}; -static const unsigned int tdmb_din1_pins[] = {GPIOA_11}; -static const unsigned int tdmb_dout1_pins[] = {GPIOA_11}; -static const unsigned int tdmb_din2_pins[] = {GPIOA_12}; -static const unsigned int tdmb_dout2_pins[] = {GPIOA_12}; -static const unsigned int tdmb_din3_pins[] = {GPIOA_13}; -static const unsigned int tdmb_dout3_pins[] = {GPIOA_13}; +static const unsigned int tdma_sclk_pins[] = { PIN(GPIOX_12, EE_OFF) }; +static const unsigned int tdma_sclk_slv_pins[] = { PIN(GPIOX_12, EE_OFF) }; +static const unsigned int tdma_fs_pins[] = { PIN(GPIOX_13, EE_OFF) }; +static const unsigned int tdma_fs_slv_pins[] = { PIN(GPIOX_13, EE_OFF) }; +static const unsigned int tdma_din0_pins[] = { PIN(GPIOX_14, EE_OFF) }; +static const unsigned int tdma_dout0_x14_pins[] = { PIN(GPIOX_14, EE_OFF) }; +static const unsigned int tdma_dout0_x15_pins[] = { PIN(GPIOX_15, EE_OFF) }; +static const unsigned int tdma_dout1_pins[] = { PIN(GPIOX_15, EE_OFF) }; +static const unsigned int tdma_din1_pins[] = { PIN(GPIOX_15, EE_OFF) }; + +static const unsigned int tdmc_sclk_pins[] = { PIN(GPIOA_2, EE_OFF) }; +static const unsigned int tdmc_sclk_slv_pins[] = { PIN(GPIOA_2, EE_OFF) }; +static const unsigned int tdmc_fs_pins[] = { PIN(GPIOA_3, EE_OFF) }; +static const unsigned int tdmc_fs_slv_pins[] = { PIN(GPIOA_3, EE_OFF) }; +static const unsigned int tdmc_din0_pins[] = { PIN(GPIOA_4, EE_OFF) }; +static const unsigned int tdmc_dout0_pins[] = { PIN(GPIOA_4, EE_OFF) }; +static const unsigned int tdmc_din1_pins[] = { PIN(GPIOA_5, EE_OFF) }; +static const unsigned int tdmc_dout1_pins[] = { PIN(GPIOA_5, EE_OFF) }; +static const unsigned int tdmc_din2_pins[] = { PIN(GPIOA_6, EE_OFF) }; +static const unsigned int tdmc_dout2_pins[] = { PIN(GPIOA_6, EE_OFF) }; +static const unsigned int tdmc_din3_pins[] = { PIN(GPIOA_7, EE_OFF) }; +static const unsigned int tdmc_dout3_pins[] = { PIN(GPIOA_7, EE_OFF) }; + +static const unsigned int tdmb_sclk_pins[] = { PIN(GPIOA_8, EE_OFF) }; +static const unsigned int tdmb_sclk_slv_pins[] = { PIN(GPIOA_8, EE_OFF) }; +static const unsigned int tdmb_fs_pins[] = { PIN(GPIOA_9, EE_OFF) }; +static const unsigned int tdmb_fs_slv_pins[] = { PIN(GPIOA_9, EE_OFF) }; +static const unsigned int tdmb_din0_pins[] = { PIN(GPIOA_10, EE_OFF) }; +static const unsigned int tdmb_dout0_pins[] = { PIN(GPIOA_10, EE_OFF) }; +static const unsigned int tdmb_din1_pins[] = { PIN(GPIOA_11, EE_OFF) }; +static const unsigned int tdmb_dout1_pins[] = { PIN(GPIOA_11, EE_OFF) }; +static const unsigned int tdmb_din2_pins[] = { PIN(GPIOA_12, EE_OFF) }; +static const unsigned int tdmb_dout2_pins[] = { PIN(GPIOA_12, EE_OFF) }; +static const unsigned int tdmb_din3_pins[] = { PIN(GPIOA_13, EE_OFF) }; +static const unsigned int tdmb_dout3_pins[] = { PIN(GPIOA_13, EE_OFF) }; static struct meson_pmx_group meson_axg_periphs_groups[] = { GPIO_GROUP(GPIOZ_0, EE_OFF), @@ -907,12 +907,12 @@ static struct meson_bank meson_axg_aobus_banks[] = { }; static struct meson_pmx_bank meson_axg_periphs_pmx_banks[] = { - /* name first lask reg offset */ - BANK_PMX("Z", GPIOZ_0, GPIOZ_10, 0x2, 0), - BANK_PMX("BOOT", BOOT_0, BOOT_14, 0x0, 0), - BANK_PMX("A", GPIOA_0, GPIOA_20, 0xb, 0), - BANK_PMX("X", GPIOX_0, GPIOX_22, 0x4, 0), - BANK_PMX("Y", GPIOY_0, GPIOY_15, 0x8, 0), + /* name first last reg offset */ + BANK_PMX("Z", PIN(GPIOZ_0, EE_OFF), PIN(GPIOZ_10, EE_OFF), 0x2, 0), + BANK_PMX("BOOT", PIN(BOOT_0, EE_OFF), PIN(BOOT_14, EE_OFF), 0x0, 0), + BANK_PMX("A", PIN(GPIOA_0, EE_OFF), PIN(GPIOA_20, EE_OFF), 0xb, 0), + BANK_PMX("X", PIN(GPIOX_0, EE_OFF), PIN(GPIOX_22, EE_OFF), 0x4, 0), + BANK_PMX("Y", PIN(GPIOY_0, EE_OFF), PIN(GPIOY_15, EE_OFF), 0x8, 0), }; static struct meson_axg_pmx_data meson_axg_periphs_pmx_banks_data = { @@ -931,7 +931,7 @@ static struct meson_axg_pmx_data meson_axg_aobus_pmx_banks_data = { struct meson_pinctrl_data meson_axg_periphs_pinctrl_data = { .name = "periphs-banks", - .pin_base = 15, + .pin_base = EE_OFF, .groups = meson_axg_periphs_groups, .funcs = meson_axg_periphs_functions, .banks = meson_axg_periphs_banks, -- 2.17.1

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[U-Boot] [PATCH] reset-meson: Add AXG reset compatible
by Neil Armstrong 10 Apr '19

10 Apr '19

Signed-off-by: Neil Armstrong <narmstrong(a)baylibre.com> --- drivers/reset/reset-meson.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/reset/reset-meson.c b/drivers/reset/reset-meson.c index 92f04695ec..31aa4d41e8 100644 --- a/drivers/reset/reset-meson.c +++ b/drivers/reset/reset-meson.c @@ -69,6 +69,7 @@ struct reset_ops meson_reset_ops = { static const struct udevice_id meson_reset_ids[] = { { .compatible = "amlogic,meson-gxbb-reset" }, + { .compatible = "amlogic,meson-axg-reset" }, { } }; -- 2.21.0

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[U-Boot] [PATCH 0/2] ARM: meson: Add support for Libretech-AC
by Neil Armstrong 10 Apr '19

10 Apr '19

LibreTech AC is a single board computer manufactured by Libre Technology with the following specifications: - Amlogic S805X ARM Cortex-A53 quad-core SoC @ 1.2GHz - ARM Mali 450 GPU - 512MiB DDR4 SDRAM - 10/100 Ethernet - HDMI 2.0 4K/60Hz display - 40-pin GPIO header - 4 x USB 2.0 Host - eMMC, SPI NOR Flash - Infrared receiver The u-boot specific code is the same as the P212 support, so use the P212 board support code with a distinct defconfig and config include files. The patchset inports the DT from Linux 5.0 and add the corresponding configs and update the MAINTAINERS files. Neil Armstrong (2): ARM: dts: Import libretech-ac DT from Linux 5.0 boards: Amlogic: Add support for Libretech-AC arch/arm/dts/Makefile | 1 + arch/arm/dts/meson-gxl-s805x-libretech-ac.dts | 248 ++++++++++++++++++ arch/arm/dts/meson-gxl.dtsi | 70 ++++- board/amlogic/p212/MAINTAINERS | 1 + board/amlogic/p212/README.libretech-ac | 103 ++++++++ configs/libretech-ac_defconfig | 74 ++++++ include/configs/libretech-ac.h | 24 ++ 7 files changed, 512 insertions(+), 9 deletions(-) create mode 100644 arch/arm/dts/meson-gxl-s805x-libretech-ac.dts create mode 100644 board/amlogic/p212/README.libretech-ac create mode 100644 configs/libretech-ac_defconfig create mode 100644 include/configs/libretech-ac.h -- 2.21.0

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[U-Boot] [PATCH] i2c: meson: add configurable divider factors
by Guillaume La Roque 10 Apr '19

10 Apr '19

This patch add support for I2C controller in Meson-AXG SoC, Due to the IP changes between I2C controller, we need to introduce a compatible data to make the divider factor configurable. backport from linux: 931b18e92cd0 ("2c: meson: add configurable divider factors") Signed-off-by: Guillaume La Roque <glaroque(a)baylibre.com> --- drivers/i2c/meson_i2c.c | 30 +++++++++++++++++++++++++----- 1 file changed, 25 insertions(+), 5 deletions(-) diff --git a/drivers/i2c/meson_i2c.c b/drivers/i2c/meson_i2c.c index 7d06d95cf3..ee59bac123 100644 --- a/drivers/i2c/meson_i2c.c +++ b/drivers/i2c/meson_i2c.c @@ -41,7 +41,12 @@ struct i2c_regs { u32 tok_rdata1; }; +struct meson_i2c_data { + unsigned char div_factor; +}; + struct meson_i2c { + const struct meson_i2c_data *data; struct clk clk; struct i2c_regs *regs; struct i2c_msg *msg; /* Current I2C message */ @@ -229,7 +234,7 @@ static int meson_i2c_set_bus_speed(struct udevice *bus, unsigned int speed) if (IS_ERR_VALUE(clk_rate)) return -EINVAL; - div = DIV_ROUND_UP(clk_rate, speed * 4); + div = DIV_ROUND_UP(clk_rate, speed * i2c->data->div_factor); /* clock divider has 12 bits */ if (div >= (1 << 12)) { @@ -253,6 +258,8 @@ static int meson_i2c_probe(struct udevice *bus) struct meson_i2c *i2c = dev_get_priv(bus); int ret; + i2c->data = (const struct meson_i2c_data *)dev_get_driver_data(bus); + ret = clk_get_by_index(bus, 0, &i2c->clk); if (ret < 0) return ret; @@ -272,11 +279,24 @@ static const struct dm_i2c_ops meson_i2c_ops = { .set_bus_speed = meson_i2c_set_bus_speed, }; +static const struct meson_i2c_data i2c_meson6_data = { + .div_factor = 4, +}; + +static const struct meson_i2c_data i2c_gxbb_data = { + .div_factor = 4, +}; + +static const struct meson_i2c_data i2c_axg_data = { + .div_factor = 3, +}; + static const struct udevice_id meson_i2c_ids[] = { - { .compatible = "amlogic,meson6-i2c" }, - { .compatible = "amlogic,meson-gx-i2c" }, - { .compatible = "amlogic,meson-gxbb-i2c" }, - { } + {.compatible = "amlogic,meson6-i2c", .data = (ulong)&i2c_meson6_data}, + {.compatible = "amlogic,meson-gx-i2c", .data = (ulong)&i2c_gxbb_data}, + {.compatible = "amlogic,meson-gxbb-i2c", .data = (ulong)&i2c_gxbb_data}, + {.compatible = "amlogic,meson-axg-i2c", .data = (ulong)&i2c_axg_data}, + {} }; U_BOOT_DRIVER(i2c_meson) = { -- 2.17.1

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