December 2019 - U-Boot

[U-Boot] [PATCH 1/4 v4] watchdog: Implement generic watchdog_reset() version
by Stefan Roese 23 Feb '20

23 Feb '20

This patch tries to implement a generic watchdog_reset() function that can be used by all boards that want to service the watchdog device in U-Boot. This watchdog servicing is enabled via CONFIG_WATCHDOG. Without this approach, new boards or platforms needed to implement a board specific version of this functionality, mostly copy'ing the same code over and over again into their board or platforms code base. With this new generic function, the scattered other functions are now removed to be replaced by the generic one. The new version also enables the configuration of the watchdog timeout via the DT "timeout-sec" property (if enabled via CONFIG_OF_CONTROL). This patch also adds a new flag to the GD flags, to flag that the watchdog is ready to use and adds the pointer to the watchdog device to the GD. This enables us to remove the global "watchdog_dev" variable, which was prone to cause problems because of its potentially very early use in watchdog_reset(), even before the BSS is cleared. Signed-off-by: Stefan Roese <sr(a)denx.de> Cc: Heiko Schocher <hs(a)denx.de> Cc: Tom Rini <trini(a)konsulko.com> Cc: Michal Simek <michal.simek(a)xilinx.com> Cc: "Marek Behún" <marek.behun(a)nic.cz> Cc: Daniel Schwierzeck <daniel.schwierzeck(a)gmail.com> Cc: Maxim Sloyko <maxims(a)google.com> Cc: Erik van Luijk <evanluijk(a)interact.nl> Cc: Ryder Lee <ryder.lee(a)mediatek.com> Cc: Weijie Gao <weijie.gao(a)mediatek.com> Cc: Simon Glass <sjg(a)chromium.org> Cc: "Álvaro Fernández Rojas" <noltari(a)gmail.com> Cc: Philippe Reynes <philippe.reynes(a)softathome.com> Cc: Christophe Leroy <christophe.leroy(a)c-s.fr> --- This patch depends on the following patch: [1] watchdog: Handle SPL build with watchdog disabled https://patchwork.ozlabs.org/patch/1074098/ We have a few boards that have CONFIG_WDT (DM watchdog driver) enabled and CONFIG_WATCHDOG (U-Boot watchdog servicing) disabled. This might lead to a watchdog reboot, if the board does not boot fast enough into some OS (like Linux) which services the watchdog. With this patch now, the watchdog is started on all those boards (if found via the DT) and also serviced as this patch also "implies" CONFIG_WATCHDOG. If this is not desired, then please send a patch to disable CONFIG_WATCHDOG for this board. Here the list of those boards with their maintainers: taurus: Heiko Schocher <hs(a)denx.de> smartweb: Heiko Schocher <hs(a)denx.de> ast2500: Maxim Sloyko <maxims(a)google.com> picosam9g45: Erik van Luijk <evanluijk(a)interact.nl> mt7623n_bpir2: Ryder Lee <ryder.lee(a)mediatek.com> Weijie Gao <weijie.gao(a)mediatek.com> mt7629_rfb: Ryder Lee <ryder.lee(a)mediatek.com> Weijie Gao <weijie.gao(a)mediatek.com> bitmain_antminer_s9: Michal Simek <monstr(a)monstr.eu> sandbox64: Simon Glass <sjg(a)chromium.org> sandbox: Simon Glass <sjg(a)chromium.org> comtrend_ct5361_ram: "Álvaro Fernández Rojas" <noltari(a)gmail.com> netgear_cg3100d_ram: "Álvaro Fernández Rojas" <noltari(a)gmail.com> bcm968380gerg_ram: Philippe Reynes <philippe.reynes(a)softathome.com> bcm963158_ram: Philippe Reynes <philippe.reynes(a)softathome.com> bcm968580xref_ram: Philippe Reynes <philippe.reynes(a)softathome.com> MCR3000: Christophe Leroy <christophe.leroy(a)c-s.fr> Thanks, Stefan v4: - No change v3: - Use already available CONFIG_WATCHDOG_TIMEOUT_MSECS option vs the newly introduced WDT_DEFAULT_TIMEOUT default timeout value (if not provided via DT property). - Guard initr_watchdog by CONFIG_WDT instead of CONFIG_WATCHDOG && CONFIG_WDT as suggested by Michal. This makes it possible to enable and start the U-Boot watchdog without enabling the U-Boot watchdog servicing. - Add imply CONFIG_WATCHDOG to CONFIG_WDT, as this restores the current behaviour to use the U-Boot watchdog servicing feature, if the DM watchdog is enabled (CONFIG_WDT). If this is not desired, CONFIG_WATCHDOG can be disabled in the board defconfig. - Remove CONFIG_WATCHDOG from include/configs/turris_omnia.h v2: - Rename watchdog_start() to initr_watchdog() and move it to board_r.c. This way its only called once, after the DM subsystem has bound all watchdog drivers. This enables the use of the currently implemented logic of using the correct watchdog in U-Boot (via alias etc). arch/mips/mach-mt7620/cpu.c | 36 ---------------- board/CZ.NIC/turris_mox/turris_mox.c | 30 -------------- board/CZ.NIC/turris_omnia/turris_omnia.c | 35 ---------------- .../microblaze-generic/microblaze-generic.c | 40 ------------------ board/xilinx/zynq/board.c | 39 ------------------ board/xilinx/zynqmp/zynqmp.c | 39 ------------------ common/board_r.c | 41 +++++++++++++++++++ drivers/watchdog/Kconfig | 1 + drivers/watchdog/wdt-uclass.c | 26 ++++++++++++ include/asm-generic/global_data.h | 4 ++ include/configs/turris_omnia.h | 5 --- 11 files changed, 72 insertions(+), 224 deletions(-) diff --git a/arch/mips/mach-mt7620/cpu.c b/arch/mips/mach-mt7620/cpu.c index fe74f26a54..fcd0484a6d 100644 --- a/arch/mips/mach-mt7620/cpu.c +++ b/arch/mips/mach-mt7620/cpu.c @@ -69,28 +69,6 @@ int print_cpuinfo(void) return 0; } -#ifdef CONFIG_WATCHDOG -static struct udevice *watchdog_dev __attribute__((section(".data"))) = NULL; - -/* Called by macro WATCHDOG_RESET */ -void watchdog_reset(void) -{ - static ulong next_reset; - ulong now; - - if (!watchdog_dev) - return; - - now = get_timer(0); - - /* Do not reset the watchdog too often */ - if (now > next_reset) { - next_reset = now + 1000; /* reset every 1000ms */ - wdt_reset(watchdog_dev); - } -} -#endif - int arch_misc_init(void) { /* @@ -103,19 +81,5 @@ int arch_misc_init(void) flush_dcache_range(gd->bd->bi_memstart, gd->bd->bi_memstart + gd->ram_size - 1); -#ifdef CONFIG_WATCHDOG - /* Init watchdog */ - if (uclass_get_device_by_seq(UCLASS_WDT, 0, &watchdog_dev)) { - debug("Watchdog: Not found by seq!\n"); - if (uclass_get_device(UCLASS_WDT, 0, &watchdog_dev)) { - puts("Watchdog: Not found!\n"); - return 0; - } - } - - wdt_start(watchdog_dev, 60000, 0); /* 60 seconds */ - printf("Watchdog: Started\n"); -#endif - return 0; } diff --git a/board/CZ.NIC/turris_mox/turris_mox.c b/board/CZ.NIC/turris_mox/turris_mox.c index 96cb9c7e5c..8a4872343b 100644 --- a/board/CZ.NIC/turris_mox/turris_mox.c +++ b/board/CZ.NIC/turris_mox/turris_mox.c @@ -119,41 +119,11 @@ int board_fix_fdt(void *blob) } #endif -#ifdef CONFIG_WDT_ARMADA_37XX -static struct udevice *watchdog_dev __attribute__((section(".data"))) = NULL; - -void watchdog_reset(void) -{ - static ulong next_reset; - ulong now; - - if (!watchdog_dev) - return; - - now = timer_get_us(); - - /* Do not reset the watchdog too often */ - if (now > next_reset) { - wdt_reset(watchdog_dev); - next_reset = now + 100000; - } -} -#endif - int board_init(void) { /* address of boot parameters */ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; -#ifdef CONFIG_WDT_ARMADA_37XX - if (uclass_get_device(UCLASS_WDT, 0, &watchdog_dev)) { - printf("Cannot find Armada 3720 watchdog!\n"); - } else { - printf("Enabling Armada 3720 watchdog (3 minutes timeout).\n"); - wdt_start(watchdog_dev, 180000, 0); - } -#endif - return 0; } diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c b/board/CZ.NIC/turris_omnia/turris_omnia.c index c7f6479a0c..8101cfd88a 100644 --- a/board/CZ.NIC/turris_omnia/turris_omnia.c +++ b/board/CZ.NIC/turris_omnia/turris_omnia.c @@ -364,25 +364,12 @@ static bool disable_mcu_watchdog(void) } #endif -#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT_ORION) -static struct udevice *watchdog_dev __attribute__((section(".data"))) = NULL; -#endif - int board_init(void) { /* adress of boot parameters */ gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100; #ifndef CONFIG_SPL_BUILD -# ifdef CONFIG_WDT_ORION - if (uclass_get_device(UCLASS_WDT, 0, &watchdog_dev)) { - puts("Cannot find Armada 385 watchdog!\n"); - } else { - puts("Enabling Armada 385 watchdog.\n"); - wdt_start(watchdog_dev, (u32) 25000000 * 120, 0); - } -# endif - if (disable_mcu_watchdog()) puts("Disabled MCU startup watchdog.\n"); @@ -392,28 +379,6 @@ int board_init(void) return 0; } -#ifdef CONFIG_WATCHDOG -/* Called by macro WATCHDOG_RESET */ -void watchdog_reset(void) -{ -# if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT_ORION) - static ulong next_reset = 0; - ulong now; - - if (!watchdog_dev) - return; - - now = timer_get_us(); - - /* Do not reset the watchdog too often */ - if (now > next_reset) { - wdt_reset(watchdog_dev); - next_reset = now + 1000; - } -# endif -} -#endif - int board_late_init(void) { #ifndef CONFIG_SPL_BUILD diff --git a/board/xilinx/microblaze-generic/microblaze-generic.c b/board/xilinx/microblaze-generic/microblaze-generic.c index 28c9efa3a2..ba82292e35 100644 --- a/board/xilinx/microblaze-generic/microblaze-generic.c +++ b/board/xilinx/microblaze-generic/microblaze-generic.c @@ -24,10 +24,6 @@ DECLARE_GLOBAL_DATA_PTR; -#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT) -static struct udevice *watchdog_dev __attribute__((section(".data"))) = NULL; -#endif /* !CONFIG_SPL_BUILD && CONFIG_WDT */ - ulong ram_base; int dram_init_banksize(void) @@ -43,44 +39,8 @@ int dram_init(void) return 0; }; -#ifdef CONFIG_WDT -/* Called by macro WATCHDOG_RESET */ -void watchdog_reset(void) -{ -#if !defined(CONFIG_SPL_BUILD) - ulong now; - static ulong next_reset; - - if (!watchdog_dev) - return; - - now = timer_get_us(); - - /* Do not reset the watchdog too often */ - if (now > next_reset) { - wdt_reset(watchdog_dev); - next_reset = now + 1000; - } -#endif /* !CONFIG_SPL_BUILD */ -} -#endif /* CONFIG_WDT */ - int board_late_init(void) { -#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT) - watchdog_dev = NULL; - - if (uclass_get_device_by_seq(UCLASS_WDT, 0, &watchdog_dev)) { - debug("Watchdog: Not found by seq!\n"); - if (uclass_get_device(UCLASS_WDT, 0, &watchdog_dev)) { - puts("Watchdog: Not found!\n"); - return 0; - } - } - - wdt_start(watchdog_dev, 0, 0); - puts("Watchdog: Started\n"); -#endif /* !CONFIG_SPL_BUILD && CONFIG_WDT */ #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_SYSRESET_MICROBLAZE) int ret; diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c index ea26aad16f..6857f2c0b8 100644 --- a/board/xilinx/zynq/board.c +++ b/board/xilinx/zynq/board.c @@ -18,10 +18,6 @@ DECLARE_GLOBAL_DATA_PTR; -#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT) -static struct udevice *watchdog_dev __attribute__((section(".data"))) = NULL; -#endif - #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_BOARD_EARLY_INIT_F) int board_early_init_f(void) { @@ -31,19 +27,6 @@ int board_early_init_f(void) int board_init(void) { -#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT) - if (uclass_get_device_by_seq(UCLASS_WDT, 0, &watchdog_dev)) { - debug("Watchdog: Not found by seq!\n"); - if (uclass_get_device(UCLASS_WDT, 0, &watchdog_dev)) { - puts("Watchdog: Not found!\n"); - return 0; - } - } - - wdt_start(watchdog_dev, 0, 0); - puts("Watchdog: Started\n"); -# endif - return 0; } @@ -127,25 +110,3 @@ int dram_init(void) return 0; } #endif - -#if defined(CONFIG_WATCHDOG) -/* Called by macro WATCHDOG_RESET */ -void watchdog_reset(void) -{ -# if !defined(CONFIG_SPL_BUILD) - static ulong next_reset; - ulong now; - - if (!watchdog_dev) - return; - - now = timer_get_us(); - - /* Do not reset the watchdog too often */ - if (now > next_reset) { - wdt_reset(watchdog_dev); - next_reset = now + 1000; - } -# endif -} -#endif diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index db27247850..1c12891b82 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -24,10 +24,6 @@ DECLARE_GLOBAL_DATA_PTR; -#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT) -static struct udevice *watchdog_dev __attribute__((section(".data"))) = NULL; -#endif - #if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ZYNQMPPL) && \ !defined(CONFIG_SPL_BUILD) static xilinx_desc zynqmppl = XILINX_ZYNQMP_DESC; @@ -340,44 +336,9 @@ int board_init(void) } #endif -#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT) - if (uclass_get_device_by_seq(UCLASS_WDT, 0, &watchdog_dev)) { - debug("Watchdog: Not found by seq!\n"); - if (uclass_get_device(UCLASS_WDT, 0, &watchdog_dev)) { - puts("Watchdog: Not found!\n"); - return 0; - } - } - - wdt_start(watchdog_dev, 0, 0); - puts("Watchdog: Started\n"); -#endif - return 0; } -#ifdef CONFIG_WATCHDOG -/* Called by macro WATCHDOG_RESET */ -void watchdog_reset(void) -{ -# if !defined(CONFIG_SPL_BUILD) - static ulong next_reset; - ulong now; - - if (!watchdog_dev) - return; - - now = timer_get_us(); - - /* Do not reset the watchdog too often */ - if (now > next_reset) { - wdt_reset(watchdog_dev); - next_reset = now + 1000; - } -# endif -} -#endif - int board_early_init_r(void) { u32 val; diff --git a/common/board_r.c b/common/board_r.c index 472987d5d5..d457b6715f 100644 --- a/common/board_r.c +++ b/common/board_r.c @@ -48,6 +48,7 @@ #include <linux/compiler.h> #include <linux/err.h> #include <efi_loader.h> +#include <wdt.h> DECLARE_GLOBAL_DATA_PTR; @@ -621,6 +622,43 @@ static int initr_bedbug(void) } #endif +#if defined(CONFIG_WDT) +#ifndef CONFIG_WATCHDOG_TIMEOUT_MSECS +#define CONFIG_WATCHDOG_TIMEOUT_MSECS (60 * 1000) +#endif +#define WATCHDOG_TIMEOUT_SECS (CONFIG_WATCHDOG_TIMEOUT_MSECS / 1000) + +static int initr_watchdog(void) +{ + u32 timeout = WATCHDOG_TIMEOUT_SECS; + + /* + * Init watchdog: This will call the probe function of the + * watchdog driver, enabling the use of the device + */ + if (uclass_get_device_by_seq(UCLASS_WDT, 0, + (struct udevice **)&gd->watchdog_dev)) { + debug("WDT: Not found by seq!\n"); + if (uclass_get_device(UCLASS_WDT, 0, + (struct udevice **)&gd->watchdog_dev)) { + printf("WDT: Not found!\n"); + return 0; + } + } + + if (CONFIG_IS_ENABLED(OF_CONTROL)) { + timeout = dev_read_u32_default(gd->watchdog_dev, "timeout-sec", + WATCHDOG_TIMEOUT_SECS); + } + + wdt_start(gd->watchdog_dev, timeout * 1000, 0); + gd->flags |= GD_FLG_WDT_READY; + printf("WDT: Started (%ds timeout)\n", timeout); + + return 0; +} +#endif + static int run_main_loop(void) { #ifdef CONFIG_SANDBOX @@ -670,6 +708,9 @@ static init_fnc_t init_sequence_r[] = { #ifdef CONFIG_DM initr_dm, #endif +#if defined(CONFIG_WDT) + initr_watchdog, +#endif #if defined(CONFIG_ARM) || defined(CONFIG_NDS32) || defined(CONFIG_RISCV) || \ defined(CONFIG_SANDBOX) board_init, /* Setup chipselects */ diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index 34e78beb2a..82080d3867 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -51,6 +51,7 @@ config ULP_WATCHDOG config WDT bool "Enable driver model for watchdog timer drivers" depends on DM + imply WATCHDOG help Enable driver model for watchdog timer. At the moment the API is very simple and only supports four operations: diff --git a/drivers/watchdog/wdt-uclass.c b/drivers/watchdog/wdt-uclass.c index 23b7e3360d..bbfac4f0f9 100644 --- a/drivers/watchdog/wdt-uclass.c +++ b/drivers/watchdog/wdt-uclass.c @@ -10,6 +10,8 @@ #include <dm/device-internal.h> #include <dm/lists.h> +DECLARE_GLOBAL_DATA_PTR; + int wdt_start(struct udevice *dev, u64 timeout_ms, ulong flags) { const struct wdt_ops *ops = device_get_ops(dev); @@ -63,6 +65,30 @@ int wdt_expire_now(struct udevice *dev, ulong flags) return ret; } +#if defined(CONFIG_WATCHDOG) +/* + * Called by macro WATCHDOG_RESET. This function be called *very* early, + * so we need to make sure, that the watchdog driver is ready before using + * it in this function. + */ +void watchdog_reset(void) +{ + static ulong next_reset; + ulong now; + + /* Exit if GD is not ready or watchdog is not initialized yet */ + if (!gd || !(gd->flags & GD_FLG_WDT_READY)) + return; + + /* Do not reset the watchdog too often */ + now = get_timer(0); + if (now > next_reset) { + next_reset = now + 1000; /* reset every 1000ms */ + wdt_reset(gd->watchdog_dev); + } +} +#endif + static int wdt_post_bind(struct udevice *dev) { #if defined(CONFIG_NEEDS_MANUAL_RELOC) diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h index 78dcf40bff..d16f50f677 100644 --- a/include/asm-generic/global_data.h +++ b/include/asm-generic/global_data.h @@ -133,6 +133,9 @@ typedef struct global_data { struct spl_handoff *spl_handoff; # endif #endif +#if defined(CONFIG_WDT) + struct udevice *watchdog_dev; +#endif } gd_t; #endif @@ -161,5 +164,6 @@ typedef struct global_data { #define GD_FLG_ENV_DEFAULT 0x02000 /* Default variable flag */ #define GD_FLG_SPL_EARLY_INIT 0x04000 /* Early SPL init is done */ #define GD_FLG_LOG_READY 0x08000 /* Log system is ready for use */ +#define GD_FLG_WDT_READY 0x10000 /* Watchdog is ready for use */ #endif /* __ASM_GENERIC_GBL_DATA_H */ diff --git a/include/configs/turris_omnia.h b/include/configs/turris_omnia.h index 038f6398eb..78e3cf2ff4 100644 --- a/include/configs/turris_omnia.h +++ b/include/configs/turris_omnia.h @@ -29,11 +29,6 @@ #define CONFIG_SPL_I2C_MUX #define CONFIG_SYS_I2C_MVTWSI -/* Watchdog support */ -#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT_ORION) -# define CONFIG_WATCHDOG -#endif - /* SPI NOR flash default params, used by sf commands */ #define CONFIG_SPI_FLASH_SPANSION -- 2.21.0

3 9

[U-Boot] [PATCH 1/4 v5] watchdog: Implement generic watchdog_reset() version
by Stefan Roese 20 Feb '20

20 Feb '20

This patch tries to implement a generic watchdog_reset() function that can be used by all boards that want to service the watchdog device in U-Boot. This watchdog servicing is enabled via CONFIG_WATCHDOG. Without this approach, new boards or platforms needed to implement a board specific version of this functionality, mostly copy'ing the same code over and over again into their board or platforms code base. With this new generic function, the scattered other functions are now removed to be replaced by the generic one. The new version also enables the configuration of the watchdog timeout via the DT "timeout-sec" property (if enabled via CONFIG_OF_CONTROL). This patch also adds a new flag to the GD flags, to flag that the watchdog is ready to use and adds the pointer to the watchdog device to the GD. This enables us to remove the global "watchdog_dev" variable, which was prone to cause problems because of its potentially very early use in watchdog_reset(), even before the BSS is cleared. Signed-off-by: Stefan Roese <sr(a)denx.de> Cc: Heiko Schocher <hs(a)denx.de> Cc: Tom Rini <trini(a)konsulko.com> Cc: Michal Simek <michal.simek(a)xilinx.com> Cc: "Marek Behún" <marek.behun(a)nic.cz> Cc: Daniel Schwierzeck <daniel.schwierzeck(a)gmail.com> Cc: Maxim Sloyko <maxims(a)google.com> Cc: Erik van Luijk <evanluijk(a)interact.nl> Cc: Ryder Lee <ryder.lee(a)mediatek.com> Cc: Weijie Gao <weijie.gao(a)mediatek.com> Cc: Simon Glass <sjg(a)chromium.org> Cc: "Álvaro Fernández Rojas" <noltari(a)gmail.com> Cc: Philippe Reynes <philippe.reynes(a)softathome.com> Cc: Christophe Leroy <christophe.leroy(a)c-s.fr> Cc: Chris Packham <chris.packham(a)alliedtelesis.co.nz> Reviewed-by: Michal Simek <michal.simek(a)xilinx.com> Tested-by: Michal Simek <michal.simek(a)xilinx.com> (on zcu100) --- We have a few boards that have CONFIG_WDT (DM watchdog driver) enabled and CONFIG_WATCHDOG (U-Boot watchdog servicing) disabled. This might lead to a watchdog reboot, if the board does not boot fast enough into some OS (like Linux) which services the watchdog. With this patch now, the watchdog is started on all those boards (if found via the DT) and also serviced as this patch also "implies" CONFIG_WATCHDOG. If this is not desired, then please send a patch to disable CONFIG_WATCHDOG for this board. Here the list of those boards with their maintainers: taurus: Heiko Schocher <hs(a)denx.de> smartweb: Heiko Schocher <hs(a)denx.de> ast2500: Maxim Sloyko <maxims(a)google.com> picosam9g45: Erik van Luijk <evanluijk(a)interact.nl> mt7623n_bpir2: Ryder Lee <ryder.lee(a)mediatek.com> Weijie Gao <weijie.gao(a)mediatek.com> mt7629_rfb: Ryder Lee <ryder.lee(a)mediatek.com> Weijie Gao <weijie.gao(a)mediatek.com> bitmain_antminer_s9: Michal Simek <monstr(a)monstr.eu> sandbox64: Simon Glass <sjg(a)chromium.org> sandbox: Simon Glass <sjg(a)chromium.org> comtrend_ct5361_ram: "Álvaro Fernández Rojas" <noltari(a)gmail.com> netgear_cg3100d_ram: "Álvaro Fernández Rojas" <noltari(a)gmail.com> bcm968380gerg_ram: Philippe Reynes <philippe.reynes(a)softathome.com> bcm963158_ram: Philippe Reynes <philippe.reynes(a)softathome.com> bcm968580xref_ram: Philippe Reynes <philippe.reynes(a)softathome.com> MCR3000: Christophe Leroy <christophe.leroy(a)c-s.fr> Thanks, Stefan v5: - Remove board specific x530 watchdog support and implement this in this generic apprioach as well. For this, we need to support the watchdog in SPL now. Move the watchdog init function initr_watchdog() into wdt.h to not duplicate this code. v4: - No change v3: - Use already available CONFIG_WATCHDOG_TIMEOUT_MSECS option vs the newly introduced WDT_DEFAULT_TIMEOUT default timeout value (if not provided via DT property). - Guard initr_watchdog by CONFIG_WDT instead of CONFIG_WATCHDOG && CONFIG_WDT as suggested by Michal. This makes it possible to enable and start the U-Boot watchdog without enabling the U-Boot watchdog servicing. - Add imply CONFIG_WATCHDOG to CONFIG_WDT, as this restores the current behaviour to use the U-Boot watchdog servicing feature, if the DM watchdog is enabled (CONFIG_WDT). If this is not desired, CONFIG_WATCHDOG can be disabled in the board defconfig. - Remove CONFIG_WATCHDOG from include/configs/turris_omnia.h v2: - Rename watchdog_start() to initr_watchdog() and move it to board_r.c. This way its only called once, after the DM subsystem has bound all watchdog drivers. This enables the use of the currently implemented logic of using the correct watchdog in U-Boot (via alias etc). arch/mips/mach-mt7620/cpu.c | 36 ---------------- board/CZ.NIC/turris_mox/turris_mox.c | 30 -------------- board/CZ.NIC/turris_omnia/turris_omnia.c | 35 ---------------- board/alliedtelesis/x530/x530.c | 36 +--------------- .../microblaze-generic/microblaze-generic.c | 40 ------------------ board/xilinx/zynq/board.c | 39 ------------------ board/xilinx/zynqmp/zynqmp.c | 39 ------------------ common/board_r.c | 4 ++ common/spl/spl.c | 5 +++ drivers/watchdog/Kconfig | 1 + drivers/watchdog/wdt-uclass.c | 26 ++++++++++++ include/asm-generic/global_data.h | 4 ++ include/configs/turris_omnia.h | 5 --- include/wdt.h | 41 +++++++++++++++++++ 14 files changed, 82 insertions(+), 259 deletions(-) diff --git a/arch/mips/mach-mt7620/cpu.c b/arch/mips/mach-mt7620/cpu.c index fe74f26a54..fcd0484a6d 100644 --- a/arch/mips/mach-mt7620/cpu.c +++ b/arch/mips/mach-mt7620/cpu.c @@ -69,28 +69,6 @@ int print_cpuinfo(void) return 0; } -#ifdef CONFIG_WATCHDOG -static struct udevice *watchdog_dev __attribute__((section(".data"))) = NULL; - -/* Called by macro WATCHDOG_RESET */ -void watchdog_reset(void) -{ - static ulong next_reset; - ulong now; - - if (!watchdog_dev) - return; - - now = get_timer(0); - - /* Do not reset the watchdog too often */ - if (now > next_reset) { - next_reset = now + 1000; /* reset every 1000ms */ - wdt_reset(watchdog_dev); - } -} -#endif - int arch_misc_init(void) { /* @@ -103,19 +81,5 @@ int arch_misc_init(void) flush_dcache_range(gd->bd->bi_memstart, gd->bd->bi_memstart + gd->ram_size - 1); -#ifdef CONFIG_WATCHDOG - /* Init watchdog */ - if (uclass_get_device_by_seq(UCLASS_WDT, 0, &watchdog_dev)) { - debug("Watchdog: Not found by seq!\n"); - if (uclass_get_device(UCLASS_WDT, 0, &watchdog_dev)) { - puts("Watchdog: Not found!\n"); - return 0; - } - } - - wdt_start(watchdog_dev, 60000, 0); /* 60 seconds */ - printf("Watchdog: Started\n"); -#endif - return 0; } diff --git a/board/CZ.NIC/turris_mox/turris_mox.c b/board/CZ.NIC/turris_mox/turris_mox.c index 96cb9c7e5c..8a4872343b 100644 --- a/board/CZ.NIC/turris_mox/turris_mox.c +++ b/board/CZ.NIC/turris_mox/turris_mox.c @@ -119,41 +119,11 @@ int board_fix_fdt(void *blob) } #endif -#ifdef CONFIG_WDT_ARMADA_37XX -static struct udevice *watchdog_dev __attribute__((section(".data"))) = NULL; - -void watchdog_reset(void) -{ - static ulong next_reset; - ulong now; - - if (!watchdog_dev) - return; - - now = timer_get_us(); - - /* Do not reset the watchdog too often */ - if (now > next_reset) { - wdt_reset(watchdog_dev); - next_reset = now + 100000; - } -} -#endif - int board_init(void) { /* address of boot parameters */ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; -#ifdef CONFIG_WDT_ARMADA_37XX - if (uclass_get_device(UCLASS_WDT, 0, &watchdog_dev)) { - printf("Cannot find Armada 3720 watchdog!\n"); - } else { - printf("Enabling Armada 3720 watchdog (3 minutes timeout).\n"); - wdt_start(watchdog_dev, 180000, 0); - } -#endif - return 0; } diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c b/board/CZ.NIC/turris_omnia/turris_omnia.c index 0287f23283..4c08f810a2 100644 --- a/board/CZ.NIC/turris_omnia/turris_omnia.c +++ b/board/CZ.NIC/turris_omnia/turris_omnia.c @@ -364,25 +364,12 @@ static bool disable_mcu_watchdog(void) } #endif -#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT_ORION) -static struct udevice *watchdog_dev __attribute__((section(".data"))) = NULL; -#endif - int board_init(void) { /* adress of boot parameters */ gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100; #ifndef CONFIG_SPL_BUILD -# ifdef CONFIG_WDT_ORION - if (uclass_get_device(UCLASS_WDT, 0, &watchdog_dev)) { - puts("Cannot find Armada 385 watchdog!\n"); - } else { - puts("Enabling Armada 385 watchdog.\n"); - wdt_start(watchdog_dev, 120000, 0); - } -# endif - if (disable_mcu_watchdog()) puts("Disabled MCU startup watchdog.\n"); @@ -392,28 +379,6 @@ int board_init(void) return 0; } -#ifdef CONFIG_WATCHDOG -/* Called by macro WATCHDOG_RESET */ -void watchdog_reset(void) -{ -# if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT_ORION) - static ulong next_reset = 0; - ulong now; - - if (!watchdog_dev) - return; - - now = timer_get_us(); - - /* Do not reset the watchdog too often */ - if (now > next_reset) { - wdt_reset(watchdog_dev); - next_reset = now + 1000; - } -# endif -} -#endif - int board_late_init(void) { #ifndef CONFIG_SPL_BUILD diff --git a/board/alliedtelesis/x530/x530.c b/board/alliedtelesis/x530/x530.c index 6934fd8017..97dbed79dd 100644 --- a/board/alliedtelesis/x530/x530.c +++ b/board/alliedtelesis/x530/x530.c @@ -25,10 +25,6 @@ DECLARE_GLOBAL_DATA_PTR; #define CONFIG_NVS_LOCATION 0xf4800000 #define CONFIG_NVS_SIZE (512 << 10) -#ifdef CONFIG_WATCHDOG -static struct udevice *watchdog_dev; -#endif - static struct serdes_map board_serdes_map[] = { {PEX0, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0}, {DEFAULT_SERDES, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0}, @@ -80,10 +76,6 @@ struct mv_ddr_topology_map *mv_ddr_topology_map_get(void) int board_early_init_f(void) { -#ifdef CONFIG_WATCHDOG - watchdog_dev = NULL; -#endif - /* Configure MPP */ writel(0x00001111, MVEBU_MPP_BASE + 0x00); writel(0x00000000, MVEBU_MPP_BASE + 0x04); @@ -99,13 +91,6 @@ int board_early_init_f(void) void spl_board_init(void) { -#ifdef CONFIG_WATCHDOG - int ret; - - ret = uclass_get_device(UCLASS_WDT, 0, &watchdog_dev); - if (!ret) - wdt_start(watchdog_dev, 120000, 0); -#endif } int board_init(void) @@ -128,29 +113,10 @@ int board_init(void) void arch_preboot_os(void) { #ifdef CONFIG_WATCHDOG - wdt_stop(watchdog_dev); + wdt_stop(gd->watchdog_dev); #endif } -#ifdef CONFIG_WATCHDOG -void watchdog_reset(void) -{ - static ulong next_reset = 0; - ulong now; - - if (!watchdog_dev) - return; - - now = timer_get_us(); - - /* Do not reset the watchdog too often */ - if (now > next_reset) { - wdt_reset(watchdog_dev); - next_reset = now + 1000; - } -} -#endif - static int led_7seg_init(unsigned int segments) { int node; diff --git a/board/xilinx/microblaze-generic/microblaze-generic.c b/board/xilinx/microblaze-generic/microblaze-generic.c index 28c9efa3a2..ba82292e35 100644 --- a/board/xilinx/microblaze-generic/microblaze-generic.c +++ b/board/xilinx/microblaze-generic/microblaze-generic.c @@ -24,10 +24,6 @@ DECLARE_GLOBAL_DATA_PTR; -#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT) -static struct udevice *watchdog_dev __attribute__((section(".data"))) = NULL; -#endif /* !CONFIG_SPL_BUILD && CONFIG_WDT */ - ulong ram_base; int dram_init_banksize(void) @@ -43,44 +39,8 @@ int dram_init(void) return 0; }; -#ifdef CONFIG_WDT -/* Called by macro WATCHDOG_RESET */ -void watchdog_reset(void) -{ -#if !defined(CONFIG_SPL_BUILD) - ulong now; - static ulong next_reset; - - if (!watchdog_dev) - return; - - now = timer_get_us(); - - /* Do not reset the watchdog too often */ - if (now > next_reset) { - wdt_reset(watchdog_dev); - next_reset = now + 1000; - } -#endif /* !CONFIG_SPL_BUILD */ -} -#endif /* CONFIG_WDT */ - int board_late_init(void) { -#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT) - watchdog_dev = NULL; - - if (uclass_get_device_by_seq(UCLASS_WDT, 0, &watchdog_dev)) { - debug("Watchdog: Not found by seq!\n"); - if (uclass_get_device(UCLASS_WDT, 0, &watchdog_dev)) { - puts("Watchdog: Not found!\n"); - return 0; - } - } - - wdt_start(watchdog_dev, 0, 0); - puts("Watchdog: Started\n"); -#endif /* !CONFIG_SPL_BUILD && CONFIG_WDT */ #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_SYSRESET_MICROBLAZE) int ret; diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c index ea26aad16f..6857f2c0b8 100644 --- a/board/xilinx/zynq/board.c +++ b/board/xilinx/zynq/board.c @@ -18,10 +18,6 @@ DECLARE_GLOBAL_DATA_PTR; -#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT) -static struct udevice *watchdog_dev __attribute__((section(".data"))) = NULL; -#endif - #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_BOARD_EARLY_INIT_F) int board_early_init_f(void) { @@ -31,19 +27,6 @@ int board_early_init_f(void) int board_init(void) { -#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT) - if (uclass_get_device_by_seq(UCLASS_WDT, 0, &watchdog_dev)) { - debug("Watchdog: Not found by seq!\n"); - if (uclass_get_device(UCLASS_WDT, 0, &watchdog_dev)) { - puts("Watchdog: Not found!\n"); - return 0; - } - } - - wdt_start(watchdog_dev, 0, 0); - puts("Watchdog: Started\n"); -# endif - return 0; } @@ -127,25 +110,3 @@ int dram_init(void) return 0; } #endif - -#if defined(CONFIG_WATCHDOG) -/* Called by macro WATCHDOG_RESET */ -void watchdog_reset(void) -{ -# if !defined(CONFIG_SPL_BUILD) - static ulong next_reset; - ulong now; - - if (!watchdog_dev) - return; - - now = timer_get_us(); - - /* Do not reset the watchdog too often */ - if (now > next_reset) { - wdt_reset(watchdog_dev); - next_reset = now + 1000; - } -# endif -} -#endif diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index 5189925beb..c840e92d9c 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -24,10 +24,6 @@ DECLARE_GLOBAL_DATA_PTR; -#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT) -static struct udevice *watchdog_dev __attribute__((section(".data"))) = NULL; -#endif - #if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ZYNQMPPL) && \ !defined(CONFIG_SPL_BUILD) static xilinx_desc zynqmppl = XILINX_ZYNQMP_DESC; @@ -344,44 +340,9 @@ int board_init(void) } #endif -#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT) - if (uclass_get_device_by_seq(UCLASS_WDT, 0, &watchdog_dev)) { - debug("Watchdog: Not found by seq!\n"); - if (uclass_get_device(UCLASS_WDT, 0, &watchdog_dev)) { - puts("Watchdog: Not found!\n"); - return 0; - } - } - - wdt_start(watchdog_dev, 0, 0); - puts("Watchdog: Started\n"); -#endif - return 0; } -#ifdef CONFIG_WATCHDOG -/* Called by macro WATCHDOG_RESET */ -void watchdog_reset(void) -{ -# if !defined(CONFIG_SPL_BUILD) - static ulong next_reset; - ulong now; - - if (!watchdog_dev) - return; - - now = timer_get_us(); - - /* Do not reset the watchdog too often */ - if (now > next_reset) { - wdt_reset(watchdog_dev); - next_reset = now + 1000; - } -# endif -} -#endif - int board_early_init_r(void) { u32 val; diff --git a/common/board_r.c b/common/board_r.c index 1ad44bbe3f..150e8cd424 100644 --- a/common/board_r.c +++ b/common/board_r.c @@ -48,6 +48,7 @@ #include <linux/compiler.h> #include <linux/err.h> #include <efi_loader.h> +#include <wdt.h> DECLARE_GLOBAL_DATA_PTR; @@ -677,6 +678,9 @@ static init_fnc_t init_sequence_r[] = { #ifdef CONFIG_DM initr_dm, #endif +#if defined(CONFIG_WDT) + initr_watchdog, +#endif #if defined(CONFIG_ARM) || defined(CONFIG_NDS32) || defined(CONFIG_RISCV) || \ defined(CONFIG_SANDBOX) board_init, /* Setup chipselects */ diff --git a/common/spl/spl.c b/common/spl/spl.c index 88d4b8a9bf..0a6a47c202 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -22,6 +22,7 @@ #include <linux/compiler.h> #include <fdt_support.h> #include <bootcount.h> +#include <wdt.h> DECLARE_GLOBAL_DATA_PTR; @@ -600,6 +601,10 @@ void board_init_r(gd_t *dummy1, ulong dummy2) spl_board_init(); #endif +#if defined(CONFIG_SPL_WATCHDOG_SUPPORT) && defined(CONFIG_WDT) + initr_watchdog(); +#endif + if (IS_ENABLED(CONFIG_SPL_OS_BOOT) || CONFIG_IS_ENABLED(HANDOFF)) dram_init_banksize(); diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index 9d7f503b69..aa8e725573 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -51,6 +51,7 @@ config ULP_WATCHDOG config WDT bool "Enable driver model for watchdog timer drivers" depends on DM + imply WATCHDOG help Enable driver model for watchdog timer. At the moment the API is very simple and only supports four operations: diff --git a/drivers/watchdog/wdt-uclass.c b/drivers/watchdog/wdt-uclass.c index 23b7e3360d..bbfac4f0f9 100644 --- a/drivers/watchdog/wdt-uclass.c +++ b/drivers/watchdog/wdt-uclass.c @@ -10,6 +10,8 @@ #include <dm/device-internal.h> #include <dm/lists.h> +DECLARE_GLOBAL_DATA_PTR; + int wdt_start(struct udevice *dev, u64 timeout_ms, ulong flags) { const struct wdt_ops *ops = device_get_ops(dev); @@ -63,6 +65,30 @@ int wdt_expire_now(struct udevice *dev, ulong flags) return ret; } +#if defined(CONFIG_WATCHDOG) +/* + * Called by macro WATCHDOG_RESET. This function be called *very* early, + * so we need to make sure, that the watchdog driver is ready before using + * it in this function. + */ +void watchdog_reset(void) +{ + static ulong next_reset; + ulong now; + + /* Exit if GD is not ready or watchdog is not initialized yet */ + if (!gd || !(gd->flags & GD_FLG_WDT_READY)) + return; + + /* Do not reset the watchdog too often */ + now = get_timer(0); + if (now > next_reset) { + next_reset = now + 1000; /* reset every 1000ms */ + wdt_reset(gd->watchdog_dev); + } +} +#endif + static int wdt_post_bind(struct udevice *dev) { #if defined(CONFIG_NEEDS_MANUAL_RELOC) diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h index 78dcf40bff..d16f50f677 100644 --- a/include/asm-generic/global_data.h +++ b/include/asm-generic/global_data.h @@ -133,6 +133,9 @@ typedef struct global_data { struct spl_handoff *spl_handoff; # endif #endif +#if defined(CONFIG_WDT) + struct udevice *watchdog_dev; +#endif } gd_t; #endif @@ -161,5 +164,6 @@ typedef struct global_data { #define GD_FLG_ENV_DEFAULT 0x02000 /* Default variable flag */ #define GD_FLG_SPL_EARLY_INIT 0x04000 /* Early SPL init is done */ #define GD_FLG_LOG_READY 0x08000 /* Log system is ready for use */ +#define GD_FLG_WDT_READY 0x10000 /* Watchdog is ready for use */ #endif /* __ASM_GENERIC_GBL_DATA_H */ diff --git a/include/configs/turris_omnia.h b/include/configs/turris_omnia.h index c7805cf36b..0e65a12345 100644 --- a/include/configs/turris_omnia.h +++ b/include/configs/turris_omnia.h @@ -29,11 +29,6 @@ #define CONFIG_SPL_I2C_MUX #define CONFIG_SYS_I2C_MVTWSI -/* Watchdog support */ -#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT_ORION) -# define CONFIG_WATCHDOG -#endif - /* * SDIO/MMC Card Configuration */ diff --git a/include/wdt.h b/include/wdt.h index e9a7c5355a..aa77d3e9b4 100644 --- a/include/wdt.h +++ b/include/wdt.h @@ -6,6 +6,9 @@ #ifndef _WDT_H_ #define _WDT_H_ +#include <dm.h> +#include <dm/read.h> + /* * Implement a simple watchdog uclass. Watchdog is basically a timer that * is used to detect or recover from malfunction. During normal operation @@ -103,4 +106,42 @@ struct wdt_ops { int (*expire_now)(struct udevice *dev, ulong flags); }; +#if defined(CONFIG_WDT) +#ifndef CONFIG_WATCHDOG_TIMEOUT_MSECS +#define CONFIG_WATCHDOG_TIMEOUT_MSECS (60 * 1000) +#endif +#define WATCHDOG_TIMEOUT_SECS (CONFIG_WATCHDOG_TIMEOUT_MSECS / 1000) + +static inline int initr_watchdog(void) +{ + u32 timeout = WATCHDOG_TIMEOUT_SECS; + + /* + * Init watchdog: This will call the probe function of the + * watchdog driver, enabling the use of the device + */ + if (uclass_get_device_by_seq(UCLASS_WDT, 0, + (struct udevice **)&gd->watchdog_dev)) { + debug("WDT: Not found by seq!\n"); + if (uclass_get_device(UCLASS_WDT, 0, + (struct udevice **)&gd->watchdog_dev)) { + printf("WDT: Not found!\n"); + return 0; + } + } + + if (CONFIG_IS_ENABLED(OF_CONTROL)) { + timeout = dev_read_u32_default(gd->watchdog_dev, "timeout-sec", + WATCHDOG_TIMEOUT_SECS); + } + + wdt_start(gd->watchdog_dev, timeout * 1000, 0); + gd->flags |= GD_FLG_WDT_READY; + printf("WDT: Started with%s servicing (%ds timeout)\n", + IS_ENABLED(CONFIG_WATCHDOG) ? "" : "out", timeout); + + return 0; +} +#endif + #endif /* _WDT_H_ */ -- 2.21.0

6 23

[PATCH v6 000/102] x86: Add initial support for apollolake
by Simon Glass 17 Feb '20

17 Feb '20

Apollo Lake is an Intel SoC generation aimed at relatively low-end embedded systems. It was released in 2016 but has become more popular recently with some embedded boards using it. This series adds support for Apollo Lake. As an example it adds an implementation of chromebook_coral (a large range of Chromebooks released in 2017). The series provides enough support to boot to a prompt. with LCD display, storage, USB, EC and keyboard. Since this is the first time U-Boot has used FSP2 there is quite a bit of refactoring needed. This series is available at u-boot-dm/coral-working Changes in v6: - Add .driver_data in the designware_pci_supported array - Add a comment about VANILLA - Add a comment about the need for board_run_command() - Add a comment about why we should not use MTRR_TYPE_WRBACK - Add a comment as to why dev_read_bool() is not used - Add a comment to intel_pinctrl_ops - Add a lot of comments to get_cbfs_fsp() - Add back '#ifdef' line to commit message - Add new patch with methods to find the position/size of next SPL phase - Change comment to apl_hostbridge_early_init_pinctrl, not apl_gpio_early_init - Change commented-out enable_rtc_upper_bank() call to a TODO - Correct a few unrelated defconfig changes - Drop Glacier Lake code - Drop code to handle !CONFIG_OF_TRANSLATE case - Drop extra conditions on CONFIG_VIDEO_FSP - Drop incorrect mention of coreboot in qfw_cpu.c - Drop init of ComB since it is not used - Drop lpc_configure_pads() and probe() function, add a comment about pads - Drop mention of devicetree for VTD feature - Drop mention of ramstage - Drop platform data and pre-PCI code, since DM PCI is available in SPL - Drop unnecessary priv struct and probe method - Drop unwanted debug printf() - Drop unwanted space before comma - Drop use of GPIO_NUM_PAD_CFG_REGS - Expand commit message to mention SPL/TPL specifically - Fix 'hone' typo - Fix FSP-M and FSP-S in comments - Fix comments for struct apl_hostbridge_platdata - Fix various coding style problems - Make BOOT_FROM_FAST_SPI_FLASH a Kconfig option - Move Intel Kconfig pinctrl options into this patch - Move image pos/size access functions and symbols to generic SPL code - Move lpss_reset_release() to another commit - Move lpss_reset_release() to this commit - Move setting of CONFIG_IRQ in sandbox to this patch - Remove hyphens from Firmware-Support-Package - Remove the * in the first line of the binding file - Rename init_for_uart() to board_debug_uart_init() - Rename pci_x86_ofplat_get_devfn() to pci_ofplat_get_devfn() in comment - Split out Kconfig change to new patch to enable full pinctrl in SPL/TPL - Update comment to reference board_debug_uart_init() (its in a later patch) - Use 'No SPI' instead of 'SPI2' as a debug message - Use 'north' as the node name instead of 'n' - Use SZ_4G instead of open-coded shift - Use SZ_4G instead of open-coding the size value - Use a generic compatible string intel,gpio - Use generic gpio compatible string - Use one space after #defines in pm.h Changes in v5: - Add ACPI base address and size - Add L2 cache flush function - Add L2 cache flush functoin - Add a new patch to move qemu CPU fixup function into its own file - Add a way to obtain the port ID for a device - Add function to obtain ACPI gpio number - Add gpio-controller to GPIO nodes - Allocate the FSP-S data instead of using the stack - Change SPL as well - Comment out GPIOs in the fsp_s node since we don't use them yet - Correct CPU ACPI IDs - Correct build error in chromebook_samus_tpl - Don't enable p2sb on sandbox in this patch - Drop SAFETY_MARGIN - Drop unrelated change metioned by Heiko - Enable SMP - Fix FST typo - Fix build errors on some PowerPC boards - Group U-Boot and device tree into a section - Rename APOLLOLAKE_USB2_PORT_MAX - Rename spl section to 'spl' so that binman symbols can find it - Use a define for ACPI base address Changes in v4: - Add a LOG_CATEGORY for silicon init - Add a binding file - Add a comment about the speed logic in __dw_i2c_set_bus_speed() - Add a comment for enable_bios_reset_cpl() - Add a comment in the commit message about why has_max_speed is added - Add a patch to explain of-platdata and header files - Add an extra comment to apl_uart_init() - Add comments about MRC-cache records being the same size - Add comments for exported functions - Add comments to functions - Add more documentation for pci_ofplat_get_devfn() - Add new patch to allow designware I2C driver to work in SPL - Add new patch to drop static data in designware i2c driver - Add new patch to make mrccache_update() static - Add new patch to move early-timer init later - Add support for updating power state - Add u-boot,skip-auto-config-until-reloc property to PCI - Adjust - Adjust condition for binding children - Adjust the comment for struct dw_i2c_speed_config - Allow pinctrl nodes to have subnodes (i.e. GPIO nodes) - Avoid needing to know internals of pinctrl in this driver - Change apollolake to apl - Change the behaviour to be a device-tree option - Detect zero mmio address - Disable SPL_DM_GPIO on omap35_logic to avoid a build error - Drop 'if (0)' call to deep_magic_nexgen_probe() and use #ifndef instead - Drop GPIO_NUM_PAD_CFG_REGS - Drop TCO_BASE_ADDRESS - Drop change to message about a missing uclass - Drop duplicate VBT file CONFIG - Drop duplicate commit 'Create a new sandbox_pci_read_bar() function' - Drop empty operations struct since p2sb does not need it - Drop incorrect coreboot reference from header file - Drop itss uclass change in Makefile (now in previous patch) - Drop itss uclass in Makefile - Drop pmic_pm8916 driver name and use a sandbox name instead - Drop sandbox defconfig change now that p2sb change is correct - Drop the whole interrupt file for TPL - Drop unwanted debug printf("bad\n") - Enable HAVE_VBT for FSP2 also - Enable HAVE_X86_FIT - Enable INTEL_GPIO - Enable IRQ for sandbox64 too to avoid build error - Enable option for slimbootloader, coreboot, efi - Expand commit message to better explain the need to checksum functions - Explain the 'twisty headers' comment - Explain why FSP-M cannot be shown - Fix 'enabled' typo - Fix 'what' typo - Fix FSP_M reference to refer to FSP_S in commit message - Fix Makefile copyright message - Fix alpha order in Kconfig - Fix comment for exec_sync_hwseq_xfer() - Fix comment on fsp_silicon_init() - Fix incorrect mask check in pmc_gpe_init() - Fix indentation nit - Fix up license header - Fix various code-style problems - Mention that the return value is pci_dev_t - Move code to pinctrl driver - Move this to intel_common - Name this P-Unit instead of power unit, in the commit message - New GPIO driver binding - One last desperate attempt to try to explain the purpose of this commit - Rename arch_fsp_s_preinit() to arch_fsps_preinit() - Rename get_coreboot_fsp() and add comments - Rename new file to designware_i2c_pci.c - Rename option to HAVE_SYS_TEXT_BASE - Rename pci_x86_ofplat_get_devfn() to pci_ofplat_get_devfn() - Reverse the sense of the CONFIG option - Set up LPC pads early - Split out GPIO code from the pinctrl driver - Split out into a separate patch - Split out mmio changes into a separate patch - Switch over to use pinctrl for pad init/config - Tidy up header guards - Tidy up mixed case in FSP code - Tidy up the header file a little - Update SPI flash protection only in SPL - Update commit message to indicate that CPU-identity bug is fixed - Update documentation with more detailed memory map - Update the commit message to be clearer, fix 'correct' typo - Update the message to mention the preprocessed file, not un-preprocessed - Use 'Apollo Lake' - Use BIT() macro a bit more - Use BIT() macro bit more - Use CONFIG_INTEL_CAR_CQOS to control car2.S inclusion - Use car_init_ret to return - Use existing VBT Kconfig option - Use hex for size values also - Use hyphen for device-tree properties - Use lower-case pinctrl in arch_cpu_init_dm() - Use pci_ofplat_get_devfn() - Use post_code() calls consistent with car.S - Use priv->pch instead of dev->parent - Use tabs instead of spaces - Use the new pci_ofplat_get_devfn() function - apollolake -> Apollo Lake - use GENMASK() for VTBAR_MASK Changes in v3: - Ad FSP-S support - Add CONFIG_TPL_X86_ASSUME_CPUID to reduce code size - Add Chrome OS EC support - Add FSP-S and VBT also - Add MMC, video, USB configs - Add SPL condition to the option - Add VBT signature - Add a driver for APL SPI for TPL (using of-platdata) - Add a proper SPI node and make the SPI flash node a child - Add a proper implementation of fsp_notify - Add a weak function to avoid errors on other platforms - Add an APL_SPI_FLASH_BOOT option to enable non-mmap boot - Add an extra size parameter to the find_next_mrc_cache() function - Add an fsp: tag - Add bootstage support - Add bootstage timing for memory-mapped reads - Add bootstage timing for reading vbt - Add fsp_locate_fsp to locate an fsp component - Add fspm_done() hook - Add fspm_done() hook to handle FSP-S wierdness (it breaks SPI flash) - Add help to CONFIG_FIT and don't make it 'default y' - Add more documentation - Add snapshot/restore for IRQs - Add spi alias in device tree - Add structures for FSP-S also - Add support for FSP-S component and VBT - Add support for of-platdata for TPL - Add the missing header file - Add two more defines for the CPU driver - Add two more operations to IRQ - Add various minor tidy-ups - Adjust fast_spi_cache_bios_region() to avoid using SPI driver - Change Fast-SPI driver into a helper file used by ICH SPI - Change the sandbox test from ITSS to IRQ - Convert code to use hex increased of decimal - Disable the bootcommand since it does nothing useful on coral - Don't allow BOOT_FROM_FAST_SPI_FLASH with FSP-S - Don't enable SPI flash in TPL by default - Don't imply SPI flash either - Don't include write() and erase() in TPL - Drop 'a4' comment for register offset - Drop CONFIG_SPL_NET_SUPPORT - Drop VBT as we already have it elsewhere - Drop calls to x86_cpu_init_f(), x86_cpu_reinit_f() - Drop dead code - Drop patch '86: timer: Reduce timer code size in TPL on Intel CPUs' - Drop patch 'dm: core: Don't include ofnode functions with of-platdata' - Drop patch 'spi: sandbox: Add a test driver for sandbox SPI flash' - Drop patch 'spl: Allow SPL/TPL to use of-platdata without libfdt' - Drop patch 'x86: apollolake: Add definitions for the Intel Fast SPI interface' - Drop patch 'x86: timer: Set up the timer in timer_early_get_count()' - Drop struct fsp_usp_header as it is now in the API file - Drop unnecessary #else part of CONFIG_HAVE_MICROCODE - Drop unneeded Kconfig file - Drop unused code in lpc_configure_pads() - Enable video and USB3 - Expand comments for BOOT_FROM_FAST_SPI_FLASH - Fix build error when debug UART is disabled - Fix build errors in sandbox_spl, etc - Fix mixed case in GPIO defines - Fix the incorrect value of CPU_ADDR_BITS - Fix value of LPC_BC_LE - Init the p2sb before the northbridge since the latter so it can use GPIOs - Merge in patch "x86: Add support for booting from Fast SPI" - Move an additional error handling fix from a future patch - Move line related to variable-cache into the next patch - Move location of fast_spi.h header file - Move mtrr_add_request() call into this patch - Move mtrr_add_request() call to next patch - Move pad programming into the hostbridge to reduce TPL device-tree size - Move the function to a common file instead of duplicating it - Move the mrccache_get_region() change into this patch - Move write_pirq_routing_table() to avoid 64-bit build error - Only supress the 'MAC address from ROM' warning on sandbox - Reduce amount of early-pad data in TPL - Rename X86_HAS_FIT to HAVE_X86_FIT - Rename power-mgr uclass to acpi-pmc - Reorder file so that write() and erase() are together - Rework how pads configuration is defined in TPL and SPL - Rewrite commit message - Set boot_loader_tolum_size to 0 - Set the environment variables at runtime to avoid other warnings - Shorten log_msg_ret() calls since the function name is always printed - Simplify types for fsp_locate_fsp() - Support TPL without CONFIG_TPL_SPI_SUPPORT - Support TPL without CONFIG_TPL_SPI_SUPPORT (reduces code size) - Support bootstage timing - Switch mmap to use SPI instead of SPI flash - Tidy up Makefile rules to reduce duplication - Tidy up the pad settings in the device tree - Update commit message to explain why HAVE_FIT woudl be confusing - Update device type to pci_dev_t - Update example error message to better show the intended purpose - Update mrccache livetree patch to just convert to livetree - Update the 'fsp' command for FSP2, instead of disabling it - Use a macro for is-power-of-two - Use a zero-based tsc timer - Use pci_get_devfn() - Use the IRQ uclass instead of ITSS - Use the IRQ uclass instead of creating a new ITSS uclass - Use the LPSS code from a separate file Changes in v2: - Change 'queensbay' to 'baytrail' in help - Drop probe() function - Fix 'proides' typo - Fix the Kconfig condition to avoid build errors on snow - Implement set_spi_protect() - Use SPI mmap() instead of SPI flash Simon Glass (102): binman: Add a library to access binman entries dm: gpio: Allow control of GPIO uclass in SPL dm: core: Fix offset_to_ofnode() with invalid offset dm: pci: Allow delaying auto-config until after relocation dm: pci: Move pci_get_devfn() into a common file net: Move the checksum functions to lib/ i2c: designware: Tidy up PCI support i2c: designware: Avoid using static data i2c: designware: Support use in SPL x86: spi: Add helper functions for Intel Fast SPI fdt: Show the preprocessed .dts file on error dm: pinctrl: Allow enabling full pinctrl in SPL/TPL board_r: Move early-timer init later RFC: sandbox: net: Suppress the MAC-address warnings Revert "RFC: sandbox: net: Suppress the MAC-address warnings" x86: timer: use a timer base of 0 x86: timer: Reduce timer code size in TPL on Intel CPUs x86: Drop unnecessary cpu code for TPL x86: Drop unnecessary interrupt code for TPL x86: power: Add an ACPI PMC uclass x86: sandbox: Add a PMC emulator and test pci: Add support for p2sb uclass sandbox: Disable mmio by default in tests sandbox: Add PCI driver and test for p2sb x86: Move UCLASS_IRQ into a separate file sandbox: Add a test for IRQ x86: Define the SPL image start x86: Reduce mrccache record alignment size x86: Correct mrccache find_next_mrc_cache() calculation x86: Adjust mrccache_get_region() to use livetree x86: Adjust mrccache_get_region() to support get_mmap() x86: Add a new global_data member for the cache record x86: Tidy up error handling in mrccache_save() x86: Update mrccache to support multiple caches x86: Add mrccache support for a 'variable' cache x86: Don't export mrccache_update() x86: Move fsp_prepare_mrc_cache() to fsp1 directory x86: Set the DRAM banks to reflect real location x86: Set up the MTRR for SDRAM x86: Don't imply libfdt or SPI flash in TPL x86: Allow removal of standard PCH drivers x86: Allow interrupt to happen once x86: fsp: Make graphics support common to FSP1/2 x86: fsp: Correct wrong header inlude in fsp_support.c x86: fsp: Add FSP2 base support x86: fsp: Set up an MTRR for the graphics frame buffer x86: fsp: Add a new arch_fsp_init_r() hook x86: fsp: Allow remembering the location of FSP-S x86: fsp: Make the notify API call common x86: Don't include the BIOS emulator in TPL x86: Add an option to include a FIT x86: Add support for newer CAR schemes x86: Disable microcode section for FSP2 x86: Update the fsp command for FSP2 x86: Update .dtsi file for FSP2 x86: Add an option to control the position of U-Boot x86: Add an option to control the position of SPL x86: Add an fdtmap and image-header x86: Don't repeat microcode in U-Boot if not needed x86: Separate out U-Boot and device tree in ROM image x86: Make MSR_PKG_POWER_SKU common spi: Correct operations check in dm_spi_xfer() x86: spi: Don't enable SPI_FLASH_BAR by default spi: ich: Move init function just above probe() spi: ich: Move the protection/lockdown code into a function spi: ich: Convert to livetree spi: ich: Fix header order spi: ich: Various small tidy-ups spi: ich: Add mmio_base to struct ich_spi_platdata dm: doc: Add a note about of-platdata and header files spi: ich: Correct max-size bug in ich_spi_adjust_size() spi: ich: Support of-platdata for fast-spi spi: ich: Support hardware sequencing spi: ich: Add support for get_mmap() method spi: ich: Add TPL support spi: ich: Add Apollo Lake support mtd: spi: Export spi_flash_std_probe() x86: Enable pinctrl in SPL and TPL x86: Add low-power subsystem (lpss) support x86: Add a generic Intel pinctrl driver x86: Add a generic Intel GPIO driver x86: Move qemu CPU fixup function into its own file x86: apl: Add basic IO addresses x86: apl: Add PMC driver x86: apl: Add UART driver x86: apl: Add pinctrl driver i2c: designware: Add Apollo Lake support x86: apl: Add systemagent driver x86: apl: Add hostbridge driver x86: apl: Add ITSS driver x86: apl: Add LPC driver x86: apl: Add PCH driver x86: apl: Add PUNIT driver spl: Add methods to find the position/size of next phase x86: apl: Add SPL loaders x86: apl: Add a CPU driver x86: apl: Add SPL/TPL init x86: apl: Add P2SB driver x86: apl: Add Kconfig and Makefile x86: apl: Add FSP structures x86: apl: Add FSP support x86: Add chromebook_coral Kconfig | 9 +- arch/Kconfig | 9 +- arch/arm/include/asm/omap_gpio.h | 2 +- arch/arm/mach-at91/include/mach/at91sam9260.h | 2 +- arch/arm/mach-davinci/include/mach/gpio.h | 2 +- arch/arm/mach-omap2/am33xx/board.c | 4 +- arch/arm/mach-omap2/omap3/board.c | 2 +- arch/arm/mach-omap2/omap5/hwinit.c | 2 +- arch/sandbox/cpu/state.c | 1 + arch/sandbox/dts/sandbox.dtsi | 14 + arch/sandbox/dts/test.dts | 31 + arch/sandbox/include/asm/test.h | 2 + arch/x86/Kconfig | 91 +- arch/x86/cpu/Makefile | 4 +- arch/x86/cpu/apollolake/Kconfig | 96 ++ arch/x86/cpu/apollolake/Makefile | 27 + arch/x86/cpu/apollolake/cpu.c | 41 + arch/x86/cpu/apollolake/cpu_common.c | 17 + arch/x86/cpu/apollolake/cpu_spl.c | 271 ++++++ arch/x86/cpu/apollolake/fsp_m.c | 210 +++++ arch/x86/cpu/apollolake/fsp_s.c | 661 ++++++++++++++ arch/x86/cpu/apollolake/hostbridge.c | 179 ++++ arch/x86/cpu/apollolake/itss.c | 214 +++++ arch/x86/cpu/apollolake/lpc.c | 122 +++ arch/x86/cpu/apollolake/p2sb.c | 167 ++++ arch/x86/cpu/apollolake/pch.c | 36 + arch/x86/cpu/apollolake/pmc.c | 216 +++++ arch/x86/cpu/apollolake/punit.c | 94 ++ arch/x86/cpu/apollolake/spl.c | 178 ++++ arch/x86/cpu/apollolake/systemagent.c | 19 + arch/x86/cpu/apollolake/uart.c | 133 +++ arch/x86/cpu/broadwell/sdram.c | 8 +- arch/x86/cpu/coreboot/Kconfig | 1 + arch/x86/cpu/cpu.c | 4 + arch/x86/cpu/i386/Makefile | 2 + arch/x86/cpu/i386/cpu.c | 41 +- arch/x86/cpu/intel_common/Makefile | 10 + arch/x86/cpu/intel_common/car2.S | 448 ++++++++++ arch/x86/cpu/intel_common/car2_uninit.S | 87 ++ arch/x86/cpu/intel_common/fast_spi.c | 73 ++ arch/x86/cpu/intel_common/lpss.c | 44 + arch/x86/cpu/irq.c | 13 - arch/x86/cpu/ivybridge/sdram.c | 8 +- arch/x86/cpu/mp_init.c | 73 +- arch/x86/cpu/qfw_cpu.c | 73 ++ arch/x86/cpu/quark/dram.c | 8 +- arch/x86/cpu/slimbootloader/Kconfig | 1 + arch/x86/cpu/u-boot-spl.lds | 5 +- arch/x86/dts/Makefile | 1 + arch/x86/dts/chromebook_coral.dts | 831 ++++++++++++++++++ arch/x86/dts/u-boot.dtsi | 91 +- arch/x86/include/asm/arch-apollolake/cpu.h | 20 + .../asm/arch-apollolake/fsp/fsp_configs.h | 14 + .../asm/arch-apollolake/fsp/fsp_m_upd.h | 123 +++ .../asm/arch-apollolake/fsp/fsp_s_upd.h | 292 ++++++ .../include/asm/arch-apollolake/fsp/fsp_vpd.h | 11 + arch/x86/include/asm/arch-apollolake/gpio.h | 490 +++++++++++ arch/x86/include/asm/arch-apollolake/iomap.h | 29 + arch/x86/include/asm/arch-apollolake/itss.h | 43 + arch/x86/include/asm/arch-apollolake/lpc.h | 82 ++ arch/x86/include/asm/arch-apollolake/pch.h | 9 + arch/x86/include/asm/arch-apollolake/pm.h | 19 + .../include/asm/arch-apollolake/systemagent.h | 37 + arch/x86/include/asm/arch-apollolake/uart.h | 20 + arch/x86/include/asm/arch-broadwell/cpu.h | 1 - .../include/asm/arch-ivybridge/model_206ax.h | 1 - arch/x86/include/asm/fast_spi.h | 68 ++ arch/x86/include/asm/fsp/fsp_api.h | 24 + arch/x86/include/asm/fsp/fsp_support.h | 7 - arch/x86/include/asm/fsp1/fsp_api.h | 21 +- arch/x86/include/asm/fsp2/fsp_api.h | 63 ++ arch/x86/include/asm/fsp2/fsp_internal.h | 97 ++ arch/x86/include/asm/global_data.h | 25 +- arch/x86/include/asm/intel_pinctrl.h | 306 +++++++ arch/x86/include/asm/intel_pinctrl_defs.h | 373 ++++++++ arch/x86/include/asm/lpss.h | 36 + arch/x86/include/asm/mrccache.h | 29 +- arch/x86/include/asm/msr-index.h | 10 +- arch/x86/include/asm/processor.h | 12 +- arch/x86/include/asm/spl.h | 1 + arch/x86/lib/Makefile | 2 + arch/x86/lib/fsp/Makefile | 3 + arch/x86/lib/fsp/fsp_common.c | 20 - arch/x86/lib/fsp/fsp_dram.c | 35 +- arch/x86/lib/{fsp1 => fsp}/fsp_graphics.c | 6 +- arch/x86/lib/fsp/fsp_support.c | 2 +- arch/x86/lib/fsp1/Makefile | 1 - arch/x86/lib/fsp1/fsp_common.c | 20 + arch/x86/lib/fsp1/fsp_dram.c | 8 +- arch/x86/lib/fsp2/Makefile | 10 + arch/x86/lib/fsp2/fsp_common.c | 13 + arch/x86/lib/fsp2/fsp_dram.c | 78 ++ arch/x86/lib/fsp2/fsp_init.c | 191 ++++ arch/x86/lib/fsp2/fsp_meminit.c | 97 ++ arch/x86/lib/fsp2/fsp_silicon_init.c | 54 ++ arch/x86/lib/fsp2/fsp_support.c | 131 +++ arch/x86/lib/mrccache.c | 204 +++-- arch/x86/lib/pirq_routing.c | 10 + board/freescale/imx8qm_mek/imx8qm_mek.c | 2 +- board/freescale/imx8qxp_mek/imx8qxp_mek.c | 2 +- board/gateworks/gw_ventana/Kconfig | 3 + board/google/Kconfig | 15 + board/google/chromebook_coral/Kconfig | 43 + board/google/chromebook_coral/MAINTAINERS | 6 + board/google/chromebook_coral/Makefile | 5 + board/google/chromebook_coral/coral.c | 19 + board/toradex/apalis-imx8/apalis-imx8.c | 2 +- cmd/Kconfig | 8 + cmd/Makefile | 1 + cmd/pmc.c | 81 ++ cmd/x86/fsp.c | 65 +- common/board_r.c | 32 +- common/spl/spl.c | 20 + configs/chromebook_coral_defconfig | 102 +++ configs/chromebook_samus_tpl_defconfig | 3 + configs/omap35_logic_defconfig | 1 + configs/qemu-x86_64_defconfig | 1 + configs/sandbox64_defconfig | 4 + configs/sandbox_defconfig | 2 + configs/sandbox_flattree_defconfig | 4 + configs/sandbox_spl_defconfig | 4 + configs/tools-only_defconfig | 2 + doc/board/google/chromebook_coral.rst | 241 +++++ .../gpio/intel,apl-gpio.txt | 55 ++ doc/device-tree-bindings/pci/x86-pci.txt | 24 + .../pinctrl/intel,apl-pinctrl.txt | 39 + doc/driver-model/of-plat.rst | 6 + drivers/Makefile | 1 + drivers/core/util.c | 20 + drivers/gpio/Kconfig | 31 + drivers/gpio/Makefile | 5 +- drivers/gpio/at91_gpio.c | 6 +- drivers/gpio/atmel_pio4.c | 2 +- drivers/gpio/da8xx_gpio.c | 7 +- drivers/gpio/da8xx_gpio.h | 2 +- drivers/gpio/intel_gpio.c | 161 ++++ drivers/gpio/mxc_gpio.c | 4 +- drivers/gpio/mxs_gpio.c | 4 +- drivers/gpio/omap_gpio.c | 6 +- drivers/gpio/sunxi_gpio.c | 8 +- drivers/i2c/Makefile | 3 + drivers/i2c/designware_i2c.c | 106 +-- drivers/i2c/designware_i2c.h | 35 + drivers/i2c/designware_i2c_pci.c | 144 +++ drivers/i2c/i2c-uclass.c | 6 +- drivers/i2c/muxes/pca954x.c | 4 +- drivers/misc/Kconfig | 42 + drivers/misc/Makefile | 5 + drivers/misc/irq-uclass.c | 53 ++ drivers/misc/irq_sandbox.c | 55 ++ drivers/misc/p2sb-uclass.c | 216 +++++ drivers/misc/p2sb_emul.c | 272 ++++++ drivers/misc/p2sb_sandbox.c | 39 + drivers/misc/sandbox_adder.c | 60 ++ drivers/mmc/fsl_esdhc_imx.c | 13 +- drivers/mmc/omap_hsmmc.c | 2 +- drivers/mtd/spi/sf_probe.c | 2 +- drivers/net/designware.c | 10 +- drivers/net/designware.h | 4 +- drivers/net/fec_mxc.c | 6 +- drivers/net/fec_mxc.h | 2 +- drivers/net/mvneta.c | 4 +- drivers/net/mvpp2.c | 8 +- drivers/net/sun8i_emac.c | 12 +- drivers/pch/Kconfig | 18 + drivers/pch/Makefile | 4 +- drivers/pci/pci-aardvark.c | 4 +- drivers/pci/pci-uclass.c | 31 +- drivers/pci/pcie_dw_mvebu.c | 4 +- drivers/pinctrl/Kconfig | 23 + drivers/pinctrl/Makefile | 1 + drivers/pinctrl/intel/Kconfig | 24 + drivers/pinctrl/intel/Makefile | 6 + drivers/pinctrl/intel/pinctrl.c | 636 ++++++++++++++ drivers/pinctrl/intel/pinctrl_apl.c | 192 ++++ drivers/power/Kconfig | 2 + drivers/power/acpi_pmc/Kconfig | 34 + drivers/power/acpi_pmc/Makefile | 6 + drivers/power/acpi_pmc/acpi-pmc-uclass.c | 244 +++++ drivers/power/acpi_pmc/pmc_emul.c | 246 ++++++ drivers/power/acpi_pmc/sandbox.c | 97 ++ drivers/spi/Kconfig | 1 - drivers/spi/atmel_spi.c | 10 +- drivers/spi/designware_spi.c | 4 +- drivers/spi/ich.c | 534 ++++++++--- drivers/spi/ich.h | 46 +- drivers/spi/spi-uclass.c | 5 +- drivers/timer/Kconfig | 23 + drivers/timer/tsc_timer.c | 10 +- drivers/tpm/tpm2_tis_spi.c | 2 +- include/binman.h | 45 + include/bootstage.h | 3 + include/config_uncmd_spl.h | 1 - include/configs/at91-sama5_common.h | 5 +- include/configs/chromebook_coral.h | 32 + include/configs/gw_ventana.h | 1 - include/configs/mx6ul_14x14_evk.h | 1 + include/dm/ofnode.h | 2 +- include/dm/pci.h | 43 + include/dm/uclass-id.h | 2 + include/init.h | 11 + include/irq.h | 88 ++ include/p2sb.h | 135 +++ include/pci.h | 21 +- include/power/acpi_pmc.h | 185 ++++ include/qfw.h | 8 + include/spi.h | 2 +- include/spi_flash.h | 12 + include/spl.h | 21 +- lib/Kconfig | 10 + lib/Makefile | 3 +- lib/binman.c | 48 + lib/efi/Kconfig | 1 + lib/net_utils.c | 48 + net/Makefile | 1 - net/checksum.c | 59 -- scripts/Makefile.lib | 4 +- scripts/Makefile.uncmd_spl | 1 - test/dm/Makefile | 3 + test/dm/irq.c | 32 + test/dm/p2sb.c | 28 + test/dm/pmc.c | 33 + 222 files changed, 12368 insertions(+), 706 deletions(-) create mode 100644 arch/x86/cpu/apollolake/Kconfig create mode 100644 arch/x86/cpu/apollolake/Makefile create mode 100644 arch/x86/cpu/apollolake/cpu.c create mode 100644 arch/x86/cpu/apollolake/cpu_common.c create mode 100644 arch/x86/cpu/apollolake/cpu_spl.c create mode 100644 arch/x86/cpu/apollolake/fsp_m.c create mode 100644 arch/x86/cpu/apollolake/fsp_s.c create mode 100644 arch/x86/cpu/apollolake/hostbridge.c create mode 100644 arch/x86/cpu/apollolake/itss.c create mode 100644 arch/x86/cpu/apollolake/lpc.c create mode 100644 arch/x86/cpu/apollolake/p2sb.c create mode 100644 arch/x86/cpu/apollolake/pch.c create mode 100644 arch/x86/cpu/apollolake/pmc.c create mode 100644 arch/x86/cpu/apollolake/punit.c create mode 100644 arch/x86/cpu/apollolake/spl.c create mode 100644 arch/x86/cpu/apollolake/systemagent.c create mode 100644 arch/x86/cpu/apollolake/uart.c create mode 100644 arch/x86/cpu/intel_common/car2.S create mode 100644 arch/x86/cpu/intel_common/car2_uninit.S create mode 100644 arch/x86/cpu/intel_common/fast_spi.c create mode 100644 arch/x86/cpu/intel_common/lpss.c create mode 100644 arch/x86/cpu/qfw_cpu.c create mode 100644 arch/x86/dts/chromebook_coral.dts create mode 100644 arch/x86/include/asm/arch-apollolake/cpu.h create mode 100644 arch/x86/include/asm/arch-apollolake/fsp/fsp_configs.h create mode 100644 arch/x86/include/asm/arch-apollolake/fsp/fsp_m_upd.h create mode 100644 arch/x86/include/asm/arch-apollolake/fsp/fsp_s_upd.h create mode 100644 arch/x86/include/asm/arch-apollolake/fsp/fsp_vpd.h create mode 100644 arch/x86/include/asm/arch-apollolake/gpio.h create mode 100644 arch/x86/include/asm/arch-apollolake/iomap.h create mode 100644 arch/x86/include/asm/arch-apollolake/itss.h create mode 100644 arch/x86/include/asm/arch-apollolake/lpc.h create mode 100644 arch/x86/include/asm/arch-apollolake/pch.h create mode 100644 arch/x86/include/asm/arch-apollolake/pm.h create mode 100644 arch/x86/include/asm/arch-apollolake/systemagent.h create mode 100644 arch/x86/include/asm/arch-apollolake/uart.h create mode 100644 arch/x86/include/asm/fast_spi.h create mode 100644 arch/x86/include/asm/fsp/fsp_api.h create mode 100644 arch/x86/include/asm/fsp2/fsp_api.h create mode 100644 arch/x86/include/asm/fsp2/fsp_internal.h create mode 100644 arch/x86/include/asm/intel_pinctrl.h create mode 100644 arch/x86/include/asm/intel_pinctrl_defs.h create mode 100644 arch/x86/include/asm/lpss.h rename arch/x86/lib/{fsp1 => fsp}/fsp_graphics.c (95%) create mode 100644 arch/x86/lib/fsp2/Makefile create mode 100644 arch/x86/lib/fsp2/fsp_common.c create mode 100644 arch/x86/lib/fsp2/fsp_dram.c create mode 100644 arch/x86/lib/fsp2/fsp_init.c create mode 100644 arch/x86/lib/fsp2/fsp_meminit.c create mode 100644 arch/x86/lib/fsp2/fsp_silicon_init.c create mode 100644 arch/x86/lib/fsp2/fsp_support.c create mode 100644 board/google/chromebook_coral/Kconfig create mode 100644 board/google/chromebook_coral/MAINTAINERS create mode 100644 board/google/chromebook_coral/Makefile create mode 100644 board/google/chromebook_coral/coral.c create mode 100644 cmd/pmc.c create mode 100644 configs/chromebook_coral_defconfig create mode 100644 doc/board/google/chromebook_coral.rst create mode 100644 doc/device-tree-bindings/gpio/intel,apl-gpio.txt create mode 100644 doc/device-tree-bindings/pci/x86-pci.txt create mode 100644 doc/device-tree-bindings/pinctrl/intel,apl-pinctrl.txt create mode 100644 drivers/gpio/intel_gpio.c create mode 100644 drivers/i2c/designware_i2c_pci.c create mode 100644 drivers/misc/irq-uclass.c create mode 100644 drivers/misc/irq_sandbox.c create mode 100644 drivers/misc/p2sb-uclass.c create mode 100644 drivers/misc/p2sb_emul.c create mode 100644 drivers/misc/p2sb_sandbox.c create mode 100644 drivers/misc/sandbox_adder.c create mode 100644 drivers/pinctrl/intel/Kconfig create mode 100644 drivers/pinctrl/intel/Makefile create mode 100644 drivers/pinctrl/intel/pinctrl.c create mode 100644 drivers/pinctrl/intel/pinctrl_apl.c create mode 100644 drivers/power/acpi_pmc/Kconfig create mode 100644 drivers/power/acpi_pmc/Makefile create mode 100644 drivers/power/acpi_pmc/acpi-pmc-uclass.c create mode 100644 drivers/power/acpi_pmc/pmc_emul.c create mode 100644 drivers/power/acpi_pmc/sandbox.c create mode 100644 include/binman.h create mode 100644 include/configs/chromebook_coral.h create mode 100644 include/dm/pci.h create mode 100644 include/irq.h create mode 100644 include/p2sb.h create mode 100644 include/power/acpi_pmc.h create mode 100644 lib/binman.c delete mode 100644 net/checksum.c create mode 100644 test/dm/irq.c create mode 100644 test/dm/p2sb.c create mode 100644 test/dm/pmc.c -- 2.24.0.393.g34dc348eaf-goog

6 234

[U-Boot] [RFC] cmd: add bootslot command to select/boot slot based on boot counts
by Martin Hundebøll 16 Feb '20

16 Feb '20

The existing bootcount feature is targeted systems with a primary, and a rescue boot setup, where the number of boot tries to the primary boot is tracked. If the number exceeds the limit, the alternative/rescue is booted. This patch adds support for a more sophisticated setup, where more than two boot slots can exist, and the order of slots can be configured. The 'bootcommand' command reads the configured slots (and their priority/order) from a configured environment variable ("bootslots" by default). For each conifgured slot, a remaining boot count is maintained in an evnironment variable ("bootcount_<slot>" by default). If the first boot slot has positive boot count, it is booted using the slot specific boot command ("bootcmd_<slot>" by default). Otherwise the next slot is checked. An example environment when using the bootslot command with two slots ("a" and "b"): bootslots=a b bootcount_a=3 bootcount_b=3 bootcmd_a=setenv bootargs $bootargs root=/dev/mmcblk0p1; booti $loadaddr bootcmd_b=setenv bootargs $bootargs root=/dev/mmcblk0p2; booti $loadaddr Once linux is booted, it resets the bootcount variable for the booted slot using "fw_setenv": > fw_setenv bootcount_a 3 When the non-booted slot is updated, the order is updated by setting the bootslots variable with "fw_setenv": > fw_setenv bootslots=b a Signed-off-by: Martin Hundebøll <martin(a)geanix.com> --- cmd/Kconfig | 42 +++++++++ cmd/Makefile | 1 + cmd/bootslot.c | 225 +++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 268 insertions(+) create mode 100644 cmd/bootslot.c diff --git a/cmd/Kconfig b/cmd/Kconfig index aec209006d..3919606e74 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -1277,6 +1277,48 @@ config CMD_BOOTCOUNT Enable the bootcount command, which allows interrogation and reset of the bootcounter. +config CMD_BOOTSLOT + bool "Enable support for multiple boot slots" + help + Parses an ordered list of configured boot slot names (e.g. "a b") + and selects a corresponding boot command based on the current + boot counter for each slot. + +config CMD_BOOTSLOT_ENV_SLOTS + string "Environment variable to read bootslots from" + depends on CMD_BOOTSLOT + default "bootslots" + help + Configures the environment variable to read out when looking for a + list of available boot sloots. + +config CMD_BOOTSLOT_ENV_COUNT + string "Environment variable format string to read/write slot boot count from/to" + depends on CMD_BOOTSLOT + default "bootcount_%s" + help + Configures the prefix to use when reading the boot count for a + specific slot. The prefix is concatenated with the slot name, so + that the boot count for slot "a" is read and saved to "<prefix>a". + +config CMD_BOOTSLOT_ENV_CMD + string "Environment variable format string to read slot boot command from" + depends on CMD_BOOTSLOT + default "bootcmd_%s" + help + Configures the prefix to use when reading the boot command for + specific slot. The prefix is concatenated with the slot name, so + that the boot command for slot "a" is read from "<prefix>a". + +config CMD_BOOTSLOT_DEFAULT_COUNT + int "Default boot count for each configured slot" + depends on CMD_BOOTSLOT + default 3 + help + The default number of times a slot is tried before proceeding to the + slot. The default is used when a slot has no count yet, or when it + is reset with the "bootslot reset" command. + config CMD_BSP bool "Enable board-specific commands" help diff --git a/cmd/Makefile b/cmd/Makefile index 323f1fd2c7..68c8e50c91 100644 --- a/cmd/Makefile +++ b/cmd/Makefile @@ -26,6 +26,7 @@ obj-$(CONFIG_CMD_BOOTCOUNT) += bootcount.o obj-$(CONFIG_CMD_BOOTEFI) += bootefi.o obj-$(CONFIG_CMD_BOOTMENU) += bootmenu.o obj-$(CONFIG_CMD_BOOTSTAGE) += bootstage.o +obj-$(CONFIG_CMD_BOOTSLOT) += bootslot.o obj-$(CONFIG_CMD_BOOTZ) += bootz.o obj-$(CONFIG_CMD_BOOTI) += booti.o obj-$(CONFIG_CMD_BTRFS) += btrfs.o diff --git a/cmd/bootslot.c b/cmd/bootslot.c new file mode 100644 index 0000000000..03897b1f60 --- /dev/null +++ b/cmd/bootslot.c @@ -0,0 +1,225 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2018, Geanix, All rights reserved. + */ + +#include <common.h> +#include <environment.h> +#include <stdlib.h> +#include <linux/kernel.h> +#include <linux/string.h> +#include <linux/compat.h> +#include <vsprintf.h> + +static char *bootslot_envname(const char *fmt, const char *slot) +{ + int len = strlen(fmt) + strlen(slot); + char *envname = malloc(len + 1); + + sprintf(envname, fmt, slot); + + return envname; +} + +static unsigned long bootslot_get_count(const char *slot) +{ + char *envname; + unsigned long count; + + envname = bootslot_envname(CONFIG_CMD_BOOTSLOT_ENV_COUNT, slot); + count = env_get_ulong(envname, 10, CONFIG_CMD_BOOTSLOT_DEFAULT_COUNT); + free(envname); + + return count; +} + +static void bootslot_set_count(const char *slot, unsigned long count) +{ + char *envname; + + envname = bootslot_envname(CONFIG_CMD_BOOTSLOT_ENV_COUNT, slot); + env_set_ulong(envname, count); + free(envname); +} + +static const char *bootslot_get_cmd(const char *slot) +{ + char *envname; + char *cmd; + + envname = bootslot_envname(CONFIG_CMD_BOOTSLOT_ENV_CMD, slot); + cmd = env_get(envname); + free(envname); + + return cmd; +} + +static char *bootslot_get_slots(int argc, char * const argv[]) +{ + char *slots = NULL; + int len = 1; /* make room for terminating \0 */ + int i; + + /* read boot slots from environment if no args are given, or + * duplicate the argument if a single argument is given */ + if (argc == 1) + return strdup(env_get(CONFIG_CMD_BOOTSLOT_ENV_SLOTS)); + else if (argc == 2) + return strdup(argv[1]); + + /* compute the string length of the list of slots */ + for (i = 1; i < argc; i++) + len += strlen(argv[i]) + 1; /* add room for space separator */ + + /* allocate the string buffer and copy each slot argument to it */ + slots = kzalloc(len, 0); + strcpy(slots, argv[1]); + + for (i = 2; i < argc; i++) { + strcat(slots, " "); + strcat(slots, argv[i]); + } + + return slots; +} + +static int do_bootslot_list(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + char *mem = bootslot_get_slots(argc, argv); + char *slots = mem; + char *slot; + + if (slots == NULL) + return CMD_RET_USAGE; + + printf("slot\tcount\tbootcmd\n"); + while ((slot = strsep(&slots, " ")) != NULL) { + unsigned long count; + const char *bootcmd; + + if (strlen(slot) == 0) + continue; + + count = bootslot_get_count(slot); + bootcmd = bootslot_get_cmd(slot); + + if (bootcmd) + printf("%s\t%lu\t%s\n", slot, count, bootcmd); + else + printf("%s\t%lu\t<not defined>\n", slot, count); + } + + free(mem); + + return CMD_RET_SUCCESS; +} + +static int do_bootslot_reset(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + char *mem = bootslot_get_slots(argc, argv); + char *slots = mem; + char *slot; + + if (slots == NULL) + return CMD_RET_USAGE; + + while ((slot = strsep(&slots, " ")) != NULL) { + if (strlen(slot) == 0) + continue; + bootslot_set_count(slot, CONFIG_CMD_BOOTSLOT_DEFAULT_COUNT); + } + + free(mem); + + return CMD_RET_SUCCESS; +} + +static int do_bootslot_boot(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + char *mem = bootslot_get_slots(argc, argv); + char *slots = mem; + char *slot; + bool found_valid = false; + + if (slots == NULL) + return CMD_RET_USAGE; + + while ((slot = strsep(&slots, " ")) != NULL) { + const char *bootcmd; + unsigned long count; + + if (strlen(slot) == 0) + continue; + + count = bootslot_get_count(slot); + if (count == 0) { + printf("slot %s bootcount is zero; trying next...\n", + slot); + continue; + } + + bootcmd = bootslot_get_cmd(slot); + if (bootcmd == NULL) { + printf("slot %s bootcmd not found; trying next...\n", + slot); + continue; + } + + printf("slot %s has %lu boot tries remaining; booting...\n", + slot, count); + found_valid = true; + bootslot_set_count(slot, --count); + env_save(); + run_command_list(bootcmd, -1, CMD_FLAG_ENV); + break; + } + + free(mem); + + if (found_valid == false) { + printf("no valid bootslot found; resetting counters\n"); + run_command("bootslot reset", 0); + return CMD_RET_FAILURE; + } + + return CMD_RET_SUCCESS; +} + +static cmd_tbl_t cmd_bootslot_sub[] = { + U_BOOT_CMD_MKENT(boot, INT_MAX, 0, do_bootslot_boot, "", ""), + U_BOOT_CMD_MKENT(list, INT_MAX, 1, do_bootslot_list, "", ""), + U_BOOT_CMD_MKENT(reset, INT_MAX, 1, do_bootslot_reset, "", ""), +}; + +/* + * Process a bootslots sub-command + */ +static int do_bootslot(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + cmd_tbl_t *c; + + /* Strip off leading 'bootslot' command argument */ + argc--; + argv++; + + c = find_cmd_tbl(argv[0], cmd_bootslot_sub, + ARRAY_SIZE(cmd_bootslot_sub)); + + if (c) + return c->cmd(cmdtp, flag, argc, argv); + else + return CMD_RET_USAGE; +} + + +U_BOOT_CMD(bootslot, INT_MAX, 1, do_bootslot, + "Bootslot command", + " - select and boot slot based on counters\n" + "boot [<slot>] - Boot the passed or first valid slot in $bootslots\n" + "list [<slot>] - List remaining boot tries for passed or all slots in $bootslots\n" + "reset [<slot>] - Reset remaining boot tries for all or passed slot\n" +); -- 2.18.0

4 5

[U-Boot] [PATCH v3 0/5] usb: host: dwc2: use driver model for PHY and CLOCK
by Patrick Delaunay 14 Feb '20

14 Feb '20

In this serie I update the DWC2 host driver to use the device tree information and the associated PHY and CLOCK drivers when they are available. CI-Travis build is OK for all target after V3: https://travis-ci.org/patrickdelaunay/u-boot/builds/609496187 In V2, I cause the warnings for some boards: drivers/usb/host/built-in.o: In function `dwc2_usb_remove': drivers/usb/host/dwc2.c:1441: undefined reference to `clk_disable_bulk' I test this serie on stm32mp157c-ev1 board, with PHY and CLK support The U-CLASS are provided by: - PHY by USBPHYC driver = ./drivers/phy/phy-stm32-usbphyc.c - CLOCK by RCC clock driver = drivers/clk/clk_stm32mp1.c - RESET by RCC reset driver = drivers/reset/stm32-reset.c And I activate the configuration +CONFIG_USB_DWC2=y PS: it is not the default configuration to avoid conflict with gadget driver To solve a binding issue, I also deactivate the gadget support: by default only one driver is bound to theusbotg_hs node with "snps,dwc2" compatible, and today it is the device one (the first in the driver list). I also need to deactivate hnp-srp support with: &usbotg_hs { /* need to disable ONLY for HOST support */ hnp-srp-disable; }; WARNING: OTG with device or host support is not correctly handle by DWC2 driver (see example for dynamic OTG role in DWC3 driver). The tests executed on the stm32mp157c-ev1 target: STM32MP> usb start starting USB... Bus usb-otg@49000000: USB DWC2 Bus usbh-ehci@5800d000: USB EHCI 1.00 scanning bus usb-otg@49000000 for devices... 2 USB Device(s) found scanning bus usbh-ehci@5800d000 for devices... 3 USB Device(s) found scanning usb for storage devices... 2 Storage Device(s) found STM32MP> usb tree USB device tree: 1 Hub (480 Mb/s, 0mA) | U-Boot Root Hub | +-2 Mass Storage (480 Mb/s, 300mA) Verbatim STORE N GO 070731C8ACD7EE97 1 Hub (480 Mb/s, 0mA) | u-boot EHCI Host Controller | +-2 Hub (480 Mb/s, 2mA) | +-3 Mass Storage (480 Mb/s, 500mA) Generic USB Storage STM32MP> ls usb 0 <DIR> 4096 . <DIR> 4096 .. <DIR> 16384 lost+found <DIR> 4096 record 1490212 xipImage 21058006 vmlinux STM32MP> load usb 0 0xC0000000 vmlinux 21058006 bytes read in 10851 ms (1.9 MiB/s) Changes in v3: - Add stub for clk_disable_bulk Changes in v2: - update dev_err - update commit message - change dev_err to dev_dbg for PHY function call - treat dwc2_shutdown_phy error - add clk_disable_bulk in dwc2_usb_remove Patrick Delaunay (5): dm: clk: add stub for clk_disable_bulk when CONFIG_CLK is desactivated usb: host: dwc2: add phy support usb: host: dwc2: add clk support usb: host: dwc2: force reset assert usb: host: dwc2: add trace to have clean usb start drivers/usb/host/dwc2.c | 100 +++++++++++++++++++++++++++++++++++++++- include/clk.h | 4 ++ 2 files changed, 103 insertions(+), 1 deletion(-) -- 2.17.1

5 11

[PATCH 1/2] board: solidrun lx2160a-cex7: new board
by Baruch Siach 10 Feb '20

10 Feb '20

Add board level support code for the SolidRun LX2160A based COM-Express 7 system. Signed-off-by: Baruch Siach <baruch(a)tkos.co.il> --- arch/arm/Kconfig | 13 + arch/arm/cpu/armv8/Kconfig | 2 +- board/solidrun/lx2160acex7/Kconfig | 15 ++ board/solidrun/lx2160acex7/MAINTAINERS | 7 + board/solidrun/lx2160acex7/Makefile | 7 + board/solidrun/lx2160acex7/README | 43 ++++ board/solidrun/lx2160acex7/lx2160acex7.c | 287 +++++++++++++++++++++++ configs/lx2160acex7_tfa_defconfig | 59 +++++ include/configs/lx2160acex7.h | 47 ++++ 9 files changed, 479 insertions(+), 1 deletion(-) create mode 100644 board/solidrun/lx2160acex7/Kconfig create mode 100644 board/solidrun/lx2160acex7/MAINTAINERS create mode 100644 board/solidrun/lx2160acex7/Makefile create mode 100644 board/solidrun/lx2160acex7/README create mode 100644 board/solidrun/lx2160acex7/lx2160acex7.c create mode 100644 configs/lx2160acex7_tfa_defconfig create mode 100644 include/configs/lx2160acex7.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index f96841c77717..008af453987f 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1201,6 +1201,18 @@ config TARGET_LX2160ARDB is a high-performance development platform that supports the QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor. +config TARGET_LX2160ACEX7 + bool "Support lx2160acex7" + select ARCH_LX2160A + select ARM64 + select ARMV8_MULTIENTRY + select ARCH_SUPPORT_TFABOOT + select BOARD_LATE_INIT + help + Support for SolidRun LX2160A based com express type 7 module and + platform. The lx2160acex7 high-performance platform that supports the + QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor. + config TARGET_LX2160AQDS bool "Support lx2160aqds" select ARCH_LX2160A @@ -1821,6 +1833,7 @@ source "board/hisilicon/poplar/Kconfig" source "board/isee/igep003x/Kconfig" source "board/phytec/pcm051/Kconfig" source "board/silica/pengwyn/Kconfig" +source "board/solidrun/lx2160acex7/Kconfig" source "board/spear/spear300/Kconfig" source "board/spear/spear310/Kconfig" source "board/spear/spear320/Kconfig" diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig index 92a2b58ed46d..9df6ebdc1bb4 100644 --- a/arch/arm/cpu/armv8/Kconfig +++ b/arch/arm/cpu/armv8/Kconfig @@ -109,7 +109,7 @@ config PSCI_RESET !TARGET_LS1046ARDB && !TARGET_LS1046AQDS && \ !TARGET_LS1046AFRWY && \ !TARGET_LS2081ARDB && !TARGET_LX2160ARDB && \ - !TARGET_LX2160AQDS && \ + !TARGET_LX2160AQDS && !TARGET_LX2160ACEX7 && \ !ARCH_UNIPHIER && !TARGET_S32V234EVB help Most armv8 systems have PSCI support enabled in EL3, either through diff --git a/board/solidrun/lx2160acex7/Kconfig b/board/solidrun/lx2160acex7/Kconfig new file mode 100644 index 000000000000..85673846a4a5 --- /dev/null +++ b/board/solidrun/lx2160acex7/Kconfig @@ -0,0 +1,15 @@ +if TARGET_LX2160ACEX7 + +config SYS_BOARD + default "lx2160acex7" + +config SYS_VENDOR + default "solidrun" + +config SYS_SOC + default "fsl-layerscape" + +config SYS_CONFIG_NAME + default "lx2160acex7" + +endif diff --git a/board/solidrun/lx2160acex7/MAINTAINERS b/board/solidrun/lx2160acex7/MAINTAINERS new file mode 100644 index 000000000000..6fcc3dcc938c --- /dev/null +++ b/board/solidrun/lx2160acex7/MAINTAINERS @@ -0,0 +1,7 @@ +LX2160ACEX7 BOARD +M: Baruch Siach <baruch(a)tkos.co.il> +S: Maintained +F: board/solidrun/lx2160acex7/ +F: include/configs/lx2160acex7.h +F: configs/lx2160acex7_tfa_defconfig +F: arch/arm/dts/fsl-lx2160a-cex7.dts diff --git a/board/solidrun/lx2160acex7/Makefile b/board/solidrun/lx2160acex7/Makefile new file mode 100644 index 000000000000..a2ee6fd8fde8 --- /dev/null +++ b/board/solidrun/lx2160acex7/Makefile @@ -0,0 +1,7 @@ +# +# Copyright 2019 SolidRun ltd. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += lx2160acex7.o diff --git a/board/solidrun/lx2160acex7/README b/board/solidrun/lx2160acex7/README new file mode 100644 index 000000000000..33421073ad30 --- /dev/null +++ b/board/solidrun/lx2160acex7/README @@ -0,0 +1,43 @@ +Overview +-------- + +The SolidRun CEx7 LX2160A has COM-Express Type 7 form factor, based on NXP +LX2160A SoC. SolidRun provides two carriers, Clearfog CX, and HoneyComb. + +https://developer.solid-run.com/products/cex7-lx2160a/ + +U-Boot currentl supports boot from SD/eMMC. + +SD Boot Memory Map +------------------ + +Offsets are relative to the beginning of the SD card. + +0x001000 bl2_sd.pbl (RCW+PBI+bl2.pbl) +0x100000 fip.bin (BL31 + BL33(U-Boot)) +0x500000 U-Boot Environment +0x800000 DDR PHY Firmware (fip_ddr.bin) + +ATF (ARM Trusted Firmware) generates bl2_sd.pbl and fip.bin. + +fip_ddr.bin is available from https://github.com/NXP/ddr-phy-binary. + +DPAA2 Management Complex (MC) Firmware +-------------------------------------- + +U-Boot loads DPAA2 MC firmware and configuration files from the first SD/eMMC +partition. The following environment variables define firmware files location. + +mc_firmware_dir : directory of firmware files +mc_fw_file : MC firmware file name +dpc_file : DPC file name +dpl_file : DPL file name + +Default values for these variables are defined in +include/configs/lx2160acex7.h. + +MC firmware is available from the linux-firmware repository at dpaa2/mc/. + +mc-utils generates DPL and DPC: + + https://source.codeaurora.org/external/qoriq/qoriq-components/mc-utils diff --git a/board/solidrun/lx2160acex7/lx2160acex7.c b/board/solidrun/lx2160acex7/lx2160acex7.c new file mode 100644 index 000000000000..57dd7605b7ee --- /dev/null +++ b/board/solidrun/lx2160acex7/lx2160acex7.c @@ -0,0 +1,287 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2019 SolidRun ltd. + */ + +#include <common.h> +#include <dm.h> +#include <dm/platform_data/serial_pl01x.h> +#include <netdev.h> +#include <fsl_ddr.h> +#include <fsl_sec.h> +#include <asm/io.h> +#include <fdt_support.h> +#include <fsl-mc/fsl_mc.h> +#include <asm/arch/soc.h> +#include <fm_eth.h> +#include <fsl-mc/ldpaa_wriop.h> +#include <miiphy.h> + +DECLARE_GLOBAL_DATA_PTR; + +static struct pl01x_serial_platdata serial0 = { +#if CONFIG_CONS_INDEX == 0 + .base = CONFIG_SYS_SERIAL0, +#elif CONFIG_CONS_INDEX == 1 + .base = CONFIG_SYS_SERIAL1, +#else +#error "Unsupported console index value." +#endif + .type = TYPE_PL011, +}; + +U_BOOT_DEVICE(nxp_serial0) = { + .name = "serial_pl01x", + .platdata = &serial0, +}; + +static struct pl01x_serial_platdata serial1 = { + .base = CONFIG_SYS_SERIAL1, + .type = TYPE_PL011, +}; + +U_BOOT_DEVICE(nxp_serial1) = { + .name = "serial_pl01x", + .platdata = &serial1, +}; + +static void uart_get_clock(void) +{ + serial0.clock = get_serial_clock(); + serial1.clock = get_serial_clock(); +} + +int board_early_init_f(void) +{ + /* get required clock for UART IP */ + uart_get_clock(); + fsl_lsch3_early_init_f(); + + return 0; +} + +int checkboard(void) +{ + enum boot_src src = get_boot_src(); + char buf[64]; + cpu_name(buf); + printf("Board: %s-CEX7, ", buf); + + if (src == BOOT_SOURCE_SD_MMC) { + puts("SD\n"); + } + puts("SERDES1 Reference: Clock1 = 161.13MHz Clock2 = 100MHz\n"); + puts("SERDES2 Reference: Clock1 = 100MHz Clock2 = 100MHz\n"); + puts("SERDES3 Reference: Clock1 = 100MHz Clock2 = 100MHz\n"); + return 0; +} + +unsigned long get_board_sys_clk(void) +{ + return 100000000; +} + +unsigned long get_board_ddr_clk(void) +{ + return 100000000; +} + +int board_init(void) +{ +#ifdef CONFIG_FSL_CAAM + sec_init(); +#endif + + return 0; +} + +void detail_board_ddr_info(void) +{ + int i; + u64 ddr_size = 0; + + puts("\nDDR "); + for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) + ddr_size += gd->bd->bi_dram[i].size; + print_size(ddr_size, ""); + print_ddr_info(0); +} + +#ifdef CONFIG_FSL_MC_ENET +void fdt_fixup_board_enet(void *fdt) +{ + int offset; + + offset = fdt_path_offset(fdt, "/soc/fsl-mc"); + + if (offset < 0) + offset = fdt_path_offset(fdt, "/fsl-mc"); + + if (offset < 0) { + printf("%s: fsl-mc node not found in device tree (error %d)\n", + __func__, offset); + return; + } + + if (get_mc_boot_status() == 0 && + (is_lazy_dpl_addr_valid() || get_dpl_apply_status() == 0)) { + fdt_status_okay(fdt, offset); + } else { + fdt_status_fail(fdt, offset); + } +} + +void board_quiesce_devices(void) +{ + fsl_mc_ldpaa_exit(gd->bd); +} +#endif + +#ifdef CONFIG_OF_BOARD_SETUP + +int ft_board_setup(void *blob, bd_t *bd) +{ + int i; + bool mc_memory_bank = false; + + u64 *base; + u64 *size; + u64 mc_memory_base = 0; + u64 mc_memory_size = 0; + u16 total_memory_banks; + + ft_cpu_setup(blob, bd); + + fdt_fixup_mc_ddr(&mc_memory_base, &mc_memory_size); + + if (mc_memory_base != 0) + mc_memory_bank = true; + + total_memory_banks = CONFIG_NR_DRAM_BANKS + mc_memory_bank; + + base = calloc(total_memory_banks, sizeof(u64)); + size = calloc(total_memory_banks, sizeof(u64)); + + /* fixup DT for the three GPP DDR banks */ + for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { + base[i] = gd->bd->bi_dram[i].start; + size[i] = gd->bd->bi_dram[i].size; + } + +#ifdef CONFIG_RESV_RAM + /* reduce size if reserved memory is within this bank */ + if (gd->arch.resv_ram >= base[0] && + gd->arch.resv_ram < base[0] + size[0]) + size[0] = gd->arch.resv_ram - base[0]; + else if (gd->arch.resv_ram >= base[1] && + gd->arch.resv_ram < base[1] + size[1]) + size[1] = gd->arch.resv_ram - base[1]; + else if (gd->arch.resv_ram >= base[2] && + gd->arch.resv_ram < base[2] + size[2]) + size[2] = gd->arch.resv_ram - base[2]; +#endif + + if (mc_memory_base != 0) { + for (i = 0; i <= total_memory_banks; i++) { + if (base[i] == 0 && size[i] == 0) { + base[i] = mc_memory_base; + size[i] = mc_memory_size; + break; + } + } + } + + fdt_fixup_memory_banks(blob, base, size, total_memory_banks); + +#ifdef CONFIG_USB + fsl_fdt_fixup_dr_usb(blob, bd); +#endif + +#ifdef CONFIG_FSL_MC_ENET + fdt_fsl_mc_fixup_iommu_map_entry(blob); + fdt_fixup_board_enet(blob); +#endif + + return 0; +} +#endif + +int fsl_initdram(void) +{ + gd->ram_size = tfa_get_dram_size(); + + if (!gd->ram_size) + gd->ram_size = fsl_ddr_sdram_size(); + + return 0; +} + +int board_eth_init(bd_t *bis) +{ +#if defined(CONFIG_FSL_MC_ENET) + struct memac_mdio_info mdio_info; + struct memac_mdio_controller *reg; + int i, interface; + struct mii_dev *dev; + struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); + u32 srds_s1; + + srds_s1 = in_le32(&gur->rcwsr[28]) & + FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_MASK; + srds_s1 >>= FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_SHIFT; + + reg = (struct memac_mdio_controller *)CONFIG_SYS_FSL_WRIOP1_MDIO1; + mdio_info.regs = reg; + mdio_info.name = DEFAULT_WRIOP_MDIO1_NAME; + + /* Register the EMI 1 */ + fm_memac_mdio_init(bis, &mdio_info); + + wriop_set_phy_address(WRIOP1_DPMAC17, 0, + RGMII_PHY_ADDR1); + reg = (struct memac_mdio_controller *)CONFIG_SYS_FSL_WRIOP1_MDIO2; + switch (srds_s1) { + case 3: + case 5: + case 8: + case 13: + case 14: + case 15: + case 17: + case 20: + case 23: + wriop_set_phy_address(WRIOP1_DPMAC17, 0, + RGMII_PHY_ADDR1); + break; + + default: + printf("SerDes1 protocol 0x%x is not supported on LX2160ACEX7\n", + srds_s1); + goto next; + } + for (i = WRIOP1_DPMAC17; i <= WRIOP1_DPMAC17; i++) { + interface = wriop_get_enet_if(i); + switch (interface) { + case PHY_INTERFACE_MODE_RGMII: + case PHY_INTERFACE_MODE_RGMII_ID: + dev = miiphy_get_dev_by_name(DEFAULT_WRIOP_MDIO1_NAME); + wriop_set_mdio(i, dev); + break; + default: + break; + } + } + +next: + cpu_eth_init(bis); +#endif /* CONFIG_FSL_MC_ENET */ + + return pci_eth_init(bis); +} + +void reset_phy(void) +{ +#if defined(CONFIG_FSL_MC_ENET) + mc_env_boot(); +#endif +} diff --git a/configs/lx2160acex7_tfa_defconfig b/configs/lx2160acex7_tfa_defconfig new file mode 100644 index 000000000000..ee44d0693ac2 --- /dev/null +++ b/configs/lx2160acex7_tfa_defconfig @@ -0,0 +1,59 @@ +CONFIG_ARM=y +CONFIG_TARGET_LX2160ACEX7=y +CONFIG_TFABOOT=y +CONFIG_SYS_TEXT_BASE=0x82000000 +CONFIG_SYS_MALLOC_F_LEN=0x6000 +CONFIG_ENV_SIZE=0x2000 +CONFIG_ENV_OFFSET=0x500000 +CONFIG_NR_DRAM_BANKS=3 +CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y +CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y +CONFIG_AHCI=y +CONFIG_FIT_VERBOSE=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTARGS=y +# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_CMD_GREPENV=y +CONFIG_CMD_EEPROM=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y +CONFIG_CMD_USB=y +CONFIG_CMD_CACHE=y +CONFIG_MP=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-cex7" +CONFIG_ENV_IS_IN_MMC=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_DM=y +CONFIG_SATA_CEVA=y +CONFIG_FSL_CAAM=y +CONFIG_DM_GPIO=y +CONFIG_DM_I2C=y +CONFIG_DM_MMC=y +CONFIG_FSL_ESDHC=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_WINBOND=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_GIGE=y +CONFIG_E1000=y +CONFIG_PCI=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_LAYERSCAPE_GEN4=y +CONFIG_DM_SCSI=y +CONFIG_DM_SERIAL=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/include/configs/lx2160acex7.h b/include/configs/lx2160acex7.h new file mode 100644 index 000000000000..5c1bd55aea3f --- /dev/null +++ b/include/configs/lx2160acex7.h @@ -0,0 +1,47 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2019 SolidRun ltd. + */ + +#ifndef __LX2_CEX7_H +#define __LX2_CEX7_H + +#include "lx2160a_common.h" + +/* MAC/PHY configuration */ +#if defined(CONFIG_FSL_MC_ENET) +#define CONFIG_MII +#define CONFIG_ETHPRIME "DPMAC17@rgmii-id" + +#define RGMII_PHY_ADDR1 0x01 + +#endif + +#undef CONFIG_ID_EEPROM + +/* Initial environment variables */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + EXTRA_ENV_SETTINGS \ + "mc_firmware_dir=boot\0" \ + "mc_fw_file=mc_lx2160a.itb\0" \ + "mc_fw_addr=0x80a00000\0" \ + "dpc_file=dpc-8_x_usxgmii.dtb\0" \ + "dpc_addr=0x80e00000\0" \ + "dpl_file=dpl-eth.8x10g.19.dtb\0" \ + "dpl_addr=0x80d00000\0" + +#undef SD_MC_INIT_CMD +#define SD_MC_INIT_CMD \ + "load mmc 0:1 ${mc_fw_addr} ${mc_firmware_dir}/${mc_fw_file}; " \ + "load mmc 0:1 ${dpc_addr} ${mc_firmware_dir}/${dpc_file}; " \ + "fsl_mc start mc ${mc_fw_addr} ${dpc_addr}\0" + +#undef SD_BOOTCOMMAND +#define SD_BOOTCOMMAND \ + "load mmc 0:1 ${dpl_addr} ${mc_firmware_dir}/${dpl_file}; " \ + "fsl_mc lazyapply dpl ${dpl_addr}; " \ + "run distro_bootcmd" + +#include <asm/fsl_secure_boot.h> + +#endif /* __LX2_CEX7_H */ -- 2.24.0

3 5

[U-Boot] [PATCH] net: eth-uclass: Remove warning about ROM MAC address
by Soeren Moch 09 Feb '20

09 Feb '20

Using a MAC address from ROM storage is the normal case for most ethernet hardware. Why should we warn about this? Signed-off-by: Soeren Moch <smoch(a)web.de> --- Cc: Joe Hershberger <joe.hershberger(a)ni.com> Cc: u-boot(a)lists.denx.de --- net/eth-uclass.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/net/eth-uclass.c b/net/eth-uclass.c index 3bd98b01ad..8b29de37bb 100644 --- a/net/eth-uclass.c +++ b/net/eth-uclass.c @@ -538,8 +538,6 @@ static int eth_post_probe(struct udevice *dev) memcpy(pdata->enetaddr, env_enetaddr, ARP_HLEN); } else if (is_valid_ethaddr(pdata->enetaddr)) { eth_env_set_enetaddr_by_index("eth", dev->seq, pdata->enetaddr); - printf("\nWarning: %s using MAC address from ROM\n", - dev->name); } else if (is_zero_ethaddr(pdata->enetaddr) || !is_valid_ethaddr(pdata->enetaddr)) { #ifdef CONFIG_NET_RANDOM_ETHADDR -- 2.17.1

4 8

[PATCH 1/1] doc: fix AX25-AE350 RISC-V documentation
by Heinrich Schuchardt 08 Feb '20

08 Feb '20

Since commit 04883bf7acca ("doc: update AX25-AE350 RISC-V documentation") `make htmldocs` produces a log of warnings like doc/board/AndesTech/ax25-ae350.rst:373: WARNING: Block quote ends without a blank line; unexpected unindent. doc/board/AndesTech/ax25-ae350.rst:0: WARNING: Undefined substitution referenced: "_ __ ___ _ __ | (___ | |_) |". Reformat the problematic passages. Fixes: 04883bf7acca ("doc: update AX25-AE350 RISC-V documentation") Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- doc/board/AndesTech/ax25-ae350.rst | 335 +++++++++++++++-------------- 1 file changed, 168 insertions(+), 167 deletions(-) diff --git a/doc/board/AndesTech/ax25-ae350.rst b/doc/board/AndesTech/ax25-ae350.rst index a7bd1a75e8..8874325840 100644 --- a/doc/board/AndesTech/ax25-ae350.rst +++ b/doc/board/AndesTech/ax25-ae350.rst @@ -62,9 +62,10 @@ Configurations -------------- CONFIG_SKIP_LOWLEVEL_INIT: - If you want to boot this system from SPI ROM and bypass e-bios (the - other boot loader on ROM). You should undefine CONFIG_SKIP_LOWLEVEL_INIT - in "include/configs/ax25-ae350.h". + +If you want to boot this system from SPI ROM and bypass e-bios (the +other boot loader on ROM). You should undefine CONFIG_SKIP_LOWLEVEL_INIT +in "include/configs/ax25-ae350.h". Build and boot steps -------------------- @@ -165,7 +166,7 @@ Messages of U-Boot boot on AE350 board crc32 for 80000000 ... 80050452 ==> 692dc44a RISC-V # - *** power-off and power-on, this U-Boot is booted from spi flash *** + *** power-off and power-on, this U-Boot is booted from spi flash *** U-Boot 2018.01-rc2-00032-gf67dd47-dirty (Dec 21 2017 - 13:56:03 +0800) @@ -365,168 +366,168 @@ Messages of U-Boot SPL boots Kernel on AE350 board .. code-block:: none -U-Boot SPL 2020.01-rc1-00292-g67a3313-dirty (Nov 14 2019 - 11:26:21 +0800) -Trying to boot from RAM - -OpenSBI v0.5-1-gdd8ef28 (Nov 14 2019 11:08:39) - ____ _____ ____ _____ - / __ \ / ____| _ \_ _| - | | | |_ __ ___ _ __ | (___ | |_) || | - | | | | '_ \ / _ \ '_ \ \___ \| _ < | | - | |__| | |_) | __/ | | |____) | |_) || |_ - \____/| .__/ \___|_| |_|_____/|____/_____| - | | - |_| - -Platform Name : Andes AE350 -Platform HART Features : RV64ACIMSUX -Platform Max HARTs : 4 -Current Hart : 0 -Firmware Base : 0x0 -Firmware Size : 84 KB -Runtime SBI Version : 0.2 - -PMP0: 0x0000000000000000-0x000000000001ffff (A) -PMP1: 0x0000000000000000-0x00000001ffffffff (A,R,W,X) - - -U-Boot 2020.01-rc1-00292-g67a3313-dirty (Nov 14 2019 - 11:26:21 +0800) - -DRAM: 1 GiB -Flash: 64 MiB -MMC: mmc@f0e00000: 0 -Loading Environment from SPI Flash... SF: Detected mx25u1635e with page size 256 Bytes, erase size 4 KiB, total 2 MiB -OK -In: serial@f0300000 -Out: serial@f0300000 -Err: serial@f0300000 -Net: no alias for ethernet0 - -Warning: mac@e0100000 (eth0) using random MAC address - a2:ae:93:7b:cc:8f -eth0: mac@e0100000 -Hit any key to stop autoboot: 0 -6455 bytes read in 31 ms (203.1 KiB/s) -20421684 bytes read in 8647 ms (2.3 MiB/s) -## Booting kernel from Legacy Image at 00600000 ... - Image Name: - Image Type: RISC-V Linux Kernel Image (uncompressed) - Data Size: 20421620 Bytes = 19.5 MiB - Load Address: 00200000 - Entry Point: 00200000 - Verifying Checksum ... OK -## Flattened Device Tree blob at 20000000 - Booting using the fdt blob at 0x20000000 - Loading Kernel Image - Loading Device Tree to 000000001effb000, end 000000001efff936 ... OK - -Starting kernel ... - -OF: fdt: Ignoring memory range 0x0 - 0x200000 -Linux version 4.17.0-00253-g49136e10bcb2 (sqa@atcsqa07) (gcc version 7.3.0 (2019-04-06_nds64le-linux-glibc-v5_experimental)) #1 SMP PREEMPT Sat Apr 6 23:41:49 CST 2019 -bootconsole [early0] enabled -Initial ramdisk at: 0x (ptrval) (13665712 bytes) -Zone ranges: - DMA32 [mem 0x0000000000200000-0x000000003fffffff] - Normal empty -Movable zone start for each node -Early memory node ranges - node 0: [mem 0x0000000000200000-0x000000003fffffff] -Initmem setup node 0 [mem 0x0000000000200000-0x000000003fffffff] -software IO TLB [mem 0x3b1f8000-0x3f1f8000] (64MB) mapped at [ (ptrval)- (ptrval)] -elf_platform is rv64i2p0m2p0a2p0c2p0xv5-0p0 -compatible privileged spec version 1.10 -percpu: Embedded 16 pages/cpu @ (ptrval) s28184 r8192 d29160 u65536 -Built 1 zonelists, mobility grouping on. Total pages: 258055 -Kernel command line: console=ttyS0,38400n8 debug loglevel=7 -log_buf_len individual max cpu contribution: 4096 bytes -log_buf_len total cpu_extra contributions: 12288 bytes -log_buf_len min size: 16384 bytes -log_buf_len: 32768 bytes -early log buf free: 14608(89%) -Dentry cache hash table entries: 131072 (order: 8, 1048576 bytes) -Inode-cache hash table entries: 65536 (order: 7, 524288 bytes) -Sorting __ex_table... -Memory: 944428K/1046528K available (3979K kernel code, 246K rwdata, 1490K rodata, 13523K init, 688K bss, 102100K reserved, 0K cma-reserved) -SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1 -Preemptible hierarchical RCU implementation. - Tasks RCU enabled. -NR_IRQS: 72, nr_irqs: 72, preallocated irqs: 0 -riscv,cpu_intc,0: 64 local interrupts mapped -riscv,cpu_intc,1: 64 local interrupts mapped -riscv,cpu_intc,2: 64 local interrupts mapped -riscv,cpu_intc,3: 64 local interrupts mapped -riscv,plic0,e4000000: mapped 71 interrupts to 8/8 handlers -clocksource: riscv_clocksource: mask: 0xffffffffffffffff max_cycles: 0x1bacf917bf, max_idle_ns: 881590412290 ns -sched_clock: 64 bits at 60MHz, resolution 16ns, wraps every 4398046511098ns -Console: colour dummy device 40x30 -Calibrating delay loop (skipped), value calculated using timer frequency.. 120.00 BogoMIPS (lpj=600000) -pid_max: default: 32768 minimum: 301 -Mount-cache hash table entries: 2048 (order: 2, 16384 bytes) -Mountpoint-cache hash table entries: 2048 (order: 2, 16384 bytes) -Hierarchical SRCU implementation. -smp: Bringing up secondary CPUs ... -CPU0: online -CPU2: online -CPU3: online -smp: Brought up 1 node, 4 CPUs -devtmpfs: initialized -random: get_random_u32 called from bucket_table_alloc+0x198/0x1d8 with crng_init=0 -clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns -futex hash table entries: 1024 (order: 4, 65536 bytes) -NET: Registered protocol family 16 -Advanced Linux Sound Architecture Driver Initialized. -clocksource: Switched to clocksource riscv_clocksource -NET: Registered protocol family 2 -tcp_listen_portaddr_hash hash table entries: 512 (order: 1, 8192 bytes) -TCP established hash table entries: 8192 (order: 4, 65536 bytes) -TCP bind hash table entries: 8192 (order: 5, 131072 bytes) -TCP: Hash tables configured (established 8192 bind 8192) -UDP hash table entries: 512 (order: 2, 16384 bytes) -UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) -NET: Registered protocol family 1 -RPC: Registered named UNIX socket transport module. -RPC: Registered udp transport module. -RPC: Registered tcp transport module. -RPC: Registered tcp NFSv4.1 backchannel transport module. -Unpacking initramfs... -workingset: timestamp_bits=62 max_order=18 bucket_order=0 -NFS: Registering the id_resolver key type -Key type id_resolver registered -Key type id_legacy registered -nfs4filelayout_init: NFSv4 File Layout Driver Registering... -io scheduler noop registered -io scheduler cfq registered (default) -io scheduler mq-deadline registered -io scheduler kyber registered -Console: switching to colour frame buffer device 40x30 -Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled -console [ttyS0] disabled -f0300000.serial: ttyS0 at MMIO 0xf0300020 (irq = 20, base_baud = 1228800) is a 16550A -console [ttyS0] enabled -console [ttyS0] enabled -bootconsole [early0] disabled -bootconsole [early0] disabled -loop: module loaded -tun: Universal TUN/TAP device driver, 1.6 -ftmac100: Loading version 0.2 ... -ftmac100 e0100000.mac eth0: irq 21, mapped at (ptrval) -ftmac100 e0100000.mac eth0: generated random MAC address 4e:fd:bd:f3:04:fc -ftsdc010 f0e00000.mmc: mmc0 - using hw SDIO IRQ -mmc0: new SDHC card at address d555 -ftssp010 card registered! -mmcblk0: mmc0:d555 SD04G 3.79 GiB -NET: Registered protocol family 10 - mmcblk0: p1 -Segment Routing with IPv6 -sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver -NET: Registered protocol family 17 -NET: Registered protocol family 15 -ALSA device list: - #0: ftssp_ac97 controller -Freeing unused kernel memory: 13520K -This architecture does not have kernel memory protection. -Sysinit starting -Sat Apr 6 23:33:53 CST 2019 -nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering... + U-Boot SPL 2020.01-rc1-00292-g67a3313-dirty (Nov 14 2019 - 11:26:21 +0800) + Trying to boot from RAM + + OpenSBI v0.5-1-gdd8ef28 (Nov 14 2019 11:08:39) + ____ _____ ____ _____ + / __ \ / ____| _ \_ _| + | | | |_ __ ___ _ __ | (___ | |_) || | + | | | | '_ \ / _ \ '_ \ \___ \| _ < | | + | |__| | |_) | __/ | | |____) | |_) || |_ + \____/| .__/ \___|_| |_|_____/|____/_____| + | | + |_| + + Platform Name : Andes AE350 + Platform HART Features : RV64ACIMSUX + Platform Max HARTs : 4 + Current Hart : 0 + Firmware Base : 0x0 + Firmware Size : 84 KB + Runtime SBI Version : 0.2 + + PMP0: 0x0000000000000000-0x000000000001ffff (A) + PMP1: 0x0000000000000000-0x00000001ffffffff (A,R,W,X) + + + U-Boot 2020.01-rc1-00292-g67a3313-dirty (Nov 14 2019 - 11:26:21 +0800) + + DRAM: 1 GiB + Flash: 64 MiB + MMC: mmc@f0e00000: 0 + Loading Environment from SPI Flash... SF: Detected mx25u1635e with page size 256 Bytes, erase size 4 KiB, total 2 MiB + OK + In: serial@f0300000 + Out: serial@f0300000 + Err: serial@f0300000 + Net: no alias for ethernet0 + + Warning: mac@e0100000 (eth0) using random MAC address - a2:ae:93:7b:cc:8f + eth0: mac@e0100000 + Hit any key to stop autoboot: 0 + 6455 bytes read in 31 ms (203.1 KiB/s) + 20421684 bytes read in 8647 ms (2.3 MiB/s) + ## Booting kernel from Legacy Image at 00600000 ... + Image Name: + Image Type: RISC-V Linux Kernel Image (uncompressed) + Data Size: 20421620 Bytes = 19.5 MiB + Load Address: 00200000 + Entry Point: 00200000 + Verifying Checksum ... OK + ## Flattened Device Tree blob at 20000000 + Booting using the fdt blob at 0x20000000 + Loading Kernel Image + Loading Device Tree to 000000001effb000, end 000000001efff936 ... OK + + Starting kernel ... + + OF: fdt: Ignoring memory range 0x0 - 0x200000 + Linux version 4.17.0-00253-g49136e10bcb2 (sqa@atcsqa07) (gcc version 7.3.0 (2019-04-06_nds64le-linux-glibc-v5_experimental)) #1 SMP PREEMPT Sat Apr 6 23:41:49 CST 2019 + bootconsole [early0] enabled + Initial ramdisk at: 0x (ptrval) (13665712 bytes) + Zone ranges: + DMA32 [mem 0x0000000000200000-0x000000003fffffff] + Normal empty + Movable zone start for each node + Early memory node ranges + node 0: [mem 0x0000000000200000-0x000000003fffffff] + Initmem setup node 0 [mem 0x0000000000200000-0x000000003fffffff] + software IO TLB [mem 0x3b1f8000-0x3f1f8000] (64MB) mapped at [ (ptrval)- (ptrval)] + elf_platform is rv64i2p0m2p0a2p0c2p0xv5-0p0 + compatible privileged spec version 1.10 + percpu: Embedded 16 pages/cpu @ (ptrval) s28184 r8192 d29160 u65536 + Built 1 zonelists, mobility grouping on. Total pages: 258055 + Kernel command line: console=ttyS0,38400n8 debug loglevel=7 + log_buf_len individual max cpu contribution: 4096 bytes + log_buf_len total cpu_extra contributions: 12288 bytes + log_buf_len min size: 16384 bytes + log_buf_len: 32768 bytes + early log buf free: 14608(89%) + Dentry cache hash table entries: 131072 (order: 8, 1048576 bytes) + Inode-cache hash table entries: 65536 (order: 7, 524288 bytes) + Sorting __ex_table... + Memory: 944428K/1046528K available (3979K kernel code, 246K rwdata, 1490K rodata, 13523K init, 688K bss, 102100K reserved, 0K cma-reserved) + SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1 + Preemptible hierarchical RCU implementation. + Tasks RCU enabled. + NR_IRQS: 72, nr_irqs: 72, preallocated irqs: 0 + riscv,cpu_intc,0: 64 local interrupts mapped + riscv,cpu_intc,1: 64 local interrupts mapped + riscv,cpu_intc,2: 64 local interrupts mapped + riscv,cpu_intc,3: 64 local interrupts mapped + riscv,plic0,e4000000: mapped 71 interrupts to 8/8 handlers + clocksource: riscv_clocksource: mask: 0xffffffffffffffff max_cycles: 0x1bacf917bf, max_idle_ns: 881590412290 ns + sched_clock: 64 bits at 60MHz, resolution 16ns, wraps every 4398046511098ns + Console: colour dummy device 40x30 + Calibrating delay loop (skipped), value calculated using timer frequency.. 120.00 BogoMIPS (lpj=600000) + pid_max: default: 32768 minimum: 301 + Mount-cache hash table entries: 2048 (order: 2, 16384 bytes) + Mountpoint-cache hash table entries: 2048 (order: 2, 16384 bytes) + Hierarchical SRCU implementation. + smp: Bringing up secondary CPUs ... + CPU0: online + CPU2: online + CPU3: online + smp: Brought up 1 node, 4 CPUs + devtmpfs: initialized + random: get_random_u32 called from bucket_table_alloc+0x198/0x1d8 with crng_init=0 + clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns + futex hash table entries: 1024 (order: 4, 65536 bytes) + NET: Registered protocol family 16 + Advanced Linux Sound Architecture Driver Initialized. + clocksource: Switched to clocksource riscv_clocksource + NET: Registered protocol family 2 + tcp_listen_portaddr_hash hash table entries: 512 (order: 1, 8192 bytes) + TCP established hash table entries: 8192 (order: 4, 65536 bytes) + TCP bind hash table entries: 8192 (order: 5, 131072 bytes) + TCP: Hash tables configured (established 8192 bind 8192) + UDP hash table entries: 512 (order: 2, 16384 bytes) + UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) + NET: Registered protocol family 1 + RPC: Registered named UNIX socket transport module. + RPC: Registered udp transport module. + RPC: Registered tcp transport module. + RPC: Registered tcp NFSv4.1 backchannel transport module. + Unpacking initramfs... + workingset: timestamp_bits=62 max_order=18 bucket_order=0 + NFS: Registering the id_resolver key type + Key type id_resolver registered + Key type id_legacy registered + nfs4filelayout_init: NFSv4 File Layout Driver Registering... + io scheduler noop registered + io scheduler cfq registered (default) + io scheduler mq-deadline registered + io scheduler kyber registered + Console: switching to colour frame buffer device 40x30 + Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled + console [ttyS0] disabled + f0300000.serial: ttyS0 at MMIO 0xf0300020 (irq = 20, base_baud = 1228800) is a 16550A + console [ttyS0] enabled + console [ttyS0] enabled + bootconsole [early0] disabled + bootconsole [early0] disabled + loop: module loaded + tun: Universal TUN/TAP device driver, 1.6 + ftmac100: Loading version 0.2 ... + ftmac100 e0100000.mac eth0: irq 21, mapped at (ptrval) + ftmac100 e0100000.mac eth0: generated random MAC address 4e:fd:bd:f3:04:fc + ftsdc010 f0e00000.mmc: mmc0 - using hw SDIO IRQ + mmc0: new SDHC card at address d555 + ftssp010 card registered! + mmcblk0: mmc0:d555 SD04G 3.79 GiB + NET: Registered protocol family 10 + mmcblk0: p1 + Segment Routing with IPv6 + sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver + NET: Registered protocol family 17 + NET: Registered protocol family 15 + ALSA device list: + #0: ftssp_ac97 controller + Freeing unused kernel memory: 13520K + This architecture does not have kernel memory protection. + Sysinit starting + Sat Apr 6 23:33:53 CST 2019 + nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering... ~ # -- 2.24.1

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[U-Boot] [PATCH v4 0/6] Raspberry Pi4: add support for DFU over USB
by Marek Szyprowski 08 Feb '20

08 Feb '20

Hi All! This patchset enables support for DFU over USB protocol on Raspberry Pi4 board. The board has DWC2 UDC controller connected to the USB-C power connector. Enabling DFU on it, make the u-boot development much more convenient, as one no longer needs to swap SD-card between RPi4 board and host machine to update the u-boot binary. Patches are based on current 'master' u-boot branch. They were tested on the 2019-07-10-raspbian-buster-lite.img sd-card image with the following lines added to config.txt: dtoverlay=dwc2,dr_mode=peripheral dtparam=i2c_arm=on dtparam=spi=on enable_uart=1 uart_2ndstage=1 kernel=u-boot.bin To enable DFU, one has to enter follwing command: # dfu 0 mmc 0 During the development of this feature I've encountered a serious bugs in FAT write code. Over-writing discontiguous files always caused serious filesystem corruption. This was especially anoying, because the system environment is kept on FAT volume in uboot.env file, so 'saveenv' basically corrupted the boot partiting on the second call. Another bunch of the issues in the FAT write code has been revealed while removing predefined file size limit in DFU MMC code and then running sandbox tests. I hope that my fixes for FAT code will be helpful for non-RPi users too. Best regards Marek Szyprowski Samsung R&D Institute Poland Changelog: v4: - rechecked the FAT related fixes, it turned out that much simpler patch fixes both issues discovered while working on DFU support; added simple sandbox based tests reveleaing the issue and showing correctness of the fix - rebased patches onto current u-boot's master branch: 4b19b89ca4a8 ("Merge tag 'rpi-next-2020.01' of https://github.com/mbgg/u-boot") v3: https://patchwork.ozlabs.org/cover/1200793/ - fixed one more FAT issue revealed by sandbox tests v3: (patch 6/6 posted separately): https://patchwork.ozlabs.org/patch/1195645/ - fixed non-RPi4 builds (missing #else ENV_DFU_SETTINGS def) - removed config.txt entity (not needed in uboot-based boot) - switched arm64 kernel filename to 'Image' v2: https://patchwork.ozlabs.org/cover/1166589/ - added changes to rpi_4_defconfig too (arm64 version) - extended DFU entity list by confix.txt, cmdline.txt and Image.gz - fixed missing '\0' at the end of dfu_alt_info env - added reviewed-by tags - added patches for DFU MMC to remove file size limit - added patch for fat write to fix issues on non-zero file offset (revealed by previous patch) v1: https://patchwork.ozlabs.org/cover/1162770/ - initial version Patch summary: Marek Szyprowski (6): fat: write: fix broken write to fragmented files fat: write: adjust data written in each partial write dfu: mmc: rearrange the code dfu: mmc: remove file size limit for io operations usb: dwc2_udc_otg: add bcm2835 SoC (Raspberry Pi4) support config: enable DFU over USB on Raspberry Pi4 boards configs/rpi_4_32b_defconfig | 11 +++ configs/rpi_4_defconfig | 11 +++ drivers/dfu/dfu_mmc.c | 93 +++++++++++++--------- drivers/usb/gadget/dwc2_udc_otg.c | 2 + drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c | 12 +-- fs/fat/fat_write.c | 8 +- include/configs/rpi.h | 20 +++++ 7 files changed, 112 insertions(+), 45 deletions(-) -- 2.17.1

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[PATCH 1/1] gitlab: use our own GRUB
by Heinrich Schuchardt 07 Feb '20

07 Feb '20

Up to now we have been relying on openSUSE repositories for GRUB on arm and arm64 though we have included GRUB in our Docker image. Use the GRUB included in our Docker image. Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- .gitlab-ci.yml | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 0f5271dcd3..7b3b7117f6 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -20,13 +20,12 @@ stages: - ln -s travis-ci /tmp/uboot-test-hooks/py/`hostname` - grub-mkimage --prefix="" -o ~/grub_x86.efi -O i386-efi normal echo lsefimmap lsefi lsefisystab efinet tftp minicmd - grub-mkimage --prefix="" -o ~/grub_x64.efi -O x86_64-efi normal echo lsefimmap lsefi lsefisystab efinet tftp minicmd - - mkdir ~/grub2-arm - - ( cd ~/grub2-arm; wget -O - http://download.opensuse.org/ports/armv7hl/distribution/leap/42.2/repo/oss/… | rpm2cpio | cpio -di ) - - mkdir ~/grub2-arm64 - - ( cd ~/grub2-arm64; wget -O - http://download.opensuse.org/ports/aarch64/distribution/leap/42.2/repo/oss/… | rpm2cpio | cpio -di ) + - cp /opt/grub/grubriscv64.efi ~/grub_riscv64.efi + - cp /opt/grub/grubaa64.efi ~/grub_arm64.efi + - cp /opt/grub/grubarm.efi ~/grub_arm.efi after_script: - - rm -rf ~/grub2* /tmp/uboot-test-hooks /tmp/venv + - rm -rf /tmp/uboot-test-hooks /tmp/venv script: # From buildman, exit code 129 means warnings only. If we've been asked to # use clang only do one configuration. -- 2.24.0

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