December 2019 - U-Boot

[U-Boot] [RFC/RFT PATCH v4 0/3] Add compressed Image booting support
by Atish Patra 06 Mar '20

06 Mar '20

This patch series extends booti to support compressed images as well. Following compressed images are supported for now. lzma, lzo, bzip2, gz. Other compression methods can easily be supported if required. The above compression methods are common ones that Linux kernel (ARM64/RISC-V) and U-Boot supports. Changes from v3->v4 1. Removed CONFIG_SYS_BOOTM_LEN usage. Atish Patra (3): lib: kconfig: Add option to set BZIP2 compression method image: Add a common compression type detection function. image: Add compressed Image parsing support in booti. cmd/booti.c | 40 ++++++++++++++++++++++++++- common/image.c | 23 ++++++++++++++++ doc/README.distro | 12 +++++++++ doc/board/sifive/fu540.rst | 55 ++++++++++++++++++++++++++++++++++++++ include/image.h | 21 +++++++++++++++ lib/Kconfig | 5 ++++ 6 files changed, 155 insertions(+), 1 deletion(-) -- 2.24.0

5 17

[PATCH] doc: net: Rewrite network driver documentation
by Andre Przywara 06 Mar '20

06 Mar '20

doc/README.drivers.eth seems like a good source for understanding U-Boot's network subsystem, but is only talking about legacy network drivers. This is particularly sad as proper documentation would help in porting drivers over to the driver model. Rewrite the document to describe network drivers in the new driver model world. Most driver callbacks/methods are almost identical in their semantic, but recv() differs in some important details. Also keep some parts of the original text at the end, to help understanding old drivers. Add some hints on how to port drivers over. This also uses the opportunity to reformat the document in reST, on the way moving it into doc/driver-model and adding it into the structure there. Signed-off-by: Andre Przywara <andre.przywara(a)arm.com> Reviewed-by: Simon Glass <sjg(a)chromium.org> --- doc/README.drivers.eth | 215 ---------------------------- doc/driver-model/ethernet.rst | 321 ++++++++++++++++++++++++++++++++++++++++++ doc/driver-model/index.rst | 1 + 3 files changed, 322 insertions(+), 215 deletions(-) delete mode 100644 doc/README.drivers.eth create mode 100644 doc/driver-model/ethernet.rst diff --git a/doc/README.drivers.eth b/doc/README.drivers.eth deleted file mode 100644 index 1a9a23b51b..0000000000 --- a/doc/README.drivers.eth +++ /dev/null @@ -1,215 +0,0 @@ -!!! WARNING !!! - -This guide describes to the old way of doing things. No new Ethernet drivers -should be implemented this way. All new drivers should be written against the -U-Boot core driver model. See doc/driver-model/README.txt - ------------------------ - Ethernet Driver Guide ------------------------ - -The networking stack in Das U-Boot is designed for multiple network devices -to be easily added and controlled at runtime. This guide is meant for people -who wish to review the net driver stack with an eye towards implementing your -own ethernet device driver. Here we will describe a new pseudo 'APE' driver. - ------------------- - Driver Functions ------------------- - -All functions you will be implementing in this document have the return value -meaning of 0 for success and non-zero for failure. - - ---------- - Register - ---------- - -When U-Boot initializes, it will call the common function eth_initialize(). -This will in turn call the board-specific board_eth_init() (or if that fails, -the cpu-specific cpu_eth_init()). These board-specific functions can do random -system handling, but ultimately they will call the driver-specific register -function which in turn takes care of initializing that particular instance. - -Keep in mind that you should code the driver to avoid storing state in global -data as someone might want to hook up two of the same devices to one board. -Any such information that is specific to an interface should be stored in a -private, driver-defined data structure and pointed to by eth->priv (see below). - -So the call graph at this stage would look something like: -board_init() - eth_initialize() - board_eth_init() / cpu_eth_init() - driver_register() - initialize eth_device - eth_register() - -At this point in time, the only thing you need to worry about is the driver's -register function. The pseudo code would look something like: -int ape_register(bd_t *bis, int iobase) -{ - struct ape_priv *priv; - struct eth_device *dev; - struct mii_dev *bus; - - priv = malloc(sizeof(*priv)); - if (priv == NULL) - return -ENOMEM; - - dev = malloc(sizeof(*dev)); - if (dev == NULL) { - free(priv); - return -ENOMEM; - } - - /* setup whatever private state you need */ - - memset(dev, 0, sizeof(*dev)); - sprintf(dev->name, "APE"); - - /* - * if your device has dedicated hardware storage for the - * MAC, read it and initialize dev->enetaddr with it - */ - ape_mac_read(dev->enetaddr); - - dev->iobase = iobase; - dev->priv = priv; - dev->init = ape_init; - dev->halt = ape_halt; - dev->send = ape_send; - dev->recv = ape_recv; - dev->write_hwaddr = ape_write_hwaddr; - - eth_register(dev); - -#ifdef CONFIG_PHYLIB - bus = mdio_alloc(); - if (!bus) { - free(priv); - free(dev); - return -ENOMEM; - } - - bus->read = ape_mii_read; - bus->write = ape_mii_write; - mdio_register(bus); -#endif - - return 1; -} - -The exact arguments needed to initialize your device are up to you. If you -need to pass more/less arguments, that's fine. You should also add the -prototype for your new register function to include/netdev.h. - -The return value for this function should be as follows: -< 0 - failure (hardware failure, not probe failure) ->=0 - number of interfaces detected - -You might notice that many drivers seem to use xxx_initialize() rather than -xxx_register(). This is the old naming convention and should be avoided as it -causes confusion with the driver-specific init function. - -Other than locating the MAC address in dedicated hardware storage, you should -not touch the hardware in anyway. That step is handled in the driver-specific -init function. Remember that we are only registering the device here, we are -not checking its state or doing random probing. - - ----------- - Callbacks - ----------- - -Now that we've registered with the ethernet layer, we can start getting some -real work done. You will need five functions: - int ape_init(struct eth_device *dev, bd_t *bis); - int ape_send(struct eth_device *dev, volatile void *packet, int length); - int ape_recv(struct eth_device *dev); - int ape_halt(struct eth_device *dev); - int ape_write_hwaddr(struct eth_device *dev); - -The init function checks the hardware (probing/identifying) and gets it ready -for send/recv operations. You often do things here such as resetting the MAC -and/or PHY, and waiting for the link to autonegotiate. You should also take -the opportunity to program the device's MAC address with the dev->enetaddr -member. This allows the rest of U-Boot to dynamically change the MAC address -and have the new settings be respected. - -The send function does what you think -- transmit the specified packet whose -size is specified by length (in bytes). You should not return until the -transmission is complete, and you should leave the state such that the send -function can be called multiple times in a row. - -The recv function should process packets as long as the hardware has them -readily available before returning. i.e. you should drain the hardware fifo. -For each packet you receive, you should call the net_process_received_packet() function on it -along with the packet length. The common code sets up packet buffers for you -already in the .bss (net_rx_packets), so there should be no need to allocate your -own. This doesn't mean you must use the net_rx_packets array however; you're -free to call the net_process_received_packet() function with any buffer you wish. So the pseudo -code here would look something like: -int ape_recv(struct eth_device *dev) -{ - int length, i = 0; - ... - while (packets_are_available()) { - ... - length = ape_get_packet(&net_rx_packets[i]); - ... - net_process_received_packet(&net_rx_packets[i], length); - ... - if (++i >= PKTBUFSRX) - i = 0; - ... - } - ... - return 0; -} - -The halt function should turn off / disable the hardware and place it back in -its reset state. It can be called at any time (before any call to the related -init function), so make sure it can handle this sort of thing. - -The write_hwaddr function should program the MAC address stored in dev->enetaddr -into the Ethernet controller. - -So the call graph at this stage would look something like: -some net operation (ping / tftp / whatever...) - eth_init() - dev->init() - eth_send() - dev->send() - eth_rx() - dev->recv() - eth_halt() - dev->halt() - --------------------------------- - CONFIG_PHYLIB / CONFIG_CMD_MII --------------------------------- - -If your device supports banging arbitrary values on the MII bus (pretty much -every device does), you should add support for the mii command. Doing so is -fairly trivial and makes debugging mii issues a lot easier at runtime. - -After you have called eth_register() in your driver's register function, add -a call to mdio_alloc() and mdio_register() like so: - bus = mdio_alloc(); - if (!bus) { - free(priv); - free(dev); - return -ENOMEM; - } - - bus->read = ape_mii_read; - bus->write = ape_mii_write; - mdio_register(bus); - -And then define the mii_read and mii_write functions if you haven't already. -Their syntax is straightforward: - int mii_read(struct mii_dev *bus, int addr, int devad, int reg); - int mii_write(struct mii_dev *bus, int addr, int devad, int reg, - u16 val); - -The read function should read the register 'reg' from the phy at address 'addr' -and return the result to its caller. The implementation for the write function -should logically follow. diff --git a/doc/driver-model/ethernet.rst b/doc/driver-model/ethernet.rst new file mode 100644 index 0000000000..359a0523cf --- /dev/null +++ b/doc/driver-model/ethernet.rst @@ -0,0 +1,321 @@ +Ethernet Driver Guide +======================= + +The networking stack in Das U-Boot is designed for multiple network devices +to be easily added and controlled at runtime. This guide is meant for people +who wish to review the net driver stack with an eye towards implementing your +own ethernet device driver. Here we will describe a new pseudo 'APE' driver. + +Most existing drivers do already - and new network driver MUST - use the +U-Boot core driver model. Generic information about this can be found in +doc/driver-model/design.rst, this document will thus focus on the network +specific code parts. +Some drivers are still using the old Ethernet interface, differences between +the two and hints about porting will be handled at the end. + +Driver framework +------------------ + +A network driver following the driver model must declare itself using +the UCLASS_ETH .id field in the U-Boot driver struct: + +.. code-block:: c + + U_BOOT_DRIVER(eth_ape) = { + .name = "eth_ape", + .id = UCLASS_ETH, + .of_match = eth_ape_ids, + .ofdata_to_platdata = eth_ape_ofdata_to_platdata, + .probe = eth_ape_probe, + .ops = &eth_ape_ops, + .priv_auto_alloc_size = sizeof(struct eth_ape_priv), + .platdata_auto_alloc_size = sizeof(struct eth_ape_pdata), + .flags = DM_FLAG_ALLOC_PRIV_DMA, + }; + +struct eth_ape_priv contains runtime per-instance data, like buffers, pointers +to current descriptors, current speed settings, pointers to PHY related data +(like struct mii_dev) and so on. Declaring its size in .priv_auto_alloc_size +will let the driver framework allocate it at the right time. +It can be retrieved using a dev_get_priv(dev) call. + +struct eth_ape_pdata contains static platform data, like the MMIO base address, +a hardware variant, the MAC address. ``struct eth_pdata eth_pdata`` +as the first member of this struct helps to avoid duplicated code. +If you don't need any more platform data beside the standard member, +just use sizeof(struct eth_pdata) for the platdata_auto_alloc_size. + +PCI devices add a line pointing to supported vendor/device ID pairs: + +.. code-block:: c + + static struct pci_device_id supported[] = { + { PCI_DEVICE(PCI_VENDOR_ID_APE, 0x4223) }, + {} + }; + + U_BOOT_PCI_DEVICE(eth_ape, supported); + +It is also possible to declare support for a whole class of PCI devices:: + + { PCI_DEVICE_CLASS(PCI_CLASS_SYSTEM_SDHCI << 8, 0xffff00) }, + +Device probing and instantiation will be handled by the driver model framework, +so follow the guidelines there. The probe() function would initialise the +platform specific parts of the hardware, like clocks, resets, GPIOs, the MDIO +bus. Also it would take care of any special PHY setup (power rails, enable +bits for internal PHYs, etc.). + +Driver methods +---------------- + +The real work will be done in the driver method functions the driver provides +by defining the members of struct eth_ops: + +.. code-block:: c + + struct eth_ops { + int (*start)(struct udevice *dev); + int (*send)(struct udevice *dev, void *packet, int length); + int (*recv)(struct udevice *dev, int flags, uchar **packetp); + int (*free_pkt)(struct udevice *dev, uchar *packet, int length); + void (*stop)(struct udevice *dev); + int (*mcast)(struct udevice *dev, const u8 *enetaddr, int join); + int (*write_hwaddr)(struct udevice *dev); + int (*read_rom_hwaddr)(struct udevice *dev); + }; + +An up-to-date version of this struct together with more information can be +found in include/net.h. + +Only start, stop, send and recv are required, the rest are optional and are +handled by generic code or ignored if not provided. + +The **start** function initialises the hardware and gets it ready for send/recv +operations. You often do things here such as resetting the MAC +and/or PHY, and waiting for the link to autonegotiate. You should also take +the opportunity to program the device's MAC address with the enetaddr member +of the generic struct eth_pdata (which would be the first member of your +own platdata struct). This allows the rest of U-Boot to dynamically change +the MAC address and have the new settings be respected. + +The **send** function does what you think -- transmit the specified packet +whose size is specified by length (in bytes). The packet buffer can (and +will!) be reused for subsequent calls to send(), so it must be no longer +used when the send() function returns. The easiest way to achieve this is +to wait until the transmission is complete. Alternatively, if supported by +the hardware, just waiting for the buffer to be consumed (by some DMA engine) +might be an option as well. +Another way of consuming the buffer could be to copy the data to be send, +then just queue the copied packet (for instance handing it over to a DMA +engine), and return immediately afterwards. +In any case you should leave the state such that the send function can be +called multiple times in a row. + +The **recv** function polls for availability of a new packet. If none is +available, it must return with -EAGAIN. +If a packet has been received, make sure it is accessible to the CPU +(invalidate caches if needed), then write its address to the packetp pointer, +and return the length. If there is an error (receive error, too short or too +long packet), return 0 if you require the packet to be cleaned up normally, +or a negative error code otherwise (cleanup not necessary or already done). +The U-Boot network stack will then process the packet. + +If **free_pkt** is defined, U-Boot will call it after a received packet has +been processed, so the packet buffer can be freed or recycled. Typically you +would hand it back to the hardware to acquire another packet. free_pkt() will +be called after recv(), for the same packet, so you don't necessarily need +to infer the buffer to free from the ``packet`` pointer, but can rely on that +being the last packet that recv() handled. +The common code sets up packet buffers for you already in the .bss +(net_rx_packets), so there should be no need to allocate your own. This doesn't +mean you must use the net_rx_packets array however; you're free to use any +buffer you wish. + +The **stop** function should turn off / disable the hardware and place it back +in its reset state. It can be called at any time (before any call to the +related start() function), so make sure it can handle this sort of thing. + +The (optional) **write_hwaddr** function should program the MAC address stored +in pdata->enetaddr into the Ethernet controller. + +So the call graph at this stage would look something like: + +.. code-block:: c + + (some net operation (ping / tftp / whatever...)) + eth_init() + ops->start() + eth_send() + ops->send() + eth_rx() + ops->recv() + (process packet) + if (ops->free_pkt) + ops->free_pkt() + eth_halt() + ops->stop() + + +CONFIG_PHYLIB / CONFIG_CMD_MII +-------------------------------- + +If your device supports banging arbitrary values on the MII bus (pretty much +every device does), you should add support for the mii command. Doing so is +fairly trivial and makes debugging mii issues a lot easier at runtime. + +In your driver's ``probe()`` function, add a call to mdio_alloc() and +mdio_register() like so: + +.. code-block:: c + + bus = mdio_alloc(); + if (!bus) { + ... + return -ENOMEM; + } + + bus->read = ape_mii_read; + bus->write = ape_mii_write; + mdio_register(bus); + +And then define the mii_read and mii_write functions if you haven't already. +Their syntax is straightforward:: + + int mii_read(struct mii_dev *bus, int addr, int devad, int reg); + int mii_write(struct mii_dev *bus, int addr, int devad, int reg, + u16 val); + +The read function should read the register 'reg' from the phy at address 'addr' +and return the result to its caller. The implementation for the write function +should logically follow. + +................................................................ + +Legacy network drivers +------------------------ + +!!! WARNING !!! + +This section below describes the old way of doing things. No new Ethernet +drivers should be implemented this way. All new drivers should be written +against the U-Boot core driver model, as described above. + +The actual callback functions are fairly similar, the differences are: + +- ``start()`` is called ``init()`` +- ``stop()`` is called ``halt()`` +- The ``recv()`` function must loop until all packets have been received, for + each packet it must call the net_process_received_packet() function, + handing it over the pointer and the length. Afterwards it should free + the packet, before checking for new data. + +For porting an old driver to the new driver model, split the existing recv() +function into the actual new recv() function, just fetching **one** packet, +remove the call to net_process_received_packet(), then move the packet +cleanup into the ``free_pkt()`` function. + +Registering the driver and probing a device is handled very differently, +follow the recommendations in the driver model design documentation for +instructions on how to port this over. For the records, the old way of +initialising a network driver is as follows: + +Old network driver registration +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +When U-Boot initializes, it will call the common function eth_initialize(). +This will in turn call the board-specific board_eth_init() (or if that fails, +the cpu-specific cpu_eth_init()). These board-specific functions can do random +system handling, but ultimately they will call the driver-specific register +function which in turn takes care of initializing that particular instance. + +Keep in mind that you should code the driver to avoid storing state in global +data as someone might want to hook up two of the same devices to one board. +Any such information that is specific to an interface should be stored in a +private, driver-defined data structure and pointed to by eth->priv (see below). + +So the call graph at this stage would look something like: + +.. code-block:: c + + board_init() + eth_initialize() + board_eth_init() / cpu_eth_init() + driver_register() + initialize eth_device + eth_register() + +At this point in time, the only thing you need to worry about is the driver's +register function. The pseudo code would look something like: + +.. code-block:: c + + int ape_register(bd_t *bis, int iobase) + { + struct ape_priv *priv; + struct eth_device *dev; + struct mii_dev *bus; + + priv = malloc(sizeof(*priv)); + if (priv == NULL) + return -ENOMEM; + + dev = malloc(sizeof(*dev)); + if (dev == NULL) { + free(priv); + return -ENOMEM; + } + + /* setup whatever private state you need */ + + memset(dev, 0, sizeof(*dev)); + sprintf(dev->name, "APE"); + + /* + * if your device has dedicated hardware storage for the + * MAC, read it and initialize dev->enetaddr with it + */ + ape_mac_read(dev->enetaddr); + + dev->iobase = iobase; + dev->priv = priv; + dev->init = ape_init; + dev->halt = ape_halt; + dev->send = ape_send; + dev->recv = ape_recv; + dev->write_hwaddr = ape_write_hwaddr; + + eth_register(dev); + + #ifdef CONFIG_PHYLIB + bus = mdio_alloc(); + if (!bus) { + free(priv); + free(dev); + return -ENOMEM; + } + + bus->read = ape_mii_read; + bus->write = ape_mii_write; + mdio_register(bus); + #endif + + return 1; + } + +The exact arguments needed to initialize your device are up to you. If you +need to pass more/less arguments, that's fine. You should also add the +prototype for your new register function to include/netdev.h. + +The return value for this function should be as follows: +< 0 - failure (hardware failure, not probe failure) +>=0 - number of interfaces detected + +You might notice that many drivers seem to use xxx_initialize() rather than +xxx_register(). This is the old naming convention and should be avoided as it +causes confusion with the driver-specific init function. + +Other than locating the MAC address in dedicated hardware storage, you should +not touch the hardware in anyway. That step is handled in the driver-specific +init function. Remember that we are only registering the device here, we are +not checking its state or doing random probing. diff --git a/doc/driver-model/index.rst b/doc/driver-model/index.rst index 6d55774b4c..b9df221627 100644 --- a/doc/driver-model/index.rst +++ b/doc/driver-model/index.rst @@ -8,6 +8,7 @@ Driver Model debugging design + ethernet fdt-fixup fs_firmware_loader i2c-howto -- 2.14.5

2 1

[PATCH 1/2] drivers: net: phy: aquantia: drop XGMII as a valid system interface proto
by Alex Marginean 06 Mar '20

06 Mar '20

Use either USXGMII or XFI in aquantia_set_proto and drop XGMII as a valid protocol configuration. The PHY doesn't support it, it's just used as an alias for one of the other two protocols. Signed-off-by: Florin Chiculita <florinlaurentiu.chiculita(a)nxp.com> Signed-off-by: Alex Marginean <alexandru.marginean(a)nxp.com> --- Depends on: https://patchwork.ozlabs.org/project/uboot/list/?series=142879 drivers/net/phy/aquantia.c | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/drivers/net/phy/aquantia.c b/drivers/net/phy/aquantia.c index 7817d3cb8d..2af09907a1 100644 --- a/drivers/net/phy/aquantia.c +++ b/drivers/net/phy/aquantia.c @@ -303,30 +303,29 @@ struct { AQUANTIA_VND1_GSTART_RATE_1G}, [PHY_INTERFACE_MODE_SGMII_2500] = {0x144, AQUANTIA_VND1_GSYSCFG_2_5G, AQUANTIA_VND1_GSTART_RATE_2_5G}, - [PHY_INTERFACE_MODE_XGMII] = {0x100, AQUANTIA_VND1_GSYSCFG_10G, - AQUANTIA_VND1_GSTART_RATE_10G}, [PHY_INTERFACE_MODE_XFI] = {0x100, AQUANTIA_VND1_GSYSCFG_10G, AQUANTIA_VND1_GSTART_RATE_10G}, [PHY_INTERFACE_MODE_USXGMII] = {0x080, AQUANTIA_VND1_GSYSCFG_10G, AQUANTIA_VND1_GSTART_RATE_10G}, }; -static int aquantia_set_proto(struct phy_device *phydev) +static int aquantia_set_proto(struct phy_device *phydev, + phy_interface_t interface) { int i; - if (!aquantia_syscfg[phydev->interface].cnt) + if (!aquantia_syscfg[interface].cnt) return 0; /* set the default rate to enable the SI link */ phy_write(phydev, MDIO_MMD_VEND1, AQUANTIA_VND1_GSTART_RATE, - aquantia_syscfg[phydev->interface].start_rate); + aquantia_syscfg[interface].start_rate); /* set selected protocol for all relevant line side link speeds */ - for (i = 0; i <= aquantia_syscfg[phydev->interface].cnt; i++) + for (i = 0; i <= aquantia_syscfg[interface].cnt; i++) phy_write(phydev, MDIO_MMD_VEND1, AQUANTIA_VND1_GSYSCFG_BASE + i, - aquantia_syscfg[phydev->interface].syscfg); + aquantia_syscfg[interface].syscfg); return 0; } @@ -429,6 +428,8 @@ int aquantia_config(struct phy_device *phydev) * on FW config */ if (interface == PHY_INTERFACE_MODE_XGMII) { + debug("use XFI or USXGMII SI protos, XGMII is not valid\n"); + reg_val1 = phy_read(phydev, MDIO_MMD_PHYXS, AQUANTIA_SYSTEM_INTERFACE_SR); if ((reg_val1 & AQUANTIA_SI_IN_USE_MASK) == AQUANTIA_SI_USXGMII) @@ -451,7 +452,7 @@ int aquantia_config(struct phy_device *phydev) mdelay(10); /* configure protocol based on phydev->interface */ - aquantia_set_proto(phydev); + aquantia_set_proto(phydev, interface); /* apply custom configuration based on DT */ aquantia_dts_config(phydev); -- 2.17.1

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[U-Boot] [PATCH V3 00/27] i.MX8MM support
by Peng Fan 05 Mar '20

05 Mar '20

V3: Added a new patch from Frieder: imx: mkimage_fit_atf: Fix FIT image for correct boot order Tag fixes for Frieder Drop rom_pointer use in patch 27/27 and clean up included files. 4bytes-> 4 bytes in patch 2/27 V2: Fixed comments from Lukasz and Frieder The following was newly added. imx8m: imx-regs: drop unused register definitions imx8m: restrict reset_cpu imx: mmc_env: update runtime SD/MMC boot env device imx8m: soc: probe clock device in arch_cpu_init_dm V1: https://patchwork.ozlabs.org/cover/1144326/ This is a splitted and updated patch from https://patchwork.ozlabs.org/cover/1128799/ which is to support both i.MX8MM and i.MX8MN. There is a README added, following that to test if you would like to. Frieder Schrempf (1): imx: mkimage_fit_atf: Fix FIT image for correct boot order Peng Fan (25): tools: imx8m_image: align spl bin image size ddr: imx8m: fix ddr firmware location when enable SPL OF imx8m: add image cfg for i.MX8MM lpddr4 imx: add IMX8MQ kconfig entry imx: add IMX8MM kconfig entry imx: imx8mm: add clock bindings header imx: add i.MX8MM cpu type imx: spl: add spl_board_boot_device for i.MX8MM imx8m: imx-regs: drop unused register definitions imx8m: update imx-regs for i.MX8MM imx: add get_cpu_rev support for i.MX8MM imx8m: add pin header for i.MX8MM imx: add i.MX8MM PE property imx8m: Fix MMU table issue for OPTEE memory imx8m: set BYPASS ID SWAP to avoid AXI bus errors imx8m: soc: enable SCTR clock before timer init imx8m: restrict reset_cpu imx8m: rename clock to clock_imx8mq imx8m: restructure clock.h imx8m: add clk support for i.MX8MM imx: mmc_env: update runtime SD/MMC boot env device imx8m: soc: probe clock device in arch_cpu_init_dm arm: dts: import i.MX8MM dtsi arm: dts: add i.MX8MM pin func imx: Add i.MX8MM EVK board support. Ye Li (1): imx8m: Configure trustzone region 0 for non-secure access arch/arm/dts/Makefile | 3 +- arch/arm/dts/imx8mm-evk-u-boot.dtsi | 92 + arch/arm/dts/imx8mm-evk.dts | 235 +++ arch/arm/dts/imx8mm-pinfunc.h | 629 +++++++ arch/arm/dts/imx8mm.dtsi | 733 ++++++++ arch/arm/include/asm/arch-imx/cpu.h | 6 + arch/arm/include/asm/arch-imx8m/clock.h | 491 +---- arch/arm/include/asm/arch-imx8m/clock_imx8mm.h | 387 ++++ arch/arm/include/asm/arch-imx8m/clock_imx8mq.h | 424 +++++ arch/arm/include/asm/arch-imx8m/imx-regs.h | 291 +-- arch/arm/include/asm/arch-imx8m/imx8mm_pins.h | 691 +++++++ arch/arm/include/asm/mach-imx/iomux-v3.h | 4 + arch/arm/include/asm/mach-imx/sys_proto.h | 8 + arch/arm/mach-imx/cpu.c | 12 + arch/arm/mach-imx/imx8m/Kconfig | 17 +- arch/arm/mach-imx/imx8m/Makefile | 4 +- arch/arm/mach-imx/imx8m/clock_imx8mm.c | 306 +++ .../arm/mach-imx/imx8m/{clock.c => clock_imx8mq.c} | 5 +- arch/arm/mach-imx/imx8m/clock_slice.c | 63 + arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg | 16 + arch/arm/mach-imx/imx8m/soc.c | 129 +- arch/arm/mach-imx/mkimage_fit_atf.sh | 10 +- arch/arm/mach-imx/mmc_env.c | 3 + arch/arm/mach-imx/spl.c | 8 + board/freescale/imx8mm_evk/Kconfig | 12 + board/freescale/imx8mm_evk/MAINTAINERS | 6 + board/freescale/imx8mm_evk/Makefile | 12 + board/freescale/imx8mm_evk/README | 37 + board/freescale/imx8mm_evk/imx8mm_evk.c | 29 + board/freescale/imx8mm_evk/lpddr4_timing.c | 1980 ++++++++++++++++++++ board/freescale/imx8mm_evk/spl.c | 129 ++ configs/imx8mm_evk_defconfig | 74 + drivers/ddr/imx/imx8m/helper.c | 12 +- include/configs/imx8mm_evk.h | 153 ++ include/dt-bindings/clock/imx8mm-clock.h | 253 +++ tools/imx8m_image.sh | 5 +- 36 files changed, 6562 insertions(+), 707 deletions(-) create mode 100644 arch/arm/dts/imx8mm-evk-u-boot.dtsi create mode 100644 arch/arm/dts/imx8mm-evk.dts create mode 100644 arch/arm/dts/imx8mm-pinfunc.h create mode 100644 arch/arm/dts/imx8mm.dtsi create mode 100644 arch/arm/include/asm/arch-imx8m/clock_imx8mm.h create mode 100644 arch/arm/include/asm/arch-imx8m/clock_imx8mq.h create mode 100644 arch/arm/include/asm/arch-imx8m/imx8mm_pins.h create mode 100644 arch/arm/mach-imx/imx8m/clock_imx8mm.c rename arch/arm/mach-imx/imx8m/{clock.c => clock_imx8mq.c} (99%) create mode 100644 arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg create mode 100644 board/freescale/imx8mm_evk/Kconfig create mode 100644 board/freescale/imx8mm_evk/MAINTAINERS create mode 100644 board/freescale/imx8mm_evk/Makefile create mode 100644 board/freescale/imx8mm_evk/README create mode 100644 board/freescale/imx8mm_evk/imx8mm_evk.c create mode 100644 board/freescale/imx8mm_evk/lpddr4_timing.c create mode 100644 board/freescale/imx8mm_evk/spl.c create mode 100644 configs/imx8mm_evk_defconfig create mode 100644 include/configs/imx8mm_evk.h create mode 100644 include/dt-bindings/clock/imx8mm-clock.h -- 2.16.4

5 40

[U-Boot] [PATCH] usb: ehci-mx5: Fix bus enumeration for DM case
by Marek Vasut 29 Feb '20

29 Feb '20

It is likely that the DM conversion of EHCI iMX5 driver was a derivative of EHCI VF, however the conversion is incomplete and is missing the bind workaround, which updates dev->seq number. Without this, all controllers have dev->seq number 0 . Add this bind workaround into EHCI iMX5 driver as well. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Abel Vesa <abel.vesa(a)nxp.com> Cc: Adam Ford <aford173(a)gmail.com> Cc: Fabio Estevam <festevam(a)gmail.com> Cc: Ludwig Zenz <lzenz(a)dh-electronics.com> Cc: Peng Fan <peng.fan(a)nxp.com> Cc: Stefano Babic <sbabic(a)denx.de> Cc: Vagrant Cascadian <vagrant(a)debian.org> --- drivers/usb/host/ehci-mx5.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/usb/host/ehci-mx5.c b/drivers/usb/host/ehci-mx5.c index 0b32728c57..4db513f4e5 100644 --- a/drivers/usb/host/ehci-mx5.c +++ b/drivers/usb/host/ehci-mx5.c @@ -301,6 +301,22 @@ static int ehci_usb_ofdata_to_platdata(struct udevice *dev) return 0; } +static int ehci_usb_bind(struct udevice *dev) +{ + static int num_controllers; + + /* + * Without this hack, if we return ENODEV for USB Controller 0, on + * probe for the next controller, USB Controller 1 will be given a + * sequence number of 0. This conflicts with our requirement of + * sequence numbers while initialising the peripherals. + */ + dev->req_seq = num_controllers; + num_controllers++; + + return 0; +} + static int ehci_usb_probe(struct udevice *dev) { struct usb_platdata *plat = dev_get_platdata(dev); @@ -362,6 +378,7 @@ U_BOOT_DRIVER(usb_mx5) = { .id = UCLASS_USB, .of_match = mx5_usb_ids, .ofdata_to_platdata = ehci_usb_ofdata_to_platdata, + .bind = ehci_usb_bind, .probe = ehci_usb_probe, .remove = ehci_deregister, .ops = &ehci_usb_ops, -- 2.20.1

2 5

[U-Boot] Starting u-boot in USB otg mode
by rivael_il 27 Feb '20

27 Feb '20

Hello u-booters! I want to load u-boot-sunxi-with-spl.bin and make it operate the USB in otg mode. (Where the host can still be connected to the board). How can I achieve this? (I have attempted to use: "usb0:dr_mode=otg,phy_type=utmi\0" without success). Thank you, Michael

5 11

[U-Boot] [PATCH 1/2] sunxi: fix support board-specific CONFIG_PREBOOT
by Jonas Smedegaard 27 Feb '20

27 Feb '20

commit 37304aaf60bf ("Convert CONFIG_USE_PREBOOT and CONFIG_PREBOOT to Kconfig") intended to support CONFIG_PREBOOT, but include/configs/sunxi-common.h hardcodes preboot as part of internally defined CONSOLE_STDIN_SETTINGS, silently ignoring any board-specific CONFIG_PREBOOT. Tested-by: Jonas Smedegaard <dr(a)jones.dk> Signed-off-by: Jonas Smedegaard <dr(a)jones.dk> Series-Cc: Jagan Teki <jagan(a)amarulasolutions.com> --- include/configs/sunxi-common.h | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index d7133a73fc..2069884b63 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -432,8 +432,13 @@ extern int soft_i2c_gpio_scl; #include <config_distro_bootcmd.h> #ifdef CONFIG_USB_KEYBOARD +#ifdef CONFIG_USE_PREBOOT +#ifndef CONFIG_PREBOOT +#define CONFIG_PREBOOT \ + "usb start" +#endif +#endif #define CONSOLE_STDIN_SETTINGS \ - "preboot=usb start\0" \ "stdin=serial,usbkbd\0" #else #define CONSOLE_STDIN_SETTINGS \ -- 2.23.0.rc1

2 6

[U-Boot] RFC: Migration target date for DM_ETH
by Heinrich Schuchardt 26 Feb '20

26 Feb '20

Currently dozens of boards still do not use the driver model for the network devices. This makes integration between devices in the UEFI sub-system with the U-Boot devices complicated. See: https://travis-ci.org/xypron2/u-boot/builds/569675547 In doc/driver-model/migration.rst I am missing a migration target day for DM_ETH. Shouldn't define one? 2020-07 should be realistic. Best regards Heinrich

4 5

[U-Boot] [PATCH v2 00/10] bootstage: TPL and SPL improvements
by Simon Glass 26 Feb '20

26 Feb '20

At present bootstage cannot be fully used on x86 since it violates a few U-Boot rules, mostly accessing pre-relocation memory after relocation. This series corrects this and adds better support for using bootstage in TPL. It also includes a few improvements to tiny-printf. Changes in v2: - Add a new patch to support %p without DEBUG - Adjust SPL logic to avoid failing if TPL does not provide bootstage data - Add a new patch to support %p without DEBUG in tiny-printf Simon Glass (10): tiny-printf: Reduce size by removing ctype tiny-printf: Add print_grouped_ull() tiny-printf: Reorder code to support %p bloblist: Reserve an aligned base bootstage: Store the next ID in the stash bootstage: Fix counting of entries in stash bootstage: Avoid conflicts between stash/unstash bootstage: Correct relocation algorithm bootstage: Mark the start/end of TPL and SPL separately bootstage: Allow SPL to obtain bootstage info from TPL common/board_f.c | 2 ++ common/board_r.c | 1 - common/bootstage.c | 53 ++++++++++++++++++++++++++++++--------------- common/spl/spl.c | 23 ++++++++++++++++---- include/bootstage.h | 2 ++ lib/tiny-printf.c | 29 ++++++++++++++++++++----- 6 files changed, 81 insertions(+), 29 deletions(-) -- 2.23.0.866.gb869b98d4c-goog

6 29

[v4 1/4] Revert "ata: fsl_ahci: Add sata DM support for Freescale powerpc socs"
by Peng Ma 26 Feb '20

26 Feb '20

This reverts commit 1ee494291880fd51ef0c5f7342e072bdb069d7ff. Commit 1ee494291880 ("ata: fsl_ahci: Add sata DM support for Freescale powerpc socs") introduced SCSI layer to call AHCI private API in order to support sata operations, In DM mode, This is not necessary for non-AHCI sata. So revert it and have already updated the driver itself to operate sata directly. Reviewed-by: Stefan Roese <sr(a)denx.de> Signed-off-by: Peng Ma <peng.ma(a)nxp.com> --- Changed for v4 - merge patch1 and patch5 to patch1 drivers/ata/Kconfig | 10 - drivers/ata/Makefile | 1 - drivers/ata/fsl_ahci.c | 1031 ---------------------------------------- 3 files changed, 1042 deletions(-) delete mode 100644 drivers/ata/fsl_ahci.c diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig index fe589d3aa8..d8c9756c2a 100644 --- a/drivers/ata/Kconfig +++ b/drivers/ata/Kconfig @@ -59,16 +59,6 @@ config DWC_AHCI Enable this driver to support Sata devices through Synopsys DWC AHCI module. -config FSL_AHCI - bool "Enable Freescale AHCI driver support" - select SCSI_AHCI - depends on AHCI - depends on DM_SCSI - help - Enable this driver to support Sata devices found in - some Freescale PowerPC SoCs. - - config DWC_AHSATA bool "Enable DWC AHSATA driver support" select LIBATA diff --git a/drivers/ata/Makefile b/drivers/ata/Makefile index 6e03384f81..a69edb10f7 100644 --- a/drivers/ata/Makefile +++ b/drivers/ata/Makefile @@ -4,7 +4,6 @@ # Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. obj-$(CONFIG_DWC_AHCI) += dwc_ahci.o -obj-$(CONFIG_FSL_AHCI) += fsl_ahci.o obj-$(CONFIG_AHCI) += ahci-uclass.o obj-$(CONFIG_AHCI_PCI) += ahci-pci.o obj-$(CONFIG_SCSI_AHCI) += ahci.o diff --git a/drivers/ata/fsl_ahci.c b/drivers/ata/fsl_ahci.c deleted file mode 100644 index 4ccfe23593..0000000000 --- a/drivers/ata/fsl_ahci.c +++ /dev/null @@ -1,1031 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * NXP PPC SATA platform driver - * - * (C) Copyright 2019 NXP, Inc. - * - */ -#include <common.h> -#include <cpu_func.h> -#include <asm/fsl_serdes.h> -#include <dm/lists.h> -#include <dm.h> -#include <ahci.h> -#include <scsi.h> -#include <libata.h> -#include <sata.h> -#include <malloc.h> -#include <memalign.h> -#include <fis.h> - -#include "fsl_sata.h" - -struct fsl_ahci_priv { - u32 base; - u32 flag; - u32 number; - fsl_sata_t *fsl_sata; -}; - -static int fsl_ahci_bind(struct udevice *dev) -{ - return device_bind_driver(dev, "fsl_ahci_scsi", "fsl_ahci_scsi", NULL); -} - -static int fsl_ahci_ofdata_to_platdata(struct udevice *dev) -{ - struct fsl_ahci_priv *priv = dev_get_priv(dev); - - priv->number = dev_read_u32_default(dev, "sata-number", -1); - priv->flag = dev_read_u32_default(dev, "sata-fpdma", -1); - - priv->base = dev_read_addr(dev); - if (priv->base == FDT_ADDR_T_NONE) - return -EINVAL; - - return 0; -} - -static int ata_wait_register(unsigned __iomem *addr, u32 mask, - u32 val, u32 timeout_msec) -{ - int i; - - for (i = 0; ((in_le32(addr) & mask) != val) && i < timeout_msec; i++) - mdelay(1); - - return (i < timeout_msec) ? 0 : -1; -} - -static void fsl_sata_dump_sfis(struct sata_fis_d2h *s) -{ - printf("Status FIS dump:\n\r"); - printf("fis_type: %02x\n\r", s->fis_type); - printf("pm_port_i: %02x\n\r", s->pm_port_i); - printf("status: %02x\n\r", s->status); - printf("error: %02x\n\r", s->error); - printf("lba_low: %02x\n\r", s->lba_low); - printf("lba_mid: %02x\n\r", s->lba_mid); - printf("lba_high: %02x\n\r", s->lba_high); - printf("device: %02x\n\r", s->device); - printf("lba_low_exp: %02x\n\r", s->lba_low_exp); - printf("lba_mid_exp: %02x\n\r", s->lba_mid_exp); - printf("lba_high_exp: %02x\n\r", s->lba_high_exp); - printf("res1: %02x\n\r", s->res1); - printf("sector_count: %02x\n\r", s->sector_count); - printf("sector_count_exp: %02x\n\r", s->sector_count_exp); -} - -static void fsl_sata_dump_regs(fsl_sata_reg_t __iomem *reg) -{ - printf("\n\rSATA: %08x\n\r", (u32)reg); - printf("CQR: %08x\n\r", in_le32(&reg->cqr)); - printf("CAR: %08x\n\r", in_le32(&reg->car)); - printf("CCR: %08x\n\r", in_le32(&reg->ccr)); - printf("CER: %08x\n\r", in_le32(&reg->cer)); - printf("CQR: %08x\n\r", in_le32(&reg->cqr)); - printf("DER: %08x\n\r", in_le32(&reg->der)); - printf("CHBA: %08x\n\r", in_le32(&reg->chba)); - printf("HStatus: %08x\n\r", in_le32(&reg->hstatus)); - printf("HControl: %08x\n\r", in_le32(&reg->hcontrol)); - printf("CQPMP: %08x\n\r", in_le32(&reg->cqpmp)); - printf("SIG: %08x\n\r", in_le32(&reg->sig)); - printf("ICC: %08x\n\r", in_le32(&reg->icc)); - printf("SStatus: %08x\n\r", in_le32(&reg->sstatus)); - printf("SError: %08x\n\r", in_le32(&reg->serror)); - printf("SControl: %08x\n\r", in_le32(&reg->scontrol)); - printf("SNotification: %08x\n\r", in_le32(&reg->snotification)); - printf("TransCfg: %08x\n\r", in_le32(&reg->transcfg)); - printf("TransStatus: %08x\n\r", in_le32(&reg->transstatus)); - printf("LinkCfg: %08x\n\r", in_le32(&reg->linkcfg)); - printf("LinkCfg1: %08x\n\r", in_le32(&reg->linkcfg1)); - printf("LinkCfg2: %08x\n\r", in_le32(&reg->linkcfg2)); - printf("LinkStatus: %08x\n\r", in_le32(&reg->linkstatus)); - printf("LinkStatus1: %08x\n\r", in_le32(&reg->linkstatus1)); - printf("PhyCtrlCfg: %08x\n\r", in_le32(&reg->phyctrlcfg)); - printf("SYSPR: %08x\n\r", in_be32(&reg->syspr)); -} - -static int init_sata(struct fsl_ahci_priv *priv) -{ - int i; - u32 cda; - u32 val32; - u32 sig; - fsl_sata_t *sata; - u32 length, align; - cmd_hdr_tbl_t *cmd_hdr; - fsl_sata_reg_t __iomem *reg; - - int dev = priv->number; - - if (dev < 0 || dev > (CONFIG_SYS_SATA_MAX_DEVICE - 1)) { - printf("the sata index %d is out of ranges\n\r", dev); - return -EINVAL; - } - -#ifdef CONFIG_MPC85xx - if (dev == 0 && (!is_serdes_configured(SATA1))) { - printf("SATA%d [dev = %d] is not enabled\n", dev + 1, dev); - return -EINVAL; - } - if (dev == 1 && (!is_serdes_configured(SATA2))) { - printf("SATA%d [dev = %d] is not enabled\n", dev + 1, dev); - return -EINVAL; - } -#endif - - /* Allocate SATA device driver struct */ - sata = (fsl_sata_t *)malloc(sizeof(fsl_sata_t)); - if (!sata) { - printf("alloc the sata device struct failed\n\r"); - return -ENOMEM; - } - /* Zero all of the device driver struct */ - memset((void *)sata, 0, sizeof(fsl_sata_t)); - - sata->dma_flag = priv->flag; - snprintf(sata->name, 12, "SATA%d", dev); - - /* Set the controller register base address to device struct */ - reg = (fsl_sata_reg_t *)priv->base; - sata->reg_base = reg; - - /* Allocate the command header table, 4 bytes aligned */ - length = sizeof(struct cmd_hdr_tbl); - align = SATA_HC_CMD_HDR_TBL_ALIGN; - sata->cmd_hdr_tbl_offset = (void *)malloc(length + align); - if (!sata->cmd_hdr_tbl_offset) { - printf("alloc the command header failed\n\r"); - return -ENOMEM; - } - - cmd_hdr = (cmd_hdr_tbl_t *)(((u32)sata->cmd_hdr_tbl_offset + align) - & ~(align - 1)); - sata->cmd_hdr = cmd_hdr; - - /* Zero all of the command header table */ - memset((void *)sata->cmd_hdr_tbl_offset, 0, length + align); - - /* Allocate command descriptor for all command */ - length = sizeof(struct cmd_desc) * SATA_HC_MAX_CMD; - align = SATA_HC_CMD_DESC_ALIGN; - sata->cmd_desc_offset = (void *)malloc(length + align); - if (!sata->cmd_desc_offset) { - printf("alloc the command descriptor failed\n\r"); - return -ENOMEM; - } - sata->cmd_desc = (cmd_desc_t *)(((u32)sata->cmd_desc_offset + align) - & ~(align - 1)); - /* Zero all of command descriptor */ - memset((void *)sata->cmd_desc_offset, 0, length + align); - - /* Link the command descriptor to command header */ - for (i = 0; i < SATA_HC_MAX_CMD; i++) { - cda = ((u32)sata->cmd_desc + SATA_HC_CMD_DESC_SIZE * i) - & ~(CMD_HDR_CDA_ALIGN - 1); - cmd_hdr->cmd_slot[i].cda = cpu_to_le32(cda); - } - - /* To have safe state, force the controller offline */ - val32 = in_le32(&reg->hcontrol); - val32 &= ~HCONTROL_ONOFF; - val32 |= HCONTROL_FORCE_OFFLINE; - out_le32(&reg->hcontrol, val32); - - /* Wait the controller offline */ - ata_wait_register(&reg->hstatus, HSTATUS_ONOFF, 0, 1000); - - /* Set the command header base address to CHBA register to tell DMA */ - out_le32(&reg->chba, (u32)cmd_hdr & ~0x3); - - /* Snoop for the command header */ - val32 = in_le32(&reg->hcontrol); - val32 |= HCONTROL_HDR_SNOOP; - out_le32(&reg->hcontrol, val32); - - /* Disable all of interrupts */ - val32 = in_le32(&reg->hcontrol); - val32 &= ~HCONTROL_INT_EN_ALL; - out_le32(&reg->hcontrol, val32); - - /* Clear all of interrupts */ - val32 = in_le32(&reg->hstatus); - out_le32(&reg->hstatus, val32); - - /* Set the ICC, no interrupt coalescing */ - out_le32(&reg->icc, 0x01000000); - - /* No PM attatched, the SATA device direct connect */ - out_le32(&reg->cqpmp, 0); - - /* Clear SError register */ - val32 = in_le32(&reg->serror); - out_le32(&reg->serror, val32); - - /* Clear CER register */ - val32 = in_le32(&reg->cer); - out_le32(&reg->cer, val32); - - /* Clear DER register */ - val32 = in_le32(&reg->der); - out_le32(&reg->der, val32); - - /* No device detection or initialization action requested */ - out_le32(&reg->scontrol, 0x00000300); - - /* Configure the transport layer, default value */ - out_le32(&reg->transcfg, 0x08000016); - - /* Configure the link layer, default value */ - out_le32(&reg->linkcfg, 0x0000ff34); - - /* Bring the controller online */ - val32 = in_le32(&reg->hcontrol); - val32 |= HCONTROL_ONOFF; - out_le32(&reg->hcontrol, val32); - - mdelay(100); - - /* print sata device name */ - printf("%s ", sata->name); - - /* Wait PHY RDY signal changed for 500ms */ - ata_wait_register(&reg->hstatus, HSTATUS_PHY_RDY, - HSTATUS_PHY_RDY, 500); - - /* Check PHYRDY */ - val32 = in_le32(&reg->hstatus); - if (val32 & HSTATUS_PHY_RDY) { - sata->link = 1; - } else { - sata->link = 0; - printf("(No RDY)\n\r"); - return -EINVAL; - } - - /* Wait for signature updated, which is 1st D2H */ - ata_wait_register(&reg->hstatus, HSTATUS_SIGNATURE, - HSTATUS_SIGNATURE, 10000); - - if (val32 & HSTATUS_SIGNATURE) { - sig = in_le32(&reg->sig); - debug("Signature updated, the sig =%08x\n\r", sig); - sata->ata_device_type = ata_dev_classify(sig); - } - - /* Check the speed */ - val32 = in_le32(&reg->sstatus); - if ((val32 & SSTATUS_SPD_MASK) == SSTATUS_SPD_GEN1) - printf("(1.5 Gbps)\n\r"); - else if ((val32 & SSTATUS_SPD_MASK) == SSTATUS_SPD_GEN2) - printf("(3 Gbps)\n\r"); - - priv->fsl_sata = sata; - - return 0; -} - -static int fsl_ata_exec_ata_cmd(struct fsl_sata *sata, - struct sata_fis_h2d *cfis, - int is_ncq, int tag, - u8 *buffer, u32 len) -{ - cmd_hdr_entry_t *cmd_hdr; - cmd_desc_t *cmd_desc; - sata_fis_h2d_t *h2d; - prd_entry_t *prde; - u32 ext_c_ddc; - u32 prde_count; - u32 val32; - u32 ttl; - u32 der; - int i; - - fsl_sata_reg_t *reg = sata->reg_base; - - /* Check xfer length */ - if (len > SATA_HC_MAX_XFER_LEN) { - printf("max transfer length is 64MB\n\r"); - return 0; - } - - /* Setup the command descriptor */ - cmd_desc = sata->cmd_desc + tag; - - /* Get the pointer cfis of command descriptor */ - h2d = (sata_fis_h2d_t *)cmd_desc->cfis; - - /* Zero the cfis of command descriptor */ - memset((void *)h2d, 0, SATA_HC_CMD_DESC_CFIS_SIZE); - - /* Copy the cfis from user to command descriptor */ - h2d->fis_type = cfis->fis_type; - h2d->pm_port_c = cfis->pm_port_c; - h2d->command = cfis->command; - - h2d->features = cfis->features; - h2d->features_exp = cfis->features_exp; - - h2d->lba_low = cfis->lba_low; - h2d->lba_mid = cfis->lba_mid; - h2d->lba_high = cfis->lba_high; - h2d->lba_low_exp = cfis->lba_low_exp; - h2d->lba_mid_exp = cfis->lba_mid_exp; - h2d->lba_high_exp = cfis->lba_high_exp; - - if (!is_ncq) { - h2d->sector_count = cfis->sector_count; - h2d->sector_count_exp = cfis->sector_count_exp; - } else { /* NCQ */ - h2d->sector_count = (u8)(tag << 3); - } - - h2d->device = cfis->device; - h2d->control = cfis->control; - - /* Setup the PRD table */ - prde = (prd_entry_t *)cmd_desc->prdt; - memset((void *)prde, 0, sizeof(struct prdt)); - - prde_count = 0; - ttl = len; - for (i = 0; i < SATA_HC_MAX_PRD_DIRECT; i++) { - if (!len) - break; - prde->dba = cpu_to_le32((u32)buffer & ~0x3); - debug("dba = %08x\n\r", (u32)buffer); - - if (len < PRD_ENTRY_MAX_XFER_SZ) { - ext_c_ddc = PRD_ENTRY_DATA_SNOOP | len; - debug("ext_c_ddc1 = %08x, len = %08x\n\r", - ext_c_ddc, len); - prde->ext_c_ddc = cpu_to_le32(ext_c_ddc); - prde_count++; - prde++; - } else { - ext_c_ddc = PRD_ENTRY_DATA_SNOOP; /* 4M bytes */ - debug("ext_c_ddc2 = %08x, len = %08x\n\r", - ext_c_ddc, len); - prde->ext_c_ddc = cpu_to_le32(ext_c_ddc); - buffer += PRD_ENTRY_MAX_XFER_SZ; - len -= PRD_ENTRY_MAX_XFER_SZ; - prde_count++; - prde++; - } - } - - /* Setup the command slot of cmd hdr */ - cmd_hdr = (cmd_hdr_entry_t *)&sata->cmd_hdr->cmd_slot[tag]; - - cmd_hdr->cda = cpu_to_le32((u32)cmd_desc & ~0x3); - - val32 = prde_count << CMD_HDR_PRD_ENTRY_SHIFT; - val32 |= sizeof(sata_fis_h2d_t); - cmd_hdr->prde_fis_len = cpu_to_le32(val32); - - cmd_hdr->ttl = cpu_to_le32(ttl); - - if (!is_ncq) - val32 = CMD_HDR_ATTR_RES | CMD_HDR_ATTR_SNOOP; - else - val32 = CMD_HDR_ATTR_RES | CMD_HDR_ATTR_SNOOP | - CMD_HDR_ATTR_FPDMA; - - tag &= CMD_HDR_ATTR_TAG; - val32 |= tag; - - debug("attribute = %08x\n\r", val32); - cmd_hdr->attribute = cpu_to_le32(val32); - - /* Make sure cmd desc and cmd slot valid before command issue */ - sync(); - - /* PMP*/ - val32 = (u32)(h2d->pm_port_c & 0x0f); - out_le32(&reg->cqpmp, val32); - - /* Wait no active */ - if (ata_wait_register(&reg->car, (1 << tag), 0, 10000)) - printf("Wait no active time out\n\r"); - - /* Issue command */ - if (!(in_le32(&reg->cqr) & (1 << tag))) { - val32 = 1 << tag; - out_le32(&reg->cqr, val32); - } - - /* Wait command completed for 10s */ - if (ata_wait_register(&reg->ccr, (1 << tag), (1 << tag), 10000)) { - if (!is_ncq) - printf("Non-NCQ command time out\n\r"); - else - printf("NCQ command time out\n\r"); - } - - val32 = in_le32(&reg->cer); - - if (val32) { - fsl_sata_dump_sfis((struct sata_fis_d2h *)cmd_desc->sfis); - printf("CE at device\n\r"); - fsl_sata_dump_regs(reg); - der = in_le32(&reg->der); - out_le32(&reg->cer, val32); - out_le32(&reg->der, der); - } - - /* Clear complete flags */ - val32 = in_le32(&reg->ccr); - out_le32(&reg->ccr, val32); - - return len; -} - -static int fsl_sata_exec_cmd(struct fsl_sata *sata, struct sata_fis_h2d *cfis, - enum cmd_type command_type, int tag, u8 *buffer, - u32 len) -{ - int rc; - - if (tag > SATA_HC_MAX_CMD || tag < 0) { - printf("tag is out of range, tag=%d\n\r", tag); - return -1; - } - - switch (command_type) { - case CMD_ATA: - rc = fsl_ata_exec_ata_cmd(sata, cfis, 0, tag, buffer, len); - return rc; - case CMD_NCQ: - rc = fsl_ata_exec_ata_cmd(sata, cfis, 1, tag, buffer, len); - return rc; - case CMD_ATAPI: - case CMD_VENDOR_BIST: - case CMD_BIST: - printf("not support now\n\r"); - return -1; - default: - break; - } - - return -1; -} - -static void fsl_sata_identify(fsl_sata_t *sata, u16 *id) -{ - struct sata_fis_h2d h2d, *cfis = &h2d; - - memset(cfis, 0, sizeof(struct sata_fis_h2d)); - - cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D; - cfis->pm_port_c = 0x80; /* is command */ - cfis->command = ATA_CMD_ID_ATA; - - fsl_sata_exec_cmd(sata, cfis, CMD_ATA, 0, (u8 *)id, ATA_ID_WORDS * 2); - ata_swap_buf_le16(id, ATA_ID_WORDS); -} - -static void fsl_sata_xfer_mode(fsl_sata_t *sata, u16 *id) -{ - sata->pio = id[ATA_ID_PIO_MODES]; - sata->mwdma = id[ATA_ID_MWDMA_MODES]; - sata->udma = id[ATA_ID_UDMA_MODES]; - debug("pio %04x, mwdma %04x, udma %04x\n\r", sata->pio, - sata->mwdma, sata->udma); -} - -static void fsl_sata_init_wcache(fsl_sata_t *sata, u16 *id) -{ - if (ata_id_has_wcache(id) && ata_id_wcache_enabled(id)) - sata->wcache = 1; - if (ata_id_has_flush(id)) - sata->flush = 1; - if (ata_id_has_flush_ext(id)) - sata->flush_ext = 1; -} - -static void fsl_sata_set_features(fsl_sata_t *sata) -{ - struct sata_fis_h2d h2d, *cfis = &h2d; - u8 udma_cap; - - memset(cfis, 0, sizeof(struct sata_fis_h2d)); - - cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D; - cfis->pm_port_c = 0x80; /* is command */ - cfis->command = ATA_CMD_SET_FEATURES; - cfis->features = SETFEATURES_XFER; - - /* First check the device capablity */ - udma_cap = (u8)(sata->udma & 0xff); - debug("udma_cap %02x\n\r", udma_cap); - - if (udma_cap == ATA_UDMA6) - cfis->sector_count = XFER_UDMA_6; - if (udma_cap == ATA_UDMA5) - cfis->sector_count = XFER_UDMA_5; - if (udma_cap == ATA_UDMA4) - cfis->sector_count = XFER_UDMA_4; - if (udma_cap == ATA_UDMA3) - cfis->sector_count = XFER_UDMA_3; - - fsl_sata_exec_cmd(sata, cfis, CMD_ATA, 0, NULL, 0); -} - -static u32 fsl_sata_rw_cmd(fsl_sata_t *sata, u32 start, u32 blkcnt, - u8 *buffer, int is_write) -{ - struct sata_fis_h2d h2d, *cfis = &h2d; - u32 block; - - block = start; - - memset(cfis, 0, sizeof(struct sata_fis_h2d)); - - cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D; - cfis->pm_port_c = 0x80; /* is command */ - cfis->command = (is_write) ? ATA_CMD_WRITE : ATA_CMD_READ; - cfis->device = ATA_LBA; - - cfis->device |= (block >> 24) & 0xf; - cfis->lba_high = (block >> 16) & 0xff; - cfis->lba_mid = (block >> 8) & 0xff; - cfis->lba_low = block & 0xff; - cfis->sector_count = (u8)(blkcnt & 0xff); - - fsl_sata_exec_cmd(sata, cfis, CMD_ATA, 0, buffer, - ATA_SECT_SIZE * blkcnt); - return blkcnt; -} - -static void fsl_sata_flush_cache(fsl_sata_t *sata) -{ - struct sata_fis_h2d h2d, *cfis = &h2d; - - memset(cfis, 0, sizeof(struct sata_fis_h2d)); - - cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D; - cfis->pm_port_c = 0x80; /* is command */ - cfis->command = ATA_CMD_FLUSH; - - fsl_sata_exec_cmd(sata, cfis, CMD_ATA, 0, NULL, 0); -} - -static u32 fsl_sata_rw_cmd_ext(fsl_sata_t *sata, u32 start, - u32 blkcnt, u8 *buffer, int is_write) -{ - struct sata_fis_h2d h2d, *cfis = &h2d; - u64 block; - - block = (u64)start; - - memset(cfis, 0, sizeof(struct sata_fis_h2d)); - - cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D; - cfis->pm_port_c = 0x80; /* is command */ - - cfis->command = (is_write) ? ATA_CMD_WRITE_EXT - : ATA_CMD_READ_EXT; - - cfis->lba_high_exp = (block >> 40) & 0xff; - cfis->lba_mid_exp = (block >> 32) & 0xff; - cfis->lba_low_exp = (block >> 24) & 0xff; - cfis->lba_high = (block >> 16) & 0xff; - cfis->lba_mid = (block >> 8) & 0xff; - cfis->lba_low = block & 0xff; - cfis->device = ATA_LBA; - cfis->sector_count_exp = (blkcnt >> 8) & 0xff; - cfis->sector_count = blkcnt & 0xff; - - fsl_sata_exec_cmd(sata, cfis, CMD_ATA, 0, buffer, - ATA_SECT_SIZE * blkcnt); - return blkcnt; -} - -static u32 fsl_sata_rw_ncq_cmd(fsl_sata_t *sata, u32 start, u32 blkcnt, - u8 *buffer, - int is_write) -{ - struct sata_fis_h2d h2d, *cfis = &h2d; - int ncq_channel; - u64 block; - - if (sata->lba48 != 1) { - printf("execute FPDMA command on non-LBA48 hard disk\n\r"); - return -1; - } - - block = (u64)start; - - memset(cfis, 0, sizeof(struct sata_fis_h2d)); - - cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D; - cfis->pm_port_c = 0x80; /* is command */ - - cfis->command = (is_write) ? ATA_CMD_FPDMA_WRITE - : ATA_CMD_FPDMA_READ; - - cfis->lba_high_exp = (block >> 40) & 0xff; - cfis->lba_mid_exp = (block >> 32) & 0xff; - cfis->lba_low_exp = (block >> 24) & 0xff; - cfis->lba_high = (block >> 16) & 0xff; - cfis->lba_mid = (block >> 8) & 0xff; - cfis->lba_low = block & 0xff; - - cfis->device = ATA_LBA; - cfis->features_exp = (blkcnt >> 8) & 0xff; - cfis->features = blkcnt & 0xff; - - if (sata->queue_depth >= SATA_HC_MAX_CMD) - ncq_channel = SATA_HC_MAX_CMD - 1; - else - ncq_channel = sata->queue_depth - 1; - - /* Use the latest queue */ - fsl_sata_exec_cmd(sata, cfis, CMD_NCQ, ncq_channel, buffer, - ATA_SECT_SIZE * blkcnt); - return blkcnt; -} - -static void fsl_sata_flush_cache_ext(fsl_sata_t *sata) -{ - struct sata_fis_h2d h2d, *cfis = &h2d; - - memset(cfis, 0, sizeof(struct sata_fis_h2d)); - - cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D; - cfis->pm_port_c = 0x80; /* is command */ - cfis->command = ATA_CMD_FLUSH_EXT; - - fsl_sata_exec_cmd(sata, cfis, CMD_ATA, 0, NULL, 0); -} - -static u32 ata_low_level_rw_lba48(fsl_sata_t *sata, u32 blknr, lbaint_t blkcnt, - const void *buffer, int is_write) -{ - u32 start, blks; - u8 *addr; - int max_blks; - - start = blknr; - blks = blkcnt; - addr = (u8 *)buffer; - - max_blks = ATA_MAX_SECTORS_LBA48; - do { - if (blks > max_blks) { - if (sata->dma_flag != FLAGS_FPDMA) - fsl_sata_rw_cmd_ext(sata, start, max_blks, - addr, is_write); - else - fsl_sata_rw_ncq_cmd(sata, start, max_blks, - addr, is_write); - start += max_blks; - blks -= max_blks; - addr += ATA_SECT_SIZE * max_blks; - } else { - if (sata->dma_flag != FLAGS_FPDMA) - fsl_sata_rw_cmd_ext(sata, start, blks, - addr, is_write); - else - fsl_sata_rw_ncq_cmd(sata, start, blks, - addr, is_write); - start += blks; - blks = 0; - addr += ATA_SECT_SIZE * blks; - } - } while (blks != 0); - - return blks; -} - -static u32 ata_low_level_rw_lba28(fsl_sata_t *sata, u32 blknr, u32 blkcnt, - const void *buffer, int is_write) -{ - u32 start, blks; - u8 *addr; - int max_blks; - - start = blknr; - blks = blkcnt; - addr = (u8 *)buffer; - - max_blks = ATA_MAX_SECTORS; - do { - if (blks > max_blks) { - fsl_sata_rw_cmd(sata, start, max_blks, addr, is_write); - start += max_blks; - blks -= max_blks; - addr += ATA_SECT_SIZE * max_blks; - } else { - fsl_sata_rw_cmd(sata, start, blks, addr, is_write); - start += blks; - blks = 0; - addr += ATA_SECT_SIZE * blks; - } - } while (blks != 0); - - return blks; -} - -/* - * SATA interface between low level driver and command layer - */ -static int sata_read(fsl_sata_t *sata, ulong blknr, lbaint_t blkcnt, - void *buffer) -{ - u32 rc; - - if (sata->lba48) - rc = ata_low_level_rw_lba48(sata, blknr, blkcnt, buffer, - READ_CMD); - else - rc = ata_low_level_rw_lba28(sata, blknr, blkcnt, buffer, - READ_CMD); - return rc; -} - -static int sata_write(fsl_sata_t *sata, ulong blknr, lbaint_t blkcnt, - const void *buffer) -{ - u32 rc; - - if (sata->lba48) { - rc = ata_low_level_rw_lba48(sata, blknr, blkcnt, buffer, - WRITE_CMD); - if (sata->wcache && sata->flush_ext) - fsl_sata_flush_cache_ext(sata); - } else { - rc = ata_low_level_rw_lba28(sata, blknr, blkcnt, buffer, - WRITE_CMD); - if (sata->wcache && sata->flush) - fsl_sata_flush_cache(sata); - } - - return rc; -} - -int sata_getinfo(fsl_sata_t *sata, u16 *id) -{ - /* if no detected link */ - if (!sata->link) - return -EINVAL; - -#ifdef CONFIG_LBA48 - /* Check if support LBA48 */ - if (ata_id_has_lba48(id)) { - sata->lba48 = 1; - debug("Device support LBA48\n\r"); - } else { - debug("Device supports LBA28\n\r"); - } -#endif - - /* Get the NCQ queue depth from device */ - sata->queue_depth = ata_id_queue_depth(id); - - /* Get the xfer mode from device */ - fsl_sata_xfer_mode(sata, id); - - /* Get the write cache status from device */ - fsl_sata_init_wcache(sata, id); - - /* Set the xfer mode to highest speed */ - fsl_sata_set_features(sata); - - return 0; -} - -static int fsl_scsi_exec(fsl_sata_t *sata, struct scsi_cmd *pccb, - bool is_write) -{ - int ret; - u32 temp; - u16 blocks = 0; - lbaint_t start = 0; - u8 *buffer = pccb->pdata; - - /* Retrieve the base LBA number from the ccb structure. */ - if (pccb->cmd[0] == SCSI_READ16) { - memcpy(&start, pccb->cmd + 2, 8); - start = be64_to_cpu(start); - } else { - memcpy(&temp, pccb->cmd + 2, 4); - start = be32_to_cpu(temp); - } - - if (pccb->cmd[0] == SCSI_READ16) - blocks = (((u16)pccb->cmd[13]) << 8) | ((u16)pccb->cmd[14]); - else - blocks = (((u16)pccb->cmd[7]) << 8) | ((u16)pccb->cmd[8]); - - debug("scsi_ahci: %s %u blocks starting from lba 0x" LBAFU "\n", - is_write ? "write" : "read", blocks, start); - - if (is_write) - ret = sata_write(sata, start, blocks, buffer); - else - ret = sata_read(sata, start, blocks, buffer); - - return ret; -} - -static char *fsl_ata_id_strcpy(u16 *target, u16 *src, int len) -{ - int i; - - for (i = 0; i < len / 2; i++) - target[i] = src[i]; - - return (char *)target; -} - -static int fsl_ata_scsiop_inquiry(struct ahci_uc_priv *uc_priv, - struct scsi_cmd *pccb, - fsl_sata_t *sata) -{ - u8 port; - u16 *idbuf; - - ALLOC_CACHE_ALIGN_BUFFER(u16, tmpid, ATA_ID_WORDS); - - /* Clean ccb data buffer */ - memset(pccb->pdata, 0, pccb->datalen); - - if (pccb->datalen <= 35) - return 0; - - /* Read id from sata */ - port = pccb->target; - - fsl_sata_identify(sata, (u16 *)tmpid); - - if (!uc_priv->ataid[port]) { - uc_priv->ataid[port] = malloc(ATA_ID_WORDS * 2); - if (!uc_priv->ataid[port]) { - printf("%s: No memory for ataid[port]\n", __func__); - return -ENOMEM; - } - } - - idbuf = uc_priv->ataid[port]; - - memcpy(idbuf, tmpid, ATA_ID_WORDS * 2); - - memcpy(&pccb->pdata[8], "ATA ", 8); - fsl_ata_id_strcpy((u16 *)&pccb->pdata[16], &idbuf[ATA_ID_PROD], 16); - fsl_ata_id_strcpy((u16 *)&pccb->pdata[32], &idbuf[ATA_ID_FW_REV], 4); - - sata_getinfo(sata, (u16 *)idbuf); -#ifdef DEBUG - ata_dump_id(idbuf); -#endif - return 0; -} - -/* - * SCSI READ CAPACITY10 command operation. - */ -static int fsl_ata_scsiop_read_capacity10(struct ahci_uc_priv *uc_priv, - struct scsi_cmd *pccb) -{ - u32 cap; - u64 cap64; - u32 block_size; - - if (!uc_priv->ataid[pccb->target]) { - printf("scsi_ahci: SCSI READ CAPACITY10 command failure."); - printf("\tNo ATA info!\n"); - printf("\tPlease run SCSI command INQUIRY first!\n"); - return -EPERM; - } - - cap64 = ata_id_n_sectors(uc_priv->ataid[pccb->target]); - if (cap64 > 0x100000000ULL) - cap64 = 0xffffffff; - - cap = cpu_to_be32(cap64); - memcpy(pccb->pdata, &cap, sizeof(cap)); - - block_size = cpu_to_be32((u32)512); - memcpy(&pccb->pdata[4], &block_size, 4); - - return 0; -} - -/* - * SCSI READ CAPACITY16 command operation. - */ -static int fsl_ata_scsiop_read_capacity16(struct ahci_uc_priv *uc_priv, - struct scsi_cmd *pccb) -{ - u64 cap; - u64 block_size; - - if (!uc_priv->ataid[pccb->target]) { - printf("scsi_ahci: SCSI READ CAPACITY16 command failure."); - printf("\tNo ATA info!\n"); - printf("\tPlease run SCSI command INQUIRY first!\n"); - return -EPERM; - } - - cap = ata_id_n_sectors(uc_priv->ataid[pccb->target]); - cap = cpu_to_be64(cap); - memcpy(pccb->pdata, &cap, sizeof(cap)); - - block_size = cpu_to_be64((u64)512); - memcpy(&pccb->pdata[8], &block_size, 8); - - return 0; -} - -/* - * SCSI TEST UNIT READY command operation. - */ -static int fsl_ata_scsiop_test_unit_ready(struct ahci_uc_priv *uc_priv, - struct scsi_cmd *pccb) -{ - return (uc_priv->ataid[pccb->target]) ? 0 : -EPERM; -} - -static int fsl_ahci_scsi_exec(struct udevice *dev, struct scsi_cmd *pccb) -{ - struct ahci_uc_priv *uc_priv = dev_get_uclass_priv(dev->parent); - struct fsl_ahci_priv *priv = dev_get_priv(dev->parent); - fsl_sata_t *sata = priv->fsl_sata; - int ret; - - switch (pccb->cmd[0]) { - case SCSI_READ16: - case SCSI_READ10: - ret = fsl_scsi_exec(sata, pccb, 0); - break; - case SCSI_WRITE10: - ret = fsl_scsi_exec(sata, pccb, 1); - break; - case SCSI_RD_CAPAC10: - ret = fsl_ata_scsiop_read_capacity10(uc_priv, pccb); - break; - case SCSI_RD_CAPAC16: - ret = fsl_ata_scsiop_read_capacity16(uc_priv, pccb); - break; - case SCSI_TST_U_RDY: - ret = fsl_ata_scsiop_test_unit_ready(uc_priv, pccb); - break; - case SCSI_INQUIRY: - ret = fsl_ata_scsiop_inquiry(uc_priv, pccb, sata); - break; - default: - printf("Unsupport SCSI command 0x%02x\n", pccb->cmd[0]); - return -ENOTSUPP; - } - - if (ret) { - debug("SCSI command 0x%02x ret errno %d\n", pccb->cmd[0], ret); - return ret; - } - - return 0; -} - -static int fsl_ahci_probe(struct udevice *dev) -{ - struct fsl_ahci_priv *priv = dev_get_priv(dev); - struct udevice *child_dev; - struct scsi_platdata *uc_plat; - - device_find_first_child(dev, &child_dev); - if (!child_dev) - return -ENODEV; - uc_plat = dev_get_uclass_platdata(child_dev); - uc_plat->base = priv->base; - uc_plat->max_lun = 1; - uc_plat->max_id = 1; - - return init_sata(priv); -} - -struct scsi_ops fsl_scsi_ops = { - .exec = fsl_ahci_scsi_exec, -}; - -static const struct udevice_id fsl_ahci_ids[] = { - { .compatible = "fsl,pq-sata-v2" }, - { } -}; - -U_BOOT_DRIVER(fsl_ahci_scsi) = { - .name = "fsl_ahci_scsi", - .id = UCLASS_SCSI, - .ops = &fsl_scsi_ops, -}; - -U_BOOT_DRIVER(fsl_ahci) = { - .name = "fsl_ahci", - .id = UCLASS_AHCI, - .of_match = fsl_ahci_ids, - .bind = fsl_ahci_bind, - .ofdata_to_platdata = fsl_ahci_ofdata_to_platdata, - .probe = fsl_ahci_probe, - .priv_auto_alloc_size = sizeof(struct fsl_ahci_priv), -}; -- 2.17.1

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