January 2019 - U-Boot

[U-Boot] [PATCH v2] imx8mq_evk_defconfig: Move file system options to Kconfig
by Fabio Estevam 14 Jan '19

14 Jan '19

Chris Spencer reports that when enabling ext4 read support without also enabling write support the following error is seen: fs/fs.c:198:12: error: 'ext4_write_file' undeclared here (not in a function); did you mean 'ext4_read_file'? .write = ext4_write_file, ^~~~~~~~~~~~~~~ Fix this problem by moving these options to Kconfig. Reported-by: Chris Spencer <spencercw(a)gmail.com> Acked-by: Peng Fan <peng.fan(a)nxp.com> Signed-off-by: Fabio Estevam <festevam(a)gmail.com> --- Changes since v1: - Added missing y to CONFIG_CMD_FAT configs/imx8mq_evk_defconfig | 5 +++++ include/configs/imx8mq_evk.h | 6 ------ 2 files changed, 5 insertions(+), 6 deletions(-) diff --git a/configs/imx8mq_evk_defconfig b/configs/imx8mq_evk_defconfig index f216d46a8f..b473fcd61b 100644 --- a/configs/imx8mq_evk_defconfig +++ b/configs/imx8mq_evk_defconfig @@ -15,6 +15,11 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_SPL=y CONFIG_SPL_BOARD_INIT=y CONFIG_HUSH_PARSER=y +CONFIG_DOS_PARTITION=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_CACHE=y diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index 35f81152f2..f0430224cb 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -226,12 +226,6 @@ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_DOS_PARTITION -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_EXT4 -#define CONFIG_CMD_EXT4_WRITE -#define CONFIG_CMD_FAT - #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 -- 2.17.1

2 2

[U-Boot] [PATCH u-boot] pinctrl: meson: add pinconf support
by Jerome Brunet 14 Jan '19

14 Jan '19

Adding pinconf support is necessary to enable boot from SPI without breaking the eMMC. When booting from SPI, the ROM code leave pull downs on the eMMC pad. We need to set pinconf provided in DT to solve this Signed-off-by: Jerome Brunet <jbrunet(a)baylibre.com> --- drivers/pinctrl/meson/Kconfig | 1 + drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c | 10 ++ drivers/pinctrl/meson/pinctrl-meson-gx-pmx.c | 10 ++ drivers/pinctrl/meson/pinctrl-meson.c | 101 ++++++++++++++++-- drivers/pinctrl/meson/pinctrl-meson.h | 8 ++ 5 files changed, 123 insertions(+), 7 deletions(-) diff --git a/drivers/pinctrl/meson/Kconfig b/drivers/pinctrl/meson/Kconfig index ee820a57a0e0..162642d7289b 100644 --- a/drivers/pinctrl/meson/Kconfig +++ b/drivers/pinctrl/meson/Kconfig @@ -2,6 +2,7 @@ if ARCH_MESON config PINCTRL_MESON select PINCTRL_GENERIC + select PINCONF bool config PINCTRL_MESON_GX_PMX diff --git a/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c b/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c index c82413d08f34..f9065723eea9 100644 --- a/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c +++ b/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c @@ -93,6 +93,12 @@ static int meson_axg_pinmux_group_set(struct udevice *dev, return 0; } +const struct pinconf_param meson_axg_pinconf_params[] = { + { "bias-disable", PIN_CONFIG_BIAS_DISABLE, 0 }, + { "bias-pull-up", PIN_CONFIG_BIAS_PULL_UP, 1 }, + { "bias-pull-down", PIN_CONFIG_BIAS_PULL_DOWN, 1 }, +}; + const struct pinctrl_ops meson_axg_pinctrl_ops = { .get_groups_count = meson_pinctrl_get_groups_count, .get_group_name = meson_pinctrl_get_group_name, @@ -100,6 +106,10 @@ const struct pinctrl_ops meson_axg_pinctrl_ops = { .get_function_name = meson_pinmux_get_function_name, .pinmux_group_set = meson_axg_pinmux_group_set, .set_state = pinctrl_generic_set_state, + .pinconf_params = meson_axg_pinconf_params + .pinconf_num_params = ARRAY_SIZE(meson_axg_pinconf_params), + .pinconf_set = meson_pinconf_set, + .pinconf_group_set = meson_pinconf_group_set, }; static int meson_axg_gpio_request(struct udevice *dev, diff --git a/drivers/pinctrl/meson/pinctrl-meson-gx-pmx.c b/drivers/pinctrl/meson/pinctrl-meson-gx-pmx.c index fc1538ea719e..cf72576b6ce2 100644 --- a/drivers/pinctrl/meson/pinctrl-meson-gx-pmx.c +++ b/drivers/pinctrl/meson/pinctrl-meson-gx-pmx.c @@ -72,6 +72,12 @@ static int meson_gx_pinmux_group_set(struct udevice *dev, return 0; } +const struct pinconf_param meson_gx_pinconf_params[] = { + { "bias-disable", PIN_CONFIG_BIAS_DISABLE, 0 }, + { "bias-pull-up", PIN_CONFIG_BIAS_PULL_UP, 1 }, + { "bias-pull-down", PIN_CONFIG_BIAS_PULL_DOWN, 1 }, +}; + const struct pinctrl_ops meson_gx_pinctrl_ops = { .get_groups_count = meson_pinctrl_get_groups_count, .get_group_name = meson_pinctrl_get_group_name, @@ -79,6 +85,10 @@ const struct pinctrl_ops meson_gx_pinctrl_ops = { .get_function_name = meson_pinmux_get_function_name, .pinmux_group_set = meson_gx_pinmux_group_set, .set_state = pinctrl_generic_set_state, + .pinconf_params = meson_gx_pinconf_params, + .pinconf_num_params = ARRAY_SIZE(meson_gx_pinconf_params), + .pinconf_set = meson_pinconf_set, + .pinconf_group_set = meson_pinconf_group_set, }; static const struct dm_gpio_ops meson_gx_gpio_ops = { diff --git a/drivers/pinctrl/meson/pinctrl-meson.c b/drivers/pinctrl/meson/pinctrl-meson.c index b539749752c8..fa3d78858a9e 100644 --- a/drivers/pinctrl/meson/pinctrl-meson.c +++ b/drivers/pinctrl/meson/pinctrl-meson.c @@ -57,7 +57,7 @@ static int meson_gpio_calc_reg_and_bit(struct udevice *dev, unsigned int offset, enum meson_reg_type reg_type, unsigned int *reg, unsigned int *bit) { - struct meson_pinctrl *priv = dev_get_priv(dev->parent); + struct meson_pinctrl *priv = dev_get_priv(dev); struct meson_bank *bank = NULL; struct meson_reg_desc *desc; unsigned int pin; @@ -89,7 +89,8 @@ int meson_gpio_get(struct udevice *dev, unsigned int offset) unsigned int reg, bit; int ret; - ret = meson_gpio_calc_reg_and_bit(dev, offset, REG_IN, &reg, &bit); + ret = meson_gpio_calc_reg_and_bit(dev->parent, offset, REG_IN, &reg, + &bit); if (ret) return ret; @@ -102,7 +103,8 @@ int meson_gpio_set(struct udevice *dev, unsigned int offset, int value) unsigned int reg, bit; int ret; - ret = meson_gpio_calc_reg_and_bit(dev, offset, REG_OUT, &reg, &bit); + ret = meson_gpio_calc_reg_and_bit(dev->parent, offset, REG_OUT, &reg, + &bit); if (ret) return ret; @@ -117,7 +119,8 @@ int meson_gpio_get_direction(struct udevice *dev, unsigned int offset) unsigned int reg, bit, val; int ret; - ret = meson_gpio_calc_reg_and_bit(dev, offset, REG_DIR, &reg, &bit); + ret = meson_gpio_calc_reg_and_bit(dev->parent, offset, REG_DIR, &reg, + &bit); if (ret) return ret; @@ -132,7 +135,8 @@ int meson_gpio_direction_input(struct udevice *dev, unsigned int offset) unsigned int reg, bit; int ret; - ret = meson_gpio_calc_reg_and_bit(dev, offset, REG_DIR, &reg, &bit); + ret = meson_gpio_calc_reg_and_bit(dev->parent, offset, REG_DIR, &reg, + &bit); if (ret) return ret; @@ -148,13 +152,15 @@ int meson_gpio_direction_output(struct udevice *dev, unsigned int reg, bit; int ret; - ret = meson_gpio_calc_reg_and_bit(dev, offset, REG_DIR, &reg, &bit); + ret = meson_gpio_calc_reg_and_bit(dev->parent, offset, REG_DIR, &reg, + &bit); if (ret) return ret; clrbits_le32(priv->reg_gpio + reg, BIT(bit)); - ret = meson_gpio_calc_reg_and_bit(dev, offset, REG_OUT, &reg, &bit); + ret = meson_gpio_calc_reg_and_bit(dev->parent, offset, REG_OUT, &reg, + &bit); if (ret) return ret; @@ -163,6 +169,72 @@ int meson_gpio_direction_output(struct udevice *dev, return 0; } +static int meson_pinconf_bias_set(struct udevice *dev, unsigned int pin, + unsigned int param) +{ + struct meson_pinctrl *priv = dev_get_priv(dev); + unsigned int offset = pin - priv->data->pin_base; + unsigned int reg, bit; + int ret; + + ret = meson_gpio_calc_reg_and_bit(dev, offset, REG_PULLEN, &reg, &bit); + if (ret) + return ret; + + if (param == PIN_CONFIG_BIAS_DISABLE) { + clrsetbits_le32(priv->reg_pullen + reg, BIT(bit), 0); + return 0; + } + + /* othewise, enable the bias and select level */ + clrsetbits_le32(priv->reg_pullen + reg, BIT(bit), 1); + ret = meson_gpio_calc_reg_and_bit(dev, offset, REG_PULL, &reg, &bit); + if (ret) + return ret; + + clrsetbits_le32(priv->reg_pull + reg, BIT(bit), + param == PIN_CONFIG_BIAS_PULL_UP); + + return 0; +} + +int meson_pinconf_set(struct udevice *dev, unsigned int pin, + unsigned int param, unsigned int arg) +{ + int ret; + + switch (param) { + case PIN_CONFIG_BIAS_DISABLE: + case PIN_CONFIG_BIAS_PULL_UP: + case PIN_CONFIG_BIAS_PULL_DOWN: + ret = meson_pinconf_bias_set(dev, pin, param); + break; + + default: + dev_err(dev, "unsupported configuration parameter %u\n", param); + return -EINVAL; + } + + return ret; +} + +int meson_pinconf_group_set(struct udevice *dev, + unsigned int group_selector, + unsigned int param, unsigned int arg) +{ + struct meson_pinctrl *priv = dev_get_priv(dev); + struct meson_pmx_group *grp = &priv->data->groups[group_selector]; + int i, ret; + + for (i = 0; i < grp->num_pins; i++) { + ret = meson_pinconf_set(dev, grp->pins[i], param, arg); + if (ret) + return ret; + } + + return 0; +} + int meson_gpio_probe(struct udevice *dev) { struct meson_pinctrl *priv = dev_get_priv(dev->parent); @@ -240,6 +312,21 @@ int meson_pinctrl_probe(struct udevice *dev) return -EINVAL; } priv->reg_gpio = (void __iomem *)addr; + + addr = parse_address(gpio, "pull", na, ns); + if (addr == FDT_ADDR_T_NONE) { + debug("pull address not found\n"); + return -EINVAL; + } + priv->reg_pull = (void __iomem *)addr; + + addr = parse_address(gpio, "pull-enable", na, ns); + /* Use pull region if pull-enable one is not present */ + if (addr == FDT_ADDR_T_NONE) + priv->reg_pullen = priv->reg_pull; + else + priv->reg_pullen = (void __iomem *)addr; + priv->data = (struct meson_pinctrl_data *)dev_get_driver_data(dev); /* Lookup GPIO driver */ diff --git a/drivers/pinctrl/meson/pinctrl-meson.h b/drivers/pinctrl/meson/pinctrl-meson.h index bdee721fc007..28085a7495d4 100644 --- a/drivers/pinctrl/meson/pinctrl-meson.h +++ b/drivers/pinctrl/meson/pinctrl-meson.h @@ -39,6 +39,8 @@ struct meson_pinctrl { struct meson_pinctrl_data *data; void __iomem *reg_mux; void __iomem *reg_gpio; + void __iomem *reg_pull; + void __iomem *reg_pullen; }; /** @@ -130,4 +132,10 @@ int meson_gpio_direction_output(struct udevice *dev, unsigned int offset, int value); int meson_gpio_probe(struct udevice *dev); +int meson_pinconf_set(struct udevice *dev, unsigned int pin, + unsigned int param, unsigned int arg); +int meson_pinconf_group_set(struct udevice *dev, + unsigned int group_selector, + unsigned int param, unsigned int arg); + #endif /* __PINCTRL_MESON_H__ */ -- 2.20.1

2 1

[U-Boot] imx7d SPL driver fails to allocate memory.
by Rens Dol 14 Jan '19

14 Jan '19

Hi all, I am trying to get SPL working on a imx7 based board. I need to configure the DDR voltage before u-boot can be loaded from NAND. I am using the pico-imx7_defconfig as a starting point. It already has SPL configured to initialize ddr. From board_init_f I call spl_early_init() to initialize malloc_simple so that I can use the pmic driver to set the DDR voltage and configure DDR . So far everything is working as expected, I can write/read from DDR. But this is as far as SPL wants to go.. my guess is that switching from malloc_simple in board_init_f() to the full malloc implementation is not working. - I use boundarydevices/imx_usb_loader to load u-boot-nand-spl.imx - - git.denx.de/u-boot-imx version 2019.01-rc1 - This what my debug output shows. U-Boot SPL 2019.01-rc1-dirty (Jan 09 2019 - 16:07:51 +0100) spl_early_init power_init Set ddr regulator to 1.50V -- mALLOc -- 00000040 pmic_alloc: new pmic struct: 0x009467b0 pmic_get: pmic BD71815 -> 0x009467b0 Bus: 1 PMIC:BD71815 probed! i2c_write_data: chip=0x4b, len=0x0 write_data: i2c_read_data: chip=0x4b, len=0x1 0x41 PMIC: BD71815 DEV_ID=0x41 i2c_write_data: chip=0x4b, len=0x1 write_data: 0x10 setup drr controller! Testing ram >>SPL: board_init_r() using memory 0x88300000-0x88400000 for malloc() spl_init spl_board_init Trying to boot from NAND spl: nand - using hw ecc Trying to load image from CONFIG_SYS_NAND_U_BOOT_OFFS 400000 87800000 nand_spl_load_image mxs_nand_init -- mALLOc -- 00000598 -- malloc_extend_top -- pagesz = 00001000 nb = 000005A0 top = 0091F010 -- sbrk increment = 000005B0 returns = 88300000-- sbrk end brk = 88300000 -- sbrk increment = 00000A50 returns = 883005B0-- sbrk end top = 88300000 old_top = 0091F010 old_top_size = 00000000 top_size = 00001000 MXS NAND: Failed to allocate private data. Attached the spl/u-boot.cfg and pico-imx7d.h files. Here are my questions. - Has anyone tried this before on a imx7d? - Do I have conflicting configuration options? - Do I need to relocate the complete SPL from SRAM to DDR to make this work? - Should malloc be available in spl_board_init()? By enabling CONFIG_SPL_SYS_MALLOC_SIMPLE it boots a little further, but gets stuck in the nand driver after reading the onfi data and searching for a bad block table. Should it be possible to have usb + nand + i2c working using only CONFIG_SPL_SYS_MALLOC_SIMPLE? Met vriendelijke groeten Kind regards, Rens Dol Software Engineer Opticon Sensors Europe B.V. Opaallaan 35 2132 XV HOOFDDORP The Netherlands Tel.+31(0)235692720 rens.dol(a)opticon.com 1

1 1

[U-Boot] [PATCH] serial: Get rid of CONFIG_DW_SERIAL
by Alexey Brodkin 14 Jan '19

14 Jan '19

CONFIG_DW_SERIAL is no longer used anywhere so let's forget about it. Signed-off-by: Alexey Brodkin <abrodkin(a)synopsys.com> Cc: Tom Rini <trini(a)konsulko.com> Cc: Adam Ford <aford173(a)gmail.com> Cc: Mario Six <mario.six(a)gdsys.cc> Cc: Tuomas Tynkkynen <tuomas.tynkkynen(a)iki.fi> Cc: Alex Kiernan <alex.kiernan(a)gmail.com> Cc: Simon Glass <sjg(a)chromium.org> Cc: "Jörg Krause" <joerg.krause(a)embedded.rocks> Cc: Stephen Warren <swarren(a)nvidia.com> --- include/configs/axs10x.h | 1 - include/configs/hsdk.h | 1 - scripts/config_whitelist.txt | 1 - 3 files changed, 3 deletions(-) diff --git a/include/configs/axs10x.h b/include/configs/axs10x.h index 1b2966fd61..9452b06771 100644 --- a/include/configs/axs10x.h +++ b/include/configs/axs10x.h @@ -45,7 +45,6 @@ /* * UART configuration */ -#define CONFIG_DW_SERIAL #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_CLK 33333333 #define CONFIG_SYS_NS16550_MEM32 diff --git a/include/configs/hsdk.h b/include/configs/hsdk.h index cdf4fddd94..94c88b29f1 100644 --- a/include/configs/hsdk.h +++ b/include/configs/hsdk.h @@ -40,7 +40,6 @@ /* * UART configuration */ -#define CONFIG_DW_SERIAL #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_CLK 33330000 #define CONFIG_SYS_NS16550_MEM32 diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 527050de97..8d381788ca 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -429,7 +429,6 @@ CONFIG_DW_ALTDESCRIPTOR CONFIG_DW_AXI_BURST_LEN CONFIG_DW_GMAC_DEFAULT_DMA_PBL CONFIG_DW_MAC_FORCE_THRESHOLD_MODE -CONFIG_DW_SERIAL CONFIG_DW_UDC CONFIG_DW_WDT_BASE CONFIG_DW_WDT_CLOCK_KHZ -- 2.16.2

3 3

[U-Boot] [PATCH] poplar: save environment at a different offset
by Shawn Guo 14 Jan '19

14 Jan '19

From: Alex Elder <elder(a)linaro.org> Change CONFIG_ENV_OFFSET for Poplar to be 1MB further into the eMMC than before. This puts it immediately prior to the space we are reserving offset 0x200000-0x400000 for UEFI to save its persistent data. Define CONFIG_ENV_SIZE as a product of env_mmc_nblks and the sector size, like CONFIG_ENV_OFFSET is. Signed-off-by: Alex Elder <elder(a)linaro.org> Signed-off-by: Shawn Guo <shawn.guo(a)linaro.org> --- include/configs/poplar.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/include/configs/poplar.h b/include/configs/poplar.h index 0a126002d7f9..6b93b76ab9ba 100644 --- a/include/configs/poplar.h +++ b/include/configs/poplar.h @@ -44,7 +44,7 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "loader_mmc_blknum=0x0\0" \ "loader_mmc_nblks=0x780\0" \ - "env_mmc_blknum=0x780\0" \ + "env_mmc_blknum=0xf80\0" \ "env_mmc_nblks=0x80\0" \ "kernel_addr_r=0x30000000\0" \ "pxefile_addr_r=0x32000000\0" \ @@ -57,8 +57,8 @@ /* Command line configuration */ #define CONFIG_SYS_MMC_ENV_DEV 0 -#define CONFIG_ENV_OFFSET (0x780 * 512) /* env_mmc_blknum */ -#define CONFIG_ENV_SIZE 0x10000 /* env_mmc_nblks bytes */ +#define CONFIG_ENV_OFFSET (0xf80 * 512) /* env_mmc_blknum bytes */ +#define CONFIG_ENV_SIZE (0x80 * 512) /* env_mmc_nblks bytes */ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 512 -- 2.18.0

4 3

[U-Boot] [PATCH 0/7] mmc: sunxi: Enable DM_MMC
by Jagan Teki 14 Jan '19

14 Jan '19

I thought of waiting this till CLK framework gets Mainline, but migration deadline for DM_MMC and BLK seems expiring in next release. So instead of doing so huddle and make some last minute changes, I have managed to add CLK, Reset code for mmc driver via driver data. Add for all Allwinner SoC's and enable at arch/arm/Kconfig. I shall merge this in comming MW, so early test feel better to go for the release. Request to test respective board takers. Any inputs, Jagan. Jagan Teki (7): mmc: sunxi: Configure reset support for DM_MMC mmc: sunxi: Add A83T emmc compatible mmc: sunxi: Add mmc, emmc H5/A64 compatible mmc: sunxi: Add DM_MMC support for H6 mmc: sunxi: Add DM_MMC support for A80 arm: sunxi: Enable DM_MMC arm: dts: sunxi: Enumerate MMC2 as MMC1 arch/arm/Kconfig | 1 + arch/arm/dts/sunxi-u-boot.dtsi | 4 + .../include/asm/arch-sunxi/clock_sun50i_h6.h | 3 + arch/arm/mach-sunxi/Kconfig | 1 - configs/Linksprite_pcDuino3_defconfig | 1 - drivers/mmc/sunxi_mmc.c | 73 ++++++++++++++++++- 6 files changed, 79 insertions(+), 4 deletions(-) -- 2.18.0.321.gffc6fa0e3

3 15

[U-Boot] [RESEND PATCH v2] env: add spi_flash_read_env function
by Horatiu Vultur 14 Jan '19

14 Jan '19

The spi_flash_read_env function is a wrapper over spi_flash_read, which enables the env to read multiple flash page size from flash until '\0\0' is read or the end of env partition is reached. Instead of reading the entire env size. When it reads '\0\0', it stops reading further the env and assumes that the rest of env is '\0'. This is an optimization for large environments that contain few bytes environment variables. In this case it doesn't need to read the entire environment and only few pages. Signed-off-by: Horatiu Vultur <horatiu.vultur(a)microchip.com> --- env/sf.c | 56 +++++++++++++++++++++++++++++++++++++++++++++----------- 1 file changed, 45 insertions(+), 11 deletions(-) diff --git a/env/sf.c b/env/sf.c index 2e3c600..01fadee 100644 --- a/env/sf.c +++ b/env/sf.c @@ -81,6 +81,40 @@ static int setup_flash_device(void) return 0; } +static int is_end(const char *addr, size_t size) +{ + /* The end of env variables is marked by '\0\0' */ + int i = 0; + + for (i = 0; i < size - 1; ++i) + if (addr[i] == 0x0 && addr[i + 1] == 0x0) + return 1; + return 0; +} + +static int spi_flash_read_env(struct spi_flash *flash, u32 offset, size_t len, + void *buf) +{ + u32 addr = 0; + u32 page_size = flash->page_size; + + memset(buf, 0x0, len); + for (int i = 0; i < len / page_size; ++i) { + int ret = spi_flash_read(flash, offset, page_size, + &((char *)buf)[addr]); + + if (ret < 0) + return ret; + + if (is_end(&((char *)buf)[addr], page_size)) + return 0; + + addr += page_size; + offset += page_size; + } + return 0; +} + #if defined(CONFIG_ENV_OFFSET_REDUND) #ifdef CMD_SAVEENV static int env_sf_save(void) @@ -116,8 +150,8 @@ static int env_sf_save(void) ret = -ENOMEM; goto done; } - ret = spi_flash_read(env_flash, saved_offset, - saved_size, saved_buffer); + ret = spi_flash_read_env(env_flash, saved_offset, + saved_size, saved_buffer); if (ret) goto done; } @@ -183,10 +217,10 @@ static int env_sf_load(void) if (ret) goto out; - read1_fail = spi_flash_read(env_flash, CONFIG_ENV_OFFSET, - CONFIG_ENV_SIZE, tmp_env1); - read2_fail = spi_flash_read(env_flash, CONFIG_ENV_OFFSET_REDUND, - CONFIG_ENV_SIZE, tmp_env2); + read1_fail = spi_flash_read_env(env_flash, CONFIG_ENV_OFFSET, + CONFIG_ENV_SIZE, tmp_env1); + read2_fail = spi_flash_read_env(env_flash, CONFIG_ENV_OFFSET_REDUND, + CONFIG_ENV_SIZE, tmp_env2); ret = env_import_redund((char *)tmp_env1, read1_fail, (char *)tmp_env2, read2_fail); @@ -220,8 +254,8 @@ static int env_sf_save(void) if (!saved_buffer) goto done; - ret = spi_flash_read(env_flash, saved_offset, - saved_size, saved_buffer); + ret = spi_flash_read_env(env_flash, saved_offset, + saved_size, saved_buffer); if (ret) goto done; } @@ -277,10 +311,10 @@ static int env_sf_load(void) if (ret) goto out; - ret = spi_flash_read(env_flash, - CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, buf); + ret = spi_flash_read_env(env_flash, CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, + buf); if (ret) { - set_default_env("spi_flash_read() failed", 0); + set_default_env("spi_flash_read_env() failed", 0); goto err_read; } -- 2.7.4

1 0

[U-Boot] [PATCH v2 1/1] avb: add support for named persistent values
by Igor Opaniuk 14 Jan '19

14 Jan '19

AVB version 1.1 introduces support for named persistent values that must be tamper evident and allows AVB to store arbitrary key-value pairs [1]. Introduce implementation of two additional AVB operations read_persistent_value()/write_persistent_value() for retrieving/storing named persistent values. Correspondent pull request in the OP-TEE OS project repo [2]. [1]: https://android.googlesource.com/platform/external/avb/+/android-9.0.0_r22 [2]: https://github.com/OP-TEE/optee_os/pull/2699 Signed-off-by: Igor Opaniuk <igor.opaniuk(a)linaro.org> --- Changes in v2: - fix output format for avb read_pvalue/write_pvalue commands - fix issue with named value buffer size cmd/avb.c | 78 +++++++++++++++++++++++++++++ common/avb_verify.c | 122 +++++++++++++++++++++++++++++++++++++++++++++ include/tee.h | 2 + include/tee/optee_ta_avb.h | 16 ++++++ 4 files changed, 218 insertions(+) diff --git a/cmd/avb.c b/cmd/avb.c index ff00be4..8387cc7 100644 --- a/cmd/avb.c +++ b/cmd/avb.c @@ -340,6 +340,76 @@ int do_avb_is_unlocked(cmd_tbl_t *cmdtp, int flag, return CMD_RET_FAILURE; } +int do_avb_read_pvalue(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + const char *name; + size_t bytes; + size_t bytes_read; + void *buffer; + + if (!avb_ops) { + printf("AVB 2.0 is not initialized, run 'avb init' first\n"); + return CMD_RET_FAILURE; + } + + if (argc != 3) + return CMD_RET_USAGE; + + name = argv[1]; + bytes = simple_strtoul(argv[2], NULL, 10); + buffer = malloc(bytes); + if (!buffer) + return CMD_RET_FAILURE; + + printf("Reading persistent value, name = %s, bytes = %ld\n", + name, bytes); + if (avb_ops->read_persistent_value(avb_ops, name, bytes, buffer, + &bytes_read) == AVB_IO_RESULT_OK) { + printf("Read %ld bytes, value = %s\n", bytes_read, + (char *)buffer); + free(buffer); + return CMD_RET_SUCCESS; + } + + printf("Failed to write in partition\n"); + + free(buffer); + + return CMD_RET_FAILURE; +} + +int do_avb_write_pvalue(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + const char *name; + const char *value; + + if (!avb_ops) { + printf("AVB 2.0 is not initialized, run 'avb init' first\n"); + return CMD_RET_FAILURE; + } + + if (argc != 3) + return CMD_RET_USAGE; + + name = argv[1]; + value = argv[2]; + + printf("Writing persistent value, name = %s, value = %s\n", + name, value); + if (avb_ops->write_persistent_value(avb_ops, name, strlen(value) + 1, + (const uint8_t *)value) == + AVB_IO_RESULT_OK) { + printf("Wrote %ld bytes\n", strlen(value) + 1); + return CMD_RET_SUCCESS; + } + + printf("Failed to write persistent value\n"); + + return CMD_RET_FAILURE; +} + static cmd_tbl_t cmd_avb[] = { U_BOOT_CMD_MKENT(init, 2, 0, do_avb_init, "", ""), U_BOOT_CMD_MKENT(read_rb, 2, 0, do_avb_read_rb, "", ""), @@ -350,6 +420,10 @@ static cmd_tbl_t cmd_avb[] = { U_BOOT_CMD_MKENT(read_part_hex, 4, 0, do_avb_read_part_hex, "", ""), U_BOOT_CMD_MKENT(write_part, 5, 0, do_avb_write_part, "", ""), U_BOOT_CMD_MKENT(verify, 1, 0, do_avb_verify_part, "", ""), +#ifdef CONFIG_OPTEE_TA_AVB + U_BOOT_CMD_MKENT(read_pvalue, 3, 0, do_avb_read_pvalue, "", ""), + U_BOOT_CMD_MKENT(write_pvalue, 3, 0, do_avb_write_pvalue, "", ""), +#endif }; static int do_avb(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) @@ -384,6 +458,10 @@ U_BOOT_CMD( " partition <partname> and print to stdout\n" "avb write_part <partname> <offset> <num> <addr> - write <num> bytes to\n" " <partname> by <offset> using data from <addr>\n" +#ifdef CONFIG_OPTEE_TA_AVB + "avb read_pvalue <name> <bytes> - read a persistent value <name>\n" + "avb write_pvalue <name> <value> - write a persistent value <name>\n" +#endif "avb verify - run verification process using hash data\n" " from vbmeta structure\n" ); diff --git a/common/avb_verify.c b/common/avb_verify.c index a8c5a3e..292ad8f 100644 --- a/common/avb_verify.c +++ b/common/avb_verify.c @@ -647,6 +647,10 @@ static AvbIOResult invoke_func(struct AvbOpsData *ops_data, u32 func, return AVB_IO_RESULT_OK; case TEE_ERROR_OUT_OF_MEMORY: return AVB_IO_RESULT_ERROR_OOM; + case TEE_ERROR_STORAGE_NO_SPACE: + return AVB_IO_RESULT_ERROR_INSUFFICIENT_SPACE; + case TEE_ERROR_ITEM_NOT_FOUND: + return AVB_IO_RESULT_ERROR_NO_SUCH_VALUE; case TEE_ERROR_TARGET_DEAD: /* * The TA has paniced, close the session to reload the TA @@ -847,6 +851,120 @@ static AvbIOResult get_size_of_partition(AvbOps *ops, return AVB_IO_RESULT_OK; } +static AvbIOResult read_persistent_value(AvbOps *ops, + const char *name, + size_t buffer_size, + u8 *out_buffer, + size_t *out_num_bytes_read) +{ + AvbIOResult rc; + struct tee_shm *shm_name; + struct tee_shm *shm_buf; + struct tee_param param[2]; + struct udevice *tee; + + if (get_open_session(ops->user_data)) + return AVB_IO_RESULT_ERROR_IO; + + tee = ((struct AvbOpsData *)ops->user_data)->tee; + + rc = tee_shm_alloc(tee, strlen(name) + 1, + TEE_SHM_ALLOC, &shm_name); + if (rc) + return AVB_IO_RESULT_ERROR_OOM; + + rc = tee_shm_alloc(tee, buffer_size, + TEE_SHM_ALLOC, &shm_buf); + if (rc) { + rc = AVB_IO_RESULT_ERROR_OOM; + goto free_name; + } + + memcpy(shm_name->addr, name, strlen(name) + 1); + + memset(param, 0, sizeof(param)); + param[0].attr = TEE_PARAM_ATTR_TYPE_MEMREF_INPUT; + param[0].u.memref.shm = shm_name; + param[0].u.memref.size = strlen(name) + 1; + param[1].attr = TEE_PARAM_ATTR_TYPE_MEMREF_INOUT; + param[1].u.memref.shm = shm_buf; + param[1].u.memref.size = buffer_size; + + rc = invoke_func(ops->user_data, TA_AVB_CMD_READ_PERSIST_VALUE, + 2, param); + if (rc) + goto out; + + *out_num_bytes_read = param[1].u.memref.size; + + memcpy(out_buffer, shm_buf->addr, *out_num_bytes_read); + + return AVB_IO_RESULT_OK; + +out: + tee_shm_free(shm_buf); +free_name: + tee_shm_free(shm_name); + + return rc; +} + +static AvbIOResult write_persistent_value(AvbOps *ops, + const char *name, + size_t value_size, + const u8 *value) +{ + AvbIOResult rc; + struct tee_shm *shm_name; + struct tee_shm *shm_buf; + struct tee_param param[2]; + struct udevice *tee; + + if (get_open_session(ops->user_data)) + return AVB_IO_RESULT_ERROR_IO; + + tee = ((struct AvbOpsData *)ops->user_data)->tee; + + if (!value_size) + return AVB_IO_RESULT_ERROR_NO_SUCH_VALUE; + + rc = tee_shm_alloc(tee, strlen(name) + 1, + TEE_SHM_ALLOC, &shm_name); + if (rc) + return AVB_IO_RESULT_ERROR_OOM; + + rc = tee_shm_alloc(tee, value_size, + TEE_SHM_ALLOC, &shm_buf); + if (rc) { + rc = AVB_IO_RESULT_ERROR_OOM; + goto free_name; + } + + memcpy(shm_name->addr, name, strlen(name) + 1); + memcpy(shm_buf->addr, value, value_size); + + memset(param, 0, sizeof(param)); + param[0].attr = TEE_PARAM_ATTR_TYPE_MEMREF_INPUT; + param[0].u.memref.shm = shm_name; + param[0].u.memref.size = strlen(name) + 1; + param[1].attr = TEE_PARAM_ATTR_TYPE_MEMREF_INPUT; + param[1].u.memref.shm = shm_buf; + param[1].u.memref.size = value_size; + + rc = invoke_func(ops->user_data, TA_AVB_CMD_WRITE_PERSIST_VALUE, + 2, param); + if (rc) + goto out; + + return AVB_IO_RESULT_OK; + +out: + tee_shm_free(shm_buf); +free_name: + tee_shm_free(shm_name); + + return rc; +} /** * ============================================================================ * AVB2.0 AvbOps alloc/initialisation/free @@ -870,6 +988,10 @@ AvbOps *avb_ops_alloc(int boot_device) ops_data->ops.read_is_device_unlocked = read_is_device_unlocked; ops_data->ops.get_unique_guid_for_partition = get_unique_guid_for_partition; +#ifdef CONFIG_OPTEE_TA_AVB + ops_data->ops.write_persistent_value = write_persistent_value; + ops_data->ops.read_persistent_value = read_persistent_value; +#endif ops_data->ops.get_size_of_partition = get_size_of_partition; ops_data->mmc_dev = boot_device; diff --git a/include/tee.h b/include/tee.h index 98b1c9c..69de924 100644 --- a/include/tee.h +++ b/include/tee.h @@ -42,7 +42,9 @@ #define TEE_ERROR_COMMUNICATION 0xffff000e #define TEE_ERROR_SECURITY 0xffff000f #define TEE_ERROR_OUT_OF_MEMORY 0xffff000c +#define TEE_ERROR_OVERFLOW 0xffff300f #define TEE_ERROR_TARGET_DEAD 0xffff3024 +#define TEE_ERROR_STORAGE_NO_SPACE 0xffff3041 #define TEE_ORIGIN_COMMS 0x00000002 #define TEE_ORIGIN_TEE 0x00000003 diff --git a/include/tee/optee_ta_avb.h b/include/tee/optee_ta_avb.h index 074386a..ef84488 100644 --- a/include/tee/optee_ta_avb.h +++ b/include/tee/optee_ta_avb.h @@ -45,4 +45,20 @@ */ #define TA_AVB_CMD_WRITE_LOCK_STATE 3 +/* + * Reads a persistent value corresponding to the given name. + * + * in params[0].u.memref: persistent value name + * ioout params[1].u.memref: read persistent value buffer + */ +#define TA_AVB_CMD_READ_PERSIST_VALUE 4 + +/* + * Writes a persistent value corresponding to the given name. + * + * in params[0].u.memref: persistent value name + * in params[1].u.memref: persistent value buffer to write + */ +#define TA_AVB_CMD_WRITE_PERSIST_VALUE 5 + #endif /* __TA_AVB_H */ -- 2.7.4

3 6

[U-Boot] [PATCH] fpga: zynqmp: show an error message when FPGA programming fails
by Luca Ceresoli 14 Jan '19

14 Jan '19

When FPGA programming fails, it does so silently, unless debugging code is enabled. This makes it hard to detect problems in production environments. Print the error message unconditionally so the error doesn't go unnoticed. Signed-off-by: Luca Ceresoli <luca(a)lucaceresoli.net> --- drivers/fpga/zynqmppl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c index c095d5ecaa85..22bfdd8dce61 100644 --- a/drivers/fpga/zynqmppl.c +++ b/drivers/fpga/zynqmppl.c @@ -233,7 +233,7 @@ static int zynqmp_load(xilinx_desc *desc, const void *buf, size_t bsize, (u32)bsize, 0, ret_payload); if (ret) - debug("PL FPGA LOAD fail\n"); + puts("PL FPGA LOAD fail\n"); return ret; } -- 2.17.1

2 1

[U-Boot] [PATCH v3 0/3] arm: socpfpga: gen5 clean up ETH RST & PHY mode
by Simon Goldschmidt 13 Jan '19

13 Jan '19

Socfpga Gen5 uses ad-hoc code to unreset the ETH MACs and set their PHY mode. Change this to use the dwmac_socfpga net driver and remove the old ad-hoc code. Changes in v3: - imply CONFIG_ETH_DESIGNWARE_SOCFGPA instead of changing all defconfigs Changes in v2: - remove detection of sub-mach via compatible version and handle all FPGAs the same - select SYSCON and REGMAP via Kconfig - only add CONFIG_ETH_DESIGNWARE_SOCFPGA since now REGMAP and SYSCON are selected by this one Simon Goldschmidt (3): net: designware: socfpga: adapt to Gen5 arm: socfpga: gen5 enable designware_socfpga arm: socfpga: gen5: remove hacked ETH RST handling .../mach-socfpga/include/mach/reset_manager.h | 2 - arch/arm/mach-socfpga/misc.c | 65 -------------- arch/arm/mach-socfpga/misc_gen5.c | 44 +--------- drivers/net/Kconfig | 3 + drivers/net/dwmac_socfpga.c | 87 +++++++------------ 5 files changed, 37 insertions(+), 164 deletions(-) -- 2.17.1

2 4