January 2019 - U-Boot

[U-Boot] [PATCH 1/1] efi_loader: eliminate duplicate function hex2mem()
by Heinrich Schuchardt 18 Jan '19

18 Jan '19

Use existing inline function hex2bin() instead of defining a new one. Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- lib/efi_loader/efi_variable.c | 44 +++-------------------------------- 1 file changed, 3 insertions(+), 41 deletions(-) diff --git a/lib/efi_loader/efi_variable.c b/lib/efi_loader/efi_variable.c index fd4c5dc40d..1e43a8585e 100644 --- a/lib/efi_loader/efi_variable.c +++ b/lib/efi_loader/efi_variable.c @@ -9,6 +9,7 @@ #include <charset.h> #include <efi_loader.h> #include <environment.h> +#include <hexdump.h> #include <search.h> #include <uuid.h> @@ -49,45 +50,6 @@ #define PREFIX_LEN (strlen("efi_xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx_")) -static int hex(int ch) -{ - if (ch >= 'a' && ch <= 'f') - return ch-'a'+10; - if (ch >= '0' && ch <= '9') - return ch-'0'; - if (ch >= 'A' && ch <= 'F') - return ch-'A'+10; - return -1; -} - -static int hex2mem(u8 *mem, const char *hexstr, int size) -{ - int nibble; - int i; - - for (i = 0; i < size; i++) { - if (*hexstr == '\0') - break; - - nibble = hex(*hexstr); - if (nibble < 0) - return -1; - - *mem = nibble; - hexstr++; - - nibble = hex(*hexstr); - if (nibble < 0) - return -1; - - *mem = (*mem << 4) | nibble; - hexstr++; - mem++; - } - - return i; -} - static char *mem2hex(char *hexstr, const u8 *mem, int count) { static const char hexchars[] = "0123456789abcdef"; @@ -198,7 +160,7 @@ efi_status_t EFIAPI efi_get_variable(u16 *variable_name, in_size = *data_size; if ((s = prefix(val, "(blob)"))) { - unsigned len = strlen(s); + size_t len = strlen(s); /* number of hexadecimal digits must be even */ if (len & 1) @@ -214,7 +176,7 @@ efi_status_t EFIAPI efi_get_variable(u16 *variable_name, if (!data) return EFI_EXIT(EFI_INVALID_PARAMETER); - if (hex2mem(data, s, len) != len) + if (hex2bin(data, s, len)) return EFI_EXIT(EFI_DEVICE_ERROR); debug("%s: got value: \"%s\"\n", __func__, s); -- 2.20.1

1 0

[U-Boot] should "BUILD_DIR" say "KBUILD_OUTPUT" in manual?
by Robert P. J. Day 18 Jan '19

18 Jan '19

pretty sure it should, but on manual wiki page: http://www.denx.de/wiki/view/DULG/UBootConfiguration should references to "BUILD_DIR" actually refer to "KBUILD_OUTPUT"? i can fix that, just want to make sure it's correct. rday -- ======================================================================== Robert P. J. Day Ottawa, Ontario, CANADA http://crashcourse.ca/dokuwiki Twitter: http://twitter.com/rpjday LinkedIn: http://ca.linkedin.com/in/rpjday ========================================================================

1 0

[U-Boot] commit 9a9d66f5ef break U-Boot Env
by Heiko Schocher 18 Jan '19

18 Jan '19

Hello Horatiu, just tried current mainline U-Boot on imx6ull based board with Env in SPI NOR. Your commit "9a9d66f5eff0" env: add spi_flash_read_env function breaks reading Env from SPI NOR in my case... If I interprete your patch correct, you only read until the 2 0x0 in the env ... but for the env crc, the hole CONFIG_ENV_SIZE must be read ... else missing for crc calculation ... Hmm... following patch fixes for me the issue: hs@threadripper:git [master] $ git diff env/sf.c diff --git a/env/sf.c b/env/sf.c index b3dec82c35..dc4b56d4a4 100644 --- a/env/sf.c +++ b/env/sf.c @@ -98,7 +104,7 @@ static int spi_flash_read_env(struct spi_flash *flash, u32 offset, size_t len, u32 addr = 0; u32 page_size = flash->page_size; - memset(buf, 0x0, len); + memset(buf, 0xff, len); for (int i = 0; i < len / page_size; ++i) { int ret = spi_flash_read(flash, offset, page_size, &((char *)buf)[addr]); But if I make a bigger ENV_SIZE this may break again... bye, Heiko -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-52 Fax: +49-8142-66989-80 Email: hs(a)denx.de

2 2

[U-Boot] [PATCH 1/2] pci: pci_mvebu: Add DM_PCI support and move CONFIG_PCI_MVEBU to defconfig
by Stefan Roese 18 Jan '19

18 Jan '19

This patch adds DM_PCI support to the MVEBU PCIe driver. This is necessary, since all PCI drivers have to be moved to DM (driver model) until the v2019.07 release. To not break git bisect'ablility, this patch also moves CONFIG_PCI_MVEBU from config headers to the defconfig files. Signed-off-by: Stefan Roese <sr(a)denx.de> Cc: Dirk Eibach <dirk.eibach(a)gdsys.cc> Cc: Mario Six <mario.six(a)gdsys.cc> Cc: Chris Packham <chris.packham(a)alliedtelesis.co.nz> Cc: Phil Sutter <phil(a)nwl.cc> Cc: Marek Behún <marek.behun(a)nic.cz> Cc: VlaoMao <vlaomao(a)gmail.com> --- configs/clearfog_defconfig | 1 + configs/controlcenterdc_defconfig | 3 + configs/db-88f6820-amc_defconfig | 1 + configs/db-88f6820-gp_defconfig | 1 + configs/db-mv784mp-gp_defconfig | 1 + configs/ds414_defconfig | 1 + configs/theadorable_debug_defconfig | 2 + configs/turris_omnia_defconfig | 3 +- drivers/pci/Kconfig | 9 + drivers/pci/pci_mvebu.c | 329 ++++++++++++++++++---------- include/configs/clearfog.h | 1 - include/configs/controlcenterdc.h | 3 - include/configs/db-88f6820-amc.h | 1 - include/configs/db-88f6820-gp.h | 1 - include/configs/db-mv784mp-gp.h | 1 - include/configs/ds414.h | 1 - include/configs/theadorable.h | 7 - include/configs/turris_omnia.h | 1 - scripts/config_whitelist.txt | 1 - 19 files changed, 236 insertions(+), 132 deletions(-) diff --git a/configs/clearfog_defconfig b/configs/clearfog_defconfig index e1c5a1fa13..0f69ff606d 100644 --- a/configs/clearfog_defconfig +++ b/configs/clearfog_defconfig @@ -56,6 +56,7 @@ CONFIG_PHY_GIGE=y CONFIG_MVNETA=y CONFIG_MII=y CONFIG_PCI=y +CONFIG_PCI_MVEBU=y CONFIG_SCSI=y CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550=y diff --git a/configs/controlcenterdc_defconfig b/configs/controlcenterdc_defconfig index 0c762ad77c..f22a3ab819 100644 --- a/configs/controlcenterdc_defconfig +++ b/configs/controlcenterdc_defconfig @@ -58,6 +58,9 @@ CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_MVNETA=y CONFIG_MII=y +CONFIG_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCI_MVEBU=y CONFIG_SCSI=y CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550=y diff --git a/configs/db-88f6820-amc_defconfig b/configs/db-88f6820-amc_defconfig index 9068a58406..03bf2bcafc 100644 --- a/configs/db-88f6820-amc_defconfig +++ b/configs/db-88f6820-amc_defconfig @@ -60,6 +60,7 @@ CONFIG_PHY_GIGE=y CONFIG_MVNETA=y CONFIG_MII=y CONFIG_PCI=y +CONFIG_PCI_MVEBU=y CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550=y CONFIG_KIRKWOOD_SPI=y diff --git a/configs/db-88f6820-gp_defconfig b/configs/db-88f6820-gp_defconfig index 413010c4ef..b36b7c3b2c 100644 --- a/configs/db-88f6820-gp_defconfig +++ b/configs/db-88f6820-gp_defconfig @@ -56,6 +56,7 @@ CONFIG_PHY_GIGE=y CONFIG_MVNETA=y CONFIG_MII=y CONFIG_PCI=y +CONFIG_PCI_MVEBU=y CONFIG_SCSI=y CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550=y diff --git a/configs/db-mv784mp-gp_defconfig b/configs/db-mv784mp-gp_defconfig index 3f140986b6..b6c61c3a48 100644 --- a/configs/db-mv784mp-gp_defconfig +++ b/configs/db-mv784mp-gp_defconfig @@ -55,6 +55,7 @@ CONFIG_PHY_GIGE=y CONFIG_MVNETA=y CONFIG_MII=y CONFIG_PCI=y +CONFIG_PCI_MVEBU=y CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550=y CONFIG_KIRKWOOD_SPI=y diff --git a/configs/ds414_defconfig b/configs/ds414_defconfig index 5325bd9968..32f37440c3 100644 --- a/configs/ds414_defconfig +++ b/configs/ds414_defconfig @@ -52,6 +52,7 @@ CONFIG_PHY_GIGE=y CONFIG_MVNETA=y CONFIG_MII=y CONFIG_PCI=y +CONFIG_PCI_MVEBU=y CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550=y CONFIG_KIRKWOOD_SPI=y diff --git a/configs/theadorable_debug_defconfig b/configs/theadorable_debug_defconfig index 9e99618998..ac6dfd6844 100644 --- a/configs/theadorable_debug_defconfig +++ b/configs/theadorable_debug_defconfig @@ -62,6 +62,8 @@ CONFIG_PHY_GIGE=y CONFIG_MVNETA=y CONFIG_MII=y CONFIG_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCI_MVEBU=y CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550=y CONFIG_KIRKWOOD_SPI=y diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig index 4a1e23c86c..5cafe2ee34 100644 --- a/configs/turris_omnia_defconfig +++ b/configs/turris_omnia_defconfig @@ -37,7 +37,6 @@ CONFIG_DEFAULT_DEVICE_TREE="armada-385-turris-omnia" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SPL_OF_TRANSLATE=y CONFIG_SCSI_AHCI=y -CONFIG_MISC=y CONFIG_ATSHA204A=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_MV=y @@ -45,6 +44,8 @@ CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_MVNETA=y CONFIG_MII=y +CONFIG_PCI=y +CONFIG_PCI_MVEBU=y CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550=y CONFIG_KIRKWOOD_SPI=y diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig index f59803dbd6..1521885bde 100644 --- a/drivers/pci/Kconfig +++ b/drivers/pci/Kconfig @@ -112,4 +112,13 @@ config PCIE_INTEL_FPGA Say Y here if you want to enable PCIe controller support on Intel FPGA, example Stratix 10. +config PCI_MVEBU + bool "Enable Armada XP/38x PCIe driver" + depends on ARCH_MVEBU + select DM_PCI + select MISC + help + Say Y here if you want to enable PCIe controller support on + Armada XP/38x SoCs. + endif diff --git a/drivers/pci/pci_mvebu.c b/drivers/pci/pci_mvebu.c index affe9f98ad..57d62b3493 100644 --- a/drivers/pci/pci_mvebu.c +++ b/drivers/pci/pci_mvebu.c @@ -10,11 +10,14 @@ */ #include <common.h> +#include <dm.h> +#include <dm/device-internal.h> +#include <dm/lists.h> #include <pci.h> -#include <linux/errno.h> #include <asm/io.h> #include <asm/arch/cpu.h> #include <asm/arch/soc.h> +#include <linux/errno.h> #include <linux/mbus.h> DECLARE_GLOBAL_DATA_PTR; @@ -66,7 +69,6 @@ struct resource { struct mvebu_pcie { struct pci_controller hose; - char *name; void __iomem *base; void __iomem *membase; struct resource mem; @@ -75,10 +77,11 @@ struct mvebu_pcie { u32 lane; u32 lane_mask; pci_dev_t dev; + char name[16]; + int mem_target; + int mem_attr; }; -#define to_pcie(_hc) container_of(_hc, struct mvebu_pcie, pci) - /* * MVEBU PCIe controller needs MEMORY and I/O BARs to be mapped * into SoCs address space. Each controller will map 128M of MEM @@ -88,11 +91,6 @@ static void __iomem *mvebu_pcie_membase = (void __iomem *)MBUS_PCI_MEM_BASE; #define PCIE_MEM_SIZE (128 << 20) #if defined(CONFIG_ARMADA_38X) -#define PCIE_BASE(if) \ - ((if) == 0 ? \ - MVEBU_REG_PCIE0_BASE : \ - (MVEBU_REG_PCIE_BASE + 0x4000 * (if - 1))) - /* * On A38x MV6820 these PEX ports are supported: * 0 - Port 0.0 @@ -101,7 +99,6 @@ static void __iomem *mvebu_pcie_membase = (void __iomem *)MBUS_PCI_MEM_BASE; * 3 - Port 3.0 */ #define MAX_PEX 4 -static struct mvebu_pcie pcie_bus[MAX_PEX]; static void mvebu_get_port_lane(struct mvebu_pcie *pcie, int pex_idx, int *mem_target, int *mem_attr) @@ -117,11 +114,6 @@ static void mvebu_get_port_lane(struct mvebu_pcie *pcie, int pex_idx, *mem_attr = attr[pex_idx]; } #else -#define PCIE_BASE(if) \ - ((if) < 8 ? \ - (MVEBU_REG_PCIE_BASE + ((if) / 4) * 0x40000 + ((if) % 4) * 0x4000) : \ - (MVEBU_REG_PCIE_BASE + 0x2000 + ((if) % 8) * 0x40000)) - /* * On AXP MV78460 these PEX ports are supported: * 0 - Port 0.0 @@ -136,7 +128,6 @@ static void mvebu_get_port_lane(struct mvebu_pcie *pcie, int pex_idx, * 9 - Port 3.0 */ #define MAX_PEX 10 -static struct mvebu_pcie pcie_bus[MAX_PEX]; static void mvebu_get_port_lane(struct mvebu_pcie *pcie, int pex_idx, int *mem_target, int *mem_attr) @@ -155,6 +146,10 @@ static void mvebu_get_port_lane(struct mvebu_pcie *pcie, int pex_idx, } #endif +struct mvebu_pcie_base { + struct mvebu_pcie pcie[MAX_PEX]; +}; + static int mvebu_pex_unit_is_x4(int pex_idx) { int pex_unit = pex_idx < 9 ? pex_idx >> 2 : 3; @@ -211,67 +206,83 @@ static inline struct mvebu_pcie *hose_to_pcie(struct pci_controller *hose) return container_of(hose, struct mvebu_pcie, hose); } -static int mvebu_pcie_read_config_dword(struct pci_controller *hose, - pci_dev_t dev, int offset, u32 *val) +static int mvebu_pcie_read_config(struct udevice *bus, pci_dev_t bdf, + uint offset, ulong *valuep, + enum pci_size_t size) { - struct mvebu_pcie *pcie = hose_to_pcie(hose); + struct mvebu_pcie *pcie = dev_get_platdata(bus); int local_bus = PCI_BUS(pcie->dev); int local_dev = PCI_DEV(pcie->dev); u32 reg; + u32 data; + + debug("PCIE CFG read: (b,d,f)=(%2d,%2d,%2d) ", + PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf)); /* Only allow one other device besides the local one on the local bus */ - if (PCI_BUS(dev) == local_bus && PCI_DEV(dev) != local_dev) { - if (local_dev == 0 && PCI_DEV(dev) != 1) { + if (PCI_BUS(bdf) == local_bus && PCI_DEV(bdf) != local_dev) { + if (local_dev == 0 && PCI_DEV(bdf) != 1) { + debug("- out of range\n"); /* * If local dev is 0, the first other dev can * only be 1 */ - *val = 0xffffffff; - return 1; - } else if (local_dev != 0 && PCI_DEV(dev) != 0) { + *valuep = pci_get_ff(size); + return 0; + } else if (local_dev != 0 && PCI_DEV(bdf) != 0) { + debug("- out of range\n"); /* * If local dev is not 0, the first other dev can * only be 0 */ - *val = 0xffffffff; - return 1; + *valuep = pci_get_ff(size); + return 0; } } /* write address */ - reg = PCIE_CONF_ADDR(dev, offset); + reg = PCIE_CONF_ADDR(bdf, offset); writel(reg, pcie->base + PCIE_CONF_ADDR_OFF); - *val = readl(pcie->base + PCIE_CONF_DATA_OFF); + data = readl(pcie->base + PCIE_CONF_DATA_OFF); + debug("(addr,val)=(0x%04x, 0x%08x)\n", offset, data); + *valuep = pci_conv_32_to_size(data, offset, size); return 0; } -static int mvebu_pcie_write_config_dword(struct pci_controller *hose, - pci_dev_t dev, int offset, u32 val) +static int mvebu_pcie_write_config(struct udevice *bus, pci_dev_t bdf, + uint offset, ulong value, + enum pci_size_t size) { - struct mvebu_pcie *pcie = hose_to_pcie(hose); + struct mvebu_pcie *pcie = dev_get_platdata(bus); int local_bus = PCI_BUS(pcie->dev); int local_dev = PCI_DEV(pcie->dev); + u32 data; + + debug("PCIE CFG write: (b,d,f)=(%2d,%2d,%2d) ", + PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf)); + debug("(addr,val)=(0x%04x, 0x%08lx)\n", offset, value); /* Only allow one other device besides the local one on the local bus */ - if (PCI_BUS(dev) == local_bus && PCI_DEV(dev) != local_dev) { - if (local_dev == 0 && PCI_DEV(dev) != 1) { + if (PCI_BUS(bdf) == local_bus && PCI_DEV(bdf) != local_dev) { + if (local_dev == 0 && PCI_DEV(bdf) != 1) { /* * If local dev is 0, the first other dev can * only be 1 */ - return 1; - } else if (local_dev != 0 && PCI_DEV(dev) != 0) { + return 0; + } else if (local_dev != 0 && PCI_DEV(bdf) != 0) { /* * If local dev is not 0, the first other dev can * only be 0 */ - return 1; + return 0; } } - writel(PCIE_CONF_ADDR(dev, offset), pcie->base + PCIE_CONF_ADDR_OFF); - writel(val, pcie->base + PCIE_CONF_DATA_OFF); + writel(PCIE_CONF_ADDR(bdf, offset), pcie->base + PCIE_CONF_ADDR_OFF); + data = pci_conv_size_to_32(0, value, offset, size); + writel(data, pcie->base + PCIE_CONF_DATA_OFF); return 0; } @@ -331,107 +342,197 @@ static void mvebu_pcie_setup_wins(struct mvebu_pcie *pcie) pcie->base + PCIE_BAR_CTRL_OFF(1)); } -void pci_init_board(void) +/** + * pcie_dw_mvebu_probe() - Probe the PCIe bus for active link + * + * @dev: A pointer to the device being operated on + * + * Probe for an active link on the PCIe bus and configure the controller + * to enable this port. + * + * Return: 0 on success, else -ENODEV + */ +static int mvebu_pcie_probe(struct udevice *dev) { - int mem_target, mem_attr, i; - int bus = 0; + struct mvebu_pcie *pcie = dev_get_platdata(dev); + struct udevice *ctlr = pci_get_controller(dev); + struct pci_controller *hose = dev_get_uclass_priv(ctlr); + static int bus; u32 reg; - u32 soc_ctrl = readl(MVEBU_SYSTEM_REG_BASE + 0x4); - /* Check SoC Control Power State */ - debug("%s: SoC Control %08x, 0en %01lx, 1en %01lx, 2en %01lx\n", - __func__, soc_ctrl, SELECT(soc_ctrl, 0), SELECT(soc_ctrl, 1), - SELECT(soc_ctrl, 2)); + debug("%s: PCIe %d.%d - up, base %08x\n", __func__, + pcie->port, pcie->lane, (u32)pcie->base); + + /* Read Id info and local bus/dev */ + debug("direct conf read %08x, local bus %d, local dev %d\n", + readl(pcie->base), mvebu_pcie_get_local_bus_nr(pcie), + mvebu_pcie_get_local_dev_nr(pcie)); - for (i = 0; i < MAX_PEX; i++) { - struct mvebu_pcie *pcie = &pcie_bus[i]; - struct pci_controller *hose = &pcie->hose; + mvebu_pcie_set_local_bus_nr(pcie, bus); + mvebu_pcie_set_local_dev_nr(pcie, 0); + pcie->dev = PCI_BDF(bus, 0, 0); + + pcie->mem.start = (u32)mvebu_pcie_membase; + pcie->mem.end = pcie->mem.start + PCIE_MEM_SIZE - 1; + mvebu_pcie_membase += PCIE_MEM_SIZE; + + if (mvebu_mbus_add_window_by_id(pcie->mem_target, pcie->mem_attr, + (phys_addr_t)pcie->mem.start, + PCIE_MEM_SIZE)) { + printf("PCIe unable to add mbus window for mem at %08x+%08x\n", + (u32)pcie->mem.start, PCIE_MEM_SIZE); + } + + /* Setup windows and configure host bridge */ + mvebu_pcie_setup_wins(pcie); + + /* Master + slave enable. */ + reg = readl(pcie->base + PCIE_CMD_OFF); + reg |= PCI_COMMAND_MEMORY; + reg |= PCI_COMMAND_MASTER; + reg |= BIT(10); /* disable interrupts */ + writel(reg, pcie->base + PCIE_CMD_OFF); + + /* Set BAR0 to internal registers */ + writel(SOC_REGS_PHY_BASE, pcie->base + PCIE_BAR_LO_OFF(0)); + writel(0, pcie->base + PCIE_BAR_HI_OFF(0)); + + /* PCI memory space */ + pci_set_region(hose->regions + 0, pcie->mem.start, + pcie->mem.start, PCIE_MEM_SIZE, PCI_REGION_MEM); + pci_set_region(hose->regions + 1, + 0, 0, + gd->ram_size, + PCI_REGION_MEM | PCI_REGION_SYS_MEMORY); + hose->region_count = 2; + + bus++; + + return 0; +} + +static const struct dm_pci_ops mvebu_pcie_ops = { + .read_config = mvebu_pcie_read_config, + .write_config = mvebu_pcie_write_config, +}; + +static struct driver pcie_mvebu_drv = { + .name = "pcie_mvebu", + .id = UCLASS_PCI, + .ops = &mvebu_pcie_ops, + .probe = mvebu_pcie_probe, + .platdata_auto_alloc_size = sizeof(struct mvebu_pcie), +}; + +static int mvebu_pcie_port_parse_dt(ofnode node, struct mvebu_pcie *pcie) +{ + const u32 *addr; + int len; + + addr = ofnode_get_property(node, "assigned-addresses", &len); + if (!addr) { + pr_err("property \"assigned-addresses\" not found"); + return -FDT_ERR_NOTFOUND; + } + + pcie->base = (void *)(fdt32_to_cpu(addr[2]) + SOC_REGS_PHY_BASE); + + return 0; +} + +/* + * Use a MISC device to bind the n instances (child nodes) of the + * PCIe base controller in UCLASS_PCI. + */ +static int mvebu_pcie_bind(struct udevice *parent) +{ + struct mvebu_pcie *pcie; + struct uclass_driver *drv; + struct udevice *dev; + ofnode subnode; + u32 soc_ctrl; + int port = 0; + int i = 0; + int ret; + + soc_ctrl = readl(MVEBU_SYSTEM_REG_BASE + 0x4); + + /* Lookup eth driver */ + drv = lists_uclass_lookup(UCLASS_PCI); + if (!drv) { + puts("Cannot find PCI driver\n"); + return -ENOENT; + } + + ofnode_for_each_subnode(subnode, dev_ofnode(parent)) { + pcie = calloc(1, sizeof(*pcie)); + if (!pcie) + return -ENOMEM; /* Get port number, lane number and memory target / attr */ - mvebu_get_port_lane(pcie, i, &mem_target, &mem_attr); + mvebu_get_port_lane(pcie, i, + &pcie->mem_target, &pcie->mem_attr); /* Don't read at all from pci registers if port power is down */ if (SELECT(soc_ctrl, pcie->port) == 0) { if (pcie->lane == 0) - debug("%s: skipping port %d\n", __func__, pcie->port); + debug("%s: skipping port %d\n", __func__, + pcie->port); + i++; + free(pcie); continue; } - pcie->base = (void __iomem *)PCIE_BASE(i); + /* Parse PCIe controller register base from DT */ + ret = mvebu_pcie_port_parse_dt(subnode, pcie); + if (ret < 0) { + i++; + free(pcie); + continue; + } /* Check link and skip ports that have no link */ if (!mvebu_pcie_link_up(pcie)) { debug("%s: PCIe %d.%d - down\n", __func__, pcie->port, pcie->lane); + + i++; + free(pcie); continue; } - debug("%s: PCIe %d.%d - up, base %08x\n", __func__, - pcie->port, pcie->lane, (u32)pcie->base); - - /* Read Id info and local bus/dev */ - debug("direct conf read %08x, local bus %d, local dev %d\n", - readl(pcie->base), mvebu_pcie_get_local_bus_nr(pcie), - mvebu_pcie_get_local_dev_nr(pcie)); - - mvebu_pcie_set_local_bus_nr(pcie, bus); - mvebu_pcie_set_local_dev_nr(pcie, 0); - pcie->dev = PCI_BDF(bus, 0, 0); - - pcie->mem.start = (u32)mvebu_pcie_membase; - pcie->mem.end = pcie->mem.start + PCIE_MEM_SIZE - 1; - mvebu_pcie_membase += PCIE_MEM_SIZE; - - if (mvebu_mbus_add_window_by_id(mem_target, mem_attr, - (phys_addr_t)pcie->mem.start, - PCIE_MEM_SIZE)) { - printf("PCIe unable to add mbus window for mem at %08x+%08x\n", - (u32)pcie->mem.start, PCIE_MEM_SIZE); - } - /* Setup windows and configure host bridge */ - mvebu_pcie_setup_wins(pcie); - - /* Master + slave enable. */ - reg = readl(pcie->base + PCIE_CMD_OFF); - reg |= PCI_COMMAND_MEMORY; - reg |= PCI_COMMAND_MASTER; - reg |= BIT(10); /* disable interrupts */ - writel(reg, pcie->base + PCIE_CMD_OFF); - - /* Setup U-Boot PCI Controller */ - hose->first_busno = 0; - hose->current_busno = bus; - - /* PCI memory space */ - pci_set_region(hose->regions + 0, pcie->mem.start, - pcie->mem.start, PCIE_MEM_SIZE, PCI_REGION_MEM); - pci_set_region(hose->regions + 1, - 0, 0, - gd->ram_size, - PCI_REGION_MEM | PCI_REGION_SYS_MEMORY); - hose->region_count = 2; - - pci_set_ops(hose, - pci_hose_read_config_byte_via_dword, - pci_hose_read_config_word_via_dword, - mvebu_pcie_read_config_dword, - pci_hose_write_config_byte_via_dword, - pci_hose_write_config_word_via_dword, - mvebu_pcie_write_config_dword); - pci_register_hose(hose); - - hose->last_busno = pci_hose_scan(hose); - - /* Set BAR0 to internal registers */ - writel(SOC_REGS_PHY_BASE, pcie->base + PCIE_BAR_LO_OFF(0)); - writel(0, pcie->base + PCIE_BAR_HI_OFF(0)); - - bus = hose->last_busno + 1; + sprintf(pcie->name, "pcie%d.%d", pcie->port, pcie->lane); + + /* Create child device UCLASS_PCI and bind it */ + device_bind_ofnode(parent, &pcie_mvebu_drv, pcie->name, pcie, + subnode, &dev); /* need to skip more for X4 links, otherwise scan will hang */ if (mvebu_soc_family() == MVEBU_SOC_AXP) { - if (mvebu_pex_unit_is_x4(i)) + if (mvebu_pex_unit_is_x4(i)) { + subnode = ofnode_next_subnode(subnode); + subnode = ofnode_next_subnode(subnode); + subnode = ofnode_next_subnode(subnode); i += 3; + } } + + i++; + port++; } + + return 0; } + +static const struct udevice_id mvebu_pcie_ids[] = { + { .compatible = "marvell,armada-xp-pcie" }, + { .compatible = "marvell,armada-370-pcie" }, + { } +}; + +U_BOOT_DRIVER(pcie_mvebu_base) = { + .name = "pcie_mvebu_base", + .id = UCLASS_MISC, + .of_match = mvebu_pcie_ids, + .bind = mvebu_pcie_bind, +}; diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h index 77ab6caf52..f9510826d7 100644 --- a/include/configs/clearfog.h +++ b/include/configs/clearfog.h @@ -55,7 +55,6 @@ /* PCIe support */ #ifndef CONFIG_SPL_BUILD -#define CONFIG_PCI_MVEBU #define CONFIG_PCI_SCAN_SHOW #endif diff --git a/include/configs/controlcenterdc.h b/include/configs/controlcenterdc.h index b38cab1164..06c93c3e66 100644 --- a/include/configs/controlcenterdc.h +++ b/include/configs/controlcenterdc.h @@ -63,9 +63,6 @@ /* PCIe support */ #ifndef CONFIG_SPL_BUILD -#define CONFIG_PCI -#define CONFIG_PCI_MVEBU -#define CONFIG_PCI_PNP #define CONFIG_PCI_SCAN_SHOW #endif diff --git a/include/configs/db-88f6820-amc.h b/include/configs/db-88f6820-amc.h index e68246cc0f..626a406cff 100644 --- a/include/configs/db-88f6820-amc.h +++ b/include/configs/db-88f6820-amc.h @@ -34,7 +34,6 @@ /* PCIe support */ #ifndef CONFIG_SPL_BUILD -#define CONFIG_PCI_MVEBU #define CONFIG_PCI_SCAN_SHOW #endif diff --git a/include/configs/db-88f6820-gp.h b/include/configs/db-88f6820-gp.h index 3900cbed2d..1f328e97c5 100644 --- a/include/configs/db-88f6820-gp.h +++ b/include/configs/db-88f6820-gp.h @@ -59,7 +59,6 @@ /* PCIe support */ #ifndef CONFIG_SPL_BUILD -#define CONFIG_PCI_MVEBU #define CONFIG_PCI_SCAN_SHOW #endif diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h index 8ad007cc49..6cba326927 100644 --- a/include/configs/db-mv784mp-gp.h +++ b/include/configs/db-mv784mp-gp.h @@ -46,7 +46,6 @@ /* PCIe support */ #ifndef CONFIG_SPL_BUILD -#define CONFIG_PCI_MVEBU #define CONFIG_PCI_SCAN_SHOW #endif diff --git a/include/configs/ds414.h b/include/configs/ds414.h index b9b708ad41..4ba050553a 100644 --- a/include/configs/ds414.h +++ b/include/configs/ds414.h @@ -41,7 +41,6 @@ /* PCIe support */ #ifndef CONFIG_SPL_BUILD -#define CONFIG_PCI_MVEBU #define CONFIG_PCI_SCAN_SHOW #endif diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h index de31681f8c..6837d55507 100644 --- a/include/configs/theadorable.h +++ b/include/configs/theadorable.h @@ -62,13 +62,6 @@ #define CONFIG_SYS_SATA_MAX_DEVICE 1 #define CONFIG_LBA48 -/* PCIe support */ -#ifdef CONFIG_CMD_PCI -#ifndef CONFIG_SPL_BUILD -#define CONFIG_PCI_MVEBU -#endif -#endif - /* Enable LCD and reserve 512KB from top of memory*/ #define CONFIG_SYS_MEM_TOP_HIDE 0x80000 diff --git a/include/configs/turris_omnia.h b/include/configs/turris_omnia.h index 598674c96e..710b8991a4 100644 --- a/include/configs/turris_omnia.h +++ b/include/configs/turris_omnia.h @@ -66,7 +66,6 @@ /* PCIe support */ #ifndef CONFIG_SPL_BUILD -#define CONFIG_PCI_MVEBU #define CONFIG_PCI_SCAN_SHOW #endif diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 527050de97..da9809dcf3 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -1449,7 +1449,6 @@ CONFIG_PCI_MEM_BUS CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_SIZE CONFIG_PCI_MSC01 -CONFIG_PCI_MVEBU CONFIG_PCI_NOSCAN CONFIG_PCI_OHCI CONFIG_PCI_OHCI_DEVNO -- 2.20.1

3 6

[U-Boot] [PATCH 1/2] Kconfig: Migrate CONFIG_BUILD_TARGET
by Jagan Teki 18 Jan '19

18 Jan '19

Migrate CONFIG_BUILD_TARGET into Kconfig. Signed-off-by: Jagan Teki <jagan(a)amarulasolutions.com> --- Kconfig | 13 +++++++++++++ README | 7 ------- arch/arm/mach-mvebu/include/mach/config.h | 5 ----- configs/SBx81LIFKW_defconfig | 1 + configs/SBx81LIFXCAT_defconfig | 1 + configs/dreamplug_defconfig | 1 + configs/ds109_defconfig | 1 + configs/guruplug_defconfig | 1 + configs/ib62x0_defconfig | 1 + configs/nsa310s_defconfig | 1 + configs/sheevaplug_defconfig | 1 + include/configs/SBx81LIFKW.h | 1 - include/configs/SBx81LIFXCAT.h | 1 - include/configs/ib62x0.h | 3 --- include/configs/mv-plug-common.h | 3 --- include/configs/nsa310s.h | 3 --- include/configs/rcar-gen3-common.h | 1 - include/configs/socfpga_common.h | 3 --- include/configs/sunxi-common.h | 1 - scripts/config_whitelist.txt | 1 - 20 files changed, 21 insertions(+), 29 deletions(-) diff --git a/Kconfig b/Kconfig index aff7b2e00a..3a3a8d4d5b 100644 --- a/Kconfig +++ b/Kconfig @@ -224,6 +224,19 @@ config BUILD_ROM which are not shipped in the U-Boot source tree. Please, see doc/README.x86 for details. +config BUILD_TARGET + string "Build target special images" + default "u-boot-with-spl.sfp" if ARCH_SOCFPGA + default "u-boot-spl.kwb" if ARCH_MVEBU && SPL_BUILD + default "u-boot-elf.srec" if RCAR_GEN3 + default "u-boot.itb" if ARCH_SUNXI && ARM64 + help + Some SoCs need special image types (e.g. U-Boot binary + with a special header) as build targets. By defining + CONFIG_BUILD_TARGET in the SoC / board header, this + special image will be automatically built upon calling + make / buildman. + endmenu # General setup menu "Boot images" diff --git a/README b/README index 17d56b8034..01ad69e926 100644 --- a/README +++ b/README @@ -1998,13 +1998,6 @@ The following options need to be configured: 200 ms. - Configuration Management: - CONFIG_BUILD_TARGET - - Some SoCs need special image types (e.g. U-Boot binary - with a special header) as build targets. By defining - CONFIG_BUILD_TARGET in the SoC / board header, this - special image will be automatically built upon calling - make / buildman. CONFIG_IDENT_STRING diff --git a/arch/arm/mach-mvebu/include/mach/config.h b/arch/arm/mach-mvebu/include/mach/config.h index f165d10018..e3235fc67e 100644 --- a/arch/arm/mach-mvebu/include/mach/config.h +++ b/arch/arm/mach-mvebu/include/mach/config.h @@ -40,11 +40,6 @@ #define CONFIG_SYS_KWD_CONFIG arch/arm/mach-mvebu/kwbimage.cfg #endif /* CONFIG_SYS_KWD_CONFIG */ -/* Add target to build it automatically upon "make" */ -#ifdef CONFIG_SPL -#define CONFIG_BUILD_TARGET "u-boot-spl.kwb" -#endif - /* end of 16M scrubbed by training in bootrom */ #define CONFIG_SYS_INIT_SP_ADDR 0x00FF0000 diff --git a/configs/SBx81LIFKW_defconfig b/configs/SBx81LIFKW_defconfig index e0ce1595c5..52bb70ae8c 100644 --- a/configs/SBx81LIFKW_defconfig +++ b/configs/SBx81LIFKW_defconfig @@ -5,6 +5,7 @@ CONFIG_TARGET_SBx81LIFKW=y CONFIG_IDENT_STRING="\nSBx81LIFKW" # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 +CONFIG_BUILD_TARGET="u-boot.kwb" CONFIG_SILENT_CONSOLE=y CONFIG_SILENT_U_BOOT_ONLY=y CONFIG_MISC_INIT_R=y diff --git a/configs/SBx81LIFXCAT_defconfig b/configs/SBx81LIFXCAT_defconfig index 4a6e05844f..b322ab0959 100644 --- a/configs/SBx81LIFXCAT_defconfig +++ b/configs/SBx81LIFXCAT_defconfig @@ -5,6 +5,7 @@ CONFIG_TARGET_SBx81LIFXCAT=y CONFIG_IDENT_STRING="\nSBx81LIFXCAT" # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 +CONFIG_BUILD_TARGET="u-boot.kwb" CONFIG_SILENT_CONSOLE=y CONFIG_SILENT_U_BOOT_ONLY=y CONFIG_MISC_INIT_R=y diff --git a/configs/dreamplug_defconfig b/configs/dreamplug_defconfig index d3263cf9cd..762521f97d 100644 --- a/configs/dreamplug_defconfig +++ b/configs/dreamplug_defconfig @@ -6,6 +6,7 @@ CONFIG_IDENT_STRING="\nMarvell-DreamPlug" CONFIG_NR_DRAM_BANKS=2 # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 +CONFIG_BUILD_TARGET="u-boot.kwb" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y # CONFIG_CMD_FLASH is not set diff --git a/configs/ds109_defconfig b/configs/ds109_defconfig index 352403e573..b72174eada 100644 --- a/configs/ds109_defconfig +++ b/configs/ds109_defconfig @@ -5,6 +5,7 @@ CONFIG_TARGET_DS109=y CONFIG_NR_DRAM_BANKS=2 # CONFIG_SYS_MALLOC_F is not set CONFIG_HUSH_PARSER=y +CONFIG_BUILD_TARGET="u-boot.kwb" # CONFIG_CMD_FLASH is not set CONFIG_CMD_IDE=y CONFIG_CMD_I2C=y diff --git a/configs/guruplug_defconfig b/configs/guruplug_defconfig index 9998e48ab9..7726f9a769 100644 --- a/configs/guruplug_defconfig +++ b/configs/guruplug_defconfig @@ -6,6 +6,7 @@ CONFIG_IDENT_STRING="\nMarvell-GuruPlug" CONFIG_NR_DRAM_BANKS=2 # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 +CONFIG_BUILD_TARGET="u-boot.kwb" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/ib62x0_defconfig b/configs/ib62x0_defconfig index 985d85e027..03987a4ff1 100644 --- a/configs/ib62x0_defconfig +++ b/configs/ib62x0_defconfig @@ -5,6 +5,7 @@ CONFIG_TARGET_IB62X0=y CONFIG_IDENT_STRING=" RaidSonic ICY BOX IB-NAS62x0" CONFIG_NR_DRAM_BANKS=2 CONFIG_BOOTDELAY=3 +CONFIG_BUILD_TARGET="u-boot.kwb" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ib62x0 => " diff --git a/configs/nsa310s_defconfig b/configs/nsa310s_defconfig index eb29a70157..971d33b33d 100644 --- a/configs/nsa310s_defconfig +++ b/configs/nsa310s_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_NSA310S=y CONFIG_NR_DRAM_BANKS=2 CONFIG_BOOTDELAY=3 +CONFIG_BUILD_TARGET="u-boot.kwb" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="nsa310s => " diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig index 04b00cdea9..33cced9c48 100644 --- a/configs/sheevaplug_defconfig +++ b/configs/sheevaplug_defconfig @@ -7,6 +7,7 @@ CONFIG_IDENT_STRING="\nMarvell-Sheevaplug" CONFIG_NR_DRAM_BANKS=2 # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 +CONFIG_BUILD_TARGET="u-boot.kwb" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/include/configs/SBx81LIFKW.h b/include/configs/SBx81LIFKW.h index 07b65f89f9..d62fd35e81 100644 --- a/include/configs/SBx81LIFKW.h +++ b/include/configs/SBx81LIFKW.h @@ -13,7 +13,6 @@ #define CONFIG_KW88F6281 1 /* SOC Name */ #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ #define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage.cfg -#define CONFIG_BUILD_TARGET "u-boot.kwb" /* additions for new ARM relocation support */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 diff --git a/include/configs/SBx81LIFXCAT.h b/include/configs/SBx81LIFXCAT.h index d73752c7f9..3c8c216d89 100644 --- a/include/configs/SBx81LIFXCAT.h +++ b/include/configs/SBx81LIFXCAT.h @@ -13,7 +13,6 @@ #define CONFIG_KW88F6281 1 /* SOC Name */ #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ #define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage.cfg -#define CONFIG_BUILD_TARGET "u-boot.kwb" /* additions for new ARM relocation support */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 diff --git a/include/configs/ib62x0.h b/include/configs/ib62x0.h index f8d3c3b63f..5e54441c73 100644 --- a/include/configs/ib62x0.h +++ b/include/configs/ib62x0.h @@ -15,9 +15,6 @@ #define CONFIG_KW88F6281 /* SOC Name */ #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ -/* Add target to build it automatically upon "make" */ -#define CONFIG_BUILD_TARGET "u-boot.kwb" - /* * Compression configuration */ diff --git a/include/configs/mv-plug-common.h b/include/configs/mv-plug-common.h index f424e2cc6c..486650f183 100644 --- a/include/configs/mv-plug-common.h +++ b/include/configs/mv-plug-common.h @@ -13,9 +13,6 @@ #define CONFIG_KW88F6281 1 /* SOC Name */ #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ -/* Add target to build it automatically upon "make" */ -#define CONFIG_BUILD_TARGET "u-boot.kwb" - /* * mv-common.h should be defined after CMD configs since it used them * to enable certain macros diff --git a/include/configs/nsa310s.h b/include/configs/nsa310s.h index 1ca9a01754..eb465e0690 100644 --- a/include/configs/nsa310s.h +++ b/include/configs/nsa310s.h @@ -15,9 +15,6 @@ #define CONFIG_KW88F6702 1 /* SOC Name */ #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ -/* add target to build it automatically upon "make" */ -#define CONFIG_BUILD_TARGET "u-boot.kwb" - /* compression configuration */ #define CONFIG_BZIP2 diff --git a/include/configs/rcar-gen3-common.h b/include/configs/rcar-gen3-common.h index 6c2fa6a63c..06d5d3219c 100644 --- a/include/configs/rcar-gen3-common.h +++ b/include/configs/rcar-gen3-common.h @@ -12,7 +12,6 @@ #include <asm/arch/rmobile.h> #define CONFIG_REMAKE_ELF -#define CONFIG_BUILD_TARGET "u-boot-elf.srec" /* boot option */ diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index bd8f5c8c41..d3dd2eabac 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -14,9 +14,6 @@ #define CONFIG_TIMESTAMP /* Print image info with timestamp */ -/* add target to build it automatically upon "make" */ -#define CONFIG_BUILD_TARGET "u-boot-with-spl.sfp" - /* * Memory configurations */ diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 9819d9980c..f0c8daad72 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -32,7 +32,6 @@ #endif #ifdef CONFIG_ARM64 -#define CONFIG_BUILD_TARGET "u-boot.itb" #define CONFIG_SYS_BOOTM_LEN (32 << 20) #endif diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 527050de97..17c4b482c7 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -181,7 +181,6 @@ CONFIG_BS_SIZE CONFIG_BTB CONFIG_BUFNO_AUTO_INCR_BIT CONFIG_BUILD_ENVCRC -CONFIG_BUILD_TARGET CONFIG_BUS_WIDTH CONFIG_BZIP2 CONFIG_CADDY2 -- 2.18.0.321.gffc6fa0e3

3 4

[U-Boot] [PATCH] spl: fat/fs: Add control to build FS EXT4 in SPL
by tien.fong.chee＠intel.com 18 Jan '19

18 Jan '19

From: Tien Fong Chee <tien.fong.chee(a)intel.com> CONFIG_SPL_EXT_SUPPORT can be used to include/exclude the FS EXT4 from SPL build. Excluding the FS EXT4 from SPL build can help to save 20KiB memory. Signed-off-by: Tien Fong Chee <tien.fong.chee(a)intel.com> --- fs/fs.c | 4 +++- 1 files changed, 3 insertions(+), 1 deletions(-) diff --git a/fs/fs.c b/fs/fs.c index 0b8088b..252e2f5 100644 --- a/fs/fs.c +++ b/fs/fs.c @@ -184,7 +184,9 @@ static struct fstype_info fstypes[] = { .closedir = fat_closedir, }, #endif -#ifdef CONFIG_FS_EXT4 +/* #ifdef CONFIG_FS_EXT4 */ +#if (!defined(CONFIG_SPL_BUILD) && defined(CONFIG_FS_EXT4)) || \ + (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_EXT_SUPPORT)) { .fstype = FS_TYPE_EXT, .name = "ext4", -- 1.7.7.4

3 2

[U-Boot] [PATCH] spl: fat/fs: Add option to include/exclude FAT write build in SPL
by tien.fong.chee＠intel.com 18 Jan '19

18 Jan '19

From: Tien Fong Chee <tien.fong.chee(a)intel.com> Most of the time SPL only needs very simple FAT reading, so having CONFIG_SPL_FAT_WRITE to exclude or undefined would help to save 64KiB default max clustersize from memory. Signed-off-by: Tien Fong Chee <tien.fong.chee(a)intel.com> --- common/spl/Kconfig | 7 +++++++ fs/fat/Makefile | 7 ++++++- fs/fat/fat.c | 4 +++- fs/fs.c | 3 ++- 4 files changed, 18 insertions(+), 3 deletions(-) diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 0ddbffc..dad4c11 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -403,6 +403,13 @@ config SPL_FAT_SUPPORT filesystem from within SPL. Support for the underlying block device (e.g. MMC or USB) must be enabled separately. +config SPL_FAT_WRITE + bool "Support write for FAT filesystems" + help + Enable write support for FAT and VFAT filesystems with SPL. + Support for the underlying block device (e.g. MMC or USB) must be + enabled separately. + config SPL_FPGA_SUPPORT bool "Support FPGAs" help diff --git a/fs/fat/Makefile b/fs/fat/Makefile index e64b61a..654b8c3 100644 --- a/fs/fat/Makefile +++ b/fs/fat/Makefile @@ -1,5 +1,10 @@ # SPDX-License-Identifier: GPL-2.0+ # +ifdef CONFIG_SPL_BUILD obj-$(CONFIG_FS_FAT) := fat.o -obj-$(CONFIG_FAT_WRITE):= fat_write.o +obj-$(CONFIG_SPL_FAT_WRITE) = fat_write.o +else +obj-$(CONFIG_FS_FAT) := fat.o +obj-$(CONFIG_FAT_WRITE) = fat_write.o +endif diff --git a/fs/fat/fat.c b/fs/fat/fat.c index ac8913e..8803fb4 100644 --- a/fs/fat/fat.c +++ b/fs/fat/fat.c @@ -145,7 +145,9 @@ static void get_name(dir_entry *dirent, char *s_name) } static int flush_dirty_fat_buffer(fsdata *mydata); -#if !defined(CONFIG_FAT_WRITE) + +#if (!defined(CONFIG_SPL_BUILD) && !defined(CONFIG_FAT_WRITE)) || \ + (defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_FAT_WRITE)) /* Stub for read only operation */ int flush_dirty_fat_buffer(fsdata *mydata) { diff --git a/fs/fs.c b/fs/fs.c index cb26517..0b8088b 100644 --- a/fs/fs.c +++ b/fs/fs.c @@ -168,7 +168,8 @@ static struct fstype_info fstypes[] = { .exists = fat_exists, .size = fat_size, .read = fat_read_file, -#ifdef CONFIG_FAT_WRITE +#if (!defined(CONFIG_SPL_BUILD) && defined(CONFIG_FAT_WRITE)) || \ + (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_FAT_WRITE)) .write = file_fat_write, .unlink = fat_unlink, .mkdir = fat_mkdir, -- 1.7.7.4

4 3

[U-Boot] [PATCH v2 1/9] arm: actions: Add common framework for Actions Semi SoCs
by Amit Singh Tomar 18 Jan '19

18 Jan '19

This adds common arch owl support that can drive, 64-bits SoCs from Actions Semi. It also removes the Bubblegum specific board files. Signed-off-by: Amit Singh Tomar <amittomer25(a)gmail.com> --- Changes since v1: * Moved S700 specific changes to patch 4 of 9. * Moved couple of symbols from defconfig to arch/arm/Kconfig and platform owl Kconfig. --- arch/arm/Kconfig | 3 +- arch/arm/mach-owl/Kconfig | 29 ++++++-------- arch/arm/mach-owl/Makefile | 1 + arch/arm/mach-owl/soc.c | 56 ++++++++++++++++++++++++++++ board/ucRobotics/bubblegum_96/Kconfig | 15 -------- board/ucRobotics/bubblegum_96/MAINTAINERS | 6 --- board/ucRobotics/bubblegum_96/Makefile | 3 -- board/ucRobotics/bubblegum_96/bubblegum_96.c | 56 ---------------------------- configs/bubblegum_96_defconfig | 4 +- include/configs/bubblegum_96.h | 42 --------------------- include/configs/owl-common.h | 42 +++++++++++++++++++++ include/configs/s900.h | 18 +++++++++ 12 files changed, 131 insertions(+), 144 deletions(-) create mode 100644 arch/arm/mach-owl/soc.c delete mode 100644 board/ucRobotics/bubblegum_96/Kconfig delete mode 100644 board/ucRobotics/bubblegum_96/MAINTAINERS delete mode 100644 board/ucRobotics/bubblegum_96/Makefile delete mode 100644 board/ucRobotics/bubblegum_96/bubblegum_96.c delete mode 100644 include/configs/bubblegum_96.h create mode 100644 include/configs/owl-common.h create mode 100644 include/configs/s900.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index d6b1629..1a2e561 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -761,9 +761,9 @@ config ARCH_MX5 config ARCH_OWL bool "Actions Semi OWL SoCs" - select ARM64 select DM select DM_SERIAL + select OWL_SERIAL select OF_CONTROL imply CMD_DM @@ -1555,7 +1555,6 @@ source "board/spear/spear600/Kconfig" source "board/spear/x600/Kconfig" source "board/st/stv0991/Kconfig" source "board/tcl/sl50/Kconfig" -source "board/ucRobotics/bubblegum_96/Kconfig" source "board/birdland/bav335x/Kconfig" source "board/toradex/colibri_pxa270/Kconfig" source "board/vscom/baltos/Kconfig" diff --git a/arch/arm/mach-owl/Kconfig b/arch/arm/mach-owl/Kconfig index 199e772..5eb93c9 100644 --- a/arch/arm/mach-owl/Kconfig +++ b/arch/arm/mach-owl/Kconfig @@ -1,27 +1,22 @@ if ARCH_OWL -config SYS_SOC - default "owl" - choice - prompt "Actions Semi OWL SoCs board select" + prompt "Actions Semi SoC Variant" optional -config TARGET_BUBBLEGUM_96 - bool "96Boards Bubblegum-96" - help - Support for 96Boards Bubblegum-96. This board complies with - 96Board Consumer Edition Specification. Features: - - Actions Semi S900 SoC (4xCortex A53, Power VR G6230 GPU) - - 2GiB RAM - - 8GiB eMMC, uSD slot - - WiFi, Bluetooth and GPS module - - 2x Host, 1x Device USB port - - HDMI - - 20-pin low speed and 40-pin high speed expanders, 6 LED, 3 buttons +config MACH_S900 + bool "Actionss Semi S900" + select ARM64 endchoice -source "board/ucRobotics/bubblegum_96/Kconfig" +config SYS_CONFIG_NAME + default "s900" if MACH_S900 + +config SYS_SOC + default "s900" if MACH_S900 + +config SYS_TEXT_BASE + default 0x11000000 endif diff --git a/arch/arm/mach-owl/Makefile b/arch/arm/mach-owl/Makefile index 1b43dc2..0b181c6 100644 --- a/arch/arm/mach-owl/Makefile +++ b/arch/arm/mach-owl/Makefile @@ -1,3 +1,4 @@ # SPDX-License-Identifier: GPL-2.0+ +obj-y += soc.o obj-y += sysmap-s900.o diff --git a/arch/arm/mach-owl/soc.c b/arch/arm/mach-owl/soc.c new file mode 100644 index 0000000..d0630d2 --- /dev/null +++ b/arch/arm/mach-owl/soc.c @@ -0,0 +1,56 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Actions Semi SoCs Boards Support. + * + * Copyright (C) 2018 Manivannan Sadhasivam <manivannan.sadhasivam(a)linaro.org> + */ + +#include <linux/arm-smccc.h> +#include <linux/psci.h> +#include <common.h> +#include <asm/io.h> +#include <asm/mach-types.h> +#include <asm/psci.h> + +DECLARE_GLOBAL_DATA_PTR; + +/* + * dram_init - sets uboots idea of sdram size + */ +int dram_init(void) +{ + gd->ram_size = CONFIG_SYS_SDRAM_SIZE; + return 0; +} + +/* This is called after dram_init() so use get_ram_size result */ +int dram_init_banksize(void) +{ + gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; + gd->bd->bi_dram[0].size = gd->ram_size; + + return 0; +} + +static void show_psci_version(void) +{ + struct arm_smccc_res res; + + arm_smccc_smc(ARM_PSCI_0_2_FN_PSCI_VERSION, 0, 0, 0, 0, 0, 0, 0, &res); + + printf("PSCI: v%ld.%ld\n", + PSCI_VERSION_MAJOR(res.a0), + PSCI_VERSION_MINOR(res.a0)); +} + +int board_init(void) +{ + show_psci_version(); + + return 0; +} + +void reset_cpu(ulong addr) +{ + psci_system_reset(); +} diff --git a/board/ucRobotics/bubblegum_96/Kconfig b/board/ucRobotics/bubblegum_96/Kconfig deleted file mode 100644 index 2dd40d9..0000000 --- a/board/ucRobotics/bubblegum_96/Kconfig +++ /dev/null @@ -1,15 +0,0 @@ -if TARGET_BUBBLEGUM_96 - -config SYS_BOARD - default "bubblegum_96" - -config SYS_VENDOR - default "ucRobotics" - -config SYS_SOC - default "s900" - -config SYS_CONFIG_NAME - default "bubblegum_96" - -endif diff --git a/board/ucRobotics/bubblegum_96/MAINTAINERS b/board/ucRobotics/bubblegum_96/MAINTAINERS deleted file mode 100644 index d0cb727..0000000 --- a/board/ucRobotics/bubblegum_96/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -BUBBLEGUM_96 BOARD -M: Manivannan Sadhasivam <manivannan.sadhasivam(a)linaro.org> -S: Maintained -F: board/ucRobotics/bubblegum_96/ -F: include/configs/bubblegum_96.h -F: configs/bubblegum_96_defconfig diff --git a/board/ucRobotics/bubblegum_96/Makefile b/board/ucRobotics/bubblegum_96/Makefile deleted file mode 100644 index c4b524d..0000000 --- a/board/ucRobotics/bubblegum_96/Makefile +++ /dev/null @@ -1,3 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ - -obj-y := bubblegum_96.o diff --git a/board/ucRobotics/bubblegum_96/bubblegum_96.c b/board/ucRobotics/bubblegum_96/bubblegum_96.c deleted file mode 100644 index a4c202d..0000000 --- a/board/ucRobotics/bubblegum_96/bubblegum_96.c +++ /dev/null @@ -1,56 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Bubblegum-96 Boards Support - * - * Copyright (C) 2018 Manivannan Sadhasivam <manivannan.sadhasivam(a)linaro.org> - */ - -#include <linux/arm-smccc.h> -#include <linux/psci.h> -#include <common.h> -#include <asm/io.h> -#include <asm/mach-types.h> -#include <asm/psci.h> - -DECLARE_GLOBAL_DATA_PTR; - -/* - * dram_init - sets uboots idea of sdram size - */ -int dram_init(void) -{ - gd->ram_size = CONFIG_SYS_SDRAM_SIZE; - return 0; -} - -/* This is called after dram_init() so use get_ram_size result */ -int dram_init_banksize(void) -{ - gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; - gd->bd->bi_dram[0].size = gd->ram_size; - - return 0; -} - -static void show_psci_version(void) -{ - struct arm_smccc_res res; - - arm_smccc_smc(ARM_PSCI_0_2_FN_PSCI_VERSION, 0, 0, 0, 0, 0, 0, 0, &res); - - printf("PSCI: v%ld.%ld\n", - PSCI_VERSION_MAJOR(res.a0), - PSCI_VERSION_MINOR(res.a0)); -} - -int board_init(void) -{ - show_psci_version(); - - return 0; -} - -void reset_cpu(ulong addr) -{ - psci_system_reset(); -} diff --git a/configs/bubblegum_96_defconfig b/configs/bubblegum_96_defconfig index 74a9121..d1f403f 100644 --- a/configs/bubblegum_96_defconfig +++ b/configs/bubblegum_96_defconfig @@ -1,7 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_OWL=y -CONFIG_SYS_TEXT_BASE=0x11000000 -CONFIG_TARGET_BUBBLEGUM_96=y +CONFIG_MACH_S900=y CONFIG_IDENT_STRING="\nBubblegum-96" CONFIG_DISTRO_DEFAULTS=y CONFIG_NR_DRAM_BANKS=1 @@ -19,4 +18,3 @@ CONFIG_DEFAULT_DEVICE_TREE="bubblegum_96" CONFIG_CLK=y CONFIG_CLK_OWL=y CONFIG_CLK_S900=y -CONFIG_OWL_SERIAL=y diff --git a/include/configs/bubblegum_96.h b/include/configs/bubblegum_96.h deleted file mode 100644 index e1dc37b..0000000 --- a/include/configs/bubblegum_96.h +++ /dev/null @@ -1,42 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Board configuration file for Bubblegum-96 - * - * Copyright (C) 2015 Actions Semi Co., Ltd. - * Copyright (C) 2018 Manivannan Sadhasivam <manivannan.sadhasivam(a)linaro.org> - * - */ - -#ifndef _BUBBLEGUM_96_H_ -#define _BUGGLEGUM_96_H_ - -/* SDRAM Definitions */ -#define CONFIG_SYS_SDRAM_BASE 0x0 -#define CONFIG_SYS_SDRAM_SIZE 0x80000000 - -/* Generic Timer Definitions */ -#define COUNTER_FREQUENCY (24000000) /* 24MHz */ - -#define CONFIG_SYS_MALLOC_LEN (32 * 1024 * 1024) - -/* Some commands use this as the default load address */ -#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7ffc0) - -/* - * This is the initial SP which is used only briefly for relocating the u-boot - * image to the top of SDRAM. After relocation u-boot moves the stack to the - * proper place. - */ -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x7ff00) - -/* UART Definitions */ -#define CONFIG_BAUDRATE 115200 - -#define CONFIG_ENV_SIZE 0x2000 - -/* Console configuration */ -#define CONFIG_SYS_CBSIZE 1024 /* Console buffer size */ -#define CONFIG_SYS_MAXARGS 64 -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - -#endif diff --git a/include/configs/owl-common.h b/include/configs/owl-common.h new file mode 100644 index 0000000..42cd891 --- /dev/null +++ b/include/configs/owl-common.h @@ -0,0 +1,42 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Board configuration file for Actions Semi SoCs. + * + * Copyright (C) 2015 Actions Semi Co., Ltd. + * Copyright (C) 2018 Manivannan Sadhasivam <manivannan.sadhasivam(a)linaro.org> + * + */ + +#ifndef _OWL_COMMON_CONFIG_H_ +#define _OWL_COMMON_CONFIG_H_ + +/* SDRAM Definitions */ +#define CONFIG_SYS_SDRAM_BASE 0x0 +#define CONFIG_SYS_SDRAM_SIZE 0x80000000 + +/* Generic Timer Definitions */ +#define COUNTER_FREQUENCY (24000000) /* 24MHz */ + +#define CONFIG_SYS_MALLOC_LEN (32 * 1024 * 1024) + +/* Some commands use this as the default load address */ +#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7ffc0) + +/* + * This is the initial SP which is used only briefly for relocating the u-boot + * image to the top of SDRAM. After relocation u-boot moves the stack to the + * proper place. + */ +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x7ff00) + +/* UART Definitions */ +#define CONFIG_BAUDRATE 115200 + +#define CONFIG_ENV_SIZE 0x2000 + +/* Console configuration */ +#define CONFIG_SYS_CBSIZE 1024 /* Console buffer size */ +#define CONFIG_SYS_MAXARGS 64 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#endif diff --git a/include/configs/s900.h b/include/configs/s900.h new file mode 100644 index 0000000..394925b --- /dev/null +++ b/include/configs/s900.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Board configuration file for Bubblegum-96 based on S900 SoC. + * + * Copyright (C) 2015 Actions Semi Co., Ltd. + * Copyright (C) 2018 Manivannan Sadhasivam <manivannan.sadhasivam(a)linaro.org> + * + */ + +#ifndef _CONFIG_S900_H_ +#define _CONFIG_S900_H_ + +/* + * Include common owl configuration where most the settings are + */ +#include <configs/owl-common.h> + +#endif -- 2.7.4

4 24

[U-Boot] [PATCH 2/2] Kconfig: Add u-boot.itb BUILD_TARGET for RK3368/3399
by Jagan Teki 18 Jan '19

18 Jan '19

Add u-boot.itb BUILD_TARGET for Rockchip RK3368 and RK3399 SoC, this can get rid of building itb explicitly with 'make u-boot.itb' all required images will now build just by make. Signed-off-by: Jagan Teki <jagan(a)amarulasolutions.com> --- Kconfig | 1 + board/rockchip/evb_rk3399/README | 1 - board/theobroma-systems/lion_rk3368/README | 9 ++------- board/theobroma-systems/puma_rk3399/README | 1 - board/vamrs/rock960_rk3399/README | 1 - 5 files changed, 3 insertions(+), 10 deletions(-) diff --git a/Kconfig b/Kconfig index 3a3a8d4d5b..247ace3ce0 100644 --- a/Kconfig +++ b/Kconfig @@ -230,6 +230,7 @@ config BUILD_TARGET default "u-boot-spl.kwb" if ARCH_MVEBU && SPL_BUILD default "u-boot-elf.srec" if RCAR_GEN3 default "u-boot.itb" if ARCH_SUNXI && ARM64 + default "u-boot.itb" if ROCKCHIP_RK3368 || ROCKCHIP_RK3399 help Some SoCs need special image types (e.g. U-Boot binary with a special header) as build targets. By defining diff --git a/board/rockchip/evb_rk3399/README b/board/rockchip/evb_rk3399/README index 8321467046..c388f269c1 100644 --- a/board/rockchip/evb_rk3399/README +++ b/board/rockchip/evb_rk3399/README @@ -58,7 +58,6 @@ Compile the U-Boot for firefly-rk3399, use below instead: > make firefly-rk3399_defconfig > make - > make u-boot.itb Get spl/u-boot-spl.bin and u-boot.itb in this step. diff --git a/board/theobroma-systems/lion_rk3368/README b/board/theobroma-systems/lion_rk3368/README index 83e4332984..241d4d9ec8 100644 --- a/board/theobroma-systems/lion_rk3368/README +++ b/board/theobroma-systems/lion_rk3368/README @@ -14,18 +14,13 @@ Configure U-Boot > cd ../u-boot > make lion-rk3368_defconfig -Build the TPL/SPL stage -======================= +Build the TPL/SPL, U-Boot proper and a FIT image including the ATF +================================================================== > make CROSS_COMPILE=aarch64-unknown-elf- ARCH=arm > tools/mkimage -n rk3368 -T rksd -d tpl/u-boot-tpl.bin spl-3368.img > cat spl/u-boot-spl-dtb.bin >> spl-3368.img -Build the full U-Boot and a FIT image including the ATF -======================================================= - - > make CROSS_COMPILE=aarch64-unknown-elf- ARCH=arm u-boot.itb - Flash the image =============== diff --git a/board/theobroma-systems/puma_rk3399/README b/board/theobroma-systems/puma_rk3399/README index f67dfb451f..c06c9650b8 100644 --- a/board/theobroma-systems/puma_rk3399/README +++ b/board/theobroma-systems/puma_rk3399/README @@ -60,7 +60,6 @@ Creating a SPL image for SD-Card/eMMC Creating a SPL image for SPI-NOR > tools/mkimage -n rk3399 -T rkspi -d spl/u-boot-spl.bin spl_nor.img Create the FIT image containing U-Boot proper, ATF, M0 Firmware, devicetree - > make CROSS_COMPILE=aarch64-linux-gnu- u-boot.itb Flash the image =============== diff --git a/board/vamrs/rock960_rk3399/README b/board/vamrs/rock960_rk3399/README index d14399090e..c5c675c4ea 100644 --- a/board/vamrs/rock960_rk3399/README +++ b/board/vamrs/rock960_rk3399/README @@ -61,7 +61,6 @@ Compile the U-Boot > export CROSS_COMPILE=aarch64-linux-gnu- > make rock960-rk3399_defconfig > make - > make u-boot.itb Compile the rkdeveloptool ========================= -- 2.18.0.321.gffc6fa0e3

2 1

[U-Boot] [PATCH v2] env: add spi_flash_read_env function
by Horatiu Vultur 17 Jan '19

17 Jan '19

The spi_flash_read_env function is a wrapper over spi_flash_read, which enables the env to read multiple flash page size from flash until '\0\0' is read or the end of env partition is reached. Instead of reading the entire env size. When it reads '\0\0', it stops reading further the env and assumes that the rest of env is '\0'. This is an optimization for large environments that contain few bytes environment variables. In this case it doesn't need to read the entire environment and only few pages. Signed-off-by: Horatiu Vultur <horatiu.vultur(a)microchip.com> --- env/sf.c | 56 +++++++++++++++++++++++++++++++++++++++++++++----------- 1 file changed, 45 insertions(+), 11 deletions(-) Changes in v2: - rename flash_read to spi_flash_read_env - change signature of is_end, by adding const to addr diff --git a/env/sf.c b/env/sf.c index 2e3c600..01fadee 100644 --- a/env/sf.c +++ b/env/sf.c @@ -81,6 +81,40 @@ static int setup_flash_device(void) return 0; } +static int is_end(const char *addr, size_t size) +{ + /* The end of env variables is marked by '\0\0' */ + int i = 0; + + for (i = 0; i < size - 1; ++i) + if (addr[i] == 0x0 && addr[i + 1] == 0x0) + return 1; + return 0; +} + +static int spi_flash_read_env(struct spi_flash *flash, u32 offset, size_t len, + void *buf) +{ + u32 addr = 0; + u32 page_size = flash->page_size; + + memset(buf, 0x0, len); + for (int i = 0; i < len / page_size; ++i) { + int ret = spi_flash_read(flash, offset, page_size, + &((char *)buf)[addr]); + + if (ret < 0) + return ret; + + if (is_end(&((char *)buf)[addr], page_size)) + return 0; + + addr += page_size; + offset += page_size; + } + return 0; +} + #if defined(CONFIG_ENV_OFFSET_REDUND) #ifdef CMD_SAVEENV static int env_sf_save(void) @@ -116,8 +150,8 @@ static int env_sf_save(void) ret = -ENOMEM; goto done; } - ret = spi_flash_read(env_flash, saved_offset, - saved_size, saved_buffer); + ret = spi_flash_read_env(env_flash, saved_offset, + saved_size, saved_buffer); if (ret) goto done; } @@ -183,10 +217,10 @@ static int env_sf_load(void) if (ret) goto out; - read1_fail = spi_flash_read(env_flash, CONFIG_ENV_OFFSET, - CONFIG_ENV_SIZE, tmp_env1); - read2_fail = spi_flash_read(env_flash, CONFIG_ENV_OFFSET_REDUND, - CONFIG_ENV_SIZE, tmp_env2); + read1_fail = spi_flash_read_env(env_flash, CONFIG_ENV_OFFSET, + CONFIG_ENV_SIZE, tmp_env1); + read2_fail = spi_flash_read_env(env_flash, CONFIG_ENV_OFFSET_REDUND, + CONFIG_ENV_SIZE, tmp_env2); ret = env_import_redund((char *)tmp_env1, read1_fail, (char *)tmp_env2, read2_fail); @@ -220,8 +254,8 @@ static int env_sf_save(void) if (!saved_buffer) goto done; - ret = spi_flash_read(env_flash, saved_offset, - saved_size, saved_buffer); + ret = spi_flash_read_env(env_flash, saved_offset, + saved_size, saved_buffer); if (ret) goto done; } @@ -277,10 +311,10 @@ static int env_sf_load(void) if (ret) goto out; - ret = spi_flash_read(env_flash, - CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, buf); + ret = spi_flash_read_env(env_flash, CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, + buf); if (ret) { - set_default_env("spi_flash_read() failed", 0); + set_default_env("spi_flash_read_env() failed", 0); goto err_read; } -- 2.7.4

2 1