January 2019 - U-Boot

[U-Boot] [PATCH] atmel: add CMD_FS_GENERIC to SAMA5D3 for EFI boot
by Greg Czerniak 27 Jan '19

27 Jan '19

I'm working on getting OpenBSD to run on the Atmel SAMA5D3 Xplained. OpenBSD uses an EFI bootloader, which requires the "load" command to work, since "fatload" doesn't initialize the EFI memory addresses properly. To get "load" on the SAMA5D3 version of U-Boot, I propose adding the CONFIG_CMD_FS_GENERIC option. Signed-off-by: Greg Czerniak <greg(a)czerniak.info> --- configs/sama5d3_xplained_mmc_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/sama5d3_xplained_mmc_defconfig b/configs/sama5d3_xplained_$ index eab38ec366..57a163bd58 100644 --- a/configs/sama5d3_xplained_mmc_defconfig +++ b/configs/sama5d3_xplained_mmc_defconfig @@ -76,6 +76,7 @@ CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y +CONFIG_CMD_FS_GENERIC=y CONFIG_W1=y CONFIG_W1_GPIO=y CONFIG_W1_EEPROM=y -- 2.19.1

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[U-Boot] [RESEND PATCH] drivers: esdhc: add support for ColdFire mcf5441x family
by Angelo Dureghello 27 Jan '19

27 Jan '19

This patch has been tested on the mcf54415-based stmark2 board. The eSDHC driver works reliably using DMA mode. Signed-off-by: Angelo Dureghello <angelo(a)sysam.it> --- Changes in v2: - add be to le 32-bit byte swap for ColdFire, - remove HS from host capabilities for ColdFire. --- drivers/mmc/fsl_esdhc.c | 43 ++++++++++++++++++++++++++++++++++++++++- include/fsl_esdhc.h | 1 + 2 files changed, 43 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index 99e5882866..c972412574 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -384,6 +384,25 @@ static void check_and_invalidate_dcache_range invalidate_dcache_range(start, end); } +#ifdef CONFIG_MCF5441x +/* + * Swaps 32-bit words to little-endian byte order. + */ +static inline void sd_swap_dma_buff(struct mmc_data *data) +{ + int i, size = data->blocksize >> 2; + u32 *buffer = (u32 *)data->dest; + u32 sw; + + while (data->blocks--) { + for (i = 0; i < size; i++) { + sw = __sw32(*buffer); + *buffer++ = sw; + } + } +} +#endif + /* * Sends a command out on the bus. Takes the mmc pointer, * a command pointer, and an optional data pointer. @@ -546,8 +565,12 @@ static int esdhc_send_cmd_common(struct fsl_esdhc_priv *priv, struct mmc *mmc, * cache-fill during the DMA operations such as the * speculative pre-fetching etc. */ - if (data->flags & MMC_DATA_READ) + if (data->flags & MMC_DATA_READ) { check_and_invalidate_dcache_range(cmd, data); +#ifdef CONFIG_MCF5441x + sd_swap_dma_buff(data); +#endif + } #endif } @@ -1029,8 +1052,12 @@ static int esdhc_init_common(struct fsl_esdhc_priv *priv, struct mmc *mmc) /* Disable the BRR and BWR bits in IRQSTAT */ esdhc_clrbits32(&regs->irqstaten, IRQSTATEN_BRR | IRQSTATEN_BWR); +#ifdef CONFIG_MCF5441x + esdhc_write32(&regs->proctl, PROCTL_INIT | PROCTL_D3CD); +#else /* Put the PROCTL reg back to the default */ esdhc_write32(&regs->proctl, PROCTL_INIT); +#endif /* Set timout to the maximum value */ esdhc_clrsetbits32(&regs->sysctl, SYSCTL_TIMEOUT_MASK, 14 << 16); @@ -1138,6 +1165,11 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv, if (ret) return ret; +#ifdef CONFIG_MCF5441x + /* ColdFire, using SDHC_DATA[3] for card detection */ + esdhc_write32(&regs->proctl, PROCTL_INIT | PROCTL_D3CD); +#endif + #ifndef CONFIG_FSL_USDHC esdhc_setbits32(&regs->sysctl, SYSCTL_PEREN | SYSCTL_HCKEN | SYSCTL_IPGEN | SYSCTL_CKEN); @@ -1162,6 +1194,15 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv, voltage_caps = 0; caps = esdhc_read32(&regs->hostcapblt); +#ifdef CONFIG_MCF5441x + /* + * MCF5441x RM declares in more points that sdhc clock speed must + * never exceed 25 Mhz. From this, the HS bit needs to be disabled + * from host capabilities. + */ + caps &= ~ESDHC_HOSTCAPBLT_HSS; +#endif + #ifdef CONFIG_SYS_FSL_ERRATUM_ESDHC135 caps = caps & ~(ESDHC_HOSTCAPBLT_SRS | ESDHC_HOSTCAPBLT_VS18 | ESDHC_HOSTCAPBLT_VS30); diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h index acd8dd06f8..8dbd5249a7 100644 --- a/include/fsl_esdhc.h +++ b/include/fsl_esdhc.h @@ -106,6 +106,7 @@ #define PROCTL_INIT 0x00000020 #define PROCTL_DTW_4 0x00000002 #define PROCTL_DTW_8 0x00000004 +#define PROCTL_D3CD 0x00000008 #define CMDARG 0x0002e008 -- 2.20.1

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[U-Boot] [PATCH 0/2] env: Fix "env save" to malformed environment
by Sam Protsenko 27 Jan '19

27 Jan '19

In case when environment is malformed (e.g. zeroed out), we are not able to save new environment to that location. Let's fix that by not considering the location with "bad CRC" environment as not accessible. Sam Protsenko (2): env: common: Return specific error code on bad CRC env: Fix saving environment to "bad CRC" location env/common.c | 4 ++-- env/env.c | 25 +++++++++++++++++++------ 2 files changed, 21 insertions(+), 8 deletions(-) -- 2.20.1

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[U-Boot] [PATCH] ARM: chiliboard: enable DM_SPI
by Marcin Niestroj 27 Jan '19

27 Jan '19

Add DM_SPI to suppress build warning about dm conversion. Signed-off-by: Marcin Niestroj <m.niestroj(a)grinn-global.com> --- configs/chiliboard_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/chiliboard_defconfig b/configs/chiliboard_defconfig index 02eb324811..ceba006e0c 100644 --- a/configs/chiliboard_defconfig +++ b/configs/chiliboard_defconfig @@ -42,6 +42,7 @@ CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_DRIVER_TI_CPSW=y CONFIG_SPI=y +CONFIG_DM_SPI=y CONFIG_OMAP3_SPI=y CONFIG_TIMER=y CONFIG_OMAP_TIMER=y -- 2.20.1

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[U-Boot] [PATCH] Makefile: have "make distclean" remove CHANGELOG
by Robert P. J. Day 27 Jan '19

27 Jan '19

Ensure that "make distclean" deletes an existing CHANGELOG file. Signed-off-by: Robert P. J. Day <rpjday(a)crashcourse.ca> --- diff --git a/Makefile b/Makefile index 3be9fc5c34..b9e8b0952c 100644 --- a/Makefile +++ b/Makefile @@ -1795,7 +1795,7 @@ distclean: mrproper -o -name '.*.rej' -o -name '*%' -o -name 'core' \ -o -name '*.pyc' \) \ -type f -print | xargs rm -f - @rm -f boards.cfg + @rm -f boards.cfg CHANGELOG backup: F=`basename $(srctree)` ; cd .. ; \ -- ======================================================================== Robert P. J. Day Ottawa, Ontario, CANADA http://crashcourse.ca/dokuwiki Twitter: http://twitter.com/rpjday LinkedIn: http://ca.linkedin.com/in/rpjday ========================================================================

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[U-Boot] [PATCH 1/2] mmc: mtk-sd: fix possible incomplete read ops
by Fabien Parent 27 Jan '19

27 Jan '19

The code is checking for incomplete read when it see the INT_XFER_COMPL flag, but it forget to first check whether there is anything left in the FIFO to copy to the RX buffer. This means that sometimes we will get errors because of erroneous incomplete read operation. This commit fixes the driver re-ordering the code so that we first check for data inside the RX fifo and only after check the status of the INT_XFER_COMPL flag. Signed-off-by: Fabien Parent <fparent(a)baylibre.com> --- drivers/mmc/mtk-sd.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/mmc/mtk-sd.c b/drivers/mmc/mtk-sd.c index 0741a525c0..e668df7017 100644 --- a/drivers/mmc/mtk-sd.c +++ b/drivers/mmc/mtk-sd.c @@ -554,6 +554,14 @@ static int msdc_pio_read(struct msdc_host *host, u8 *ptr, u32 size) break; } + chksz = min(size, (u32)MSDC_FIFO_SIZE); + + if (msdc_fifo_rx_bytes(host) >= chksz) { + msdc_fifo_read(host, ptr, chksz); + ptr += chksz; + size -= chksz; + } + if (status & MSDC_INT_XFER_COMPL) { if (size) { pr_err("data not fully read\n"); @@ -562,15 +570,7 @@ static int msdc_pio_read(struct msdc_host *host, u8 *ptr, u32 size) break; } - - chksz = min(size, (u32)MSDC_FIFO_SIZE); - - if (msdc_fifo_rx_bytes(host) >= chksz) { - msdc_fifo_read(host, ptr, chksz); - ptr += chksz; - size -= chksz; - } - } +} return ret; } -- 2.20.1

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[U-Boot] [PATCH v1 1/1] arm64: dt: poplar: add optee node
by Igor Opaniuk 27 Jan '19

27 Jan '19

As Poplar supports running TF-A with OP-TEE as BL32 payload, add op-tee node in DT, which enables usage of OP-TEE driver (which provides an interface for requesting services from OP-TEE). Signed-off-by: Igor Opaniuk <igor.opaniuk(a)linaro.org> --- arch/arm/dts/hi3798cv200-poplar.dts | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/dts/hi3798cv200-poplar.dts b/arch/arm/dts/hi3798cv200-poplar.dts index 964326e..6bc2a23 100644 --- a/arch/arm/dts/hi3798cv200-poplar.dts +++ b/arch/arm/dts/hi3798cv200-poplar.dts @@ -28,6 +28,13 @@ reg = <0x0 0x0 0x0 0x80000000>; }; + firmware { + optee { + compatible = "linaro,optee-tz"; + method = "smc"; + }; + }; + leds { compatible = "gpio-leds"; -- 2.7.4

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[U-Boot] [PATCH 0/3] Enable mmc driver model for Poplar board
by Shawn Guo 27 Jan '19

27 Jan '19

We take Linux Kernel as Poplar DTS upstream, and patch #1 sync up u-boot DTS with it, so that devices like MMC are available to use with u-boot driver model. Patch #2 adds Poplar mmc compatible to hi6220_dw_mmc driver, so that the driver can probe Poplar mmc device. And finally patch #3 cleans up the board level mmc initialization code, as they are not used any more. Shawn Guo (3): poplar: sync up device tree with kernel 4.20 mmc: hi6220_dw_mmc: add compatible for Poplar support poplar: clean up board level mmc initialization code arch/arm/dts/hi3798cv200-poplar.dts | 68 +++++- arch/arm/dts/hi3798cv200.dtsi | 221 +++++++++++++++++- arch/arm/dts/poplar-pinctrl.dtsi | 98 ++++++++ arch/arm/include/asm/arch-hi3798cv200/dwmmc.h | 12 - .../asm/arch-hi3798cv200/hi3798cv200.h | 1 - board/hisilicon/poplar/poplar.c | 12 - drivers/mmc/hi6220_dw_mmc.c | 1 + include/dt-bindings/clock/histb-clock.h | 56 +++-- include/dt-bindings/pinctrl/hisi.h | 74 ++++++ 9 files changed, 483 insertions(+), 60 deletions(-) create mode 100644 arch/arm/dts/poplar-pinctrl.dtsi delete mode 100644 arch/arm/include/asm/arch-hi3798cv200/dwmmc.h create mode 100644 include/dt-bindings/pinctrl/hisi.h -- 2.18.0

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[U-Boot] [PATCH v1 0/5] db820: Add missing initialization for uart
by Ramon Fried 27 Jan '19

27 Jan '19

Uart was lacking initialization of pinctrl & PLL's and relied on previous initialization from LK. Fix that. Ramon Fried (5): arm: mach-snapdragon: db820c: Actually init PLL for serial arm: mach-snapdragon: add pinctrl driver for db820c configs: dragonboard820c: Enable pinctrl/mux config arm: mach-snapdragon: pinctrl: clarify gpio disable bit dts: 820c: Add pinctrl node and uart mux arch/arm/dts/dragonboard820c-uboot.dtsi | 10 +++- arch/arm/dts/dragonboard820c.dts | 29 +++++++--- arch/arm/mach-snapdragon/Makefile | 5 +- arch/arm/mach-snapdragon/clock-apq8096.c | 34 +++++++++++ .../include/mach/sysmap-apq8096.h | 9 +++ arch/arm/mach-snapdragon/pinctrl-apq8096.c | 56 +++++++++++++++++++ arch/arm/mach-snapdragon/pinctrl-snapdragon.c | 6 +- arch/arm/mach-snapdragon/pinctrl-snapdragon.h | 1 + configs/dragonboard820c_defconfig | 2 + 9 files changed, 139 insertions(+), 13 deletions(-) create mode 100644 arch/arm/mach-snapdragon/pinctrl-apq8096.c -- 2.20.1

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[U-Boot] [PATCH] cmd: ximg: Invert check for fit image compression
by Stefan Theil 27 Jan '19

27 Jan '19

The imgextract command runs a number of checks of the specified fit. Where it checks for a load address for compressed images the logic in the expression is inverted as fit_image_check_comp returns 1 on success and not 0. --- cmd/ximg.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/cmd/ximg.c b/cmd/ximg.c index 6880c747f5..8572a67a00 100644 --- a/cmd/ximg.c +++ b/cmd/ximg.c @@ -143,7 +143,7 @@ do_imgextract(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) return 1; } - if (fit_image_check_comp(fit_hdr, noffset, IH_COMP_NONE) + if (!fit_image_check_comp(fit_hdr, noffset, IH_COMP_NONE) && (argc < 4)) { printf("Must specify load address for %s command " "with compressed image\n", -- 2.17.1

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