January 2019 - U-Boot

[U-Boot] [PATCH v1 0/4] arm: socfgpa: support of-platdata
by Simon Goldschmidt 01 Feb '19

01 Feb '19

This is an initial attempt to support OF_PLATDATA for socfpga gen5. There are two motivations for this: a) reduce code size to eventually support secure boot (where SPL has to authenticate the next stage by loading/checking U-Boot from a FIT image) b) to support the cyclone 5 boot ROM's CRC check on the SPL in SRAM (on warm-restart), all bytes to check need to be in one piece. With OF_SEPARATE, this is not the case (.bss is between .rodata and the DTB). Since OF_EMBEDDED has been discouraged, OF_PLATDATA seems to be a good solution. This series enables booting from MMC with OF_PLATDATA. Booting from SPI does not yet work (I'm working on that, but it's tougher than expected). Tested on the socrates board. To use it: - use socfpga_socrates_defconfig - disable CONFIG_SPL_SPI_FLASH_SUPPORT, CONFIG_SPL_SPI_SUPPORT and CONFIG_SPL_DM_RESET (those don't work yet) - enable CONFIG_DESIGNWARE_SERIAL (required for console) Simon Goldschmidt (4): arm: socfpga: imply SPL config instead of select arm: socfpga: fix compiling with OF_PLATDATA serial: add an of-platdata driver for "snps,dw-apb-uart" mmc: socfpga: support of-platdata arch/arm/Kconfig | 4 ++-- arch/arm/mach-socfpga/misc.c | 2 +- drivers/mmc/socfpga_dw_mmc.c | 28 ++++++++++++++++++++--- drivers/serial/Kconfig | 10 ++++++++ drivers/serial/Makefile | 1 + drivers/serial/serial_dw_apb.c | 42 ++++++++++++++++++++++++++++++++++ 6 files changed, 81 insertions(+), 6 deletions(-) create mode 100644 drivers/serial/serial_dw_apb.c -- 2.17.1

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[U-Boot] [PATCH] sf: prevent clean_bar overwriting error codes
by Simon Goldschmidt 01 Feb '19

01 Feb '19

In spi_flash.c, if CONFIG_SPI_FLASH_BAR is enabled, the function 'clean_bar' makes sure that the Bank Address Register is reset at the end of functions using it. However, if this is enabled, those functions may return zero (success) when they should return an error. This is because after e.g. 'spi_flash_read_common' fails, the return value in 'ret' is overwritten with the return value of 'clean_bar'. Fix this by changing 'clean_bar' to take the outer error code into account and returning its own return value only if the outer error code is 0. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt(a)gmail.com> --- drivers/mtd/spi/spi_flash.c | 21 +++++++++++++++------ 1 file changed, 15 insertions(+), 6 deletions(-) diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index 0c2392f28a..b13b9f19b7 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -132,17 +132,26 @@ int spi_flash_cmd_get_sw_write_prot(struct spi_flash *flash) * * Otherwise, the BA24 bit may be left set and then after reset, the * ROM would read/write/erase SPL from 16 MiB * bank_sel address. + * + * Since this function is always called, it handles outer error codes + * to take care calling functions don't return 0 just because setting + * BAR succeeded. */ -static int clean_bar(struct spi_flash *flash) +static int clean_bar(struct spi_flash *flash, int outer_err) { + int ret; u8 cmd, bank_sel = 0; if (flash->bank_curr == 0) - return 0; + return outer_err; cmd = flash->bank_write_cmd; flash->bank_curr = 0; - return spi_flash_write_common(flash, &cmd, 1, &bank_sel, 1); + ret = spi_flash_write_common(flash, &cmd, 1, &bank_sel, 1); + if (outer_err) + return outer_err; + + return ret; } static int write_bar(struct spi_flash *flash, u32 offset) @@ -372,7 +381,7 @@ int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len) } #ifdef CONFIG_SPI_FLASH_BAR - ret = clean_bar(flash); + ret = clean_bar(flash, ret); #endif return ret; @@ -434,7 +443,7 @@ int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset, } #ifdef CONFIG_SPI_FLASH_BAR - ret = clean_bar(flash); + ret = clean_bar(flash, ret); #endif return ret; @@ -540,7 +549,7 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset, } #ifdef CONFIG_SPI_FLASH_BAR - ret = clean_bar(flash); + ret = clean_bar(flash, ret); #endif return log_ret(ret); -- 2.17.1

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Re: [U-Boot] imx8mq-evk: Outbound network packets lost
by Chris Spencer 01 Feb '19

01 Feb '19

On Thu, 24 Jan 2019 at 23:51, Sergey Kubushyn <ksi(a)koi8.net> wrote: > On Fri, 4 Jan 2019, Chris Spencer wrote: > Hi Chris, > > Did you figure out what was wrong with the PHY always reading zeroes over > MDIO? > > I have exactly same problem here with out i.MX8MQ-based device -- it worked > just fine with older U-Boot without DM_ETH but always reads zeroes over MDIO > with 2019.01... > > I'm still fighting and will probably find the culprit but it would've saved > me some time if you had found what was wrong... > > Your reply is highly appreciated. > > My best regards, > Sergey. Hi Sergey, I never quite got to the bottom of why it doesn't work in U-Boot, but I did discover that U-Boot's failure to correctly initialise the Ethernet controller is what was breaking the Linux driver. Basically, it's leaving behind an 'unspent' transfer request in the ENET_MMFR register (otherwise known as FEC_MII_DATA in the Linux driver) which gets triggered when the Linux driver starts initialising the Ethernet controller. This has a nasty habit of interfering with the first transfer request the driver tries to make. If you don't need networking in U-Boot then you can just set CONFIG_CMD_NET=n in your build config and that will fix the Linux driver. I'm afraid I can't offer any further insight if you do need networking in U-Boot. Thanks, Chris

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[U-Boot] [PATCH v3 0/7] AM65x: Add DMA support
by Vignesh R 01 Feb '19

01 Feb '19

This series adds DMA support for TI's AM654 SoC. v3: Minor comment/whitespace cleanups as pointed out by Tom Rini v2: Align DT bindings with latest proposed bindings as pointed out by Peter. Merge drivers/soc/keystone into drivers/soc/ti Background: The AM65x TRM (http://www.ti.com/lit/pdf/spruid7b) describes the Data Movement Architecture which is implmented by the k3-udma driver. This DMA architecture is a big departure from 'traditional' architecture where we had either EDMA or sDMA as system DMA. Packet DMAs were used as dedicated DMAs to service only networking (K2) or USB (am335x) while other peripherals were serviced by EDMA. In AM65x the UDMA (Unified DMA) is used for all data movment within the SoC, tasked to service all peripherals (UART, McSPI, McASP, networking, etc). The NAVSS/UDMA is built around CPPI5 (Communications Port Programming Interface) and it supports Packet mode (similar to CPPI4.1 in K2 for networking) and TR mode (similar to EDMA descriptor). The data movement is done within a PSI-L fabric, all peripherals (including the UDMA-P). peripherals are not addressed by their I/O register as with traditional DMAs but with their PSI-L thread ID. To be able to use the DMA the following generic steps need to be taken: - configure a DMA channel (tchan for TX, rchan for RX) - channel mode: Packet or TR mode - for memcpy a tchan and rchan pair is used. - for packet mode RX we also need to configure a receive flow to configure the packet receiption - the source and destination threads must be paired - at minimum one pair of rings need to be configured: - tx: transfer ring and transfer completion ring - rx: free descriptor ring and receive ring When the channel setup is completed we only interract with the rings: - TX: push a descriptor to t_ring and wait for it to be pushed to the tc_ring by the UDMA-P - RX: push a descriptor to the fd_ring and wait for UDMA-P to push it back to the r_ring. Resources Management and configuration of channel and ring is handled by sending TI-SCI msgs to remote core. Patches are based on kernel patches here: https://patchwork.kernel.org/cover/10612465/ Grygorii Strashko (5): firmware: ti_sci: Add support for NAVSS resource management soc: ti: k3: add navss ringacc driver soc: ti: k3: add CPPI5 description and helpers arm64: dts: ti: k3-am65: add mcu navss nodes configs: am65x_evm_a53: Enable DMA related configs Vignesh R (2): dma: ti: add driver to K3 UDMA soc: keystone: Merge into ti specific directory arch/arm/dts/k3-am65-wakeup.dtsi | 2 +- arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 46 + arch/arm/mach-keystone/Kconfig | 8 + configs/am65x_evm_a53_defconfig | 4 +- drivers/Kconfig | 2 + drivers/dma/Kconfig | 2 + drivers/dma/Makefile | 2 + drivers/dma/ti/Kconfig | 14 + drivers/dma/ti/Makefile | 3 + drivers/dma/ti/k3-udma-hwdef.h | 184 ++ drivers/dma/ti/k3-udma.c | 1737 +++++++++++++++++ drivers/firmware/ti_sci.c | 760 +++++++- drivers/firmware/ti_sci.h | 642 ++++++ drivers/soc/Kconfig | 5 + drivers/soc/Makefile | 2 +- drivers/soc/keystone/Makefile | 3 - drivers/soc/ti/Kconfig | 26 + drivers/soc/ti/Makefile | 4 + drivers/soc/ti/k3-navss-ringacc.c | 1096 +++++++++++ .../soc/{keystone => ti}/keystone_serdes.c | 0 include/configs/ti_armv7_keystone2.h | 3 - include/dt-bindings/dma/k3-udma.h | 31 + include/linux/soc/ti/cppi5.h | 995 ++++++++++ include/linux/soc/ti/k3-navss-ringacc.h | 246 +++ include/linux/soc/ti/ti-udma.h | 24 + include/linux/soc/ti/ti_sci_protocol.h | 300 +++ scripts/config_whitelist.txt | 1 - 27 files changed, 6121 insertions(+), 21 deletions(-) create mode 100644 drivers/dma/ti/Kconfig create mode 100644 drivers/dma/ti/Makefile create mode 100644 drivers/dma/ti/k3-udma-hwdef.h create mode 100644 drivers/dma/ti/k3-udma.c create mode 100644 drivers/soc/Kconfig delete mode 100644 drivers/soc/keystone/Makefile create mode 100644 drivers/soc/ti/Kconfig create mode 100644 drivers/soc/ti/Makefile create mode 100644 drivers/soc/ti/k3-navss-ringacc.c rename drivers/soc/{keystone => ti}/keystone_serdes.c (100%) create mode 100644 include/dt-bindings/dma/k3-udma.h create mode 100644 include/linux/soc/ti/cppi5.h create mode 100644 include/linux/soc/ti/k3-navss-ringacc.h create mode 100644 include/linux/soc/ti/ti-udma.h -- 2.20.1

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[U-Boot] [PATCH 0/5] net: ethernet: ti: Introduce am654 gigabit eth switch subsystem driver
by Keerthy 01 Feb '19

01 Feb '19

Add new driver for the TI AM65x SoC Gigabit Ethernet Switch subsystem (CPSW NUSS). It has two ports and provides Ethernet packet communication for the device and can be configured as an Ethernet switch. CPSW NUSS features: the Reduced Gigabit Media Independent Interface (RGMII), Reduced Media Independent Interface (RMII), and the Management Data Input/Output (MDIO) interface for physical layer device (PHY) management. The TI AM65x SoC has integrated two-port Gigabit Ethernet Switch subsystem into device MCU domain named MCU_CPSW0. One Ethernet port (port 1) with selectable RGMII and RMII interfaces and an internal Communications Port Programming Interface (CPPI) port (Host port 0). Host Port 0 CPPI Packet Streaming Interface interface supports 8 TX channels and on RX channels operating by TI am654 NAVSS Unified DMA Peripheral Root Complex (UDMA-P) controller. The series is based on top of Vignesh's v3: https://patchwork.ozlabs.org/patch/1032504/ Tested for tftp and booting to kernel on am654-evm. Grygorii Strashko (5): driver: net: ti: cpsw-mdio: use phys_addr_t for mdio_base addr net: ethernet: ti: Introduce am654 gigabit eth switch subsystem driver arm64: dts: ti: k3-am65: add mcu cpsw node arm64: dts: k3-am654-base-board: add mcu cpsw nuss pinmux and phy defs configs: am65x_evm_a53: enable networking arch/arm/dts/k3-am65.dtsi | 2 + arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 170 ++++ configs/am65x_evm_a53_defconfig | 7 + drivers/net/ti/Kconfig | 8 + drivers/net/ti/Makefile | 1 + drivers/net/ti/am65-cpsw-nuss.c | 834 +++++++++++++++++++ drivers/net/ti/cpsw_mdio.c | 2 +- drivers/net/ti/cpsw_mdio.h | 2 +- 8 files changed, 1024 insertions(+), 2 deletions(-) create mode 100644 drivers/net/ti/am65-cpsw-nuss.c -- 2.17.1

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[U-Boot] [PATCH] arm: dts: am33xx: add u-boot, dm-spl to ocp bus
by Hannes Schmelzer 01 Feb '19

01 Feb '19

commit fdce9d35dc36 ("arm: dts: am33xx: Sync dts with Linux 4.20.0") did remove the "u-boot,dm-spl" flag from the 'ocp' bus which was introduced with commit 19aa4ac09db9 ("dts: am33xx: add u-boot, dm-spl to ocp bus") Due to this the brppt1_spi board is broken because it cannot bind/probe the spi-interface during SPL stage. This commit adds this flag again. This flag is needed for having access to the devices below this bus, most important is uart and boot-device (spi, mmc, ...) in SPL stage. Signed-off-by: Hannes Schmelzer <hannes.schmelzer(a)br-automation.com> --- arch/arm/dts/am33xx.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/dts/am33xx.dtsi b/arch/arm/dts/am33xx.dtsi index d3dd6a1..0a6b177 100644 --- a/arch/arm/dts/am33xx.dtsi +++ b/arch/arm/dts/am33xx.dtsi @@ -160,6 +160,7 @@ * the whole bus hierarchy. */ ocp { + u-boot,dm-spl; compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; -- 2.7.4

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[U-Boot] Please pull u-boot-video
by Anatolij Gustschin 01 Feb '19

01 Feb '19

Hi Tom, please pull some video updates for v2019.04-rc1. Thanks, Anatolij The following changes since commit 2f41ade79e5969ebea03a7dcadbeae8e03787d7e: linker: Modify linker scripts to be more generic (2019-01-26 22:55:53 -0500) are available in the Git repository at: git://git.denx.de/u-boot-video.git tags/video-updates-for-2019.04-rc1 for you to fetch changes up to 6df07d854b9ee81d31fafcd83724bed7fb1fd6d7: ihs_video_out: Fix error handling (2019-01-28 21:29:25 +0100) ---------------------------------------------------------------- - ihs and imx driver fixes - relax EDID validation checks for 0 hsync/vsync pulse width (support some quirky displays) ---------------------------------------------------------------- Mario Six (1): ihs_video_out: Fix error handling Priit Laes (1): videomodes: Relax EDID validation checks for hsync/vsync pulse width Ye Li (1): imx: video: Fix return value issue arch/arm/mach-imx/video.c | 4 ++-- drivers/video/ihs_video_out.c | 6 +++--- drivers/video/videomodes.c | 2 -- 3 files changed, 5 insertions(+), 7 deletions(-)

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[U-Boot] [PATCH v3 0/8] Add network support for Luton SoCs
by Horatiu Vultur 01 Feb '19

01 Feb '19

This series adds network support for Luton SoCs. Currently there is not support for Luton SoCs in Linux. v3-changes: - reorder the changes of the commits and add Kconfig in mscc_eswitch folder v2-changes: - reuse functions from ocelot for luton network driver Horatiu Vultur (8): net: mscc: Move ocelot_switch to mscc_eswitch folder net: mscc: Move miim commands into separate file. net: mscc: Move ocelot_send and ocelot_recv in a different file. net: mscc: Move mac_table_add function into different file. net: mscc: Remove unused variables mips: mscc: luton: Add ethernet nodes for Luton. net: Add MSCC Luton networkd driver. configs: mscc_luton: Add network support. MAINTAINERS | 2 +- arch/mips/dts/luton_pcb090.dts | 51 ++ arch/mips/dts/luton_pcb091.dts | 51 ++ arch/mips/dts/mscc,luton.dtsi | 165 ++++++ configs/mscc_luton_defconfig | 1 + drivers/net/Kconfig | 7 +- drivers/net/Makefile | 2 +- drivers/net/mscc_eswitch/Kconfig | 17 + drivers/net/mscc_eswitch/Makefile | 3 + drivers/net/mscc_eswitch/luton_switch.c | 736 +++++++++++++++++++++++++ drivers/net/mscc_eswitch/mscc_mac_table.c | 74 +++ drivers/net/mscc_eswitch/mscc_mac_table.h | 19 + drivers/net/mscc_eswitch/mscc_miim.c | 74 +++ drivers/net/mscc_eswitch/mscc_miim.h | 12 + drivers/net/mscc_eswitch/mscc_xfer.c | 139 +++++ drivers/net/mscc_eswitch/mscc_xfer.h | 20 + drivers/net/{ => mscc_eswitch}/ocelot_switch.c | 299 +--------- 17 files changed, 1392 insertions(+), 280 deletions(-) create mode 100644 drivers/net/mscc_eswitch/Kconfig create mode 100644 drivers/net/mscc_eswitch/Makefile create mode 100644 drivers/net/mscc_eswitch/luton_switch.c create mode 100644 drivers/net/mscc_eswitch/mscc_mac_table.c create mode 100644 drivers/net/mscc_eswitch/mscc_mac_table.h create mode 100644 drivers/net/mscc_eswitch/mscc_miim.c create mode 100644 drivers/net/mscc_eswitch/mscc_miim.h create mode 100644 drivers/net/mscc_eswitch/mscc_xfer.c create mode 100644 drivers/net/mscc_eswitch/mscc_xfer.h rename drivers/net/{ => mscc_eswitch}/ocelot_switch.c (62%) -- 2.7.4

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[U-Boot] [PATCH] mips: mt76xx: Use correct timer frequency
by Stefan Roese 01 Feb '19

01 Feb '19

Testing has shown that the timer on the MT7688 platforms does not run correctly (too fast timeout). This patch changes CONFIG_SYS_MIPS_TIMER_FREQ from 200MHz to 290MHz which is the correct value, as its also used in Linux. Signed-off-by: Stefan Roese <sr(a)denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck(a)gmail.com> --- include/configs/gardena-smart-gateway-mt7688.h | 2 +- include/configs/linkit-smart-7688.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/gardena-smart-gateway-mt7688.h b/include/configs/gardena-smart-gateway-mt7688.h index b10857a757..b3b89d2ab9 100644 --- a/include/configs/gardena-smart-gateway-mt7688.h +++ b/include/configs/gardena-smart-gateway-mt7688.h @@ -7,7 +7,7 @@ #define __CONFIG_GARDENA_SMART_GATEWAY_H /* CPU */ -#define CONFIG_SYS_MIPS_TIMER_FREQ 200000000 +#define CONFIG_SYS_MIPS_TIMER_FREQ 290000000 /* RAM */ #define CONFIG_SYS_SDRAM_BASE 0x80000000 diff --git a/include/configs/linkit-smart-7688.h b/include/configs/linkit-smart-7688.h index 3bae92d0ee..2adf38545a 100644 --- a/include/configs/linkit-smart-7688.h +++ b/include/configs/linkit-smart-7688.h @@ -7,7 +7,7 @@ #define __CONFIG_LINKIT_SMART_7688_H /* CPU */ -#define CONFIG_SYS_MIPS_TIMER_FREQ 200000000 +#define CONFIG_SYS_MIPS_TIMER_FREQ 290000000 /* RAM */ #define CONFIG_SYS_SDRAM_BASE 0x80000000 -- 2.20.1

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[U-Boot] [PATCH] MSCC: Fix Jaguar2 board detection.
by Horatiu Vultur 01 Feb '19

01 Feb '19

When power cycle the Jaguar2 boards, it couldn't read the phys, therefore it always deduce that the board type is pcb111. Add a small delay after setting the gpio pins, fix the issue. Signed-off-by: Horatiu Vultur <horatiu.vultur(a)microchip.com> --- board/mscc/jr2/jr2.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/board/mscc/jr2/jr2.c b/board/mscc/jr2/jr2.c index 226181f..58a4a04 100644 --- a/board/mscc/jr2/jr2.c +++ b/board/mscc/jr2/jr2.c @@ -80,6 +80,9 @@ static void do_board_detect(void) for (i = 56; i < 60; i++) vcoreiii_gpio_set_alternate(i, 1); + /* small delay for settling the pins */ + mdelay(30); + if (mscc_phy_rd(0, 0x10, 0x3, &pval) == 0 && ((pval >> 4) & 0x3F) == 0x3c) { gd->board_type = BOARD_TYPE_PCB112; /* Serval2-NID */ -- 2.7.4

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