September 2018 - U-Boot

[U-Boot] [PATCH] MIPS: start.S: make boot config at offset 0x10 configurable
by Daniel Schwierzeck 07 Sep '18

07 Sep '18

Some MIPS systems store some board-specific boot configuration in the U-Boot binary at offset 0x10. This is used by Malta boards and by Lantiq/Intel SoC's when booting from parallel NOR flash. Convert the hard-coded values to Kconfig options to remove such board-specific stuff out of the generic start.S code. This also deprecates the config option CONFIG_SYS_XWAY_EBU_BOOTCFG. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck(a)gmail.com> --- README | 5 ----- arch/mips/Kconfig | 22 ++++++++++++++++++++++ arch/mips/cpu/start.S | 21 +++++---------------- scripts/config_whitelist.txt | 1 - 4 files changed, 27 insertions(+), 22 deletions(-) diff --git a/README b/README index a91af2a189..0afb7779ed 100644 --- a/README +++ b/README @@ -542,11 +542,6 @@ The following options need to be configured: CONF_CM_CACHABLE_CUW CONF_CM_CACHABLE_ACCELERATED - CONFIG_SYS_XWAY_EBU_BOOTCFG - - Special option for Lantiq XWAY SoCs for booting from NOR flash. - See also arch/mips/cpu/mips32/start.S. - CONFIG_XWAY_SWAP_BYTES Enable compilation of tools/xway-swap-bytes needed for Lantiq diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 6e5e0ffe65..94da431a85 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -390,6 +390,28 @@ config MIPS_CM wish U-Boot to configure it or make use of it to retrieve system information such as cache configuration. +config MIPS_INSERT_BOOT_CONFIG + bool + default n + help + Enable this to insert some board-specific boot configuration in + the U-Boot binary at offset 0x10. + +config MIPS_BOOT_CONFIG_WORD0 + hex + depends on MIPS_INSERT_BOOT_CONFIG + default 0x420 if TARGET_MALTA + default 0x0 + help + Value which is inserted as boot config word 0. + +config MIPS_BOOT_CONFIG_WORD1 + hex + depends on MIPS_INSERT_BOOT_CONFIG + default 0x0 + help + Value which is inserted as boot config word 1. + endif endmenu diff --git a/arch/mips/cpu/start.S b/arch/mips/cpu/start.S index 6ca0916c06..1d21b2324a 100644 --- a/arch/mips/cpu/start.S +++ b/arch/mips/cpu/start.S @@ -84,25 +84,14 @@ ENTRY(_start) b reset mtc0 zero, CP0_COUNT # clear cp0 count for most accurate boot timing -#if defined(CONFIG_SYS_XWAY_EBU_BOOTCFG) +#if defined(CONFIG_MIPS_INSERT_BOOT_CONFIG) /* - * Almost all Lantiq XWAY SoC devices have an external bus unit (EBU) to - * access external NOR flashes. If the board boots from NOR flash the - * internal BootROM does a blind read at address 0xB0000010 to read the - * initial configuration for that EBU in order to access the flash - * device with correct parameters. This config option is board-specific. + * Store some board-specific boot configuration. This is used by some + * MIPS systems like Malta. */ .org 0x10 - .word CONFIG_SYS_XWAY_EBU_BOOTCFG - .word 0x0 -#endif -#if defined(CONFIG_MALTA) - /* - * Linux expects the Board ID here. - */ - .org 0x10 - .word 0x00000420 # 0x420 (Malta Board with CoreLV) - .word 0x00000000 + .word CONFIG_MIPS_BOOT_CONFIG_WORD0 + .word CONFIG_MIPS_BOOT_CONFIG_WORD1 #endif #if defined(CONFIG_ROM_EXCEPTION_VECTORS) diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 1a5606d123..901ab7ca54 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -4433,7 +4433,6 @@ CONFIG_SYS_XHCI_USB1_ADDR CONFIG_SYS_XHCI_USB2_ADDR CONFIG_SYS_XHCI_USB3_ADDR CONFIG_SYS_XIMG_LEN -CONFIG_SYS_XWAY_EBU_BOOTCFG CONFIG_SYS_ZYNQ_QSPI_WAIT CONFIG_SYS_ZYNQ_SPI_WAIT CONFIG_SYS_i2C_FSL -- 2.18.0

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[U-Boot] [PATCH] ARM: Specify aligned address for secure section instead of using attributes
by Chen-Yu Tsai 07 Sep '18

07 Sep '18

In commit a1274cc94a20 ("ARM: Page align secure section only when it is executed in situ"), we used output section attributes (the "ALIGN" keyword after the colon) to specify the alignment requirements. Using the constant "COMMONPAGE" there was recently broken in binutils 2.31 [1]. Binutils maintainer Alan Modra suggested the former method would still work. Since both methods achieve the same result, this patch does just that. This fixes the "reboot after bootm" issue we've been seeing on sunxi when booting non-secure. [1] https://sourceware.org/bugzilla/show_bug.cgi?id=23571 Suggested-by: Alan Modra <amodra(a)gmail.com> Signed-off-by: Chen-Yu Tsai <wens(a)csie.org> --- arch/arm/cpu/u-boot.lds | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds index 834dc99554c9..0eb164d2e694 100644 --- a/arch/arm/cpu/u-boot.lds +++ b/arch/arm/cpu/u-boot.lds @@ -68,11 +68,11 @@ SECTIONS #ifdef CONFIG_ARMV7_NONSEC /* Align the secure section only if we're going to use it in situ */ - .__secure_start : + .__secure_start #ifndef CONFIG_ARMV7_SECURE_BASE ALIGN(CONSTANT(COMMONPAGESIZE)) #endif - { + : { KEEP(*(.__secure_start)) } -- 2.19.0.rc1

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[U-Boot] [RFC PATCH v1] mips: add atomic operations
by Chris Packham 07 Sep '18

07 Sep '18

Add mips version of atomic.h and basic atomic operations. These aren't the optimised versions from the Linux kernel, just basic stubs that satisfy users that need something to define atomic_inc() etc. Signed-off-by: Chris Packham <judge.packham(a)gmail.com> --- At $dayjob we have a mips target that we want to run UBIFS on. UBIFS requires atomic.h. This is my naive attempt to supply enough of atomic.h to satisfy UBIFS. It's no coincidence that this looks like the arm version. I am wondering if it's worth a asm-generic version leaving architectures that actually need true atomic operations able to define them. arch/mips/include/asm/atomic.h | 151 +++++++++++++++++++++++++++++++++ 1 file changed, 151 insertions(+) create mode 100644 arch/mips/include/asm/atomic.h diff --git a/arch/mips/include/asm/atomic.h b/arch/mips/include/asm/atomic.h new file mode 100644 index 000000000000..3ab5684fdef4 --- /dev/null +++ b/arch/mips/include/asm/atomic.h @@ -0,0 +1,151 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +#ifndef _ASM_ATOMIC_H +#define _ASM_ATOMIC_H + +#include <asm/system.h> + +typedef struct { volatile int counter; } atomic_t; +#if BITS_PER_LONG == 32 +typedef struct { volatile long long counter; } atomic64_t; +#else /* BIT_PER_LONG == 32 */ +typedef struct { volatile long counter; } atomic64_t; +#endif + +#define ATOMIC_INIT(i) { (i) } + +#define atomic_read(v) ((v)->counter) +#define atomic_set(v, i) (((v)->counter) = (i)) +#define atomic64_read(v) atomic_read(v) +#define atomic64_set(v, i) atomic_set(v, i) + +static inline void atomic_add(int i, volatile atomic_t *v) +{ + unsigned long flags = 0; + + local_irq_save(flags); + v->counter += i; + local_irq_restore(flags); +} + +static inline void atomic_sub(int i, volatile atomic_t *v) +{ + unsigned long flags = 0; + + local_irq_save(flags); + v->counter -= i; + local_irq_restore(flags); +} + +static inline void atomic_inc(volatile atomic_t *v) +{ + unsigned long flags = 0; + + local_irq_save(flags); + v->counter += 1; + local_irq_restore(flags); +} + +static inline void atomic_dec(volatile atomic_t *v) +{ + unsigned long flags = 0; + + local_irq_save(flags); + v->counter -= 1; + local_irq_restore(flags); +} + +static inline int atomic_dec_and_test(volatile atomic_t *v) +{ + unsigned long flags = 0; + int val; + + local_irq_save(flags); + val = v->counter; + v->counter = val -= 1; + local_irq_restore(flags); + + return val == 0; +} + +static inline int atomic_add_negative(int i, volatile atomic_t *v) +{ + unsigned long flags = 0; + int val; + + local_irq_save(flags); + val = v->counter; + v->counter = val += i; + local_irq_restore(flags); + + return val < 0; +} + +static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr) +{ + unsigned long flags = 0; + + local_irq_save(flags); + *addr &= ~mask; + local_irq_restore(flags); +} + +#if BITS_PER_LONG == 32 + +static inline void atomic64_add(long long i, volatile atomic64_t *v) +{ + unsigned long flags = 0; + + local_irq_save(flags); + v->counter += i; + local_irq_restore(flags); +} + +static inline void atomic64_sub(long long i, volatile atomic64_t *v) +{ + unsigned long flags = 0; + + local_irq_save(flags); + v->counter -= i; + local_irq_restore(flags); +} + +#else /* BIT_PER_LONG == 32 */ + +static inline void atomic64_add(long i, volatile atomic64_t *v) +{ + unsigned long flags = 0; + + local_irq_save(flags); + v->counter += i; + local_irq_restore(flags); +} + +static inline void atomic64_sub(long i, volatile atomic64_t *v) +{ + unsigned long flags = 0; + + local_irq_save(flags); + v->counter -= i; + local_irq_restore(flags); +} +#endif /* BIT_PER_LONG == 32 */ + +static inline void atomic64_inc(volatile atomic64_t *v) +{ + unsigned long flags = 0; + + local_irq_save(flags); + v->counter += 1; + local_irq_restore(flags); +} + +static inline void atomic64_dec(volatile atomic64_t *v) +{ + unsigned long flags = 0; + + local_irq_save(flags); + v->counter -= 1; + local_irq_restore(flags); +} + +#endif -- 2.18.0

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[U-Boot] [PATCH] i2c: xiic: Record xilinx i2c with Zynq fragment
by Michal Simek 07 Sep '18

07 Sep '18

Include xilinx soft i2c controller to Zynq fragment to make clear who is responsible for it. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- Normally we are handling all these drivers via one fragment to make sure that there is only one central contact. Another reason is that people are changing and their responsibility is moving time to time. --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 9ad052aeac39..d870cb57c887 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2311,6 +2311,7 @@ F: drivers/clocksource/cadence_ttc_timer.c F: drivers/i2c/busses/i2c-cadence.c F: drivers/mmc/host/sdhci-of-arasan.c F: drivers/edac/synopsys_edac.c +F: drivers/i2c/busses/i2c-xiic.c ARM64 PORT (AARCH64 ARCHITECTURE) M: Catalin Marinas <catalin.marinas(a)arm.com> -- 1.9.1

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[U-Boot] [PATCH 1/4] ARM: bootscript: Remove hard-coded rootpath from K+P's tpcboot.cmd
by Lukasz Majewski 07 Sep '18

07 Sep '18

The 'rootpath' can be provided by DHCP server. Removing this line prevents from overwriting it. To do that on the DHCP server side (isc-dhcp-server) modify dhcpd.conf and add 'option root-path "192.168.X.Y:/srv/tftp/rootfs";' Signed-off-by: Lukasz Majewski <lukma(a)denx.de> --- board/k+p/bootscripts/tpcboot.cmd | 1 - 1 file changed, 1 deletion(-) diff --git a/board/k+p/bootscripts/tpcboot.cmd b/board/k+p/bootscripts/tpcboot.cmd index 16b93ebe3f..9290317730 100644 --- a/board/k+p/bootscripts/tpcboot.cmd +++ b/board/k+p/bootscripts/tpcboot.cmd @@ -65,7 +65,6 @@ fi" # # Provide 'boot_nfs' command #------------------------------------------------------------ -setenv rootpath "/srv/tftp/KP/rootfs" setenv nfsargs "setenv bootargs root=/dev/nfs rw \ nfsroot=${serverip}:${rootpath},nolock,nfsvers=3" setenv addip "setenv bootargs ${bootargs} \ -- 2.11.0

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[U-Boot] [PATCH v2] gpio: dwapb_gpio: Change to use devm_kcalloc()
by Ley Foon Tan 07 Sep '18

07 Sep '18

Change to use managed resource function devm_kcalloc(), so it will auto free memory when driver is removed. Signed-off-by: Ley Foon Tan <ley.foon.tan(a)intel.com> --- v2: - Remove free() function. --- drivers/gpio/dwapb_gpio.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/gpio/dwapb_gpio.c b/drivers/gpio/dwapb_gpio.c index 0f6574d..6f9d17d 100644 --- a/drivers/gpio/dwapb_gpio.c +++ b/drivers/gpio/dwapb_gpio.c @@ -171,8 +171,7 @@ static int gpio_dwapb_bind(struct udevice *dev) if (!fdtdec_get_bool(blob, node, "gpio-controller")) continue; - plat = NULL; - plat = calloc(1, sizeof(*plat)); + plat = devm_kcalloc(dev, 1, sizeof(*plat), GFP_KERNEL); if (!plat) return -ENOMEM; @@ -196,7 +195,6 @@ static int gpio_dwapb_bind(struct udevice *dev) return 0; err: - free(plat); return ret; } -- 2.2.2

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[U-Boot] [PATCH 0/8] rockchip: conver to use ARM arch timer for armv7 SoCs
by Kever Yang 07 Sep '18

07 Sep '18

This patch set can be consider to be split out of previous patch set " rockchip: clean up board file for rockchip SoCs" This patch set depends on patch set for rk3188 use DM timer. Kever Yang (8): rockchip: add STIMER_BASE for Rockchip SoCs rockchip: rk322x: sdram: use udelay instead of rockchip_udelay rockchip: rk322x: use ARM arch timer instead of rk_timer rockchip: rk3036: sdram: use udelay instead of rockchip_udelay rockchip: rk3036: use ARM arch timer instead of rk_timer rockchip: rk3288: use ARM arch timer instead of rk_timer rockchip: rk3128: use ARM arch timer instead of rk_timer rockchip: remove unused rk_timer.c arch/arm/mach-rockchip/Kconfig | 16 ++++++++++ arch/arm/mach-rockchip/Makefile | 6 ---- arch/arm/mach-rockchip/rk3036-board-spl.c | 19 +++++++++-- arch/arm/mach-rockchip/rk3036/sdram_rk3036.c | 19 ++++++----- arch/arm/mach-rockchip/rk3128-board.c | 2 -- arch/arm/mach-rockchip/rk322x-board-spl.c | 19 +++++++++-- arch/arm/mach-rockchip/rk3288-board-spl.c | 18 +++++++++-- arch/arm/mach-rockchip/rk3288-board-tpl.c | 18 +++++++++-- arch/arm/mach-rockchip/rk_timer.c | 48 ---------------------------- drivers/ram/rockchip/sdram_rk322x.c | 29 ++++++++--------- include/configs/rk3036_common.h | 6 ++-- include/configs/rk3128_common.h | 6 ++-- include/configs/rk322x_common.h | 6 ++-- include/configs/rk3288_common.h | 6 ++-- 14 files changed, 116 insertions(+), 102 deletions(-) delete mode 100644 arch/arm/mach-rockchip/rk_timer.c -- 1.9.1

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[U-Boot] [usb] dwc3 -- phy -- hub: a hint/help/an idea needed.
by Yuri Frolov 07 Sep '18

07 Sep '18

Hi, Any ideas/hints needed with regard to dwc3 -- phy -- hub support on a custom board. I've been struggling with u-boot implementation of usb support on a mips32-based development board (a SoC with DWC3 integrated). SoC has the ULPI interface, and by means of it, it's connected to USB 2.0 phy (Microchip USB3315), and down the stream, the phy is connected to USB hub chip (smsc usb2422) using of usb 2.0 interface. I've been able to verify, that USB hub chip has proper power and, when dwc3 generates proper USB commands, the hub is kinda activated and on the pad XTALIN/CLKIN (pad #22) I can see a proper-shaped 24 mhz clock (an oscilloscope was hooked up). But the hub is not configured properly, since the LED indicator (connected to the pad #17 of the hub) never blinks (it's the indication that the hub has been configured properly). USB protocol hangs up after xhci_queue_command (TRB_ENABLE_SLOT): the host never receives indication from the hub (event->event_cmd.flags never changes from 0) => xhci stack issues BUG() ==> Reset CPU by CPC. I presume, that hardware is ok, since after linux kernel has been loaded, the hub works just properly. We don't have any gpios involved, any ULPI viewport windows, indeed nothing which would allow me to configure the phy or the hub itselves. In fact, as far as I understand, the phy and the hub shouldn't be configured by software and (in our setup at least) intended to be software-transparent. The code in linux which activates the usb, in essence just updates the clocks infrastructure: dwc->clk = devm_clk_get(dwc->dev, "usb"); if (IS_ERR(dwc->clk)) { dev_err(dev, "no interface clk specified\n"); return -EINVAL; } ret = clk_prepare_enable(dwc->clk); and I verified, that the necessary clocks are all enabled in u-boot (the necessary bits are on in proper addresses). # usb start (Re)start USB... USB0: baikal-xhci: init hccr bf100000 and hcor bf100020 hc_length 32 // Halt the HC: bf100020 // Reset the HC Register 1000140 NbrPorts 1 Starting the controller USB XHCI 1.00 scanning bus 0 for devices... New Device 0 common/usb.c:938 TMPBUF: a7e30a00 --- usb_set_address(dev) --- set address 1 usb_control_msg: request: 0x5, requesttype: 0x0, value 0x1 index 0x0 length 0x0 USB_REQ_SET_ADDRESS scrlen = 0 req->length = 0 Len is 0 --- usb_get_descriptor(USB_DT_DEVICE) --- usb_control_msg: request: 0x6, requesttype: 0x80, value 0x100 index 0x0 length 0x12 USB_DT_DEVICE request scrlen = 18 req->length = 18 -- returned from usb_get_descriptor. bcdUSB: 0x300 idVendor: 0x0 idProduct: 0x0 bcdDevice: 0x100 --- usb_get_configuration_no(dev, tmpbuf, 0) --- usb_control_msg: request: 0x6, requesttype: 0x80, value 0x200 index 0x0 length 0x9 USB_DT_CONFIG config scrlen = 25 req->length = 9 00000000: 09 02 1f 00 01 01 00 40 00 .......@. usb_control_msg: request: 0x6, requesttype: 0x80, value 0x200 index 0x0 length 0x1F USB_DT_CONFIG config scrlen = 25 req->length = 31 00000000: 09 02 1f 00 01 01 00 40 00 09 04 00 00 01 09 00 .......@........ 00000010: 00 00 07 05 81 03 08 00 ff 77 6d 61 63 2e 62 .........wmac.b get_conf_no 0 Result 25, wLength 31 --- usb_parse_config(dev, tmpbuf, 0) --- if 0, ep 0 unknown Description Type : 6d 77 6D 61 63 2E 62 66 30 36 30 30 30 30 00 A7 0C 00 00 00 28 4F F6 A7 58 0A E3 A7 58 0A E3 A7 C8 B9 FA A7 28 4F --- usb_set_maxpacket(dev) --- ##EP epmaxpacketin[1] = 8 new device strings: Mfr=1, Product=2, SerialNumber=0 --- usb_string iProduct --- usb_control_msg: request: 0x6, requesttype: 0x80, value 0x300 index 0x0 length 0xFF USB_DT_STRING config scrlen = 4 req->length = 255 USB device number 1 default language ID 0x409 usb_control_msg: request: 0x6, requesttype: 0x80, value 0x302 index 0x409 length 0xFF USB_DT_STRING config scrlen = 42 req->length = 255 --- usb_string iManufacturer --- usb_control_msg: request: 0x6, requesttype: 0x80, value 0x301 index 0x409 length 0xFF USB_DT_STRING config scrlen = 14 req->length = 255 --- usb_string iSerialNumber --- Manufacturer U-Boot Product XHCI Host Controller SerialNumber --- usb_set_configuration --- set configuration 1 usb_control_msg: request: 0x9, requesttype: 0x0, value 0x1 index 0x0 length 0x0 scrlen = 0 req->length = 0 Len is 0 USB hub found HUB IS SUPERSPEED, dtype 0x2a, dtype << 8 0x2a00 USB_DT_HUB: 0x29, USB_DT_SS_HUB: 0x2a usb_control_msg: request: 0x6, requesttype: 0xA0, value 0x2A00 index 0x0 length 0x4 USB_DT_HUB config scrlen = 8 req->length = 4 00000000: 0c 2a 01 08 ff ff ff ff ff ff ff ff .*.......... HUB IS SUPERSPEED, dtype 0x2a, dtype << 8 0x2a00 USB_DT_HUB: 0x29, USB_DT_SS_HUB: 0x2a usb_control_msg: request: 0x6, requesttype: 0xA0, value 0x2A00 index 0x0 length 0xC USB_DT_HUB config scrlen = 8 req->length = 12 00000000: 0c 2a 01 08 00 0a 00 00 ff ff ff ff .*.......... 1 ports detected hubCharacteristics: 0x8 ganged power switching standalone hub individual port over-current protection TT requires at most 8 FS bit times (666 ns) power on to power good time: 20ms hub controller current requirement: 0mA port 1 is removable usb_control_msg: request: 0x0, requesttype: 0x80, value 0x0 index 0x0 length 0x2 scrlen = 2 req->length = 2 usb_get_status, status: 0x1 usb_get_status, ret: 0x0 usb_control_msg: request: 0x0, requesttype: 0xA0, value 0x0 index 0x0 length 0x4 scrlen = 2 req->length = 4 get_hub_status returned status 1, change 801 local power source is lost (inactive) no over-current condition exists enabling power on all ports usb_control_msg: request: 0x3, requesttype: 0x23, value 0x8 index 0x1 length 0x0 scrlen = 0 req->length = 0 Len is 0 port 1 returns 0 devnum=1 poweron: query_delay=200 connect_timeout=1200 usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 0x4 SPEED = FULLSPEED scrlen = 4 req->length = 4 Port 1 Status 101 Change 1 devnum=1 port=1: USB dev found usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 0x4 SPEED = FULLSPEED scrlen = 4 req->length = 4 portstatus 101, change 1, 12 Mb/s usb_control_msg: request: 0x1, requesttype: 0x23, value 0x10 index 0x1 length 0x0 clear port connect change, actual port 1 status = 0x6e1 scrlen = 0 req->length = 0 Len is 0 usb_hub_port_reset: resetting port 1... usb_control_msg: request: 0x3, requesttype: 0x23, value 0x4 index 0x1 length 0x0 scrlen = 0 req->length = 0 Len is 0 usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 0x4 SPEED = FULLSPEED scrlen = 4 req->length = 4 portstatus 111, change 0, 12 Mb/s STAT_C_CONNECTION = 0 STAT_CONNECTION = 1 USB_PORT_STAT_ENABLE 0 usb_control_msg: request: 0x3, requesttype: 0x23, value 0x4 index 0x1 length 0x0 scrlen = 0 req->length = 0 Len is 0 usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 0x4 SPEED = HIGHSPEED scrlen = 4 req->length = 4 portstatus 503, change 10, 480 Mb/s STAT_C_CONNECTION = 0 STAT_CONNECTION = 1 USB_PORT_STAT_ENABLE 1 usb_control_msg: request: 0x1, requesttype: 0x23, value 0x14 index 0x1 length 0x0 clear port reset change, actual port 1 status = 0xe03 scrlen = 0 req->length = 0 Len is 0 New Device 1 common/usb.c:938 TMPBUF: a7e30400 &ctrl->dba->doorbell[0]: bf100480 _xhci_alloc_device: after xhci_queue_command (TRB_ENABLE_SLOT)... XHCI timeout on event type 33... cannot recover. BUG: failure at drivers/usb/host/xhci-ring.c:484/xhci_wait_for_event()! BUG! Reset CPU by CPC

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[U-Boot] [usb] dwc3 -- phy -- hub: a hint/help/an idea needed.
by Yuri Frolov 07 Sep '18

07 Sep '18

Hi, Any ideas/hints needed with regard to dwc3 -- phy -- hub support on a custom board. I've been struggling with u-boot implementation of usb support on a mips32-based development board (a SoC with DWC3 integrated). SoC has the ULPI interface, and by means of it, it's connected to USB 2.0 phy (Microchip USB3315), and down the stream, the phy is connected to USB hub chip (smsc usb2422) using of usb 2.0 interface. I've been able to verify, that USB hub chip has proper power and, when dwc3 generates proper USB commands, the hub is kinda activated and on the pad XTALIN/CLKIN (pad #22) I can see a proper-shaped 24 mhz clock (an oscilloscope was hooked up). But the hub is not configured properly, since the LED indicator (connected to the pad #17 of the hub) never blinks (it's the indication that the hub has been configured properly). USB protocol hangs up after xhci_queue_command (TRB_ENABLE_SLOT): the host never receives indication from the hub (event->event_cmd.flags never changes from 0) => xhci stack issues BUG() ==> Reset CPU by CPC. I presume, that hardware is ok, since after linux kernel has been loaded, the hub works just properly. We don't have any gpios involved, any ULPI viewport windows, indeed nothing which would allow me to configure the phy or the hub itselves. In fact, as far as I understand, the phy and the hub shouldn't be configured by software and (in our setup at least) intended to be software-transparent. The code in linux which activates the usb, in essence just updates the clocks infrastructure: dwc->clk = devm_clk_get(dwc->dev, "usb"); if (IS_ERR(dwc->clk)) { dev_err(dev, "no interface clk specified\n"); return -EINVAL; } ret = clk_prepare_enable(dwc->clk); and I verified, that the necessary clocks are all enabled in u-boot (the necessary bits are on in proper addresses). # usb start (Re)start USB... USB0: baikal-xhci: init hccr bf100000 and hcor bf100020 hc_length 32 // Halt the HC: bf100020 // Reset the HC Register 1000140 NbrPorts 1 Starting the controller USB XHCI 1.00 scanning bus 0 for devices... New Device 0 common/usb.c:938 TMPBUF: a7e30a00 --- usb_set_address(dev) --- set address 1 usb_control_msg: request: 0x5, requesttype: 0x0, value 0x1 index 0x0 length 0x0 USB_REQ_SET_ADDRESS scrlen = 0 req->length = 0 Len is 0 --- usb_get_descriptor(USB_DT_DEVICE) --- usb_control_msg: request: 0x6, requesttype: 0x80, value 0x100 index 0x0 length 0x12 USB_DT_DEVICE request scrlen = 18 req->length = 18 -- returned from usb_get_descriptor. bcdUSB: 0x300 idVendor: 0x0 idProduct: 0x0 bcdDevice: 0x100 --- usb_get_configuration_no(dev, tmpbuf, 0) --- usb_control_msg: request: 0x6, requesttype: 0x80, value 0x200 index 0x0 length 0x9 USB_DT_CONFIG config scrlen = 25 req->length = 9 00000000: 09 02 1f 00 01 01 00 40 00 .......@. usb_control_msg: request: 0x6, requesttype: 0x80, value 0x200 index 0x0 length 0x1F USB_DT_CONFIG config scrlen = 25 req->length = 31 00000000: 09 02 1f 00 01 01 00 40 00 09 04 00 00 01 09 00 .......@........ 00000010: 00 00 07 05 81 03 08 00 ff 77 6d 61 63 2e 62 .........wmac.b get_conf_no 0 Result 25, wLength 31 --- usb_parse_config(dev, tmpbuf, 0) --- if 0, ep 0 unknown Description Type : 6d 77 6D 61 63 2E 62 66 30 36 30 30 30 30 00 A7 0C 00 00 00 28 4F F6 A7 58 0A E3 A7 58 0A E3 A7 C8 B9 FA A7 28 4F --- usb_set_maxpacket(dev) --- ##EP epmaxpacketin[1] = 8 new device strings: Mfr=1, Product=2, SerialNumber=0 --- usb_string iProduct --- usb_control_msg: request: 0x6, requesttype: 0x80, value 0x300 index 0x0 length 0xFF USB_DT_STRING config scrlen = 4 req->length = 255 USB device number 1 default language ID 0x409 usb_control_msg: request: 0x6, requesttype: 0x80, value 0x302 index 0x409 length 0xFF USB_DT_STRING config scrlen = 42 req->length = 255 --- usb_string iManufacturer --- usb_control_msg: request: 0x6, requesttype: 0x80, value 0x301 index 0x409 length 0xFF USB_DT_STRING config scrlen = 14 req->length = 255 --- usb_string iSerialNumber --- Manufacturer U-Boot Product XHCI Host Controller SerialNumber --- usb_set_configuration --- set configuration 1 usb_control_msg: request: 0x9, requesttype: 0x0, value 0x1 index 0x0 length 0x0 scrlen = 0 req->length = 0 Len is 0 USB hub found HUB IS SUPERSPEED, dtype 0x2a, dtype << 8 0x2a00 USB_DT_HUB: 0x29, USB_DT_SS_HUB: 0x2a usb_control_msg: request: 0x6, requesttype: 0xA0, value 0x2A00 index 0x0 length 0x4 USB_DT_HUB config scrlen = 8 req->length = 4 00000000: 0c 2a 01 08 ff ff ff ff ff ff ff ff .*.......... HUB IS SUPERSPEED, dtype 0x2a, dtype << 8 0x2a00 USB_DT_HUB: 0x29, USB_DT_SS_HUB: 0x2a usb_control_msg: request: 0x6, requesttype: 0xA0, value 0x2A00 index 0x0 length 0xC USB_DT_HUB config scrlen = 8 req->length = 12 00000000: 0c 2a 01 08 00 0a 00 00 ff ff ff ff .*.......... 1 ports detected hubCharacteristics: 0x8 ganged power switching standalone hub individual port over-current protection TT requires at most 8 FS bit times (666 ns) power on to power good time: 20ms hub controller current requirement: 0mA port 1 is removable usb_control_msg: request: 0x0, requesttype: 0x80, value 0x0 index 0x0 length 0x2 scrlen = 2 req->length = 2 usb_get_status, status: 0x1 usb_get_status, ret: 0x0 usb_control_msg: request: 0x0, requesttype: 0xA0, value 0x0 index 0x0 length 0x4 scrlen = 2 req->length = 4 get_hub_status returned status 1, change 801 local power source is lost (inactive) no over-current condition exists enabling power on all ports usb_control_msg: request: 0x3, requesttype: 0x23, value 0x8 index 0x1 length 0x0 scrlen = 0 req->length = 0 Len is 0 port 1 returns 0 devnum=1 poweron: query_delay=200 connect_timeout=1200 usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 0x4 SPEED = FULLSPEED scrlen = 4 req->length = 4 Port 1 Status 101 Change 1 devnum=1 port=1: USB dev found usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 0x4 SPEED = FULLSPEED scrlen = 4 req->length = 4 portstatus 101, change 1, 12 Mb/s usb_control_msg: request: 0x1, requesttype: 0x23, value 0x10 index 0x1 length 0x0 clear port connect change, actual port 1 status = 0x6e1 scrlen = 0 req->length = 0 Len is 0 usb_hub_port_reset: resetting port 1... usb_control_msg: request: 0x3, requesttype: 0x23, value 0x4 index 0x1 length 0x0 scrlen = 0 req->length = 0 Len is 0 usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 0x4 SPEED = FULLSPEED scrlen = 4 req->length = 4 portstatus 111, change 0, 12 Mb/s STAT_C_CONNECTION = 0 STAT_CONNECTION = 1 USB_PORT_STAT_ENABLE 0 usb_control_msg: request: 0x3, requesttype: 0x23, value 0x4 index 0x1 length 0x0 scrlen = 0 req->length = 0 Len is 0 usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 0x4 SPEED = HIGHSPEED scrlen = 4 req->length = 4 portstatus 503, change 10, 480 Mb/s STAT_C_CONNECTION = 0 STAT_CONNECTION = 1 USB_PORT_STAT_ENABLE 1 usb_control_msg: request: 0x1, requesttype: 0x23, value 0x14 index 0x1 length 0x0 clear port reset change, actual port 1 status = 0xe03 scrlen = 0 req->length = 0 Len is 0 New Device 1 common/usb.c:938 TMPBUF: a7e30400 &ctrl->dba->doorbell[0]: bf100480 _xhci_alloc_device: after xhci_queue_command (TRB_ENABLE_SLOT)... XHCI timeout on event type 33... cannot recover. BUG: failure at drivers/usb/host/xhci-ring.c:484/xhci_wait_for_event()! BUG! Reset CPU by CPC

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[U-Boot] [PATCH] spi: designware_spi: Disable and free clock when remove driver
by Ley Foon Tan 07 Sep '18

07 Sep '18

Disable and free clock when remove driver. Signed-off-by: Ley Foon Tan <ley.foon.tan(a)intel.com> --- drivers/spi/designware_spi.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c index 5cca414..f4d36cf 100644 --- a/drivers/spi/designware_spi.c +++ b/drivers/spi/designware_spi.c @@ -516,8 +516,20 @@ static int dw_spi_set_mode(struct udevice *bus, uint mode) static int dw_spi_remove(struct udevice *bus) { struct dw_spi_priv *priv = dev_get_priv(bus); + int ret; - return reset_release_bulk(&priv->resets); + ret = reset_release_bulk(&priv->resets); + if (ret) + return ret; + +#if CONFIG_IS_ENABLED(CLK) + ret = clk_disable(&priv->clk); + if (ret) + return ret; + + ret = clk_free(&priv->clk); +#endif + return ret; } static const struct dm_spi_ops dw_spi_ops = { -- 2.2.2

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