August 2018 - U-Boot

[U-Boot] [PATCH 1/1] README: U_BOOT_ENV_CALLBACK functions
by Heinrich Schuchardt 11 Aug '18

11 Aug '18

Describe the interface of environment variable callback functions. Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- README | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/README b/README index aee0f7371c4..179d6d74a4a 100644 --- a/README +++ b/README @@ -3943,6 +3943,17 @@ If CONFIG_REGEX is defined, the variable_name above is evaluated as a regular expression. This allows multiple variables to be connected to the same callback without explicitly listing them all out. +The signature of the callback functions is: + + int callback(const char *name, const char *value, enum env_op op, int flags) + +* name - changed environment variable +* value - new value of the environment variable +* op - operation (create, overwrite, or delete) +* flags - attributes of the environment variable change, see flags H_* in + include/search.h + +The return value is 0 if the variable change is accepted and 1 otherwise. Command Line Parsing: ===================== -- 2.18.0

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[U-Boot] [PATCH 1/1] drivers: serial: document on_baudrate()
by Heinrich Schuchardt 11 Aug '18

11 Aug '18

Add parameter description. Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- drivers/serial/serial.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c index 63b232b536c..c84fd83f210 100644 --- a/drivers/serial/serial.c +++ b/drivers/serial/serial.c @@ -36,7 +36,15 @@ static void serial_null(void) /** * on_baudrate() - Update the actual baudrate when the env var changes * + * @name: changed environment variable + * @value: new value of the environment variable + * @op: operation (create, overwrite, or delete) + * @flags: attributes of environment variable change, + * see flags H_* in include/search.h + * * This will check for a valid baudrate and only apply it if valid. + * + * Return: 0 on success, 1 on error */ static int on_baudrate(const char *name, const char *value, enum env_op op, int flags) -- 2.18.0

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[U-Boot] [PATCH] omap3_logic: Fix CONS_INDEX
by Adam Ford 11 Aug '18

11 Aug '18

The console index for SPL should be 1 not 3 in order to see text during SPL. Fixes 6f6b7cfa89e5 ("Convert all of CONFIG_CONS_INDEX to Kconfig") Signed-off-by: Adam Ford <aford173(a)gmail.com> diff --git a/configs/omap3_logic_defconfig b/configs/omap3_logic_defconfig index ed9f454a5d..0420493a0e 100644 --- a/configs/omap3_logic_defconfig +++ b/configs/omap3_logic_defconfig @@ -46,7 +46,7 @@ CONFIG_NETDEVICES=y CONFIG_SMC911X=y CONFIG_SMC911X_BASE=0x08000000 CONFIG_SMC911X_32_BIT=y -CONFIG_CONS_INDEX=3 +CONFIG_CONS_INDEX=1 CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y -- 2.17.1

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[U-Boot] [PATCH] sata: fix sata_Probe return value check
by Troy Kisky 11 Aug '18

11 Aug '18

sata_probe returns 1 for failure, so don't checkout for < 0 fixes: f19f1ecb6025 dm: sata: Support driver model with the 'sata' command Signed-off-by: Troy Kisky <troy.kisky(a)boundarydevices.com> diff --git a/cmd/sata.c b/cmd/sata.c index cc12afb07e..4f0c6e0137 100644 --- a/cmd/sata.c +++ b/cmd/sata.c @@ -107,8 +107,8 @@ static int do_sata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) /* If the user has not yet run `sata init`, do it now */ if (sata_curr_device == -1) { rc = sata_probe(0); - if (rc < 0) - return CMD_RET_FAILURE; + if (rc) + return rc; sata_curr_device = 0; } -- 2.14.1

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[U-Boot] [PATCH v4 0/5] dm: led: remove auto probe in binding function
by Patrick Delaunay 11 Aug '18

11 Aug '18

Hi, The commit bc882f5d5c7b4d6ed5e927bf838863af43c786e7 introduce auto probe of LED in binding function but that cause issue on my board. This first patch of this patchset activateis the LED on my board to explain the issue, the second patch revert this commit and the third one propose an other solution. For me, this commit is a error because in README of doc/driver-model/ it is indicated: The device's bind() method is permitted to perform simple actions, but should not scan the device tree node, not initialise hardware, nor set up structures or allocate memory. All of these tasks should be left for the probe() method. And in the patch the LED driver is probed during the binding scan. When I activated the LED in my ARM target with the patch "stm32mp1: add gpio led support", I have the sequence: dm_init_and_scan() : 1/ dm_scan_fdt_node() => loop on all the node 2/ scan for LED node => probe of LED driver is forced by "default-state" detection LED1 - "red" => probe of father of "red" node A - led B - soc C - root => probe of node needed by GPIO 1 - pin-controller 2 - gpio@50002000 3 - rcc-clk@50000000 4 - rcc@50000000 => probe forced by default state for other led LED2 - green LED3 - orange => probe of node needed by GPIO (other bank) 5 - gpio@50009000 3/ dm_extended_scan_fdt scan continue... scan node "fixed-clock" under "/clocks" clk-hse clk-hsi clk-lse clk-lsi clk-csi 4/ probe of all the used devices.... after dm_extended_scan_fdt() So many driver are probed before the end of the scan binding loop ! And that cause issue in my board (boot failed) because the rcc-clk clock driver found the input frequency with these fixed-clock, which are binded only after the stm32mp1 clock driver probe. For me probe in forbidden in binding function and thus uclass_get_device_tail() is not allowed in the commit bc882f5d5c7b4d6ed5e927bf838863af43c786e7 which need to be reverted. In the third patch I proposed an other solution based on the existing solution in u-class regulator used to enable regulator with "boot on" property (see regulators_enable_boot_on function). I think that adding a function is the better solution in the driver model to force probe for some node according binding information (after dm_init_and_scan call). This new function should be called in board_init function for each board but it could be also added in init_sequence_r[] in future. Changes in v4: - simplify the uclass impact after Patrick Bruenn review - remove #ifdef CONFIG_LED for sandbox Changes in v3: - add motivation in revert commit - minor update after Simon review - include led.h to avoid compilation warning on stm32mp1 board Changes in v2: - add sandbox impact and test update Patrick Delaunay (5): stm32mp1: add gpio led support Revert "dm: led: auto probe() LEDs with "default-state"" dm: led: move default state support in led uclass stm32mp1: use new function led default state sandbox: led: use new function to configure default state arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi | 24 ++++++++++++++++++++++++ board/sandbox/sandbox.c | 9 +++++++++ board/st/stm32mp1/stm32mp1.c | 4 ++++ common/board_r.c | 3 ++- configs/stm32mp15_basic_defconfig | 2 ++ drivers/led/led-uclass.c | 30 ++++++++++++++++++++++++++++++ drivers/led/led_gpio.c | 17 ----------------- include/led.h | 9 +++++++++ test/dm/led.c | 3 +++ 9 files changed, 83 insertions(+), 18 deletions(-) -- 2.7.4

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[U-Boot] [PULL] u-boot-usb/master
by Marek Vasut 11 Aug '18

11 Aug '18

The following changes since commit b1aad8dbe28415695b290726199681ced969c118: zynqmp: Add avnet_ultra96_rev1_defconfig to the lits of boards (2018-08-07 11:36:39 -0400) are available in the Git repository at: git://git.denx.de/u-boot-usb.git master for you to fetch changes up to 28a5c88043c80a38040abde957fbe1755b796912: dfu: Provide more verbose error message (2018-08-08 22:22:08 +0200) ---------------------------------------------------------------- Alberto Panizzo (7): usb: rockchip: fix command failed on host side due to missing data usb: rockchip: implement skeleton for K_FW_GET_CHIP_VER command usb: rockchip: implement K_FW_LBA_READ_10 command usb: rockchip: implement K_FW_LBA_ERASE_10 command usb: rockchip: be quiet on serial port while transferring data usb: rockchip: fix printing csw debug info usb: rockchip: on K_FW_LBA_WRITE_10 remove magic block size of 512 bytes Sam Protsenko (3): dfu: Fix data abort in dfu_free_entities() dfu: Fix memory leak in dfu_init_env_entities() dfu: Provide more verbose error message Seung-Woo Kim (1): gadget: f_thor: fix hang-up with ctrl-c arch/arm/include/asm/arch-rockchip/f_rockusb.h | 4 +++ doc/README.rockusb | 11 ++++-- drivers/dfu/dfu.c | 10 +++--- drivers/usb/gadget/f_rockusb.c | 261 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++------------- drivers/usb/gadget/f_thor.c | 4 +-- 5 files changed, 257 insertions(+), 33 deletions(-)

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[U-Boot] [PATCH] serial: omap: Introduce DM specific omap serial
by Lokesh Vutla 10 Aug '18

10 Aug '18

Add driver model support for OMAP_SERIAL while reusing the functions in ns16550.c Signed-off-by: Lokesh Vutla <lokeshvutla(a)ti.com> --- Based on the conclusion on the thread[1], added a separate driver for omap uart. [1] https://patchwork.ozlabs.org/patch/944756/ drivers/serial/Kconfig | 9 +++ drivers/serial/Makefile | 1 + drivers/serial/ns16550.c | 42 ------------ drivers/serial/serial_omap.c | 121 +++++++++++++++++++++++++++++++++++ 4 files changed, 131 insertions(+), 42 deletions(-) create mode 100644 drivers/serial/serial_omap.c diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 766e5ced03..0aa2338135 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -625,6 +625,15 @@ config MSM_SERIAL for example APQ8016 and MSM8916. Single baudrate is supported in current implementation (115200). +config OMAP_SERIAL + bool "Support for OMAP specific UART" + depends on DM_SERIAL + default y if (ARCH_OMAP2PLUS || SOC_DA8XX) + select SYS_NS16550 + help + If you have an TI based SoC and want to use the on-chip serial + port, say Y to this option. If unsure say N. + config OWL_SERIAL bool "Actions Semi OWL UART" depends on DM_SERIAL && ARCH_OWL diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index 9fa81d855d..03dc29ee2e 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -65,6 +65,7 @@ obj-$(CONFIG_MVEBU_A3700_UART) += serial_mvebu_a3700.o obj-$(CONFIG_MPC8XX_CONS) += serial_mpc8xx.o obj-$(CONFIG_NULLDEV_SERIAL) += serial_nulldev.o obj-$(CONFIG_OWL_SERIAL) += serial_owl.o +obj-$(CONFIG_OMAP_SERIAL) += serial_omap.o ifndef CONFIG_SPL_BUILD obj-$(CONFIG_USB_TTY) += usbtty.o diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 9c80090aa7..1858465ec9 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -279,42 +279,6 @@ DEBUG_UART_FUNCS #endif -#ifdef CONFIG_DEBUG_UART_OMAP - -#include <debug_uart.h> - -static inline void _debug_uart_init(void) -{ - struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE; - int baud_divisor; - - baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK, - CONFIG_BAUDRATE); - serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER); - serial_dout(&com_port->mdr1, 0x7); - serial_dout(&com_port->mcr, UART_MCRVAL); - serial_dout(&com_port->fcr, UART_FCR_DEFVAL); - - serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL); - serial_dout(&com_port->dll, baud_divisor & 0xff); - serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff); - serial_dout(&com_port->lcr, UART_LCRVAL); - serial_dout(&com_port->mdr1, 0x0); -} - -static inline void _debug_uart_putc(int ch) -{ - struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE; - - while (!(serial_din(&com_port->lsr) & UART_LSR_THRE)) - ; - serial_dout(&com_port->thr, ch); -} - -DEBUG_UART_FUNCS - -#endif - #ifdef CONFIG_DM_SERIAL static int ns16550_serial_putc(struct udevice *dev, const char ch) { @@ -489,12 +453,6 @@ static const struct udevice_id ns16550_serial_ids[] = { { .compatible = "ingenic,jz4780-uart", .data = PORT_JZ4780 }, { .compatible = "nvidia,tegra20-uart", .data = PORT_NS16550 }, { .compatible = "snps,dw-apb-uart", .data = PORT_NS16550 }, - { .compatible = "ti,omap2-uart", .data = PORT_NS16550 }, - { .compatible = "ti,omap3-uart", .data = PORT_NS16550 }, - { .compatible = "ti,omap4-uart", .data = PORT_NS16550 }, - { .compatible = "ti,am3352-uart", .data = PORT_NS16550 }, - { .compatible = "ti,am4372-uart", .data = PORT_NS16550 }, - { .compatible = "ti,dra742-uart", .data = PORT_NS16550 }, {} }; #endif /* OF_CONTROL && !OF_PLATDATA */ diff --git a/drivers/serial/serial_omap.c b/drivers/serial/serial_omap.c new file mode 100644 index 0000000000..5d408deda9 --- /dev/null +++ b/drivers/serial/serial_omap.c @@ -0,0 +1,121 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Texas Instruments' OMAP serial driver + * + * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + * Lokesh Vutla <lokeshvutla(a)ti.com> + */ + +#include <common.h> +#include <debug_uart.h> +#include <dm.h> +#include <dt-structs.h> +#include <ns16550.h> +#include <serial.h> +#include <clk.h> + +#ifdef CONFIG_DEBUG_UART_OMAP + +#include <debug_uart.h> + +static inline void _debug_uart_init(void) +{ + struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE; + int baud_divisor; + + baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK, + CONFIG_BAUDRATE); + serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER); + serial_dout(&com_port->mdr1, 0x7); + serial_dout(&com_port->mcr, UART_MCRVAL); + serial_dout(&com_port->fcr, UART_FCR_DEFVAL); + + serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL); + serial_dout(&com_port->dll, baud_divisor & 0xff); + serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff); + serial_dout(&com_port->lcr, UART_LCRVAL); + serial_dout(&com_port->mdr1, 0x0); +} + +static inline void _debug_uart_putc(int ch) +{ + struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE; + + while (!(serial_din(&com_port->lsr) & UART_LSR_THRE)) + ; + serial_dout(&com_port->thr, ch); +} + +DEBUG_UART_FUNCS + +#endif + +#if CONFIG_IS_ENABLED(DM_SERIAL) + +#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) +static int omap_serial_ofdata_to_platdata(struct udevice *dev) +{ + struct ns16550_platdata *plat = dev->platdata; + fdt_addr_t addr; + struct clk clk; + int err; + + /* try Processor Local Bus device first */ + addr = dev_read_addr(dev); + if (addr == FDT_ADDR_T_NONE) + return -EINVAL; + + plat->base = (unsigned long)map_physmem(addr, 0, MAP_NOCACHE); + + plat->reg_offset = dev_read_u32_default(dev, "reg-offset", 0); + plat->reg_shift = 2; + + err = clk_get_by_index(dev, 0, &clk); + if (!err) { + err = clk_get_rate(&clk); + if (!IS_ERR_VALUE(err)) + plat->clock = err; + } else if (err != -ENOENT && err != -ENODEV && err != -ENOSYS) { + debug("omap serial failed to get clock\n"); + return err; + } + + if (!plat->clock) + plat->clock = dev_read_u32_default(dev, "clock-frequency", + CONFIG_SYS_NS16550_CLK); + if (!plat->clock) { + debug("omap serial clock not defined\n"); + return -EINVAL; + } + + plat->fcr = UART_FCR_DEFVAL; + + return 0; +} +static const struct udevice_id omap_serial_ids[] = { + { .compatible = "ti,omap2-uart", }, + { .compatible = "ti,omap3-uart", }, + { .compatible = "ti,omap4-uart", }, + { .compatible = "ti,am3352-uart", }, + { .compatible = "ti,am4372-uart", }, + { .compatible = "ti,dra742-uart", }, + {} +}; +#endif /* OF_CONTROL && !OF_PLATDATA */ + +#if CONFIG_IS_ENABLED(SERIAL_PRESENT) +U_BOOT_DRIVER(omap_serial) = { + .name = "omap_serial", + .id = UCLASS_SERIAL, +#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) + .of_match = omap_serial_ids, + .ofdata_to_platdata = omap_serial_ofdata_to_platdata, + .platdata_auto_alloc_size = sizeof(struct ns16550_platdata), +#endif + .priv_auto_alloc_size = sizeof(struct NS16550), + .probe = ns16550_serial_probe, + .ops = &ns16550_serial_ops, + .flags = DM_FLAG_PRE_RELOC, +}; +#endif +#endif /* DM_SERIAL */ -- 2.18.0

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[U-Boot] [PATCH v5 1/8] dm: mmc: use block layer in mmc driver
by Yinbo Zhu 10 Aug '18

10 Aug '18

At present the MMC subsystem maintains its own list of MMC devices. This cannot work with driver model when CONFIG_BLK is enabled, use blk_dread to replace previous mmc read interface, use mmc_get_blk_desc to get the mmc device property Signed-off-by: Yinbo Zhu <yinbo.zhu(a)nxp.com> --- Change in v5: use block layer in mmc driver arch/arm/cpu/armv8/fsl-layerscape/ppa.c | 5 ++--- drivers/mmc/mmc_legacy.c | 10 +++++----- drivers/net/fm/fm.c | 2 +- drivers/qe/qe.c | 2 +- 4 files changed, 9 insertions(+), 10 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ppa.c b/arch/arm/cpu/armv8/fsl-layerscape/ppa.c index a31c4d9..95875d3 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/ppa.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/ppa.c @@ -99,7 +99,7 @@ int ppa_init(void) cnt = DIV_ROUND_UP(fdt_header_len, 512); debug("%s: MMC read PPA FIT header: dev # %u, block # %u, count %u\n", __func__, dev, blk, cnt); - ret = mmc->block_dev.block_read(&mmc->block_dev, blk, cnt, fitp); + ret = blk_dread(mmc_get_blk_desc(mmc), blk, cnt, fitp); if (ret != cnt) { free(fitp); printf("MMC/SD read of PPA FIT header at offset 0x%x failed\n", @@ -149,8 +149,7 @@ int ppa_init(void) cnt = DIV_ROUND_UP(fw_length, 512); debug("%s: MMC read PPA FIT image: dev # %u, block # %u, count %u\n", __func__, dev, blk, cnt); - ret = mmc->block_dev.block_read(&mmc->block_dev, - blk, cnt, ppa_fit_addr); + ret = blk_dread(mmc_get_blk_desc(mmc), blk, cnt, ppa_fit_addr); if (ret != cnt) { free(ppa_fit_addr); printf("MMC/SD read of PPA FIT header at offset 0x%x failed\n", diff --git a/drivers/mmc/mmc_legacy.c b/drivers/mmc/mmc_legacy.c index 66a7cda..29d94e9 100644 --- a/drivers/mmc/mmc_legacy.c +++ b/drivers/mmc/mmc_legacy.c @@ -42,7 +42,7 @@ struct mmc *find_mmc_device(int dev_num) list_for_each(entry, &mmc_devices) { m = list_entry(entry, struct mmc, link); - if (m->block_dev.devnum == dev_num) + if (mmc_get_blk_desc(m)->devnum == dev_num) return m; } @@ -60,7 +60,7 @@ int mmc_get_next_devnum(void) struct blk_desc *mmc_get_blk_desc(struct mmc *mmc) { - return &mmc->block_dev; + return mmc_get_blk_desc(mmc); } int get_mmc_num(void) @@ -113,7 +113,7 @@ void print_mmc_devices(char separator) else mmc_type = NULL; - printf("%s: %d", m->cfg->name, m->block_dev.devnum); + printf("%s: %d", m->cfg->name, mmc_get_blk_desc(m)->devnum); if (mmc_type) printf(" (%s)", mmc_type); @@ -218,7 +218,7 @@ static int mmc_select_hwpartp(struct blk_desc *desc, int hwpart) if (!mmc) return -ENODEV; - if (mmc->block_dev.hwpart == hwpart) + if (mmc_get_blk_desc(mmc)->hwpart == hwpart) return 0; if (mmc->part_config == MMCPART_NOAVAILABLE) @@ -242,7 +242,7 @@ static int mmc_get_dev(int dev, struct blk_desc **descp) if (ret) return ret; - *descp = &mmc->block_dev; + *descp = mmc_get_blk_desc(mmc); return 0; } diff --git a/drivers/net/fm/fm.c b/drivers/net/fm/fm.c index 3327073..c5cf188 100644 --- a/drivers/net/fm/fm.c +++ b/drivers/net/fm/fm.c @@ -402,7 +402,7 @@ int fm_init_common(int index, struct ccsr_fman *reg) printf("\nMMC read: dev # %u, block # %u, count %u ...\n", dev, blk, cnt); mmc_init(mmc); - (void)mmc->block_dev.block_read(&mmc->block_dev, blk, cnt, + (void)blk_dread(mmc_get_blk_desc(mmc), blk, cnt, addr); } #elif defined(CONFIG_SYS_QE_FMAN_FW_IN_REMOTE) diff --git a/drivers/qe/qe.c b/drivers/qe/qe.c index 7654df8..7010bbc 100644 --- a/drivers/qe/qe.c +++ b/drivers/qe/qe.c @@ -218,7 +218,7 @@ void u_qe_init(void) printf("\nMMC read: dev # %u, block # %u, count %u ...\n", dev, blk, cnt); mmc_init(mmc); - (void)mmc->block_dev.block_read(&mmc->block_dev, blk, cnt, + (void)blk_dread(mmc_get_blk_desc(mmc), blk, cnt, addr); } #endif -- 1.7.1

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[U-Boot] [PATCH] efi_loader: fix a parameter check at CreateEvent()
by AKASHI Takahiro 10 Aug '18

10 Aug '18

The commit 21b3edfc9644 ("efi_loader: check parameters of CreateEvent") enforces a strict parameter check at CreateEvent(). On the other hand, UEFI specification version 2.7, section 7.1, says: The EVT_NOTIFY_WAIT and EVT_NOTIFY_SIGNAL flags are exclusive. If neither flag is specified, the caller does not require any notification concerning the event and the NotifyTpl, NotifyFunction, and NotifyContext parameters are ignored. So the check should be mitigated so as to comply with the specification. Without this patch, EDK2's Shell.efi won't be started. Fixes: 21b3edfc9644 ("efi_loader: check parameters of CreateEvent") Signed-off-by: AKASHI Takahiro <takahiro.akashi(a)linaro.org> --- lib/efi_loader/efi_boottime.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c index ac8f484507bd..f3fba3190981 100644 --- a/lib/efi_loader/efi_boottime.c +++ b/lib/efi_loader/efi_boottime.c @@ -627,7 +627,8 @@ efi_status_t efi_create_event(uint32_t type, efi_uintn_t notify_tpl, return EFI_INVALID_PARAMETER; } - if (is_valid_tpl(notify_tpl) != EFI_SUCCESS) + if ((type & (EVT_NOTIFY_WAIT | EVT_NOTIFY_SIGNAL)) && + (is_valid_tpl(notify_tpl) != EFI_SUCCESS)) return EFI_INVALID_PARAMETER; evt = calloc(1, sizeof(struct efi_event)); -- 2.18.0

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[U-Boot] [PATCH] spi: Add SPI driver for MT76xx SoCs
by Stefan Roese 10 Aug '18

10 Aug '18

This patch adds the SPI driver for the MediaTek MT7688 SoC (and derivates). Its been tested on the LinkIt Smart 7688 and the Gardena Smart Gateway with and SPI NOR on CS0 and on the Gardena Smart Gateway additionally with an SPI NAND on CS1. Note that the SPI controller only supports a max transfer size of 32 bytes. This driver implementes a workaround to enable bigger xfer sizes to speed up the transfer especially for the SPI NAND support. Signed-off-by: Stefan Roese <sr(a)denx.de> Cc: Jagan Teki <jagan(a)openedev.com> --- drivers/spi/Kconfig | 8 + drivers/spi/Makefile | 1 + drivers/spi/mt76xx_spi.c | 314 +++++++++++++++++++++++++++++++++++++++ 3 files changed, 323 insertions(+) create mode 100644 drivers/spi/mt76xx_spi.c diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index dcd719ff0a..fbdcc4bb24 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -109,6 +109,14 @@ config ICH_SPI access the SPI NOR flash on platforms embedding this Intel ICH IP core. +config MT76XX_SPI + bool "MediaTek MT76XX SPI driver" + depends on ARCH_MT7620 + help + Enable the MT76XX SPI driver. This driver can be used to access + the SPI NOR flash on platforms embedding these MediaTek + SPI cores. + config MVEBU_A3700_SPI bool "Marvell Armada 3700 SPI driver" select CLK_ARMADA_3720 diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 728e30c538..b88fff7b6f 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -32,6 +32,7 @@ obj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o obj-$(CONFIG_LPC32XX_SSP) += lpc32xx_ssp.o obj-$(CONFIG_MPC8XX_SPI) += mpc8xx_spi.o obj-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o +obj-$(CONFIG_MT76XX_SPI) += mt76xx_spi.o obj-$(CONFIG_MVEBU_A3700_SPI) += mvebu_a3700_spi.o obj-$(CONFIG_MXC_SPI) += mxc_spi.o obj-$(CONFIG_MXS_SPI) += mxs_spi.o diff --git a/drivers/spi/mt76xx_spi.c b/drivers/spi/mt76xx_spi.c new file mode 100644 index 0000000000..88145deeac --- /dev/null +++ b/drivers/spi/mt76xx_spi.c @@ -0,0 +1,314 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Stefan Roese <sr(a)denx.de> + * + * Derived from the Linux driver version drivers/spi/spi-mt7621.c + * Copyright (C) 2011 Sergiy <piratfm(a)gmail.com> + * Copyright (C) 2011-2013 Gabor Juhos <juhosg(a)openwrt.org> + * Copyright (C) 2014-2015 Felix Fietkau <nbd(a)nbd.name> + */ + +#include <common.h> +#include <dm.h> +#include <spi.h> +#include <wait_bit.h> +#include <linux/io.h> + +#define SPI_MSG_SIZE_MAX 32 /* SPI message chunk size */ +/* Enough for SPI NAND page read / write with page size 2048 bytes */ +#define SPI_MSG_SIZE_OVERALL (2048 + 16) + +#define MT7621_SPI_TRANS 0x00 +#define MT7621_SPI_TRANS_START BIT(8) +#define MT7621_SPI_TRANS_BUSY BIT(16) + +#define MT7621_SPI_OPCODE 0x04 +#define MT7621_SPI_DATA0 0x08 +#define MT7621_SPI_DATA4 0x18 +#define MT7621_SPI_MASTER 0x28 +#define MT7621_SPI_MOREBUF 0x2c +#define MT7621_SPI_POLAR 0x38 + +#define MT7621_LSB_FIRST BIT(3) +#define MT7621_CPOL BIT(4) +#define MT7621_CPHA BIT(5) + +struct mt7621_spi { + void __iomem *base; + unsigned int sys_freq; + u32 data[(SPI_MSG_SIZE_OVERALL / 4) + 1]; + int tx_len; +}; + +static const struct udevice_id mt76xx_spi_ids[] = { + { .compatible = "ralink,mt7621-spi" }, + { } +}; + +static inline u32 mt7621_spi_read(struct mt7621_spi *rs, u32 reg) +{ + return ioread32(rs->base + reg); +} + +static inline void mt7621_spi_write(struct mt7621_spi *rs, u32 reg, u32 val) +{ + iowrite32(val, rs->base + reg); +} + +static void mt7621_spi_reset(struct mt7621_spi *rs, int duplex) +{ + u32 master = mt7621_spi_read(rs, MT7621_SPI_MASTER); + + master |= 7 << 29; /* CS control */ + master |= 1 << 2; /* more_buf_mode */ + + mt7621_spi_write(rs, MT7621_SPI_MASTER, master); +} + +static void mt7621_spi_set_cs(struct mt7621_spi *rs, int cs, int enable) +{ + u32 val = 0; + + debug("%s: cs#%d -> %s\n", __func__, cs, enable ? "enable" : "disable"); + if (enable) + val = BIT(cs); + mt7621_spi_write(rs, MT7621_SPI_POLAR, val); +} + +static int mt7621_spi_set_mode(struct udevice *bus, uint mode) +{ + struct mt7621_spi *rs = dev_get_priv(bus); + u32 reg; + + debug("%s: mode=0x%08x\n", __func__, mode); + reg = mt7621_spi_read(rs, MT7621_SPI_MASTER); + + reg &= ~MT7621_LSB_FIRST; + if (mode & SPI_LSB_FIRST) + reg |= MT7621_LSB_FIRST; + + reg &= ~(MT7621_CPHA | MT7621_CPOL); + switch (mode & (SPI_CPOL | SPI_CPHA)) { + case SPI_MODE_0: + break; + case SPI_MODE_1: + reg |= MT7621_CPHA; + break; + case SPI_MODE_2: + reg |= MT7621_CPOL; + break; + case SPI_MODE_3: + reg |= MT7621_CPOL | MT7621_CPHA; + break; + } + mt7621_spi_write(rs, MT7621_SPI_MASTER, reg); + + return 0; +} + +static int mt7621_spi_set_speed(struct udevice *bus, uint speed) +{ + struct mt7621_spi *rs = dev_get_priv(bus); + u32 rate; + u32 reg; + + debug("%s: speed=%d\n", __func__, speed); + rate = DIV_ROUND_UP(rs->sys_freq, speed); + debug("rate:%u\n", rate); + + if (rate > 4097) + return -EINVAL; + + if (rate < 2) + rate = 2; + + reg = mt7621_spi_read(rs, MT7621_SPI_MASTER); + reg &= ~(0xfff << 16); + reg |= (rate - 2) << 16; + mt7621_spi_write(rs, MT7621_SPI_MASTER, reg); + + return 0; +} + +static inline int mt7621_spi_wait_till_ready(struct mt7621_spi *rs) +{ + int ret; + + ret = wait_for_bit_le32(rs->base + MT7621_SPI_TRANS, + MT7621_SPI_TRANS_BUSY, 0, 10, 0); + if (ret) + pr_err("Timeout in %s!\n", __func__); + + return ret; +} + +static int mt7621_spi_xfer(struct udevice *dev, unsigned int bitlen, + const void *dout, void *din, unsigned long flags) +{ + struct udevice *bus = dev->parent; + struct mt7621_spi *rs = dev_get_priv(bus); + const u8 *tx_buf = dout; + u8 *ptr = (u8 *)dout; + u8 *rx_buf = din; + int total_size = bitlen >> 3; + int chunk_size; + int rx_len = 0; + u32 data[(SPI_MSG_SIZE_MAX / 4) + 1] = { 0 }; + u32 val; + int i; + + debug("%s: dout=%p, din=%p, len=%x, flags=%lx\n", __func__, dout, din, + total_size, flags); + + /* + * This driver only supports half-duplex, so complain and bail out + * upon full-duplex messages + */ + if (dout && din) { + printf("Only half-duplex SPI transfer supported\n"); + return -EIO; + } + + if (dout) { + debug("TX-DATA: "); + for (i = 0; i < total_size; i++) + debug("%02x ", *ptr++); + debug("\n"); + } + + mt7621_spi_wait_till_ready(rs); + + /* + * Set CS active upon start of SPI message. This message can + * be split upon multiple calls to this xfer function + */ + if (flags & SPI_XFER_BEGIN) + mt7621_spi_set_cs(rs, spi_chip_select(dev), 1); + + while (total_size > 0) { + /* Don't exceed the max xfer size */ + chunk_size = min_t(int, total_size, SPI_MSG_SIZE_MAX); + + /* + * We might have some TX data buffered from the last xfer + * message. Make sure, that this does not exceed the max + * xfer size + */ + if (rs->tx_len > 4) + chunk_size -= rs->tx_len; + if (din) + rx_len = chunk_size; + + if (tx_buf) { + /* Check if this message does not exceed the buffer */ + if ((chunk_size + rs->tx_len) > SPI_MSG_SIZE_OVERALL) { + printf("TX message size too big (%d)\n", + chunk_size + rs->tx_len); + return -EMSGSIZE; + } + + /* + * Write all TX data into internal buffer to collect + * all TX messages into one buffer (might be split into + * multiple calls to this function) + */ + for (i = 0; i < chunk_size; i++, rs->tx_len++) { + rs->data[rs->tx_len / 4] |= + tx_buf[i] << (8 * (rs->tx_len & 3)); + } + } + + if (flags & SPI_XFER_END) { + /* Write TX data into controller */ + if (rs->tx_len) { + rs->data[0] = swab32(rs->data[0]); + if (rs->tx_len < 4) + rs->data[0] >>= (4 - rs->tx_len) * 8; + + for (i = 0; i < rs->tx_len; i += 4) { + mt7621_spi_write(rs, + MT7621_SPI_OPCODE + i, + rs->data[i / 4]); + } + } + + /* Write length into controller */ + val = (min_t(int, rs->tx_len, 4) * 8) << 24; + if (rs->tx_len > 4) + val |= (rs->tx_len - 4) * 8; + val |= (rx_len * 8) << 12; + mt7621_spi_write(rs, MT7621_SPI_MOREBUF, val); + + /* Start the xfer */ + val = mt7621_spi_read(rs, MT7621_SPI_TRANS); + val |= MT7621_SPI_TRANS_START; + mt7621_spi_write(rs, MT7621_SPI_TRANS, val); + + /* Wait until xfer is finished on bus */ + mt7621_spi_wait_till_ready(rs); + + /* Reset TX length and TX buffer for next xfer */ + rs->tx_len = 0; + memset(rs->data, 0, sizeof(rs->data)); + } + + for (i = 0; i < rx_len; i += 4) + data[i / 4] = mt7621_spi_read(rs, MT7621_SPI_DATA0 + i); + + if (rx_len) { + debug("RX-DATA: "); + for (i = 0; i < rx_len; i++) { + rx_buf[i] = data[i / 4] >> (8 * (i & 3)); + debug("%02x ", rx_buf[i]); + } + debug("\n"); + } + + if (tx_buf) + tx_buf += chunk_size; + if (rx_buf) + rx_buf += chunk_size; + total_size -= chunk_size; + } + + /* Wait until xfer is finished on bus and de-assert CS */ + mt7621_spi_wait_till_ready(rs); + if (flags & SPI_XFER_END) + mt7621_spi_set_cs(rs, spi_chip_select(dev), 0); + + return 0; +} + +static int mt76xx_spi_probe(struct udevice *dev) +{ + struct mt7621_spi *rs = dev_get_priv(dev); + + rs->base = dev_remap_addr(dev); + if (!rs->base) + return -EINVAL; + + rs->sys_freq = CONFIG_SYS_MIPS_TIMER_FREQ; + + mt7621_spi_reset(rs, 0); + + return 0; +} + +static const struct dm_spi_ops mt7621_spi_ops = { + .set_mode = mt7621_spi_set_mode, + .set_speed = mt7621_spi_set_speed, + .xfer = mt7621_spi_xfer, + /* + * cs_info is not needed, since we require all chip selects to be + * in the device tree explicitly + */ +}; + +U_BOOT_DRIVER(mt76xx_spi) = { + .name = "mt76xx_spi", + .id = UCLASS_SPI, + .of_match = mt76xx_spi_ids, + .ops = &mt7621_spi_ops, + .priv_auto_alloc_size = sizeof(struct mt7621_spi), + .probe = mt76xx_spi_probe, +}; -- 2.18.0

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