May 2018 - U-Boot

[U-Boot] Request for known good GCC toolchain for U-boot/ARM11
by Magnus Lilja 10 May '18

10 May '18

Hi all, I'm trying to make sure that recent U-boot versions still boot on the i.MX31PDK board and have problems locating/building a toolchain based on GCC > v6 that produces working images. The i.MX31PDK uses a ARM1136 core. My old toolchain, which is a Code Sourcery toolchain for ARM 2014-05 with gcc 4.8.3, produces working bootloader up to and including U-Boot v2017.11. Later U-boots require GCC > v6 hence my quest for a known good ARM GCC cross compiler for the ARM11 core. I tried the Ubuntu 18.04 provided ARM cross compiler and that does not boot, neither does toolchains I've built using crosstools-ng (GCC 6.4.0 and GCC 8.1). I haven't tried investigating where the boot stops/goes wrong. My Ubuntu host is a 64-bit machine and the old Sourcery toolchain is compiled for x32 in case that helps. Pointers to precompiled known good toolchains for U-boot 2018.xx and ARM11 are appreciated. Thanks, Magnus

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[U-Boot] GCC 7.x vs. C++ comments
by Dr. Philipp Tomsich 10 May '18

10 May '18

Tom, I recently ran a local buildman with a came across these: > cc -Wp,-MD,tools/.gen_eth_addr.d -Wall -Wstrict-prototypes -O2 -fomit-frame-pointer -include ./include/compiler.h -idirafterinclude -idirafter./arch/arm/include -I./scripts/dtc/libfdt -I./tools -DUSE_HOSTCC -D__KERNEL_STRICT_NAMES -D_GNU_SOURCE -pedantic -o tools/gen_eth_addr tools/gen_eth_addr.c > tools/gen_eth_addr.c:1:1: warning: C++ style comments are not allowed in ISO C90 > // SPDX-License-Identifier: GPL-2.0+ > ^ > tools/gen_eth_addr.c:1:1: warning: (this will be reported only once per input file) > cc -Wp,-MD,tools/.gen_ethaddr_crc.o.d -Wall -Wstrict-prototypes -O2 -fomit-frame-pointer -include ./include/compiler.h -idirafterinclude -idirafter./arch/arm/include -I./scripts/dtc/libfdt -I./tools -DUSE_HOSTCC -D__KERNEL_STRICT_NAMES -D_GNU_SOURCE -pedantic -c -o tools/gen_ethaddr_crc.o tools/gen_ethaddr_crc.c > tools/gen_ethaddr_crc.c:1:1: warning: C++ style comments are not allowed in ISO C90 > // SPDX-License-Identifier: GPL-2.0+ > ^ > tools/gen_ethaddr_crc.c:1:1: warning: (this will be reported only once per input file) > echo "#include <../lib/crc8.c>" >tools/lib/crc8.c > cc -Wp,-MD,tools/lib/.crc8.o.d -Wall -Wstrict-prototypes -O2 -fomit-frame-pointer -include ./include/compiler.h -idirafterinclude -idirafter./arch/arm/include -I./scripts/dtc/libfdt -I./tools -DUSE_HOSTCC -D__KERNEL_STRICT_NAMES -D_GNU_SOURCE -pedantic -c -o tools/lib/crc8.o tools/lib/crc8.c > In file included from tools/lib/crc8.c:1:0: > ./tools/../lib/crc8.c:1:1: warning: C++ style comments are not allowed in ISO C90 > // SPDX-License-Identifier: GPL-2.0+ > ^ The system compiler was a > Using built-in specs. > COLLECT_GCC=cc > COLLECT_LTO_WRAPPER=/usr/lib/gcc/x86_64-linux-gnu/4.9/lto-wrapper > Target: x86_64-linux-gnu > Configured with: ../src/configure -v --with-pkgversion='Debian 4.9.2-10+deb8u1' --with-bugurl=file:///usr/share/doc/gcc-4.9/README.Bugs --enable-languages=c,c++,java,go,d,fortran,objc,obj-c++ --prefix=/usr --program-suffix=-4.9 --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --with-gxx-include-dir=/usr/include/c++/4.9 --libdir=/usr/lib --enable-nls --with-sysroot=/ --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --with-system-zlib --disable-browser-plugin --enable-java-awt=gtk --enable-gtk-cairo --with-java-home=/usr/lib/jvm/java-1.5.0-gcj-4.9-amd64/jre --enable-java-home --with-jvm-root-dir=/usr/lib/jvm/java-1.5.0-gcj-4.9-amd64 --with-jvm-jar-dir=/usr/lib/jvm-exports/java-1.5.0-gcj-4.9-amd64 --with-arch-directory=amd64 --with-ecj-jar=/usr/share/java/eclipse-ecj.jar --enable-objc-gc --enable-multiarch --with-arch-32=i586 --with-abi=m64 --with-multilib-list=m32,m64,mx32 --enable-multilib --with-tune=generic --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu > Thread model: posix > gcc version 4.9.2 (Debian 4.9.2-10+deb8u1) What’s your preferred solution: (a) change these comments (b) change our Makefiles to let GCC know that we are compiling gnu99/C99? Neither solution is too appealing to me, so I am asking... Thanks, Philipp.

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[U-Boot] [PATCHv2 1/3] at91: Minor tweaks to SPL logic for space savings on smartweb
by Tom Rini 10 May '18

10 May '18

- spl_board_init is empty on smartweb so drop that function - When CONFIG_AT91SAM9_WATCHDOG is set we do not disable the watchdog in SPL and instead let full U-Boot handle it. Instead of an empty function just do not call a function. Signed-off-by: Tom Rini <trini(a)konsulko.com> --- With gcc-7.2 smartweb is 16bytes too large. These changes bring us just back under. --- arch/arm/Kconfig | 2 +- arch/arm/mach-at91/spl.c | 4 +--- arch/arm/mach-at91/spl_at91.c | 2 ++ arch/arm/mach-at91/spl_atmel.c | 2 ++ 4 files changed, 6 insertions(+), 4 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 2bbb86c462dd..a5420112f39c 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -393,7 +393,7 @@ choice config ARCH_AT91 bool "Atmel AT91" - select SPL_BOARD_INIT if SPL + select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB config TARGET_EDB93XX bool "Support edb93xx" diff --git a/arch/arm/mach-at91/spl.c b/arch/arm/mach-at91/spl.c index 7cba3825e7f4..8bfb2a452b5e 100644 --- a/arch/arm/mach-at91/spl.c +++ b/arch/arm/mach-at91/spl.c @@ -11,9 +11,7 @@ #include <asm/arch/clk.h> #include <spl.h> -#if defined(CONFIG_AT91SAM9_WATCHDOG) -void at91_disable_wdt(void) { } -#else +#if !defined(CONFIG_AT91SAM9_WATCHDOG) void at91_disable_wdt(void) { struct at91_wdt *wdt = (struct at91_wdt *)ATMEL_BASE_WDT; diff --git a/arch/arm/mach-at91/spl_at91.c b/arch/arm/mach-at91/spl_at91.c index d701c3586d38..8c368042a6b2 100644 --- a/arch/arm/mach-at91/spl_at91.c +++ b/arch/arm/mach-at91/spl_at91.c @@ -76,7 +76,9 @@ void __weak spl_board_init(void) void board_init_f(ulong dummy) { lowlevel_clock_init(); +#if !defined(CONFIG_AT91SAM9_WATCHDOG) at91_disable_wdt(); +#endif /* * At this stage the main oscillator is supposed to be enabled diff --git a/arch/arm/mach-at91/spl_atmel.c b/arch/arm/mach-at91/spl_atmel.c index 11db1e5f8cff..597ff8c03673 100644 --- a/arch/arm/mach-at91/spl_atmel.c +++ b/arch/arm/mach-at91/spl_atmel.c @@ -98,8 +98,10 @@ void board_init_f(ulong dummy) configure_2nd_sram_as_l2_cache(); #endif +#if !defined(CONFIG_AT91SAM9_WATCHDOG) /* disable watchdog */ at91_disable_wdt(); +#endif /* PMC configuration */ at91_pmc_init(); -- 2.7.4

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[U-Boot] Pull request: u-boot-sunxi/master
by Jagan Teki 10 May '18

10 May '18

Hi Tom, Please pull this PR. thanks, Jagan. The following changes since commit b25f8e2112b1582ce6386e846800a31bab688e50: Merge git://git.denx.de/u-boot-imx (2018-04-30 07:14:05 -0400) are available in the Git repository at: git://git.denx.de/u-boot-sunxi.git master for you to fetch changes up to f3df7758b5fb4e1f8eb8f2bbd9b9354054884502: board: sunxi: sun8i-v40: Add Bananapi M2 Berry support (2018-05-07 11:33:19 +0530) ---------------------------------------------------------------- Chen-Yu Tsai (5): sunxi: Disable R_I2C for Libre Computer Board ALL-H3-CC H3 ver. sunxi: Split out common board design for ALL-H3-CC device tree sunxi: Add Libre Computer Board ALL-H3-CC H2+ ver. sunxi: Add Libre Computer Board ALL-H3-CC H5 ver. sunxi: Sort dts Makefile entries for H3 Jagan Teki (2): ARM: dts: sun8i: Sync r40 dtsi from Linux board: sunxi: sun8i-v40: Add Bananapi M2 Berry support arch/arm/dts/Makefile | 15 +- arch/arm/dts/sun50i-h5-libretech-all-h3-cc.dts | 13 ++ arch/arm/dts/sun8i-h2-plus-libretech-all-h3-cc.dts | 13 ++ arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts | 166 +----------------- arch/arm/dts/sun8i-r40.dtsi | 43 +++++ arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts | 132 +++++++++++++++ arch/arm/dts/sunxi-libretech-all-h3-cc.dtsi | 168 ++++++++++++++++++ board/sunxi/MAINTAINERS | 9 +- configs/bananapi_m2_berry_defconfig | 14 ++ configs/libretech_all_h3_cc_h2_plus_defconfig | 15 ++ configs/libretech_all_h3_cc_h3_defconfig | 2 - configs/libretech_all_h3_cc_h5_defconfig | 15 ++ include/dt-bindings/clock/sun8i-r40-ccu.h | 187 +++++++++++++++++++++ include/dt-bindings/reset/sun8i-r40-ccu.h | 130 ++++++++++++++ 14 files changed, 749 insertions(+), 173 deletions(-) create mode 100644 arch/arm/dts/sun50i-h5-libretech-all-h3-cc.dts create mode 100644 arch/arm/dts/sun8i-h2-plus-libretech-all-h3-cc.dts create mode 100644 arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts create mode 100644 arch/arm/dts/sunxi-libretech-all-h3-cc.dtsi create mode 100644 configs/bananapi_m2_berry_defconfig create mode 100644 configs/libretech_all_h3_cc_h2_plus_defconfig create mode 100644 configs/libretech_all_h3_cc_h5_defconfig create mode 100644 include/dt-bindings/clock/sun8i-r40-ccu.h create mode 100644 include/dt-bindings/reset/sun8i-r40-ccu.h

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[U-Boot] [PATCH 1/4] i2c: rcar_i2c: Remove the driver
by Marek Vasut 10 May '18

10 May '18

Remove the rcar_i2c driver, since it's no longer used by any board and will be superseded by a DM and DT capable variant. Signed-off-by: Marek Vasut <marek.vasut+renesas(a)gmail.com> Cc: Heiko Schocher <hs(a)denx.de> Cc: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> --- drivers/i2c/Makefile | 1 - drivers/i2c/rcar_i2c.c | 293 ------------------------------------------------- 2 files changed, 294 deletions(-) delete mode 100644 drivers/i2c/rcar_i2c.c diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile index 169a2f1d7a..4a6e06fbc5 100644 --- a/drivers/i2c/Makefile +++ b/drivers/i2c/Makefile @@ -30,7 +30,6 @@ obj-$(CONFIG_SYS_I2C_MVTWSI) += mvtwsi.o obj-$(CONFIG_SYS_I2C_MXC) += mxc_i2c.o obj-$(CONFIG_SYS_I2C_MXS) += mxs_i2c.o obj-$(CONFIG_SYS_I2C_OMAP24XX) += omap24xx_i2c.o -obj-$(CONFIG_SYS_I2C_RCAR) += rcar_i2c.o obj-$(CONFIG_SYS_I2C_RCAR_IIC) += rcar_iic.o obj-$(CONFIG_SYS_I2C_ROCKCHIP) += rk_i2c.o obj-$(CONFIG_SYS_I2C_S3C24X0) += s3c24x0_i2c.o exynos_hs_i2c.o diff --git a/drivers/i2c/rcar_i2c.c b/drivers/i2c/rcar_i2c.c deleted file mode 100644 index bfba443f62..0000000000 --- a/drivers/i2c/rcar_i2c.c +++ /dev/null @@ -1,293 +0,0 @@ -/* - * drivers/i2c/rcar_i2c.c - * - * Copyright (C) 2013 Renesas Electronics Corporation - * Copyright (C) 2013 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj(a)renesas.com> - * - * SPDX-License-Identifier: GPL-2.0 - * - * NOTE: This driver should be converted to driver model before June 2017. - * Please see doc/driver-model/i2c-howto.txt for instructions. - */ - -#include <common.h> -#include <i2c.h> -#include <asm/io.h> - -DECLARE_GLOBAL_DATA_PTR; - -struct rcar_i2c { - u32 icscr; - u32 icmcr; - u32 icssr; - u32 icmsr; - u32 icsier; - u32 icmier; - u32 icccr; - u32 icsar; - u32 icmar; - u32 icrxdtxd; - u32 icccr2; - u32 icmpr; - u32 ichpr; - u32 iclpr; -}; - -#define MCR_MDBS 0x80 /* non-fifo mode switch */ -#define MCR_FSCL 0x40 /* override SCL pin */ -#define MCR_FSDA 0x20 /* override SDA pin */ -#define MCR_OBPC 0x10 /* override pins */ -#define MCR_MIE 0x08 /* master if enable */ -#define MCR_TSBE 0x04 -#define MCR_FSB 0x02 /* force stop bit */ -#define MCR_ESG 0x01 /* en startbit gen. */ - -#define MSR_MASK 0x7f -#define MSR_MNR 0x40 /* nack received */ -#define MSR_MAL 0x20 /* arbitration lost */ -#define MSR_MST 0x10 /* sent a stop */ -#define MSR_MDE 0x08 -#define MSR_MDT 0x04 -#define MSR_MDR 0x02 -#define MSR_MAT 0x01 /* slave addr xfer done */ - -static const struct rcar_i2c *i2c_dev[CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS] = { - (struct rcar_i2c *)CONFIG_SYS_RCAR_I2C0_BASE, - (struct rcar_i2c *)CONFIG_SYS_RCAR_I2C1_BASE, - (struct rcar_i2c *)CONFIG_SYS_RCAR_I2C2_BASE, - (struct rcar_i2c *)CONFIG_SYS_RCAR_I2C3_BASE, -}; - -static void rcar_i2c_raw_rw_common(struct rcar_i2c *dev, u8 chip, uint addr) -{ - /* set slave address */ - writel(chip << 1, &dev->icmar); - /* set register address */ - writel(addr, &dev->icrxdtxd); - /* clear status */ - writel(0, &dev->icmsr); - /* start master send */ - writel(MCR_MDBS | MCR_MIE | MCR_ESG, &dev->icmcr); - - while ((readl(&dev->icmsr) & (MSR_MAT | MSR_MDE)) - != (MSR_MAT | MSR_MDE)) - udelay(10); - - /* clear ESG */ - writel(MCR_MDBS | MCR_MIE, &dev->icmcr); - /* start SCLclk */ - writel(~(MSR_MAT | MSR_MDE), &dev->icmsr); - - while (!(readl(&dev->icmsr) & MSR_MDE)) - udelay(10); -} - -static void rcar_i2c_raw_rw_finish(struct rcar_i2c *dev) -{ - while (!(readl(&dev->icmsr) & MSR_MST)) - udelay(10); - - writel(0, &dev->icmcr); -} - -static int -rcar_i2c_raw_write(struct rcar_i2c *dev, u8 chip, uint addr, u8 *val, int size) -{ - rcar_i2c_raw_rw_common(dev, chip, addr); - - /* set send date */ - writel(*val, &dev->icrxdtxd); - /* start SCLclk */ - writel(~MSR_MDE, &dev->icmsr); - - while (!(readl(&dev->icmsr) & MSR_MDE)) - udelay(10); - - /* set stop condition */ - writel(MCR_MDBS | MCR_MIE | MCR_FSB, &dev->icmcr); - /* start SCLclk */ - writel(~MSR_MDE, &dev->icmsr); - - rcar_i2c_raw_rw_finish(dev); - - return 0; -} - -static u8 -rcar_i2c_raw_read(struct rcar_i2c *dev, u8 chip, uint addr) -{ - u8 ret; - - rcar_i2c_raw_rw_common(dev, chip, addr); - - /* set slave address, receive */ - writel((chip << 1) | 1, &dev->icmar); - /* start master receive */ - writel(MCR_MDBS | MCR_MIE | MCR_ESG, &dev->icmcr); - /* clear status */ - writel(0, &dev->icmsr); - - while ((readl(&dev->icmsr) & (MSR_MAT | MSR_MDR)) - != (MSR_MAT | MSR_MDR)) - udelay(10); - - /* clear ESG */ - writel(MCR_MDBS | MCR_MIE, &dev->icmcr); - /* prepare stop condition */ - writel(MCR_MDBS | MCR_MIE | MCR_FSB, &dev->icmcr); - /* start SCLclk */ - writel(~(MSR_MAT | MSR_MDR), &dev->icmsr); - - while (!(readl(&dev->icmsr) & MSR_MDR)) - udelay(10); - - /* get receive data */ - ret = (u8)readl(&dev->icrxdtxd); - /* start SCLclk */ - writel(~MSR_MDR, &dev->icmsr); - - rcar_i2c_raw_rw_finish(dev); - - return ret; -} - -/* - * SCL = iicck / (20 + SCGD * 8 + F[(ticf + tr + intd) * iicck]) - * iicck : I2C internal clock < 20 MHz - * ticf : I2C SCL falling time: 35 ns - * tr : I2C SCL rising time: 200 ns - * intd : LSI internal delay: I2C0: 50 ns I2C1-3: 5 - * F[n] : n rounded up to an integer - */ -static u32 rcar_clock_gen(int i2c_no, u32 bus_speed) -{ - u32 iicck, f, scl, scgd; - u32 intd = 5; - - int bit = 0, cdf_width = 3; - for (bit = 0; bit < (1 << cdf_width); bit++) { - iicck = CONFIG_HP_CLK_FREQ / (1 + bit); - if (iicck < 20000000) - break; - } - - if (bit > (1 << cdf_width)) { - puts("rcar-i2c: Can not get CDF\n"); - return 0; - } - - if (i2c_no == 0) - intd = 50; - - f = (35 + 200 + intd) * (iicck / 1000000000); - - for (scgd = 0; scgd < 0x40; scgd++) { - scl = iicck / (20 + (scgd * 8) + f); - if (scl <= bus_speed) - break; - } - - if (scgd > 0x40) { - puts("rcar-i2c: Can not get SDGB\n"); - return 0; - } - - debug("%s: scl: %d\n", __func__, scl); - debug("%s: bit %x\n", __func__, bit); - debug("%s: scgd %x\n", __func__, scgd); - debug("%s: iccr %x\n", __func__, (scgd << (cdf_width) | bit)); - - return scgd << (cdf_width) | bit; -} - -static void -rcar_i2c_init(struct i2c_adapter *adap, int speed, int slaveadd) -{ - struct rcar_i2c *dev = (struct rcar_i2c *)i2c_dev[adap->hwadapnr]; - u32 icccr = 0; - - /* No i2c support prior to relocation */ - if (!(gd->flags & GD_FLG_RELOC)) - return; - - /* - * reset slave mode. - * slave mode is not used on this driver - */ - writel(0, &dev->icsier); - writel(0, &dev->icsar); - writel(0, &dev->icscr); - writel(0, &dev->icssr); - - /* reset master mode */ - writel(0, &dev->icmier); - writel(0, &dev->icmcr); - writel(0, &dev->icmsr); - writel(0, &dev->icmar); - - icccr = rcar_clock_gen(adap->hwadapnr, adap->speed); - if (icccr == 0) - puts("I2C: Init failed\n"); - else - writel(icccr, &dev->icccr); -} - -static int rcar_i2c_read(struct i2c_adapter *adap, uint8_t chip, - uint addr, int alen, u8 *data, int len) -{ - struct rcar_i2c *dev = (struct rcar_i2c *)i2c_dev[adap->hwadapnr]; - int i; - - for (i = 0; i < len; i++) - data[i] = rcar_i2c_raw_read(dev, chip, addr + i); - - return 0; -} - -static int rcar_i2c_write(struct i2c_adapter *adap, uint8_t chip, uint addr, - int alen, u8 *data, int len) -{ - struct rcar_i2c *dev = (struct rcar_i2c *)i2c_dev[adap->hwadapnr]; - return rcar_i2c_raw_write(dev, chip, addr, data, len); -} - -static int -rcar_i2c_probe(struct i2c_adapter *adap, u8 dev) -{ - return rcar_i2c_read(adap, dev, 0, 0, NULL, 0); -} - -static unsigned int rcar_i2c_set_bus_speed(struct i2c_adapter *adap, - unsigned int speed) -{ - struct rcar_i2c *dev = (struct rcar_i2c *)i2c_dev[adap->hwadapnr]; - u32 icccr; - int ret = 0; - - rcar_i2c_raw_rw_finish(dev); - - icccr = rcar_clock_gen(adap->hwadapnr, speed); - if (icccr == 0) { - puts("I2C: Init failed\n"); - ret = -1; - } else { - writel(icccr, &dev->icccr); - } - return ret; -} - -/* - * Register RCAR i2c adapters - */ -U_BOOT_I2C_ADAP_COMPLETE(rcar_0, rcar_i2c_init, rcar_i2c_probe, rcar_i2c_read, - rcar_i2c_write, rcar_i2c_set_bus_speed, - CONFIG_SYS_RCAR_I2C0_SPEED, 0, 0) -U_BOOT_I2C_ADAP_COMPLETE(rcar_1, rcar_i2c_init, rcar_i2c_probe, rcar_i2c_read, - rcar_i2c_write, rcar_i2c_set_bus_speed, - CONFIG_SYS_RCAR_I2C1_SPEED, 0, 1) -U_BOOT_I2C_ADAP_COMPLETE(rcar_2, rcar_i2c_init, rcar_i2c_probe, rcar_i2c_read, - rcar_i2c_write, rcar_i2c_set_bus_speed, - CONFIG_SYS_RCAR_I2C2_SPEED, 0, 2) -U_BOOT_I2C_ADAP_COMPLETE(rcar_3, rcar_i2c_init, rcar_i2c_probe, rcar_i2c_read, - rcar_i2c_write, rcar_i2c_set_bus_speed, - CONFIG_SYS_RCAR_I2C3_SPEED, 0, 3) -- 2.16.2

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[U-Boot] [PATCH v4] zynqmp: Add generic target
by Alexander Graf 10 May '18

10 May '18

I would like to create a generic U-Boot build that adapts itself completely based on the DT passed in. That way we can potentially support running random board configurations with a single U-Boot binary built as part of the distribution. Currently a few things are still missing to make it a full reality. The most obvious one I think is the EEPROM location. This would need to also move into something described by DT. Apart from that, we're almost there. This patch adds a defconfig that simply contains all drivers we could make use of. We can then enable individual boards along the way and slowly adapt everything to be fully DT described while we identify each missing bit. Signed-off-by: Alexander Graf <agraf(a)suse.de> --- v1 -> v2: - Remove debug uart v2 -> v3 - show model information instead of custom IDENT_STRING v3 -> v4: - reintroduce CONFIG_IDENT_STRING - remove CONFIG_DEFAULT_DEVICE_TREE - run through savedefconfig - replace CONFIG_SYS_I2C_ZYNQ with CONFIG_SYS_I2C_CADENCE - remove CONFIG_ZYNQ_SDHCI{0,1} - needs to be solved generically - add xhci usb1 to xhci controller list --- configs/xilinx_zynqmp_generic_defconfig | 86 +++++++++++++++++++++++++++++++++ include/configs/xilinx_zynqmp_generic.h | 21 ++++++++ 2 files changed, 107 insertions(+) create mode 100644 configs/xilinx_zynqmp_generic_defconfig create mode 100644 include/configs/xilinx_zynqmp_generic.h diff --git a/configs/xilinx_zynqmp_generic_defconfig b/configs/xilinx_zynqmp_generic_defconfig new file mode 100644 index 0000000000..ea2be0c9cc --- /dev/null +++ b/configs/xilinx_zynqmp_generic_defconfig @@ -0,0 +1,86 @@ +CONFIG_ARM=y +CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_generic" +CONFIG_ARCH_ZYNQMP=y +CONFIG_SYS_TEXT_BASE=0x8000000 +CONFIG_SYS_MALLOC_F_LEN=0x8000 +CONFIG_IDENT_STRING=" Xilinx ZynqMP based platform" +CONFIG_ZYNQMP_USB=y +CONFIG_AHCI=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_BOARD_EARLY_INIT_R=y +CONFIG_SYS_PROMPT="ZynqMP> " +CONFIG_FASTBOOT=y +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_CMD_THOR_DOWNLOAD=y +CONFIG_CMD_MEMTEST=y +CONFIG_SYS_ALT_MEMTEST=y +CONFIG_CMD_CLK=y +CONFIG_CMD_DFU=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_FPGA_LOADBP=y +CONFIG_CMD_FPGA_LOADP=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_TIME=y +CONFIG_CMD_TIMER=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_OF_BOARD=y +CONFIG_ENV_IS_IN_FAT=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_SCSI_AHCI=y +CONFIG_SATA_CEVA=y +CONFIG_CLK_ZYNQMP=y +CONFIG_DFU_RAM=y +CONFIG_FPGA_XILINX=y +CONFIG_FPGA_ZYNQMPPL=y +CONFIG_DM_GPIO=y +CONFIG_CMD_PCA953X=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_CADENCE=y +CONFIG_MISC=y +CONFIG_DM_MMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ZYNQ=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_WINBOND=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_TI=y +CONFIG_PHY_VITESSE=y +CONFIG_PHY_FIXED=y +CONFIG_DM_ETH=y +CONFIG_PHY_GIGE=y +CONFIG_ZYNQ_GEM=y +CONFIG_SCSI=y +CONFIG_DM_SCSI=y +CONFIG_ZYNQ_SERIAL=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_XHCI_ZYNQMP=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GADGET=y +CONFIG_USB_ULPI_VIEWPORT=y +CONFIG_USB_ULPI=y +CONFIG_USB_STORAGE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Xilinx" +CONFIG_USB_GADGET_VENDOR_NUM=0x03FD +CONFIG_USB_GADGET_PRODUCT_NUM=0x0300 +CONFIG_USB_FUNCTION_THOR=y +CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/include/configs/xilinx_zynqmp_generic.h b/include/configs/xilinx_zynqmp_generic.h new file mode 100644 index 0000000000..5e3a1240c6 --- /dev/null +++ b/include/configs/xilinx_zynqmp_generic.h @@ -0,0 +1,21 @@ +/* + * Configuration for the Xilinx ZynqMP generic platform + * + * (C) Copyright 2018 Alexander Graf <agraf(a)suse.de> + * (C) Copyright 2015 Xilinx, Inc. + * Michal Simek <michal.simek(a)xilinx.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_ZYNQMP_GENERIC_H +#define __CONFIG_ZYNQMP_GENERIC_H + +/* This file should disappear as soon as xhci is converted to DT enumerated */ + +#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR, \ + ZYNQMP_USB1_XHCI_BASEADDR} + +#include <configs/xilinx_zynqmp.h> + +#endif /* __CONFIG_ZYNQMP_GENERIC_H */ -- 2.12.3

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[U-Boot] [PATCH v3] arm64: zynqmp: Setup MMU map for DDR at run time
by Michal Simek 10 May '18

10 May '18

From: Nitin Jain <nitin.jain(a)xilinx.com> This patch fills the MMU map for DDR at run time based on information read from Device Tree or automatically detected from static configuration. The patch is needed because for systems which has for example 1GB of memory but MMU map is 2GB there could be spurious accesses which was seen in past when mapping is not fitting with actual memory installed. Signed-off-by: Nitin Jain <nitin.jain(a)xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <sivadur(a)xilinx.com> Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- Changes in v3: - Fix commit message - Fix comment in mem_map_fill Changes in v2: - Fix and extended commit description (asked-by: agraf) arch/arm/cpu/armv8/zynqmp/cpu.c | 84 ++++++++++++-------- arch/arm/include/asm/arch-zynqmp/sys_proto.h | 2 +- board/xilinx/zynqmp/zynqmp.c | 22 ++++- 3 files changed, 74 insertions(+), 34 deletions(-) diff --git a/arch/arm/cpu/armv8/zynqmp/cpu.c b/arch/arm/cpu/armv8/zynqmp/cpu.c index eb0db46065f3..2748d65d14b4 100644 --- a/arch/arm/cpu/armv8/zynqmp/cpu.c +++ b/arch/arm/cpu/armv8/zynqmp/cpu.c @@ -15,16 +15,28 @@ DECLARE_GLOBAL_DATA_PTR; -static struct mm_region zynqmp_mem_map[] = { +/* + * Number of filled static entries and also the first empty + * slot in zynqmp_mem_map. + */ +#define ZYNQMP_MEM_MAP_USED 4 + #if !defined(CONFIG_ZYNQMP_NO_DDR) - { - .virt = 0x0UL, - .phys = 0x0UL, - .size = 0x80000000UL, - .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | - PTE_BLOCK_INNER_SHARE - }, +#define DRAM_BANKS CONFIG_NR_DRAM_BANKS +#else +#define DRAM_BANKS 0 #endif + +#if defined(CONFIG_DEFINE_TCM_OCM_MMAP) +#define TCM_MAP 1 +#else +#define TCM_MAP 0 +#endif + +/* +1 is end of list which needs to be empty */ +#define ZYNQMP_MEM_MAP_MAX (ZYNQMP_MEM_MAP_USED + DRAM_BANKS + TCM_MAP + 1) + +static struct mm_region zynqmp_mem_map[ZYNQMP_MEM_MAP_MAX] = { { .virt = 0x80000000UL, .phys = 0x80000000UL, @@ -32,8 +44,7 @@ static struct mm_region zynqmp_mem_map[] = { .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN - }, - { + }, { .virt = 0xf8000000UL, .phys = 0xf8000000UL, .size = 0x07e00000UL, @@ -41,42 +52,51 @@ static struct mm_region zynqmp_mem_map[] = { PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN }, { -#if defined(CONFIG_DEFINE_TCM_OCM_MMAP) - .virt = 0xffe00000UL, - .phys = 0xffe00000UL, - .size = 0x00200000UL, - .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | - PTE_BLOCK_INNER_SHARE - }, { -#endif .virt = 0x400000000UL, .phys = 0x400000000UL, .size = 0x400000000UL, .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN - }, -#if !defined(CONFIG_ZYNQMP_NO_DDR) - { - .virt = 0x800000000UL, - .phys = 0x800000000UL, - .size = 0x800000000UL, - .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | - PTE_BLOCK_INNER_SHARE - }, -#endif - { + }, { .virt = 0x1000000000UL, .phys = 0x1000000000UL, .size = 0xf000000000UL, .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN - }, { - /* List terminator */ - 0, } }; + +void mem_map_fill(void) +{ + int banks = ZYNQMP_MEM_MAP_USED; + +#if defined(CONFIG_DEFINE_TCM_OCM_MMAP) + zynqmp_mem_map[banks].virt = 0xffe00000UL; + zynqmp_mem_map[banks].phys = 0xffe00000UL; + zynqmp_mem_map[banks].size = 0x00200000UL; + zynqmp_mem_map[banks].attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE; + banks = banks + 1; +#endif + +#if !defined(CONFIG_ZYNQMP_NO_DDR) + for (int i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { + /* Zero size means no more DDR that's this is end */ + if (!gd->bd->bi_dram[i].size) + break; + + zynqmp_mem_map[banks].virt = gd->bd->bi_dram[i].start; + zynqmp_mem_map[banks].phys = gd->bd->bi_dram[i].start; + zynqmp_mem_map[banks].size = gd->bd->bi_dram[i].size; + zynqmp_mem_map[banks].attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE; + banks = banks + 1; + } +#endif +} + struct mm_region *mem_map = zynqmp_mem_map; u64 get_page_table_size(void) diff --git a/arch/arm/include/asm/arch-zynqmp/sys_proto.h b/arch/arm/include/asm/arch-zynqmp/sys_proto.h index d1db4c38bb99..6056bc6c0c56 100644 --- a/arch/arm/include/asm/arch-zynqmp/sys_proto.h +++ b/arch/arm/include/asm/arch-zynqmp/sys_proto.h @@ -45,7 +45,7 @@ int invoke_smc(u32 pm_api_id, u32 arg0, u32 arg1, u32 arg2, u32 arg3, u32 *ret_payload); void initialize_tcm(bool mode); - +void mem_map_fill(void); int chip_id(unsigned char id); #endif /* _ASM_ARCH_SYS_PROTO_H */ diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index 4c6f29995a24..911cd52e0c40 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -405,7 +405,15 @@ unsigned long do_go_exec(ulong (*entry)(int, char * const []), int argc, #if !defined(CONFIG_SYS_SDRAM_BASE) && !defined(CONFIG_SYS_SDRAM_SIZE) int dram_init_banksize(void) { - return fdtdec_setup_memory_banksize(); + int ret; + + ret = fdtdec_setup_memory_banksize(); + if (ret) + return ret; + + mem_map_fill(); + + return 0; } int dram_init(void) @@ -416,6 +424,18 @@ int dram_init(void) return 0; } #else +int dram_init_banksize(void) +{ +#if defined(CONFIG_NR_DRAM_BANKS) + gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; + gd->bd->bi_dram[0].size = get_effective_memsize(); +#endif + + mem_map_fill(); + + return 0; +} + int dram_init(void) { gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, -- 2.17.0

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Re: [U-Boot] [PATCH v3 0/8] riscv: Enable efi_loader support
by Rick Chen 10 May '18

10 May '18

> > > > Then I think if I don't want enter this auto flow, what can I do ? > > > > 1 Remove CONFIG_DISTRO_DEFAULTS=y from nx25-ae250_defconfig But it > > still enter auto flow. > > > > 2 Add #ifdef CONFIG_DISTRO_DEFAULTS to encapsulate the > > CONFIG_EXTRA_ENV_SETTINGS in nx25-ae250.h And Remove > > CONFIG_DISTRO_DEFAULTS=y from nx25-ae250_defconfig And it will NOT > > enter auto flow > > > > #ifdef CONFIG_DISTRO_DEFAULTS > > /* Enable distro boot */ > > #define BOOT_TARGET_DEVICES(func) \ > > func(MMC, mmc, 0) \ > > func(DHCP, dhcp, na) > > > > #include <config_distro_bootcmd.h> > > > > #define CONFIG_EXTRA_ENV_SETTINGS \ > > "kernel_addr_r=0x00080000\0" \ > > "pxefile_addr_r=0x01f00000\0" \ > > "scriptaddr=0x01f00000\0" \ > > "fdt_addr_r=0x02000000\0" \ > > "ramdisk_addr_r=0x02800000\0" \ > > BOOTENV #endif > > > > 3 Add #ifdef CONFIG_DISTRO_DEFAULTS to encapsulate the > > CONFIG_EXTRA_ENV_SETTINGS in nx25-ae250.h And do NOT Remove > > CONFIG_DISTRO_DEFAULTS=y from nx25-ae250_defconfig But disable > CONFIG_DISTRO_DEFAULTS from make menuconfig > > General setup ---> > > [ ] Select defaults suitable for booting general purpose Linux > > distributions And it still enter auto flow > > > > Offering this information for you. > > This is the same for all distro enabled boards. The basic idea is that U-Boot ships > with something that "just boots" for simple use cases. > > If you want something more advanced, you usually want to put something very > target specific in there anyway, such as "bootm $nor_flash". In that case, you > adapt the CONFIG_BOOTCOMMAND parameter to whatever you want. > > The boot command can also be overridden using the environment. So if you have > working environment store, you can change the U-Boot variable "bootcmd" and > U-Boot will run that instead when it boots. > > The alternative to this default behavior would be no bootcmd at all which means > you just get dropped into the U-Boot prompt. While that's reasonably useful for > developers, it isn't for people deploying U-Boot on real target systems :). > > > Alex Thanks for your advises. After you send those patchs into main trunk. I will fetch and push them to u-boot-riscv.git :) Rick

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[U-Boot] [PATCH v2] efi_loader: fix off-by-one bug in efi_get_variable
by Ivan Gorinov 10 May '18

10 May '18

efi_get_variable() always stores an extra zero byte after the output data. When the returned data size matches the output buffer size, the extra zero byte is stored past the end of the output buffer. Signed-off-by: Ivan Gorinov <ivan.gorinov(a)intel.com> --- lib/efi_loader/efi_variable.c | 64 +++++++++++++++++++++---------------------- 1 file changed, 32 insertions(+), 32 deletions(-) diff --git a/lib/efi_loader/efi_variable.c b/lib/efi_loader/efi_variable.c index 6c177da..b1e6a73 100644 --- a/lib/efi_loader/efi_variable.c +++ b/lib/efi_loader/efi_variable.c @@ -50,7 +50,7 @@ (strlen("efi_xxxxxxxx-xxxx-xxxx-xxxxxxxxxxxxxxxx_") + \ (MAX_VAR_NAME * MAX_UTF8_PER_UTF16)) -static int hex(unsigned char ch) +static int hex(char ch) { if (ch >= 'a' && ch <= 'f') return ch-'a'+10; @@ -61,44 +61,41 @@ static int hex(unsigned char ch) return -1; } -static const char *hex2mem(u8 *mem, const char *hexstr, int count) +static int hex2mem(u8 *mem, const char *hexstr, int size) { - memset(mem, 0, count/2); + u8 data; + int nibble; + char ch; + int i, k; - do { - int nibble; + memset(mem, 0, size); - *mem = 0; + for (i = 0; i < size; i += 1) { + data = 0; + for (k = 0; k < 2; k += 1) { + ch = *(hexstr++); - if (!count || !*hexstr) - break; - - nibble = hex(*hexstr); - if (nibble < 0) - break; - - *mem = nibble; - count--; - hexstr++; - - if (!count || !*hexstr) - break; + if (!ch) { + if (k == 0) + return i; + else + return -1; + } - nibble = hex(*hexstr); - if (nibble < 0) - break; + nibble = hex(ch); + if (nibble < 0) + return -1; - *mem = (*mem << 4) | nibble; - count--; - hexstr++; - mem++; + hexstr++; - } while (1); + data <<= 4; + data |= nibble; - if (*hexstr) - return hexstr; + } + mem[i] = data; + } - return NULL; + return i; } static char *mem2hex(char *hexstr, const u8 *mem, int count) @@ -210,8 +207,11 @@ efi_status_t EFIAPI efi_get_variable(s16 *variable_name, if ((s = prefix(val, "(blob)"))) { unsigned len = strlen(s); + if (len & 1) + return EFI_EXIT(EFI_DEVICE_ERROR); + /* two characters per byte: */ - len = DIV_ROUND_UP(len, 2); + len /= 2; *data_size = len; if (in_size < len) @@ -220,7 +220,7 @@ efi_status_t EFIAPI efi_get_variable(s16 *variable_name, if (!data) return EFI_EXIT(EFI_INVALID_PARAMETER); - if (hex2mem(data, s, len * 2)) + if (hex2mem(data, s, len) != len) return EFI_EXIT(EFI_DEVICE_ERROR); debug("%s: got value: \"%s\"\n", __func__, s); -- 2.7.4

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[U-Boot] [PATCH V2] imx: mx7: psci: add system reset support
by Anson Huang 10 May '18

10 May '18

Add i.MX7 PSCI system reset support, linux kernel now can use "reboot" command to reset system. Signed-off-by: Anson Huang <Anson.Huang(a)nxp.com> --- changes since V1: write WDOG register directly instead of calling reset_cpu which is NOT safe since it is NOT in secure section. arch/arm/mach-imx/mx7/psci-mx7.c | 5 +++++ arch/arm/mach-imx/mx7/psci.S | 7 +++++++ 2 files changed, 12 insertions(+) diff --git a/arch/arm/mach-imx/mx7/psci-mx7.c b/arch/arm/mach-imx/mx7/psci-mx7.c index 7f429b0..66f6db6 100644 --- a/arch/arm/mach-imx/mx7/psci-mx7.c +++ b/arch/arm/mach-imx/mx7/psci-mx7.c @@ -74,3 +74,8 @@ __secure int imx_cpu_off(int cpu) writel(0, SRC_BASE_ADDR + cpu * 8 + SRC_GPR1_MX7D + 4); return 0; } + +__secure void imx_system_reset(void) +{ + writew(1 << 2, WDOG1_BASE_ADDR); +} diff --git a/arch/arm/mach-imx/mx7/psci.S b/arch/arm/mach-imx/mx7/psci.S index fc5eb34..59f98cd 100644 --- a/arch/arm/mach-imx/mx7/psci.S +++ b/arch/arm/mach-imx/mx7/psci.S @@ -43,4 +43,11 @@ psci_cpu_off: 1: wfi b 1b +.globl psci_system_reset +psci_system_reset: + b imx_system_reset + +2: wfi + b 2b + .popsection -- 1.9.1

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