May 2018 - U-Boot

[U-Boot] Please pull u-boot-marvell
by Stefan Roese 30 May '18

30 May '18

Hi Tom, please pull the 2nd batch of MVEBU related patches in this merge window from the Marvell repository. Thanks, Stefan The following changes since commit c3c863880479edeb5b08226e622d13c91326e4a7: add FIT data-position & data-offset property support (2018-05-26 18:19:19 -0400) are available in the Git repository at: git://www.denx.de/git/u-boot-marvell.git for you to fetch changes up to e85f490a47e9653b08d552ffbb351e285b8a1a85: configs: remove CONFIG_SYS_MVFS (2018-05-29 10:37:52 +0200) ---------------------------------------------------------------- Chris Packham (9): ARM: kirkwood: Add device-tree for d2net_v2 & net2big_v2 ARM: kirkwood: Add device-tree for dreamplug ARM: kirkwood: Add device-tree for ds109 ARM: kirkwood: Add device-tree for lschlv2 & lsxhl ARM: kirkwood: Add device-tree for netspace & inetspace ARM: kirkwood: Add device-tree for keymile configs: remove empty #ifdef block from mv-common.h configs: remove redundant comment sections configs: remove CONFIG_SYS_MVFS David Sniatkiwicz (1): ata: ahci_mvebu: a8040 a0: remove bad port register offsets workarounds Evan Wang (1): mvebu: pinctrl: sync compatible string with Linux 4.17-rc4 Ken Ma (3): ata: mvebu: move mvebu sata driver to drivers/ata directory ata: ahci_mvebu: add scsi support arm64: mvebu: defconfig: enable CONFIG_AHCI_MVEBU Konstantin Porotchkin (2): mvebu: pinctrl: Add SD/eMMC PHY selector to the driver dts: mvebu: a80x0: Enable SD/eMMC interfaces Marek Behún (1): board: turris_mox: Add fixed regulator support to defconfig MAINTAINERS | 1 + README | 5 - arch/arm/dts/armada-8040-db.dts | 14 + arch/arm/dts/armada-8040-mcbin.dts | 8 + arch/arm/dts/armada-ap806.dtsi | 2 +- arch/arm/dts/armada-cp110-master.dtsi | 4 +- arch/arm/dts/armada-cp110-slave.dtsi | 2 +- arch/arm/dts/kirkwood-d2net.dts | 45 ++ arch/arm/dts/kirkwood-dreamplug.dts | 127 +++ arch/arm/dts/kirkwood-ds109.dts | 40 + arch/arm/dts/kirkwood-is2.dts | 40 + arch/arm/dts/kirkwood-km_common.dtsi | 47 ++ arch/arm/dts/kirkwood-km_kirkwood.dts | 31 + arch/arm/dts/kirkwood-lschlv2.dts | 20 + arch/arm/dts/kirkwood-lsxhl.dts | 20 + arch/arm/dts/kirkwood-lsxl.dtsi | 237 ++++++ arch/arm/dts/kirkwood-net2big.dts | 63 ++ arch/arm/dts/kirkwood-netxbig.dtsi | 232 ++++++ arch/arm/dts/kirkwood-ns2-common.dtsi | 97 +++ arch/arm/dts/kirkwood-ns2.dts | 40 + arch/arm/dts/kirkwood-ns2lite.dts | 35 + arch/arm/dts/kirkwood-ns2max.dts | 59 ++ arch/arm/dts/kirkwood-ns2mini.dts | 60 ++ arch/arm/dts/kirkwood-synology.dtsi | 855 +++++++++++++++++++++ arch/arm/mach-mvebu/Makefile | 1 - configs/d2net_v2_defconfig | 3 +- configs/dreamplug_defconfig | 3 +- configs/ds109_defconfig | 2 + configs/inetspace_v2_defconfig | 3 +- configs/km_kirkwood_128m16_defconfig | 3 +- configs/km_kirkwood_defconfig | 3 +- configs/km_kirkwood_pci_defconfig | 3 +- configs/kmcoge5un_defconfig | 3 +- configs/kmnusa_defconfig | 3 +- configs/kmsugp1_defconfig | 3 +- configs/kmsuv31_defconfig | 3 +- configs/lschlv2_defconfig | 3 +- configs/lsxhl_defconfig | 3 +- configs/mgcoge3un_defconfig | 3 +- configs/mvebu_db-88f3720_defconfig | 2 +- configs/mvebu_db_armada8k_defconfig | 2 +- configs/mvebu_espressobin-88f3720_defconfig | 2 +- configs/mvebu_mcbin-88f8040_defconfig | 2 +- configs/net2big_v2_defconfig | 3 +- configs/netspace_lite_v2_defconfig | 3 +- configs/netspace_max_v2_defconfig | 3 +- configs/netspace_mini_v2_defconfig | 3 +- configs/netspace_v2_defconfig | 3 +- configs/turris_mox_defconfig | 2 + .../pinctrl/marvell,mvebu-pinctrl.txt | 16 +- drivers/ata/Kconfig | 11 + drivers/ata/Makefile | 1 + .../mach-mvebu/sata.c => drivers/ata/ahci_mvebu.c | 19 +- drivers/pinctrl/mvebu/pinctrl-mvebu.c | 67 +- include/configs/dns325.h | 3 +- include/configs/ds414.h | 3 +- include/configs/goflexhome.h | 3 +- include/configs/guruplug.h | 4 +- include/configs/ib62x0.h | 3 +- include/configs/iconnect.h | 3 +- include/configs/mv-common.h | 18 - include/configs/mv-plug-common.h | 15 - include/configs/nsa310s.h | 3 +- include/configs/openrd.h | 3 +- include/configs/pogo_e02.h | 3 +- include/configs/sheevaplug.h | 4 +- include/dt-bindings/leds/leds-netxbig.h | 18 + include/dt-bindings/leds/leds-ns2.h | 9 + scripts/config_whitelist.txt | 1 - 69 files changed, 2262 insertions(+), 96 deletions(-) create mode 100644 arch/arm/dts/kirkwood-d2net.dts create mode 100644 arch/arm/dts/kirkwood-dreamplug.dts create mode 100644 arch/arm/dts/kirkwood-ds109.dts create mode 100644 arch/arm/dts/kirkwood-is2.dts create mode 100644 arch/arm/dts/kirkwood-km_common.dtsi create mode 100644 arch/arm/dts/kirkwood-km_kirkwood.dts create mode 100644 arch/arm/dts/kirkwood-lschlv2.dts create mode 100644 arch/arm/dts/kirkwood-lsxhl.dts create mode 100644 arch/arm/dts/kirkwood-lsxl.dtsi create mode 100644 arch/arm/dts/kirkwood-net2big.dts create mode 100644 arch/arm/dts/kirkwood-netxbig.dtsi create mode 100644 arch/arm/dts/kirkwood-ns2-common.dtsi create mode 100644 arch/arm/dts/kirkwood-ns2.dts create mode 100644 arch/arm/dts/kirkwood-ns2lite.dts create mode 100644 arch/arm/dts/kirkwood-ns2max.dts create mode 100644 arch/arm/dts/kirkwood-ns2mini.dts create mode 100644 arch/arm/dts/kirkwood-synology.dtsi rename arch/arm/mach-mvebu/sata.c => drivers/ata/ahci_mvebu.c (71%) create mode 100644 include/dt-bindings/leds/leds-netxbig.h create mode 100644 include/dt-bindings/leds/leds-ns2.h

2 1

[U-Boot] Pull request: u-boot-ubi/master
by Heiko Schocher 30 May '18

30 May '18

Hello Tom, please pull from u-boot-ubi.git master The following changes since commit 624d2cae3401c2e4d43c571a9b81d1f650e7703d: SPDX: Fixup SPDX tags in a few new files (2018-05-20 09:47:45 -0400) are available in the Git repository at: git://git.denx.de/u-boot-ubi.git master for you to fetch changes up to 65c3d25a6a21b5cf4d978f05f84aaeb6b250e636: ubi: fastmap: Implement produce_free_peb() (2018-05-22 11:39:05 +0200) ---------------------------------------------------------------- Patrice Chotard (1): ubi: fastmap: Implement produce_free_peb() drivers/mtd/ubi/fastmap-wl.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) Travis build: https://travis-ci.org/hsdenx/u-boot-ubi/builds/382071802 Thanks! bye, Heiko -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-52 Fax: +49-8142-66989-80 Email: hs(a)denx.de

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[U-Boot] mkenvimage.c:119:35: error: ‘PLAIN_VERSION’ undeclared
by Ed Swarthout 30 May '18

30 May '18

I'm not sure why mkenvimage.c is expecting the system include path to have u-boot's version.h, but it is causing the subject error message if it contains someone elses. See: $ echo '#error Should not include /usr/local/include/version.h' > /usr/local/include/version.h $ make O=/home/ed/bsp/build/uboot_sand sandbox_defconfig $ make O=/home/ed/bsp/build/uboot_sand make[1]: Entering directory '/f/deb/files/bsp/build/uboot_sand' CHK include/config/uboot.release Using /f/deb/files/bsp/git/u-boot as source for U-Boot GEN ./Makefile CHK include/generated/version_autogenerated.h CHK include/generated/timestamp_autogenerated.h UPD include/generated/timestamp_autogenerated.h CHK include/generated/generic-asm-offsets.h HOSTCC tools/mkenvimage.o In file included from /f/deb/files/bsp/git/u-boot/tools/mkenvimage.c:25:0: /usr/local/include/version.h:1:2: error: #error Should not include /usr/local/include/version.h #error Should not include /usr/local/include/version.h ^ /f/deb/files/bsp/git/u-boot/tools/mkenvimage.c: In function ‘main’: /f/deb/files/bsp/git/u-boot/tools/mkenvimage.c:119:35: error: ‘PLAIN_VERSION’ undeclared (first use in this function) printf("%s version %s\n", prg, PLAIN_VERSION); ^ /f/deb/files/bsp/git/u-boot/tools/mkenvimage.c:119:35: note: each undeclared identifier is reported only once for each function it appears in scripts/Makefile.host:114: recipe for target 'tools/mkenvimage.o' failed make[2]: *** [tools/mkenvimage.o] Error 1 /f/deb/files/bsp/git/u-boot/Makefile:1372: recipe for target 'tools' failed make[1]: *** [tools] Error 2 make[1]: Leaving directory '/f/deb/files/bsp/build/uboot_sand' Makefile:148: recipe for target 'sub-make' failed make: *** [sub-make] Error 2 This has been here for awhile and is in current master. I'm not sure why it was done this way, so I'm hesitate to provide a fix. Ed Swarthout

1 0

[U-Boot] [PATCH] ARC: Move .ivt section to the very beginning of the image
by Alexey Brodkin 29 May '18

29 May '18

This is useful for cases when U-Boot image is put in ROM and reset vector points to 0 where the very beginnign of the image reside. Signed-off-by: Alexey Brodkin <abrodkin(a)synopsys.com> --- arch/arc/cpu/u-boot.lds | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/arch/arc/cpu/u-boot.lds b/arch/arc/cpu/u-boot.lds index d5c88ef9d4d0..ff8239b66b40 100644 --- a/arch/arc/cpu/u-boot.lds +++ b/arch/arc/cpu/u-boot.lds @@ -12,13 +12,6 @@ SECTIONS { . = CONFIG_SYS_TEXT_BASE; __image_copy_start = .; - __text_start = .; - .text : { - arch/arc/lib/start.o (.text*) - *(.text*) - } - __text_end = .; - . = ALIGN(1024); __ivt_start = .; .ivt : @@ -27,6 +20,14 @@ SECTIONS } __ivt_end = .; + . = ALIGN(1024); + __text_start = .; + .text : { + arch/arc/lib/start.o (.text*) + *(.text*) + } + __text_end = .; + . = ALIGN(4); .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) -- 2.17.0

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[U-Boot] [PATCH] ARC: Improve relocation fix-ups
by Alexey Brodkin 29 May '18

29 May '18

We used to have the one and only linker script for all ARC boards and so we relied on a particular order of symbols there. Because of that we used __ivt_end as the marker of the end of all the code which won't be true any longer if we move .ivt section to any other place. That said we'd better check for each section separately. A couple of other improvements: 1. There's no point to include the marker of section end in interested range because its address is beyond the section, i.e. we should compare with "<" but not "<=". 2. .ivt section for ARCv2 cores is just an array of 32-bit ints and they are not swapped even on little-endia cores while in case of ARCompact cores .ivt contains valid code so swapping is required. 3. Just in case add a check for ARC600 which is also ARCompact and its .ivt is normal code. 4. Check if we need to deal with middle-endian encoded values only once and then use "do_swap" flag. Signed-off-by: Alexey Brodkin <abrodkin(a)synopsys.com> --- arch/arc/lib/relocate.c | 75 +++++++++++++++++++++++++++++------------ 1 file changed, 53 insertions(+), 22 deletions(-) diff --git a/arch/arc/lib/relocate.c b/arch/arc/lib/relocate.c index a3b7428d8519..47458d522722 100644 --- a/arch/arc/lib/relocate.c +++ b/arch/arc/lib/relocate.c @@ -9,6 +9,7 @@ extern ulong __image_copy_start; extern ulong __ivt_end; +extern ulong __text_end; DECLARE_GLOBAL_DATA_PTR; @@ -48,7 +49,7 @@ int do_elf_reloc_fixups(void) debug("Section .rela.dyn is located at %08x-%08x\n", (unsigned int)re_src, (unsigned int)re_end); - Elf32_Addr *offset_ptr_rom, *last_offset = NULL; + Elf32_Addr *offset_ptr_rom; Elf32_Addr *offset_ptr_ram; do { @@ -57,15 +58,28 @@ int do_elf_reloc_fixups(void) /* Check that the location of the relocation is in .text */ if (offset_ptr_rom >= (Elf32_Addr *)&__image_copy_start && - offset_ptr_rom > last_offset) { - unsigned int val; + offset_ptr_rom < (Elf32_Addr *)&__image_copy_end) { + unsigned int val, do_swap = 0; /* Switch to the in-RAM version */ offset_ptr_ram = (Elf32_Addr *)((ulong)offset_ptr_rom + gd->reloc_off); - debug("Patching value @ %08x (relocated to %08x)\n", +#ifdef __LITTLE_ENDIAN__ + /* If location in ".text" section swap value */ + if (((u32)offset_ptr_rom >= (u32)&__text_start && + (u32)offset_ptr_rom <= (u32)&__text_end) +#if defined(__ARC700__) || defined(__ARC600__) + || ((u32)offset_ptr_rom >= (u32)&__ivt_start && + (u32)offset_ptr_rom <= (u32)&__ivt_end) +#endif + ) + do_swap = 1; +#endif + + debug("Patching value @ %08x (relocated to %08x)%s\n", (unsigned int)offset_ptr_rom, - (unsigned int)offset_ptr_ram); + (unsigned int)offset_ptr_ram, + do_swap ? ", middle-endian encoded" : ""); /* * Use "memcpy" because target location might be @@ -75,28 +89,45 @@ int do_elf_reloc_fixups(void) */ memcpy(&val, offset_ptr_ram, sizeof(int)); -#ifdef __LITTLE_ENDIAN__ - /* If location in ".text" section swap value */ - if ((unsigned int)offset_ptr_rom < - (unsigned int)&__ivt_end) + if (do_swap) val = (val << 16) | (val >> 16); -#endif /* Check that the target points into executable */ - if (val >= (unsigned int)&__image_copy_start && val <= - (unsigned int)&__image_copy_end) { - val += gd->reloc_off; -#ifdef __LITTLE_ENDIAN__ - /* If location in ".text" section swap value */ - if ((unsigned int)offset_ptr_rom < - (unsigned int)&__ivt_end) - val = (val << 16) | (val >> 16); -#endif - memcpy(offset_ptr_ram, &val, sizeof(int)); + if (val < (unsigned int)&__image_copy_start || + val > (unsigned int)&__image_copy_end) { + /* TODO: Use panic() instead of debug() + * + * For some reason GCC might generate + * fake relocation even for LD/SC of constant + * inderectly. See an example below: + * ----------------------->8-------------------- + * static int setup_mon_len(void) + * { + * gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE; + * return 0; + * } + * ----------------------->8-------------------- + * + * And that's what we get in the binary: + * ----------------------->8-------------------- + * 10005cb4 <setup_mon_len>: + * 10005cb4: 193c 3f80 0003 2f80 st 0x32f80,[r25,60] + * 10005cb8: R_ARC_RELATIVE *ABS*-0x10000000 + * 10005cbc: 7fe0 j_s.d [blink] + * 10005cbe: 700c mov_s r0,0 + * ----------------------->8-------------------- + */ + debug("Relocation target %08x points outside of image\n", + val); } - } - last_offset = offset_ptr_rom; + val += gd->reloc_off; + + if (do_swap) + val = (val << 16) | (val >> 16); + + memcpy(offset_ptr_ram, &val, sizeof(int)); + } } while (++re_src < re_end); return 0; -- 2.17.0

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[U-Boot] [PATCH] ARC: Make sure .ivt section is not purged by garbage collector
by Alexey Brodkin 29 May '18

29 May '18

Fixes fac4790491f6 "arc: Eliminate unused code and data with GCC's garbage collector", see [1]. Since in case of ARCv2 .ivt only contains addrresses of interrupt/exception handlers linker doesn't understand that this section actually make a lot of sense and decides to get rid of it if we use "--gc-sections". And KEEP does exactly this, see [2]. [1] http://git.denx.de/?p=u-boot.git;a=commit;h=fac4790491f69b29755d92db2cad508… [2] https://sourceware.org/binutils/docs/ld/Input-Section-Keep.html#Input-Secti… Signed-off-by: Alexey Brodkin <abrodkin(a)synopsys.com> --- arch/arc/cpu/u-boot.lds | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arc/cpu/u-boot.lds b/arch/arc/cpu/u-boot.lds index 73c642ed6bd9..d5c88ef9d4d0 100644 --- a/arch/arc/cpu/u-boot.lds +++ b/arch/arc/cpu/u-boot.lds @@ -23,7 +23,7 @@ SECTIONS __ivt_start = .; .ivt : { - *(.ivt) + KEEP(*(.ivt)) } __ivt_end = .; -- 2.17.0

1 0

[U-Boot] [PATCH] armv8: ls1088a: change dpl load command from apply to lazyapply.
by Jagdish Gediya 29 May '18

29 May '18

use "fsl_mc lazyapply dpl addr" instead of "fsl_mc apply dpl addr" change dpl load addr to 0x80000000 from 0x80200000 because dpl gets corrupted at 0x80200000 during bootm command excecution. Signed-off-by: Jagdish Gediya <jagdish.gediya(a)nxp.com> --- include/configs/ls1088a_common.h | 10 +++++----- include/configs/ls1088ardb.h | 12 ++++++------ 2 files changed, 11 insertions(+), 11 deletions(-) diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index 0df9016..978f798 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -201,17 +201,17 @@ unsigned long long get_qixis_addr(void); " hugepagesz=2m hugepages=256" #if defined(CONFIG_QSPI_BOOT) #define CONFIG_BOOTCOMMAND "sf probe 0:0;" \ - "sf read 0x80200000 0xd00000 0x100000;"\ - " fsl_mc apply dpl 0x80200000 &&" \ + "sf read 0x80000000 0xd00000 0x100000;"\ + " fsl_mc lazyapply dpl 0x80000000 &&" \ " sf read $kernel_load $kernel_start" \ " $kernel_size && bootm $kernel_load" #elif defined(CONFIG_SD_BOOT) -#define CONFIG_BOOTCOMMAND "mmcinfo;mmc read 0x80200000 0x6800 0x800;"\ - " fsl_mc apply dpl 0x80200000 &&" \ +#define CONFIG_BOOTCOMMAND "mmcinfo;mmc read 0x80000000 0x6800 0x800;"\ + " fsl_mc lazyapply dpl 0x80000000 &&" \ " mmc read $kernel_load $kernel_start" \ " $kernel_size && bootm $kernel_load" #else /* NOR BOOT*/ -#define CONFIG_BOOTCOMMAND "fsl_mc apply dpl 0x580d00000 &&" \ +#define CONFIG_BOOTCOMMAND "fsl_mc lazyapply dpl 0x580d00000 &&" \ " cp.b $kernel_start $kernel_load" \ " $kernel_size && bootm $kernel_load" #endif diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h index 4459994..414c586 100644 --- a/include/configs/ls1088ardb.h +++ b/include/configs/ls1088ardb.h @@ -381,8 +381,8 @@ "installer=load mmc 0:2 $load_addr " \ "/flex_installer_arm64.itb; " \ "env exists mcinitcmd && run mcinitcmd && " \ - "mmc read 0x80200000 0x6800 0x800;" \ - "fsl_mc apply dpl 0x80200000;" \ + "mmc read 0x80000000 0x6800 0x800;" \ + "fsl_mc lazyapply dpl 0x80000000;" \ "bootm $load_addr#ls1088ardb\0" \ "qspi_bootcmd=echo Trying load from qspi..;" \ "sf probe && sf read $load_addr " \ @@ -402,11 +402,11 @@ #if defined(CONFIG_QSPI_BOOT) /* Try to boot an on-QSPI kernel first, then do normal distro boot */ #define CONFIG_BOOTCOMMAND \ - "sf read 0x80200000 0xd00000 0x100000;" \ + "sf read 0x80000000 0xd00000 0x100000;" \ "env exists mcinitcmd && env exists secureboot " \ " && sf read 0x80780000 0x780000 0x100000 " \ "&& esbc_validate 0x80780000;env exists mcinitcmd " \ - "&& fsl_mc apply dpl 0x80200000;" \ + "&& fsl_mc lazyapply dpl 0x80000000;" \ "run distro_bootcmd;run qspi_bootcmd;" \ "env exists secureboot && esbc_halt;" @@ -414,11 +414,11 @@ #elif defined(CONFIG_SD_BOOT) #define CONFIG_BOOTCOMMAND \ "env exists mcinitcmd && mmcinfo; " \ - "mmc read 0x80200000 0x6800 0x800; " \ + "mmc read 0x80000000 0x6800 0x800; " \ "env exists mcinitcmd && env exists secureboot " \ " && mmc read 0x80780000 0x3800 0x10 " \ "&& esbc_validate 0x80780000;env exists mcinitcmd " \ - "&& fsl_mc apply dpl 0x80200000;" \ + "&& fsl_mc lazyapply dpl 0x80000000;" \ "run distro_bootcmd;run sd_bootcmd;" \ "env exists secureboot && esbc_halt;" #endif -- 2.7.4

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[U-Boot] [RFC] arm: mvebu: Add Helios4 Armada 38x initial support
by dgilmore＠redhat.com 29 May '18

29 May '18

From: Dennis Gilmore <dennis(a)ausil.us> The helios4 is built on the SolidRun Armada 38x SOM. The port os based on the ClearFog board, using information from https://github.com/helios-4/u-boot-marvell as well as dtb input from https://github.com/helios-4/linux-marvell Currently ECC is not enabled Signed-off-by: Dennis Gilmore <dennis(a)ausil.us> --- arch/arm/dts/Makefile | 1 + arch/arm/dts/armada-388-helios4.dts | 454 ++++++++++++++++++++++++++++ arch/arm/mach-mvebu/Kconfig | 7 + board/solidrun/helios4/MAINTAINERS | 6 + board/solidrun/helios4/Makefile | 5 + board/solidrun/helios4/README | 46 +++ board/solidrun/helios4/helios4.c | 160 ++++++++++ board/solidrun/helios4/kwbimage.cfg | 12 + configs/helios4_defconfig | 57 ++++ include/configs/helios4.h | 185 ++++++++++++ 10 files changed, 933 insertions(+) create mode 100644 arch/arm/dts/armada-388-helios4.dts create mode 100644 board/solidrun/helios4/MAINTAINERS create mode 100644 board/solidrun/helios4/Makefile create mode 100644 board/solidrun/helios4/README create mode 100644 board/solidrun/helios4/helios4.c create mode 100644 board/solidrun/helios4/kwbimage.cfg create mode 100644 configs/helios4_defconfig create mode 100644 include/configs/helios4.h diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index a0349a8975..a18f4bbf7b 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -91,6 +91,7 @@ dtb-$(CONFIG_ARCH_MVEBU) += \ armada-375-db.dtb \ armada-388-clearfog.dtb \ armada-388-gp.dtb \ + armada-388-helios4.dtb \ armada-385-amc.dtb \ armada-7040-db.dtb \ armada-7040-db-nand.dtb \ diff --git a/arch/arm/dts/armada-388-helios4.dts b/arch/arm/dts/armada-388-helios4.dts new file mode 100644 index 0000000000..562cce4c2b --- /dev/null +++ b/arch/arm/dts/armada-388-helios4.dts @@ -0,0 +1,454 @@ +/* + * Device Tree file for SolidRun Clearfog revision A1 rev 2.0 (88F6828) + * + * Copyright (C) 2015 Russell King + * + * This board is in development; the contents of this file work with + * the A1 rev 2.0 of the board, which does not represent final + * production board. Things will change, don't expect this file to + * remain compatible info the future. + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This file is distributed in the hope that it will be useful + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include <dt-bindings/input/input.h> +#include <dt-bindings/gpio/gpio.h> +#include "armada-388.dtsi" + +/ { + model = "Helios4"; + compatible = "solidrun,helios4", "marvell,armada388", + "marvell,armada385", "marvell,armada380"; + + aliases { + /* So that mvebu u-boot can update the MAC addresses */ + ethernet1 = &eth0; + spi1 = &spi1; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory { + device_type = "memory"; + reg = <0x00000000 0x10000000>; /* 256 MB */ + }; + + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + system-leds { + compatible = "gpio-leds"; + status-led { + label = "helios4:green:status"; + gpios = <&gpio0 24 GPIO_ACTIVE_LOW>; + linux,default-trigger = "heartbeat"; + default-state = "on"; + }; + + fault-led { + label = "helios4:red:fault"; + gpios = <&gpio0 25 GPIO_ACTIVE_LOW>; + default-state = "keep"; + }; + }; + + io-leds { + compatible = "gpio-leds"; + sata1-led { + label = "helios4:green:ata1"; + gpios = <&gpio1 17 GPIO_ACTIVE_LOW>; + linux,default-trigger = "ata1"; + default-state = "off"; + }; + sata2-led { + label = "helios4:green:ata2"; + gpios = <&gpio1 18 GPIO_ACTIVE_LOW>; + linux,default-trigger = "ata2"; + default-state = "off"; + }; + sata3-led { + label = "helios4:green:ata3"; + gpios = <&gpio1 20 GPIO_ACTIVE_LOW>; + linux,default-trigger = "ata3"; + default-state = "off"; + }; + sata4-led { + label = "helios4:green:ata4"; + gpios = <&gpio1 21 GPIO_ACTIVE_LOW>; + linux,default-trigger = "ata4"; + default-state = "off"; + }; + usb-led { + label = "helios4:green:usb"; + gpios = <&gpio1 22 GPIO_ACTIVE_LOW>; + linux,default-trigger = "usb-host"; + default-state = "off"; + }; + }; + + fan1: j10-pwm { + compatible = "pwm-fan"; + pwms = <&gpio1 9 3800>; + }; + + fan2: j17-pwm { + compatible = "pwm-fan"; + pwms = <&gpio1 23 3800>; + }; + + + soc { + ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 + MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000 + MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000 + MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000>; + + internal-regs { + + ethernet@70000 { + mac-address = [00 50 43 02 02 01]; + pinctrl-0 = <&ge0_rgmii_pins>; + pinctrl-names = "default"; + phy = <&phy_dedicated>; + phy-mode = "rgmii-id"; + status = "okay"; + }; + + + i2c@11000 { + /* Is there anything on this? */ + clock-frequency = <100000>; + pinctrl-0 = <&i2c0_pins>; + pinctrl-names = "default"; + status = "okay"; + + /* + * PCA9655 GPIO expander, up to 1MHz clock. + * 0-CON3 CLKREQ# + * 1-CON3 PERST# + * 2-CON2 PERST# + * 3-CON3 W_DISABLE + * 4-CON2 CLKREQ# + * 5-USB3 overcurrent + * 6-USB3 power + * 7-CON2 W_DISABLE + * 8-JP4 P1 + * 9-JP4 P4 + * 10-JP4 P5 + * 11-m.2 DEVSLP + * 12-SFP_LOS + * 13-SFP_TX_FAULT + * 14-SFP_TX_DISABLE + * 15-SFP_MOD_DEF0 + */ + expander0: gpio-expander@20 { + /* + * This is how it should be: + * compatible = "onnn,pca9655", + * "nxp,pca9555"; + * but you can't do this because of + * the way I2C works. + */ + compatible = "nxp,pca9555"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x20>; + + usb3_ilimit { + gpio-hog; + gpios = <5 GPIO_ACTIVE_LOW>; + input; + line-name = "usb3-current-limit"; + }; + usb3_power { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "usb3-power"; + }; + m2_devslp { + gpio-hog; + gpios = <11 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "m.2 devslp"; + }; + }; + + /* The MCP3021 is 100kHz clock only */ + mikrobus_adc: mcp3021@4c { + compatible = "microchip,mcp3021"; + reg = <0x4c>; + }; + + /* Also something at 0x64 */ + }; + + i2c@11100 { + /* + * Routed to SFP, mikrobus, and PCIe. + * SFP limits this to 100kHz, and requires + * an AT24C01A/02/04 with address pins tied + * low, which takes addresses 0x50 and 0x51. + * Mikrobus doesn't specify beyond an I2C + * bus being present. + * PCIe uses ARP to assign addresses, or + * 0x63-0x64. + */ + clock-frequency = <100000>; + pinctrl-0 = <&helios4_i2c1_pins>; + pinctrl-names = "default"; + status = "okay"; + }; + + mdio@72004 { + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + + phy_dedicated: ethernet-phy@0 { + /* + * Annoyingly, the marvell phy driver + * configures the LED register, rather + * than preserving reset-loaded setting. + * We undo that rubbish here. + */ + marvell,reg-init = <3 16 0 0x101e>; + reg = <0>; + }; + }; + + pinctrl@18000 { + helios4_i2c1_pins: i2c1-pins { + /* SFP, PCIe, mSATA, mikrobus */ + marvell,pins = "mpp26", "mpp27"; + marvell,function = "i2c1"; + }; + helios4_sdhci_cd_pins: helios4-sdhci-cd-pins { + marvell,pins = "mpp20"; + marvell,function = "gpio"; + }; + helios4_sdhci_pins: helios4-sdhci-pins { + marvell,pins = "mpp21", "mpp28", + "mpp37", "mpp38", + "mpp39", "mpp40"; + marvell,function = "sd0"; + }; + helios4_spi1_cs_pins: spi1-cs-pins { + marvell,pins = "mpp55"; + marvell,function = "spi1"; + }; + mikro_pins: mikro-pins { + /* int: mpp22 rst: mpp29 */ + marvell,pins = "mpp22", "mpp29"; + marvell,function = "gpio"; + }; + mikro_spi_pins: mikro-spi-pins { + marvell,pins = "mpp43"; + marvell,function = "spi1"; + }; + mikro_uart_pins: mikro-uart-pins { + marvell,pins = "mpp24", "mpp25"; + marvell,function = "ua1"; + }; + rear_button_pins: rear-button-pins { + marvell,pins = "mpp34"; + marvell,function = "gpio"; + }; + }; + + rtc@a3800 { + /* + * If the rtc doesn't work, run "date reset" + * twice in u-boot. + */ + status = "okay"; + }; + + sata@a8000 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + sata0: sata-port@0 { + reg = <0>; + }; + + sata1: sata-port@1 { + reg = <1>; + }; + }; + + sata@e0000 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + sata2: sata-port@0 { + reg = <0>; + }; + + sata3: sata-port@1 { + reg = <1>; + }; + }; + + sdhci@d8000 { + bus-width = <4>; + cd-gpios = <&gpio0 20 GPIO_ACTIVE_LOW>; + no-1-8-v; + pinctrl-0 = <&helios4_sdhci_pins + &helios4_sdhci_cd_pins>; + pinctrl-names = "default"; + status = "okay"; + vmmc = <&reg_3p3v>; + wp-inverted; + }; + + serial@12000 { + pinctrl-0 = <&uart0_pins>; + pinctrl-names = "default"; + status = "okay"; + u-boot,dm-pre-reloc; + }; + + serial@12100 { + /* mikrobus uart */ + pinctrl-0 = <&mikro_uart_pins>; + pinctrl-names = "default"; + status = "okay"; + }; + + spi1: spi@10680 { + /* + * CS0: W25Q32 + * CS1: + * CS2: mikrobus + */ + pinctrl-0 = <&spi1_pins &helios4_spi1_cs_pins &mikro_spi_pins>; + pinctrl-names = "default"; + status = "okay"; + + spi-flash@0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "w25q32", "jedec,spi-nor", "spi-flash"; + reg = <0>; /* Chip select 0 */ + spi-max-frequency = <3000000>; + }; + }; + + usb3@f8000 { + status = "okay"; + }; + }; + + }; + + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-0 = <&rear_button_pins>; + pinctrl-names = "default"; + + button_0 { + /* The rear SW3 button */ + label = "Rear Button"; + gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; + linux,can-disable; + linux,code = <BTN_0>; + }; + }; +}; + +/* ++#define A38x_CUSTOMER_BOARD_1_MPP16_23 0x00400011 +MPP18: gpio ? (pca9655 int?) +MPP19: gpio ? (clkreq?) +MPP20: gpio ? (sd0 detect) +MPP21: sd0:cmd x sd0 +MPP22: gpio x mikro int +MPP23: gpio x switch irq ++#define A38x_CUSTOMER_BOARD_1_MPP24_31 0x22043333 +MPP24: ua1:rxd x mikro rx +MPP25: ua1:txd x mikro tx +MPP26: i2c1:sck x mikro sck +MPP27: i2c1:sda x mikro sda +MPP28: sd0:clk x sd0 +MPP29: gpio x mikro rst +MPP30: ge1:txd2 ? (config) +MPP31: ge1:txd3 ? (config) ++#define A38x_CUSTOMER_BOARD_1_MPP32_39 0x44400002 +MPP32: ge1:txctl ? (unused) +MPP33: gpio ? (pic_com0) +MPP34: gpio x rear button (pic_com1) +MPP35: gpio ? (pic_com2) +MPP36: gpio ? (unused) +MPP37: sd0:d3 x sd0 +MPP38: sd0:d0 x sd0 +MPP39: sd0:d1 x sd0 ++#define A38x_CUSTOMER_BOARD_1_MPP40_47 0x41144004 +MPP40: sd0:d2 x sd0 +MPP41: gpio x switch reset +MPP42: gpio ? sw1-1 +MPP43: spi1:cs2 x mikro cs +MPP44: sata3:prsnt ? (unused) +MPP45: ref:clk_out0 ? +MPP46: ref:clk_out1 x switch clk +MPP47: 4 ? (unused) ++#define A38x_CUSTOMER_BOARD_1_MPP48_55 0x40333333 +MPP48: tdm:pclk +MPP49: tdm:fsync +MPP50: tdm:drx +MPP51: tdm:dtx +MPP52: tdm:int +MPP53: tdm:rst +MPP54: gpio ? (pwm) +MPP55: spi1:cs1 x slic ++#define A38x_CUSTOMER_BOARD_1_MPP56_63 0x00004444 +MPP56: spi1:mosi x mikro mosi +MPP57: spi1:sck x mikro sck +MPP58: spi1:miso x mikro miso +MPP59: spi1:cs0 x w25q32 +*/ diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig index f431cff950..0b47642d0c 100644 --- a/arch/arm/mach-mvebu/Kconfig +++ b/arch/arm/mach-mvebu/Kconfig @@ -75,6 +75,10 @@ config TARGET_CLEARFOG bool "Support ClearFog" select 88F6820 +config TARGET_HELIOS4 + bool "Support Helios4" + select 88F6820 + config TARGET_MVEBU_ARMADA_37XX bool "Support Armada 37xx platforms" select ARMADA_3700 @@ -132,6 +136,7 @@ endchoice config SYS_BOARD default "clearfog" if TARGET_CLEARFOG + default "helios4" if TARGET_HELIOS4 default "mvebu_armada-37xx" if TARGET_MVEBU_ARMADA_37XX default "db-88f6720" if TARGET_DB_88F6720 default "db-88f6820-gp" if TARGET_DB_88F6820_GP @@ -146,6 +151,7 @@ config SYS_BOARD config SYS_CONFIG_NAME default "clearfog" if TARGET_CLEARFOG + default "helios4" if TARGET_HELIOS4 default "mvebu_armada-37xx" if TARGET_MVEBU_ARMADA_37XX default "db-88f6720" if TARGET_DB_88F6720 default "db-88f6820-gp" if TARGET_DB_88F6820_GP @@ -166,6 +172,7 @@ config SYS_VENDOR default "Marvell" if TARGET_DB_88F6820_AMC default "Marvell" if TARGET_MVEBU_ARMADA_8K default "solidrun" if TARGET_CLEARFOG + default "solidrun" if TARGET_HELIOS4 default "Synology" if TARGET_DS414 default "CZ.NIC" if TARGET_TURRIS_OMNIA default "CZ.NIC" if TARGET_TURRIS_MOX diff --git a/board/solidrun/helios4/MAINTAINERS b/board/solidrun/helios4/MAINTAINERS new file mode 100644 index 0000000000..298e5011c7 --- /dev/null +++ b/board/solidrun/helios4/MAINTAINERS @@ -0,0 +1,6 @@ +CLEARFOG BOARD +M: Stefan Roese <sr(a)denx.de> +S: Maintained +F: board/soldrun/clearfog/ +F: include/configs/clearfog.h +F: configs/clearfog_defconfig diff --git a/board/solidrun/helios4/Makefile b/board/solidrun/helios4/Makefile new file mode 100644 index 0000000000..84be38c572 --- /dev/null +++ b/board/solidrun/helios4/Makefile @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (C) 2015 Stefan Roese <sr(a)denx.de> + +obj-y := helios4.o diff --git a/board/solidrun/helios4/README b/board/solidrun/helios4/README new file mode 100644 index 0000000000..b067bd1624 --- /dev/null +++ b/board/solidrun/helios4/README @@ -0,0 +1,46 @@ +Update from original Marvell U-Boot to mainline U-Boot: +------------------------------------------------------- + +Generate the U-Boot image with these commands: + +$ make helios4_defconfig +$ make + +The resulting image including the SPL binary with the +full DDR setup is "u-boot-spl.kwb". + +Now all you need to do is copy this image on a SD card. +For example with this command: + +$ sudo dd if=u-boot-spl.kwb of=/dev/sdX bs=512 seek=1 + +Please use the correct device node for your setup instead +of "/dev/sdX" here! + +Boot selection: +--------------- + +Before powering up the board, boot selection should be done via the SW1 dip +switch (0: OFF, 1: ON): + + - SPI: 00010 + - SD/eMMC: 00111 + - SATA1: 11100 + - UART: 11110 + +Boot from UART: +--------------- + +Connect the on-board micro-USB (CF Pro: CON11, CF Base: CON5) +to your host. + +Set the SW1 DIP switches to UART boot (see above). + +Run the following command to initiate U-Boot download: + + ./tools/kwboot -b u-boot-spl.kwb /dev/ttyUSBX + +Use the correct UART device node for /dev/ttyUSBX. + +When download finishes start your favorite terminal emulator +on /dev/ttyUSBX. diff --git a/board/solidrun/helios4/helios4.c b/board/solidrun/helios4/helios4.c new file mode 100644 index 0000000000..6c27e99043 --- /dev/null +++ b/board/solidrun/helios4/helios4.c @@ -0,0 +1,160 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2015 Stefan Roese <sr(a)denx.de> + */ + +#include <common.h> +#include <i2c.h> +#include <miiphy.h> +#include <netdev.h> +#include <asm/io.h> +#include <asm/arch/cpu.h> +#include <asm/arch/soc.h> + +#include "../drivers/ddr/marvell/a38x/ddr3_init.h" +#include <../serdes/a38x/high_speed_env_spec.h> + +DECLARE_GLOBAL_DATA_PTR; + +#define ETH_PHY_CTRL_REG 0 +#define ETH_PHY_CTRL_POWER_DOWN_BIT 11 +#define ETH_PHY_CTRL_POWER_DOWN_MASK (1 << ETH_PHY_CTRL_POWER_DOWN_BIT) + +/* + * Those values and defines are taken from the Marvell U-Boot version + * "u-boot-2013.01-15t1-helios4" as well as the upstream config for clearfog + */ +#define BOARD_GPP_OUT_ENA_LOW 0xffffffff +#define BOARD_GPP_OUT_ENA_MID 0xffffffff + +#define BOARD_GPP_OUT_VAL_LOW 0x0 +#define BOARD_GPP_OUT_VAL_MID 0x0 +#define BOARD_GPP_POL_LOW 0x0 +#define BOARD_GPP_POL_MID 0x0 + +/* IO expander on Marvell GP board includes e.g. fan enabling */ +struct marvell_io_exp { + u8 chip; + u8 addr; + u8 val; +}; + +static struct marvell_io_exp io_exp[] = { + {0, 6, 0xf9}, + {0, 2, 0x46}, /* Assert reset signals and enable USB3 current limiter */ + {0, 6, 0xb9} +}; + +static struct serdes_map board_serdes_map[] = { + {SATA0, SERDES_SPEED_6_GBPS, SERDES_DEFAULT_MODE, 0, 0}, + {USB3_HOST0, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0}, + {SATA1, SERDES_SPEED_6_GBPS, SERDES_DEFAULT_MODE, 0, 0}, + {SATA3, SERDES_SPEED_6_GBPS, SERDES_DEFAULT_MODE, 0, 0}, + {SATA2, SERDES_SPEED_6_GBPS, SERDES_DEFAULT_MODE, 0, 0}, + {USB3_HOST1, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0}, +}; + +int hws_board_topology_load(struct serdes_map **serdes_map_array, u8 *count) +{ + *serdes_map_array = board_serdes_map; + *count = ARRAY_SIZE(board_serdes_map); + return 0; +} + +/* + * Define the DDR layout / topology here in the board file. This will + * be used by the DDR3 init code in the SPL U-Boot version to configure + * the DDR3 controller. + */ +static struct mv_ddr_topology_map board_topology_map = { + DEBUG_LEVEL_ERROR, + 0x1, /* active interfaces */ + /* cs_mask, mirror, dqs_swap, ck_swap X PUPs */ + { { { {0x1, 0, 0, 0}, + {0x1, 0, 0, 0}, + {0x1, 0, 0, 0}, + {0x1, 0, 0, 0}, + {0x1, 0, 0, 0} }, + SPEED_BIN_DDR_1600K, /* speed_bin */ + MV_DDR_DEV_WIDTH_16BIT, /* memory_width */ + MV_DDR_DIE_CAP_8GBIT, /* mem_size */ + DDR_FREQ_800, /* frequency */ + 0, 0, /* cas_wl cas_l */ + MV_DDR_TEMP_LOW, /* temperature */ + MV_DDR_TIM_DEFAULT} }, /* timing */ + BUS_MASK_32BIT_ECC, /* Busses mask */ + MV_DDR_CFG_DEFAULT, /* ddr configuration data source */ + { {0} }, /* raw spd data */ + {0} /* timing parameters */ +}; + +struct mv_ddr_topology_map *mv_ddr_topology_map_get(void) +{ + /* Return the board topology as defined in the board code */ + return &board_topology_map; +} + +int board_early_init_f(void) +{ + /* Configure MPP */ + writel(0x11111111, MVEBU_MPP_BASE + 0x00); + writel(0x11111111, MVEBU_MPP_BASE + 0x04); + writel(0x10400011, MVEBU_MPP_BASE + 0x08); + writel(0x22043333, MVEBU_MPP_BASE + 0x0c); + writel(0x44400002, MVEBU_MPP_BASE + 0x10); + writel(0x41144004, MVEBU_MPP_BASE + 0x14); + writel(0x40333333, MVEBU_MPP_BASE + 0x18); + writel(0x00004444, MVEBU_MPP_BASE + 0x1c); + + /* Set GPP Out value */ + writel(BOARD_GPP_OUT_VAL_LOW, MVEBU_GPIO0_BASE + 0x00); + writel(BOARD_GPP_OUT_VAL_MID, MVEBU_GPIO1_BASE + 0x00); + + /* Set GPP Polarity */ + writel(BOARD_GPP_POL_LOW, MVEBU_GPIO0_BASE + 0x0c); + writel(BOARD_GPP_POL_MID, MVEBU_GPIO1_BASE + 0x0c); + + /* Set GPP Out Enable */ + writel(BOARD_GPP_OUT_ENA_LOW, MVEBU_GPIO0_BASE + 0x04); + writel(BOARD_GPP_OUT_ENA_MID, MVEBU_GPIO1_BASE + 0x04); + + return 0; +} + +int board_init(void) +{ + int i; + + /* Address of boot parameters */ + gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100; + + /* Toggle GPIO41 to reset onboard switch and phy */ + clrbits_le32(MVEBU_GPIO1_BASE + 0x0, BIT(9)); + clrbits_le32(MVEBU_GPIO1_BASE + 0x4, BIT(9)); + /* GPIO 19 on ClearFog rev 2.1 controls the uSOM onboard phy reset */ + clrbits_le32(MVEBU_GPIO0_BASE + 0x0, BIT(19)); + clrbits_le32(MVEBU_GPIO0_BASE + 0x4, BIT(19)); + mdelay(1); + setbits_le32(MVEBU_GPIO1_BASE + 0x0, BIT(9)); + setbits_le32(MVEBU_GPIO0_BASE + 0x0, BIT(19)); + mdelay(10); + + /* Init I2C IO expanders */ + for (i = 0; i < ARRAY_SIZE(io_exp); i++) + i2c_write(io_exp[i].chip, io_exp[i].addr, 1, &io_exp[i].val, 1); + + return 0; +} + +int checkboard(void) +{ + puts("Board: Helios4\n"); + + return 0; +} + +int board_eth_init(bd_t *bis) +{ + cpu_eth_init(bis); /* Built in controller(s) come first */ + return pci_eth_init(bis); +} diff --git a/board/solidrun/helios4/kwbimage.cfg b/board/solidrun/helios4/kwbimage.cfg new file mode 100644 index 0000000000..f41d25a8a1 --- /dev/null +++ b/board/solidrun/helios4/kwbimage.cfg @@ -0,0 +1,12 @@ +# +# Copyright (C) 2015 Stefan Roese <sr(a)denx.de> +# + +# Armada 38x use version 1 image format +VERSION 1 + +# Boot Media configurations +BOOT_FROM sdio + +# Binary Header (bin_hdr) with DDR3 training code +BINARY spl/u-boot-spl-dtb.bin 0000005b 00000068 diff --git a/configs/helios4_defconfig b/configs/helios4_defconfig new file mode 100644 index 0000000000..c0180e99b5 --- /dev/null +++ b/configs/helios4_defconfig @@ -0,0 +1,57 @@ +CONFIG_ARM=y +CONFIG_ARCH_MVEBU=y +CONFIG_SYS_TEXT_BASE=0x00800000 +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_TARGET_HELIOS4=y +CONFIG_SPL_MMC_SUPPORT=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_SPL=y +CONFIG_DEFAULT_DEVICE_TREE="armada-388-helios4" +CONFIG_DEBUG_UART=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_BOOTDELAY=3 +CONFIG_SYS_CONSOLE_INFO_QUIET=y +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x141 +CONFIG_SPL_I2C_SUPPORT=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y +CONFIG_CMD_SF=y +CONFIG_CMD_SPI=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_TIME=y +# CONFIG_SPL_PARTITION_UUIDS is not set +CONFIG_ENV_IS_IN_MMC=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_OF_TRANSLATE=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_MV=y +CONFIG_AHCI=y +CONFIG_SCSI_AHCI=y +CONFIG_SCSI=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_FLASH_MTD=y +CONFIG_PHY_GIGE=y +CONFIG_MVNETA=y +CONFIG_PCI=y +CONFIG_DEBUG_UART_BASE=0xd0012000 +CONFIG_DEBUG_UART_CLOCK=250000000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550=y +CONFIG_KIRKWOOD_SPI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_STORAGE=y diff --git a/include/configs/helios4.h b/include/configs/helios4.h new file mode 100644 index 0000000000..efc1c3f751 --- /dev/null +++ b/include/configs/helios4.h @@ -0,0 +1,185 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2015 Stefan Roese <sr(a)denx.de> + */ + +#ifndef _CONFIG_HELIOS4_H +#define _CONFIG_HELIOS4_H + +/* + * High Level Configuration Options (easy to change) + */ + +/* + * TEXT_BASE needs to be below 16MiB, since this area is scrubbed + * for DDR ECC byte filling in the SPL before loading the main + * U-Boot into it. + */ +#define CONFIG_SYS_TCLK 250000000 /* 250MHz */ + +/* + * Commands configuration + */ + +/* I2C */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MVTWSI +#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE +#define CONFIG_SYS_I2C_SLAVE 0x0 +#define CONFIG_SYS_I2C_SPEED 100000 + +/* SPI NOR flash default params, used by sf commands */ +#define CONFIG_SF_DEFAULT_BUS 1 + +/* + * SDIO/MMC Card Configuration + */ +#define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE + +/* USB/EHCI configuration */ +#define CONFIG_EHCI_IS_TDI + +#define CONFIG_ENV_MIN_ENTRIES 128 + +/* + * SATA/SCSI/AHCI configuration + */ +#define CONFIG_SCSI_AHCI_PLAT +#define CONFIG_SYS_SCSI_MAX_SCSI_ID 2 +#define CONFIG_SYS_SCSI_MAX_LUN 2 +#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ + CONFIG_SYS_SCSI_MAX_LUN) + +/* Environment in MMC */ +#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_ENV_SECT_SIZE 0x200 +#define CONFIG_ENV_SIZE 0x10000 +/* + * For SD - reserve 1 LBA for MBR + 1M for u-boot image. The MMC/eMMC + * boot image starts @ LBA-0. + * As result in MMC/eMMC case it will be a 1 sector gap between u-boot + * image and environment + */ +#define CONFIG_ENV_OFFSET 0xf0000 +#define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET + +#define CONFIG_PHY_MARVELL /* there is a marvell phy */ +#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ + +/* PCIe support */ +#ifndef CONFIG_SPL_BUILD +#define CONFIG_PCI_MVEBU +#define CONFIG_PCI_SCAN_SHOW +#endif + +/* Keep device tree and initrd in lower memory so the kernel can access them */ +#define RELOCATION_LIMITS_ENV_SETTINGS \ + "fdt_high=0x10000000\0" \ + "initrd_high=0x10000000\0" + +/* SPL */ +/* + * Select the boot device here + * + * Currently supported are: + * SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash + * SPL_BOOT_SDIO_MMC_CARD - Booting via SDIO/MMC card (partition 1) + */ +#define SPL_BOOT_SPI_NOR_FLASH 1 +#define SPL_BOOT_SDIO_MMC_CARD 2 +#define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SDIO_MMC_CARD + +/* Defines for SPL */ +#define CONFIG_SPL_SIZE (140 << 10) +#define CONFIG_SPL_TEXT_BASE 0x40000030 +#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x0030) + +#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) +#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) + +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SYS_MALLOC_SIMPLE +#endif + +#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) +#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) + +#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH +/* SPL related SPI defines */ +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 +#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS +#endif + +#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD +/* SPL related MMC defines */ +#define CONFIG_SYS_MMC_U_BOOT_OFFS (160 << 10) +#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS +#ifdef CONFIG_SPL_BUILD +#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */ +#endif + +/* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */ +#define CONFIG_SPD_EEPROM 0x4e +#define CONFIG_BOARD_ECC_SUPPORT /* this board supports ECC */ + +#endif + +/* + * mv-common.h should be defined after CMD configs since it used them + * to enable certain macros + */ +#include "mv-common.h" + +/* Include the common distro boot environment */ +#ifndef CONFIG_SPL_BUILD + +#ifdef CONFIG_MMC +#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) +#else +#define BOOT_TARGET_DEVICES_MMC(func) +#endif + +#ifdef CONFIG_USB_STORAGE +#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) +#else +#define BOOT_TARGET_DEVICES_USB(func) +#endif + +#ifdef CONFIG_SATA +#define BOOT_TARGET_DEVICES_SATA(func) func(SATA, sata, 0) +#else +#define BOOT_TARGET_DEVICES_SATA(func) +#endif + +#define BOOT_TARGET_DEVICES(func) \ + BOOT_TARGET_DEVICES_MMC(func) \ + BOOT_TARGET_DEVICES_USB(func) \ + BOOT_TARGET_DEVICES_SATA(func) \ + func(PXE, pxe, na) \ + func(DHCP, dhcp, na) + +#define KERNEL_ADDR_R __stringify(0x800000) +#define FDT_ADDR_R __stringify(0x100000) +#define RAMDISK_ADDR_R __stringify(0x1800000) +#define SCRIPT_ADDR_R __stringify(0x200000) +#define PXEFILE_ADDR_R __stringify(0x300000) + +#define LOAD_ADDRESS_ENV_SETTINGS \ + "kernel_addr_r=" KERNEL_ADDR_R "\0" \ + "fdt_addr_r=" FDT_ADDR_R "\0" \ + "ramdisk_addr_r=" RAMDISK_ADDR_R "\0" \ + "scriptaddr=" SCRIPT_ADDR_R "\0" \ + "pxefile_addr_r=" PXEFILE_ADDR_R "\0" + +#include <config_distro_bootcmd.h> + +#define CONFIG_EXTRA_ENV_SETTINGS \ + RELOCATION_LIMITS_ENV_SETTINGS \ + LOAD_ADDRESS_ENV_SETTINGS \ + "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ + "console=ttyS0,115200\0" \ + BOOTENV + +#endif /* CONFIG_SPL_BUILD */ + +#endif /* _CONFIG_HELIOS4_H */ -- 2.17.0

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[U-Boot] [PATCH] ddr: altera: Add ECC DRAM scrubbing support for Arria10
by Marek Vasut 29 May '18

29 May '18

The SDRAM must first be rewritten by zeroes if ECC is used to initialize the ECC metadata. Make the CPU overwrite the DRAM with zeroes in such a case. This scrubbing implementation turns the caches on temporarily, then overwrites the whole RAM with zeroes, flushes the caches and turns them off again. This provides satisfactory performance. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Chin Liang See <chin.liang.see(a)intel.com> Cc: Dinh Nguyen <dinguyen(a)kernel.org> --- drivers/ddr/altera/sdram_arria10.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/drivers/ddr/altera/sdram_arria10.c b/drivers/ddr/altera/sdram_arria10.c index 1f2b7f4819..29ea7492f3 100644 --- a/drivers/ddr/altera/sdram_arria10.c +++ b/drivers/ddr/altera/sdram_arria10.c @@ -215,6 +215,30 @@ static int ddr_setup(void) return 0; } +static int sdram_is_ecc_enabled(void) +{ + return !!(readl(&socfpga_ecc_hmc_base->eccctrl) & + ALT_ECC_HMC_OCP_ECCCTL_ECC_EN_SET_MSK); +} + +/* Initialize SDRAM ECC bits to avoid false DBE */ +static void sdram_init_ecc_bits(u32 size) +{ + icache_enable(); + + memset(0, 0, 0x8000); + gd->arch.tlb_addr = 0x4000; + gd->arch.tlb_size = PGTABLE_SIZE; + + dcache_enable(); + + printf("DDRCAL: Scrubbing ECC RAM (%i MiB).\n", size >> 20); + memset((void *)0x8000, 0, size - 0x8000); + flush_dcache_all(); + printf("DDRCAL: Scrubbing ECC RAM done.\n"); + dcache_disable(); +} + /* Function to startup the SDRAM*/ static int sdram_startup(void) { @@ -711,5 +735,8 @@ int ddr_calibration_sequence(void) if (of_sdram_firewall_setup(gd->fdt_blob)) puts("FW: Error Configuring Firewall\n"); + if (sdram_is_ecc_enabled()) + sdram_init_ecc_bits(gd->ram_size); + return 0; } -- 2.17.0

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[U-Boot] Uboot send pull request
by uboot＠andestech.com 29 May '18

29 May '18

Hi Tom, Please pull the following patch from u-boot-riscv into your tree. Thanks! The following changes since commit c3c863880479edeb5b08226e622d13c91326e4a7: add FIT data-position & data-offset property support (2018-05-26 18:19:19 -0400) are available in the Git repository at: git://git.denx.de/u-boot-riscv.git for you to fetch changes up to 9171ab8836511ab1e65e120b7288acd6d5baac70: mtd: ftsmc020: Drop unsed code (2018-05-29 14:45:04 +0800) ---------------------------------------------------------------- Alexander Graf (7): riscv: Add setjmp/longjmp code riscv: Enable function sections riscv: Add EFI application infrastructure riscv: Add board_quiesce_devices stub efi_loader: Use EFI_CACHELINE_SIZE in the image loader too distro: Extend with RISC-V defines riscv: nx25: Enable distro boot Rick Chen (15): efi_loader: Enable RISC-V support SPDX: Convert single license tags to Linux Kernel style riscv: cpu: nx25: Rename as ax25 board: nx25-ae250: Rename as ax25-ae350 configs: nx25-ae250:Rename as ax25-ae350 doc: ae250: Rename as ae350 configs: ax25-ae350: Set 64-bit as default configuration spi: atcspi200: Fix compiler warning net: ftmac100: Fix compiler warning riscv: dts: Sync DT with Linux Kernel mmc: ftsdc010_mci: Sync compatible with DT mmc node configs: ax25-ae350: Support cfi flash riscv: dts: Support cfi flash board: ax25-ae350: Support cfi flash mtd: ftsmc020: Drop unsed code arch/riscv/Kconfig | 6 ++-- arch/riscv/config.mk | 7 +++- arch/riscv/cpu/{nx25 => ax25}/Makefile | 0 arch/riscv/cpu/{nx25 => ax25}/cpu.c | 2 +- arch/riscv/cpu/{nx25 => ax25}/start.S | 0 arch/riscv/cpu/{nx25 => ax25}/u-boot.lds | 18 +++++++++- arch/riscv/dts/Makefile | 2 +- arch/riscv/dts/ae250.dts | 97 --------------------------------------------------- arch/riscv/dts/ae350.dts | 149 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ arch/riscv/include/asm/mach-types.h | 10 +++--- arch/riscv/include/asm/setjmp.h | 25 ++++++++++++++ arch/riscv/include/asm/u-boot-riscv.h | 1 + arch/riscv/lib/Makefile | 12 +++++++ arch/riscv/lib/bootm.c | 4 +++ arch/riscv/lib/crt0_riscv_efi.S | 151 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ arch/riscv/lib/elf_riscv32_efi.lds | 71 ++++++++++++++++++++++++++++++++++++++ arch/riscv/lib/elf_riscv64_efi.lds | 71 ++++++++++++++++++++++++++++++++++++++ arch/riscv/lib/reloc_riscv_efi.c | 98 ++++++++++++++++++++++++++++++++++++++++++++++++++++ arch/riscv/lib/setjmp.S | 65 +++++++++++++++++++++++++++++++++++ board/AndesTech/{nx25-ae250 => ax25-ae350}/Kconfig | 10 +++--- board/AndesTech/ax25-ae350/MAINTAINERS | 6 ++++ board/AndesTech/{nx25-ae250 => ax25-ae350}/Makefile | 2 +- board/AndesTech/{nx25-ae250/nx25-ae250.c => ax25-ae350/ax25-ae350.c} | 36 ++++++++++++++++++- board/AndesTech/nx25-ae250/MAINTAINERS | 6 ---- cmd/Kconfig | 2 +- configs/{nx25-ae250_defconfig => ax25-ae350_defconfig} | 11 ++++-- doc/{README.NX25 => README.AX25} | 2 +- doc/{README.ae250 => README.ae350} | 34 +++++++++--------- drivers/mmc/ftsdc010_mci.c | 2 +- drivers/mtd/Makefile | 1 - drivers/mtd/ftsmc020.c | 37 -------------------- drivers/net/ftmac100.c | 14 ++++---- drivers/spi/atcspi200_spi.c | 6 ++-- include/config_distro_bootcmd.h | 11 ++++++ include/configs/{nx25-ae250.h => ax25-ae350.h} | 55 +++++++++++++++++++++++++++++ include/efi_loader.h | 7 ++++ lib/efi_loader/Kconfig | 2 +- lib/efi_loader/efi_image_loader.c | 2 +- lib/efi_loader/efi_runtime.c | 44 ++++++++++++++++++------ 39 files changed, 875 insertions(+), 204 deletions(-) rename arch/riscv/cpu/{nx25 => ax25}/Makefile (100%) rename arch/riscv/cpu/{nx25 => ax25}/cpu.c (93%) rename arch/riscv/cpu/{nx25 => ax25}/start.S (100%) rename arch/riscv/cpu/{nx25 => ax25}/u-boot.lds (71%) delete mode 100644 arch/riscv/dts/ae250.dts create mode 100644 arch/riscv/dts/ae350.dts create mode 100644 arch/riscv/include/asm/setjmp.h create mode 100644 arch/riscv/lib/crt0_riscv_efi.S create mode 100644 arch/riscv/lib/elf_riscv32_efi.lds create mode 100644 arch/riscv/lib/elf_riscv64_efi.lds create mode 100644 arch/riscv/lib/reloc_riscv_efi.c create mode 100644 arch/riscv/lib/setjmp.S rename board/AndesTech/{nx25-ae250 => ax25-ae350}/Kconfig (70%) create mode 100644 board/AndesTech/ax25-ae350/MAINTAINERS rename board/AndesTech/{nx25-ae250 => ax25-ae350}/Makefile (87%) rename board/AndesTech/{nx25-ae250/nx25-ae250.c => ax25-ae350/ax25-ae350.c} (70%) delete mode 100644 board/AndesTech/nx25-ae250/MAINTAINERS rename configs/{nx25-ae250_defconfig => ax25-ae350_defconfig} (78%) rename doc/{README.NX25 => README.AX25} (95%) rename doc/{README.ae250 => README.ae350} (93%) delete mode 100644 drivers/mtd/ftsmc020.c rename include/configs/{nx25-ae250.h => ax25-ae350.h} (62%)

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